WO2019061780A1 - 柔性显示面板 - Google Patents

柔性显示面板 Download PDF

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Publication number
WO2019061780A1
WO2019061780A1 PCT/CN2017/112889 CN2017112889W WO2019061780A1 WO 2019061780 A1 WO2019061780 A1 WO 2019061780A1 CN 2017112889 W CN2017112889 W CN 2017112889W WO 2019061780 A1 WO2019061780 A1 WO 2019061780A1
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WO
WIPO (PCT)
Prior art keywords
metal plate
layer
gate
insulating layer
display area
Prior art date
Application number
PCT/CN2017/112889
Other languages
English (en)
French (fr)
Inventor
王幸
Original Assignee
武汉华星光电半导体显示技术有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 武汉华星光电半导体显示技术有限公司 filed Critical 武汉华星光电半导体显示技术有限公司
Priority to US15/580,449 priority Critical patent/US10374024B2/en
Publication of WO2019061780A1 publication Critical patent/WO2019061780A1/zh

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
    • G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
    • G09F9/30—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
    • G09F9/301—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements flexible foldable or roll-able electronic displays, e.g. thin LCD, OLED
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1218—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition or structure of the substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1255—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs integrated with passive devices, e.g. auxiliary capacitors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/1201—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/121—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
    • H10K59/1213—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements the pixel elements being TFTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/121—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
    • H10K59/1216—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements the pixel elements being capacitors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K77/00—Constructional details of devices covered by this subclass and not covered by groups H10K10/80, H10K30/80, H10K50/80 or H10K59/80
    • H10K77/10—Substrates, e.g. flexible substrates
    • H10K77/111—Flexible substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259—Multistep manufacturing methods
    • H01L27/1288—Multistep manufacturing methods employing particular masking sequences or specially adapted masks, e.g. half-tone mask
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78645—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with multiple gate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K2102/00—Constructional details relating to the organic devices covered by this subclass
    • H10K2102/301—Details of OLEDs
    • H10K2102/311—Flexible OLED
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y02E10/549—Organic PV cells
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Definitions

  • the present invention relates to the field of display devices, and more particularly to a flexible display panel.
  • Display devices such as LCD and OLED have become the main carrier and material basis for information exchange and transmission, and have become the focus of more and more people, and are widely used in all aspects of work and life.
  • flexible display technology has become one of the most competitive display technologies, and has become the object of favor of the industry and consumers.
  • One of the great advantages of flexible display technology is its foldability, which increases the display area without increasing the size of the device and is very portable.
  • Flexible TFT-LCDs and flexible OLEDs have gradually developed into the most promising high-tech industries.
  • Various research institutes and companies have launched a variety of flexible display devices, such as TV screens. Mobile phone screens, wearable devices, large commercial displays, computers, etc.
  • OLED Organic Light-Emitting Diode
  • LCD Liquid Crystal Display
  • OLED flexible display technology uses a very thin organic material light-emitting layer and a flexible substrate, and when an electric current passes, these organic materials emit light.
  • the OLED display device can be classified into a passive matrix type OLED according to a driving method (Passive Matrix) OLED, PMOLED) and Active Matrix OLED (AMOLED), namely direct addressing and thin film transistors (Thin Film) Transistor, TFT) matrix addressing two categories.
  • Passive Matrix OLED PMOLED
  • AMOLED Active Matrix OLED
  • the active matrix type OLED has pixels arranged in an array, belongs to an active display type, has high luminous efficiency and excellent performance.
  • the disadvantage is that during the manufacturing process, the accumulated static electricity easily causes the second gate of the fan-out area (fanout area) of the non-display area to be damaged, resulting in corrosion or breakage of the signal transmission line, resulting in abnormal display of the flexible display panel.
  • the technical problem to be solved by the present invention is to provide a flexible display panel, which can effectively improve the yield of the flexible display panel, eliminate the corrosion of the film layer caused by static electricity, and protect the display of the flexible drive panel from damage.
  • the present invention provides a flexible display panel including a display area and a non-display area, wherein a thin film transistor is disposed in the display area, the thin film transistor has a first gate and a second a non-display area including a metal trace area and a blank area between the metal trace areas, wherein the blank area is provided with a first metal plate and a second metal plate.
  • the first metal plate is in the same layer as the first gate
  • the second metal plate is in the same layer as the second gate
  • the first metal plate and the second metal plate form a capacitor.
  • the first metal plate and the second metal plate have the same shape
  • the first gate has the same thickness as the first metal plate
  • the second gate and the second metal plate have the same thickness.
  • the present invention further provides a flexible display panel including a display area and a non-display area, wherein a thin film transistor is disposed in the display area, the thin film transistor has a first gate and a second gate,
  • the non-display area includes a metal trace area and a blank area between the metal trace areas, and the blank area is provided with an opposite first metal plate and a second metal plate, the first metal The plate is in the same layer as the first gate, the second metal plate is in the same layer as the second gate, and the first metal plate and the second metal plate form a capacitor.
  • the first metal plate and the second metal plate have the same shape.
  • the first metal plate and the second metal plate are circular or square in shape.
  • the first gate is the same thickness as the first metal plate, and the second gate is the same thickness as the second metal plate.
  • the display area includes a flexible substrate, a buffer layer disposed on the flexible substrate, an active layer disposed on the buffer layer, covering the active layer, and the buffer a first insulating layer of the layer, the first gate is disposed on the first insulating layer, the first insulating layer extends to the non-display area, and the first metal plate is disposed to extend to the On the first insulating layer of the non-display area.
  • the flexible display panel further includes a second insulating layer covering the first gate, the first metal plate, and the first insulating layer, a display region, the second gate is disposed on the second insulating layer, and the second metal plate is disposed on the second insulating layer at the blank region of the non-display region.
  • the flexible display device further includes a third insulating layer covering the second gate, the second metal plate, and the second insulating layer.
  • the flexible display device further includes a source and a drain, and the source and the drain respectively pass through the first insulating layer, the second insulating layer, and the third insulating layer. And respectively connected to the active layer. .
  • the invention has the advantages that a series of capacitor designs are added in the blank area of the non-display area, and the capacitor has a certain ability to buffer static charge release, which can reduce the damage of static electricity to the inside of the device and the metal trace film layer, and protect the flexible display.
  • the metal film layer trace is not damaged or destroyed by static electricity, effectively improving the yield of the flexible display panel, eliminating the corrosion of the film layer caused by static electricity, and protecting the flexible drive panel screen display. Not damaged.
  • the first metal plate and the second metal plate are formed by the same process as the first gate and the second gate, and no additional process is added, which saves cost.
  • FIG. 1 is a schematic structural view of a flexible display panel of the present invention
  • FIG. 2 is a schematic view showing the steps of a method for fabricating a flexible display panel of the present invention
  • 3A-3H are process flow diagrams of a method of fabricating a flexible display panel of the present invention.
  • the flexible display panel of the present invention includes a display area A and a non-display area B.
  • the display area A and the non-display area B are schematically indicated by a broken line frame.
  • the flexible display panel of the present invention is an organic light emitting diode display panel, that is, an OLED flexible display panel, having an organic light emitting diode in its display area A.
  • the display area A is for displaying a pattern
  • the non-display area B is an area other than the display area A, for example, a metal wiring area.
  • the metal trace area is referred to as a fanout area, and a blank area is provided between the metal trace areas.
  • the specific structure of the flexible display panel is as follows.
  • the display area A includes a flexible substrate 11.
  • the flexible substrate 11 is formed by coating a flexible substrate film layer on a glass substrate.
  • the material of the flexible substrate film layer may be polyimide (PI), and preferably, the thickness thereof may be 10 to 20 ⁇ m.
  • a buffer layer 12 is disposed on the flexible substrate 11, and an active layer 13 is disposed on the buffer layer 12.
  • a first insulating layer 14 covers the buffer layer 12 and the active layer 13, and the first insulating layer 14 extends to the non-display area B.
  • a first gate electrode 15 is disposed on the first insulating layer 14, and the first gate electrode 15 is disposed corresponding to the active layer 13.
  • the first metal plate 16 is disposed on the first insulating layer 14 extending to the non-display area B, and the first metal plate 16 is located in the non-display area B The blank area.
  • the first gate 15 is disposed in the same layer as the first metal plate 16.
  • the buffer layer 12 has a thickness of 200 to 300 nm
  • the active layer 13 has a thickness of 40 to 50 nm
  • the first insulating layer 14 has a thickness of 50 to 200 nm
  • the first gate 15 and The first metal plate 16 has a thickness of 150 to 250 nm.
  • a second insulating layer 17 covers the first gate electrode 15, the first metal plate 16, and the first insulating layer 14.
  • a second gate electrode 18 and a second metal plate 19 are disposed on the second insulating layer 17.
  • the second gate 18 is disposed corresponding to the first gate 15
  • the second metal plate 19 is disposed corresponding to the first metal plate 16 , the second gate 18 and the second metal plate 19 same layer settings.
  • the second insulating layer 17 has a thickness of 50 to 200 nm
  • the second gate electrode 18 and the second metal plate 19 have a thickness of 150 to 250 nm.
  • the second metal plate 19 is disposed corresponding to the first metal plate 16, and the second metal plate 19 forms a capacitance with the first metal plate 16 and the second insulating layer 17 therebetween.
  • the capacitor has the ability to buffer the static charge release, and to reduce the damage of static electricity to the inside of the device and the metal trace film layer.
  • the first metal plate 16 and the second metal plate 19 have the same shape, for example, both circular or square.
  • a third insulating layer 20 covers the second gate 18, the second metal plate 19, and the second insulating layer 17.
  • a source 21 and a drain 22 respectively pass through the first insulating layer 14, the second insulating layer 17, and the third insulating layer 20, and are respectively connected to the active layer 13.
  • the third insulating layer 20 has a thickness of 500 to 700 nm, and the source 21 and the drain 22 have a thickness of 400 to 600 nm.
  • the active layer 13, the first gate 15, the second gate 18, the source 21, and the drain 22 constitute a thin film transistor.
  • a planarization layer 23 covers the third insulating layer 20, the source 21 and the drain 22, and a via is formed at the drain 22 (not shown in the drawing).
  • An anode layer 24 of an organic light emitting diode is connected to the drain 22 through the via.
  • a pixel defining layer 25 is disposed on the anode layer 24.
  • An organic light emitting layer 26 is disposed on the anode layer 24 and surrounded by the pixel defining layer 25.
  • a cathode layer 27 is disposed on the pixel defining layer 25 and the organic light emitting layer 26.
  • the thickness of the planarization layer 23 is 1.5 to 3 ⁇ m
  • the thickness of the anode layer 24 is 100 to 250 nm
  • the thickness of the pixel defining layer 25 is 1.5 to 3 ⁇ m
  • the thickness of the cathode layer 27 is 10 nm. ⁇ 200nm.
  • the material of the first gate 15, the second gate 18, the first metal plate 16, and the second metal layer 19 may be molybdenum; the source 21 and the drain 22
  • the materials can be titanium and aluminum.
  • the first insulating layer 14, the second insulating layer 17, and the third insulating layer 30 are inorganic material layers, which may be one or a combination of SiOx and SiNx, the active layer 13
  • the material is low temperature polysilicon (Low Temperature Poly-silicon, LTPS).
  • the material of the planarization layer 23 and the pixel definition layer 25 may be polyimide.
  • the material of the anode layer 24 may be indium tin oxide and silver.
  • the material of the cathode layer 27 may be a light transmissive material such as a thinner layer of magnesium or silver.
  • FIGS. 3A to 3H are process flow diagrams of a method for fabricating a flexible display panel of the present invention.
  • a buffer layer 101, an active layer 103, a first insulating layer 102 and a first metal layer 104 are sequentially formed on the surface of the flexible substrate 100.
  • the flexible substrate 100 is formed by coating a flexible substrate film layer 1002 on a glass substrate 1001.
  • the material of the flexible substrate film layer 111 may be polyimide (PI), and preferably, the thickness thereof may be 10 to 20 ⁇ m.
  • the buffer layer 101 has a thickness of 200 to 300 nm
  • the active layer 103 has a thickness of 40 to 50 nm
  • the first insulating layer 102 has a thickness of 50 to 200 nm.
  • the first metal layer 104 is The thickness is 150 ⁇ 250nm.
  • the first metal layer 104 is patterned to form a first gate 105 and a first metal plate 106.
  • the first gate 105 is located in the display area A, and the first metal plate 106 is located in a blank area of the non-display area B.
  • the first gate 105 and the first metal plate 106 are formed by the same metal layer and the same process, and the first gate 105 and the first metal plate 106 are in the same layer.
  • a second insulating layer 107 and a second metal layer 108 are formed on the surface of the first gate 105, the first metal plate 106, and the first insulating layer 102.
  • the second insulating layer 107 and the second metal layer 108 may be formed by a conventional deposition sputtering method.
  • the second insulating layer 107 has a thickness of 50 to 200 nm
  • the second metal layer 108 has a thickness of 150 to 250 nm.
  • the second metal layer 108 is patterned to form a second gate 109 and a second metal plate 110.
  • the second gate 109 is located in the display area A, and the second metal plate 110 is located in a blank area of the non-display area B.
  • the second gate 109 and the second metal plate 110 are formed by the same metal layer and the same process, and the second gate 109 and the second metal plate 110 are located in the same layer.
  • the first metal plate 106 is disposed opposite to the second metal plate 110, and the second metal plate 110 forms a capacitance with the first metal plate 106 and the second insulating layer 107 therebetween.
  • the capacitor has a certain ability to buffer static charge release, and to reduce the damage of static electricity to the inside of the device and the metal trace film layer.
  • the first metal plate 106 and the second metal plate 110 have the same shape, for example, all of a circle or a square.
  • a third insulating layer 111 is formed on the surfaces of the second gate 109, the second metal plate 110, and the second insulating layer 107.
  • the method of forming the third insulating layer 111 may employ a deposition method conventional in the art.
  • a source 112 and a drain 113 are formed.
  • the source 112 and the drain 113 pass through the first insulating layer 102, the second insulating layer 107, and the third insulating layer 111, respectively, and are respectively connected to the active layer 103.
  • a planarization layer 114, an anode layer 115, a pixel defining layer 116, an organic light emitting layer 117, and a cathode layer 118 are formed on the surface of the third insulating layer 111.
  • the anode layer 115 is formed on the surface of the third insulating layer 111.
  • the drain electrode 113 is connected through the planarization layer 114.
  • the method for fabricating the planarization layer 114, the anode layer 115, the pixel defining layer 116, the organic light-emitting layer 117, and the cathode layer 118 is a conventional method in the art, and details are not described herein again.
  • the glass substrate 1001 is removed to form a flexible display panel.
  • the glass substrate 1001 can be removed using a lift-off process.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
  • Geometry (AREA)
  • Theoretical Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Electroluminescent Light Sources (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)

Abstract

提供一种柔性显示面板。柔性显示面板包括显示区域（A）及非显示区域（B），在非显示区域的空白区域增加电容设计，电容具有一定缓冲静电荷释放的能力，能够减弱静电对器件内部及金属走线膜层的击伤，保护柔性显示面板在有源矩阵薄膜晶体管制作过程中金属膜层走线不受静电损伤和破坏。

Description

柔性显示面板 技术领域
本发明涉及显示装置领域，尤其涉及一种柔性显示面板。
 背景技术
显示器件如LCD和OLED等作为信息交换和传递的主要载体和物质基础，已经成为越来越多人关注的焦点，并广泛应用在工作和生活的方方面面。近年来，随着人们对便携显示设备的需求日趋增大，柔性显示技术成为极具竞争优势的显示技术之一，成为业界及消费者青睐的对象。柔性显示技术的一大优点是具有可折叠性，这样可以增大显示面积而不会增大设备体积，非常便携。柔性TFT-LCD及柔性OLED等已经逐渐发展成为最有前景的高科技产业。来自不同的研究机构和企业等均推出了各式各样的柔性显示设备，如电视屏幕、 手机屏幕、穿戴设备、大型商业显示屏、电脑等。
OLED(有机发光二极管，OrganicLight-EmittingDiode)的显示技术具备自发光、高亮度、宽视角、高对比度、可挠曲、低能耗等特性，因此受到广泛的关注，并作为新一代的显示方式，已开始逐渐取代传统LCD(液晶显示器，LiquidCrystalDisplay)，被广泛应用在手机屏幕、电脑显示器、全彩电视等。其中，OLED柔性显示技术采用非常薄的有机材料发光层和柔性基板，当有电流通过时，这些有机材料就会发光。
所述OLED显示装置按照驱动方式可以分为无源矩阵型OLED(Passive Matrix OLED，PMOLED)和有源矩阵型OLED(Active Matrix OLED， AMOLED)两大类，即直接寻址和薄膜晶体管(Thin Film Transistor，TFT)矩阵寻址两类。
其中，有源矩阵型OLED具有呈阵列式排布的像素，属于主动显示类型，发光效能高，性能优异。其缺点在于，在制作过程中，累计的静电容易造成非显示区域的扇出区（fanout区）的第二栅极击伤，导致信号传输线腐蚀或者断裂，造成柔性显示面板画面显示异常。
针对以上问题，亟需一种新型的柔性显示面板及其制作方法，能够消除显示面板制作过程中累计的静电，避免膜层腐蚀等不良，保证画面正常显示。
 技术问题
本发明所要解决的技术问题是，提供一种柔性显示面板，其能够有效提高柔性显示面板产出的良率，消除由于静电产生的膜层腐蚀等不良，保护柔性驱动面板画面显示不受破坏。
 技术解决方案
为了解决上述问题，本发明提供了一种柔性显示面板，其中包括一显示区域及一非显示区域，在所述显示区域设置有一薄膜晶体管，所述薄膜晶体管具有一第一栅极及一第二栅极，所述非显示区域包括一金属走线区域及位于所述金属走线区域之间的一空白区域，在所述空白区域设置有相对的一第一金属板及一第二金属板，所述第一金属板与所述第一栅极同层，所述第二金属板与所述第二栅极同层，所述第一金属板及所述第二金属板形成一电容，所述第一金属板及所述第二金属板的形状相同，所述第一栅极与所述第一金属板的厚度相同，所述第二栅极与所述第二金属板的厚度相同。
本发明还提供一种柔性显示面板，其中包括一显示区域及一非显示区域，在所述显示区域设置有一薄膜晶体管，所述薄膜晶体管具有一第一栅极及一第二栅极，所述非显示区域包括一金属走线区域及位于所述金属走线区域之间的一空白区域，在所述空白区域设置有相对的一第一金属板及一第二金属板，所述第一金属板与所述第一栅极同层，所述第二金属板与所述第二栅极同层，所述第一金属板及所述第二金属板形成一电容。
在一实施例中，所述第一金属板及所述第二金属板的形状相同。
在一实施例中，所述第一金属板及所述第二金属板的形状为圆形或方形。
在一实施例中，所述第一栅极与所述第一金属板的厚度相同，所述第二栅极与所述第二金属板的厚度相同。
在一实施例中，所述显示区域包括一柔性基底、设置在所述柔性基底上的一缓冲层、设置在所述缓冲层上的一有源层、覆盖所述有源层及所述缓冲层的一第一绝缘层，所述第一栅极设置在所述第一绝缘层上，所述第一绝缘层延伸至所述非显示区域，且所述第一金属板设置在延伸至所述非显示区域的所述第一绝缘层上。
在一实施例中，所述柔性显示面板还包括一第二绝缘层，所述第二绝缘层覆盖所述第一栅极、所述第一金属板及所述第一绝缘层，在所述显示区域，所述第二栅极设置在所述第二绝缘层上，在所述非显示区域的所述空白区域处，所述第二金属板设置在所述第二绝缘层上。
在一实施例中，所述柔性显示装置还包括一第三绝缘层，所述第三绝缘层覆盖所述第二栅极、所述第二金属板及所述第二绝缘层。
在一实施例中，所述柔性显示装置还包括一源极及一漏极，所述源极及所述漏极分别穿过所述第一绝缘层、第二绝缘层及第三绝缘层，并分别与所述有源层连接。。
 有益效果
本发明的优点在于，在非显示区域的空白区域增加一系列的电容设计，该电容具有一定缓冲静电荷释放的能力，能够减弱静电对器件内部及金属走线膜层的击伤，保护柔性显示面板在有源矩阵薄膜晶体管制作过程中金属膜层走线不受静电损伤和破坏，有效提高柔性显示面板产出的良率，消除由于静电产生的膜层腐蚀等不良，保护柔性驱动面板画面显示不受破坏。所述第一金属板及第二金属板与第一栅极及第二栅极采用同一道工艺形成，没有增加额外的制程，节约成本。
 附图说明
图1是本发明柔性显示面板的结构示意图；
图2是本发明柔性显示面板的制作方法的步骤示意图；
图3A~图3H是本发明柔性显示面板的制作方法的工艺流程图。
 本发明的最佳实施方式
下面结合附图对本发明提供的柔性显示面板的具体实施方式做详细说明。
图1是本发明柔性显示面板的结构示意图。请参阅图1，本发明柔性显示面板包括一显示区域A及一非显示区域B。在图1中，所述显示区域A及所述非显示区域B采用虚线框示意性地标示。本发明柔性显示面板为有机发光二极管显示面板，即OLED柔性显示面板，在其显示区域A具有有机发光二极管。所述显示区域A用于显示图案，所述非显示区域B为所述显示区域A之外的区域，例如，金属走线区。在所述非显示区域B中，所述金属走线区域称为扇出区域（Fanout），在所述金属走线区域之间具有空白区域。
所述柔性显示面板的具体结构如下。
所述显示区域A包括一柔性基底11。所述柔性基底11通过在一玻璃基板上涂覆一柔性基板薄膜层而形成。所述柔性基板薄膜层的材料可以为聚酰亚胺（PI），优选地，其厚度可以为10~20μm。
在所述柔性基底11上设置有一缓冲层12，在所述缓冲层12上设置有一有源层13。一第一绝缘层14覆盖所述缓冲层12及所述有源层13，所述第一绝缘层14延伸至所述非显示区域B。在所述显示区域A，在所述第一绝缘层14上设置有一第一栅极15，所述第一栅极15对应所述有源层13设置。在所述非显示区域B，所述第一金属板16设置在延伸至所述非显示区域B的所述第一绝缘层14上，且所述第一金属板16位于所述非显示区域B的所述空白区域。所述第一栅极15与所述第一金属板16同层设置。优选地，所述缓冲层12的厚度为200~300nm、所述有源层13的厚度为40~50nm，所述第一绝缘层14的厚度为50~200nm，所述第一栅极15及所述第一金属板16的厚度为150~250nm。
一第二绝缘层17覆盖所述第一栅极15、所述第一金属板16及所述第一绝缘层14。在所述第二绝缘层17上设置有一第二栅极18及一第二金属板19。所述第二栅极18与所述第一栅极15对应设置，所述第二金属板19与所述第一金属板16对应设置，所述第二栅极18与所述第二金属板19同层设置。优选地，所述第二绝缘层17的厚度为50~200nm，所述第二栅极18及所述第二金属板19的厚度为150~250nm。
所述第二金属板19与所述第一金属板16对应设置，则所述第二金属板19与所述第一金属板16及其之间的第二绝缘层17形成一电容，所述电容具有一定缓冲静电荷释放的能力，而起到减弱静电对器件内部及金属走线膜层的击伤。其中所述第一金属板16及第二金属板19的形状相同，例如均为圆形或方形。
一第三绝缘层20覆盖所述第二栅极18、所述第二金属板19及所述第二绝缘层17。一源极21及一漏极22分别穿过所述第一绝缘层14、所述第二绝缘层17及所述第三绝缘层20，并分别与所述有源层13连接。优选地，所述第三绝缘层20的厚度为500~700nm、所述源极21及所述漏极22的厚度为400~600nm。
其中，所述有源层13、所述第一栅极15、所述第二栅极18、所述源极21及所述漏极22构成薄膜晶体管。
一平坦化层23覆盖所述第三绝缘层20及所述源极21和所述漏极22，在所述漏极22位置形成一过孔（附图中未标示）。一有机发光二极管的阳极层24穿过所述过孔与所述漏极22连接。一像素定义层25设置在所述阳极层24上。一有机发光层26设置在所述阳极层24上，且被所述像素定义层25包围。一阴极层27设置在所述像素定义层25及所述有机发光层26上。优选地，所述平坦化层23的厚度为1.5~3μm，所述阳极层24的厚度为100~250nm、所述像素定义层25的厚度为1.5~3μm，所述阴极层27的厚度为10nm～200nm。
其中，所述第一栅极15、所述第二栅极18、所述第一金属板16及所述第二金属层19的材料可以为钼；所述源极21及所述漏极22的材料可为钛和铝。所述第一绝缘层14、所述第二绝缘层17及所述第三绝缘层30为无机材料层，其可以为SiOx和SiNx中的一种或二者的组合，所述有源层13的材料为低温多晶硅(Low Temperature Poly-silicon，LTPS)。所述平坦化层23、所述像素定义层25的材料可以为聚酰亚胺。所述阳极层24的材料可以为氧化铟锡和银。所述阴极层27的材料可以为透光较好的材料，例如较薄的镁或银层等。
图2是本发明柔性显示面板的制作方法的步骤示意图，图3A~图3H是本发明柔性显示面板的制作方法的工艺流程图。
参见图3A及步骤S21，在柔性基板100表面依次形成一缓冲层101、一有源层103、一第一绝缘层102及一第一金属层104。其中，所述柔性基板100通过在一玻璃基板1001上涂覆一柔性基板薄膜层1002形成。所述柔性基板薄膜层111的材料可以为聚酰亚胺（PI），优选地，其厚度可以为10~20μm。优选地，所述缓冲层101的厚度为200~300nm、所述有源层103的厚度为40~50nm，所述第一绝缘层102的厚度为50~200nm，所述第一金属层104的厚度为150~250nm。
参见图3B及步骤S22，图形化所述第一金属层104，形成一第一栅极105及一第一金属板106。所述第一栅极105位于所述显示区域A，所述第一金属板106位于所述非显示区域B的空白区域。在本步骤中，所述第一栅极105与所述第一金属板106采用同一个金属层及同一道制程形成，所述第一栅极105与所述第一金属板106位于同一层。
参见图3C及步骤S23，在所述第一栅极105、所述第一金属板106及所述第一绝缘层102表面形成一第二绝缘层107及一第二金属层108。所述第二绝缘层107及所述第二金属层108可采用常规的沉积溅射的方法形成。优选地，所述第二绝缘层107的厚度为50~200nm，所述第二金属层108的厚度为150~250nm。
参见图3D及步骤S24，图形化所述第二金属层108，形成一第二栅极109及一第二金属板110。所述第二栅极109位于所述显示区域A，所述第二金属板110位于所述非显示区域B的空白区域。在本步骤中，所述第二栅极109与所述第二金属板110采用同一个金属层及同一道制程形成，所述第二栅极109与所述第二金属板110位于同一层。
所述第一金属板106与所述第二金属板110相对设置，所述第二金属板110与所述第一金属板106及其之间的第二绝缘层107形成一电容。所述电容具有一定缓冲静电荷释放的能力，而起到减弱静电对器件内部及金属走线膜层的击伤。其中所述第一金属板106及第二金属板110的形状相同，例如均为圆形或方形。
参见图3E及步骤S25，在所述第二栅极109、第二金属板110及第二绝缘层107表面形成第三绝缘层111。其中，形成所述第三绝缘层111的方法可以采用本领域常规的沉积方法。
参见图3F及步骤S26，形成一源极112及一漏极113。所述源极112及所述漏极113分别穿过所述第一绝缘层102、所述第二绝缘层107及所述第三绝缘层111，并分别与所述有源层103连接。
参见图3G及步骤S27，在所述第三绝缘层111表面形成一平坦化层114、一阳极层115、一像素定义层116、一有机发光层117及一阴极层118，所述阳极层115穿过所述平坦化层114与所述漏极113连接。其中，所述平坦化层114、所述阳极层115、所述像素定义层116、所述有机发光层117及所述阴极层118的制作方法为本领域常规的方法，在此不再赘述。
参见图3H，去除所述玻璃基板1001，形成一柔性显示面板。所述玻璃基板1001可以采用剥离工艺去除。
以上所述仅是本发明的优选实施方式，应当指出，对于本技术领域的普通技术人员，在不脱离本发明原理的前提下，还可以做出若干改进和润饰，这些改进和润饰也应视为本发明的保护范围。

Claims (9)

  1. 一种柔性显示面板，其中包括一显示区域及一非显示区域，在所述显示区域设置有一薄膜晶体管，所述薄膜晶体管具有一第一栅极及一第二栅极，所述非显示区域包括一金属走线区域及位于所述金属走线区域之间的一空白区域，在所述空白区域设置有相对的一第一金属板及一第二金属板，所述第一金属板与所述第一栅极同层，所述第二金属板与所述第二栅极同层，所述第一金属板及所述第二金属板形成一电容，所述第一金属板及所述第二金属板的形状相同，所述第一栅极与所述第一金属板的厚度相同，所述第二栅极与所述第二金属板的厚度相同。
  2. 一种柔性显示面板，其中包括一显示区域及一非显示区域，在所述显示区域设置有一薄膜晶体管，所述薄膜晶体管具有一第一栅极及一第二栅极，所述非显示区域包括一金属走线区域及位于所述金属走线区域之间的一空白区域，在所述空白区域设置有相对的一第一金属板及一第二金属板，所述第一金属板与所述第一栅极同层，所述第二金属板与所述第二栅极同层，所述第一金属板及所述第二金属板形成一电容。
  3. 根据权利要求2所述的柔性显示面板，其特征在于，所述第一金属板及所述第二金属板的形状相同。
  4. 根据权利要求2所述的柔性显示面板，其中，所述第一金属板及所述第二金属板的形状为圆形或方形。
  5. 根据权利要求2所述的柔性显示面板，其中，所述第一栅极与所述第一金属板的厚度相同，所述第二栅极与所述第二金属板的厚度相同。
  6. 根据权利要求2所述的柔性显示面板，其中，所述显示区域包括一柔性基底、设置在所述柔性基底上的一缓冲层、设置在所述缓冲层上的一有源层、覆盖所述有源层及所述缓冲层的一第一绝缘层，所述第一栅极设置在所述第一绝缘层上，所述第一绝缘层延伸至所述非显示区域，且所述第一金属板设置在延伸至所述非显示区域的所述第一绝缘层上。
  7. 根据权利要求6所述的柔性显示面板，其中，所述柔性显示面板还包括一第二绝缘层，所述第二绝缘层覆盖所述第一栅极、所述第一金属板及所述第一绝缘层，在所述显示区域，所述第二栅极设置在所述第二绝缘层上，在所述非显示区域的所述空白区域处，所述第二金属板设置在所述第二绝缘层上。
  8. 根据权利要求7所述的柔性显示面板，其中，所述柔性显示装置还包括一第三绝缘层，所述第三绝缘层覆盖所述第二栅极、所述第二金属板及所述第二绝缘层。
  9. 根据权利要求8所述的柔性显示面板，其中，所述柔性显示装置还包括一源极及一漏极，所述源极及所述漏极分别穿过所述第一绝缘层、第二绝缘层及第三绝缘层，并分别与所述有源层连接。
    柔性显示面板
PCT/CN2017/112889 2017-09-27 2017-11-24 柔性显示面板 WO2019061780A1 (zh)

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