WO2019061729A1 - Dispositif d'affichage et son procédé d'attaque - Google Patents

Dispositif d'affichage et son procédé d'attaque Download PDF

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Publication number
WO2019061729A1
WO2019061729A1 PCT/CN2017/111189 CN2017111189W WO2019061729A1 WO 2019061729 A1 WO2019061729 A1 WO 2019061729A1 CN 2017111189 W CN2017111189 W CN 2017111189W WO 2019061729 A1 WO2019061729 A1 WO 2019061729A1
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WIPO (PCT)
Prior art keywords
resistor
display device
circuit
signal line
waveform
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PCT/CN2017/111189
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English (en)
Chinese (zh)
Inventor
黄北洲
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惠科股份有限公司
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Publication of WO2019061729A1 publication Critical patent/WO2019061729A1/fr

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals

Definitions

  • Embodiments of the present application relate to the field of display devices, and in particular, to a display device and a driving method thereof.
  • liquid crystal displays have a large number of applications for personal digital assistants (PDAs), notebook computers, digital cameras, and photos due to their advantages of lightness, power saving, and no radiation.
  • PDAs personal digital assistants
  • Video recorders, mobile phones and other electronic products Coupled with the industry's active investment in research and development and the use of large-scale production equipment, the quality of displays has been continuously improved, and the price has continued to rise, which has led to the rapid expansion of the application field of liquid crystal displays.
  • a thin film transistor liquid crystal display includes a plurality of scanning signal lines and a scanning driving circuit thereof, a plurality of data lines and data driving circuits thereof, a plurality of common electrode lines, and a plurality of Pixel units, etc.
  • each of the pixel units is formed at an intersection of a scanning signal line on the glass substrate and a corresponding data line, wherein the scanning signal line and the data signal line are perpendicular to each other.
  • a thin film transistor is provided at the intersection of the scanning signal line and the data signal line to drive the pixel unit, thereby producing a wide variety of colorful images.
  • a technical problem to be solved by embodiments of the present application is to provide a display device to effectively avoid the defect that an existing display device has an increase in display quality due to generation of parasitic capacitance.
  • a technical problem to be further solved by the embodiments of the present application is to provide a driving method of a display device, so as to effectively avoid the defect that the display device has an increase in display quality due to the generation of parasitic capacitance.
  • the embodiment of the present application first provides a display device, including:
  • the voltage level of the waveform of the scan signal rises in a slope manner of a first predetermined value, so that the waveform of the scan signal is within a range between a high voltage level and a low voltage level of the rising threshold A portion that varies with the slope of the first predetermined value.
  • the driving circuit includes:
  • a plurality of selections are respectively connected to the plurality of triggers, and respectively turned on or off according to the output of the corresponding plurality of triggers;
  • a plurality of control devices are respectively connected to the input terminals of the plurality of selection switches, and control a slew rate of a waveform of the scan signal to be outputted to the scan signal line.
  • the voltage has a period of one scan period in length and has a waveform including a period of the voltage level change.
  • the driving circuit outputs a full-cycle waveform to the scan signal line during a scan period, and outputs a voltage level not greater than the voltage level during a period other than the scan period The end voltage level of the change.
  • the number of the data signal lines is the same as the number of the scanning signal lines.
  • the display device further includes: a first circuit, the first circuit has:
  • the display device further includes:
  • the second circuit having:
  • an operational amplifier that receives a voltage source with a non-inverting input terminal
  • a first resistor one end of the first resistor is connected to a non-inverting input terminal of the operational amplifier, and the other end of the first resistor is connected to the voltage source;
  • a second resistor the second resistor is connected to the non-inverting input terminal of the operational amplifier, and the other end of the second resistor is grounded;
  • a fourth resistor connected as a feedback resistor between the inverting input terminal and the output terminal of the operational amplifier
  • the driving circuit outputs a voltage having a waveform from the operational amplifier of the circuit.
  • the second circuit further has: a constant current source, an input resistor, and an input capacitor, wherein the constant current source is connected to one end of the input capacitor through the input resistor, and The other end of the input capacitor is grounded, the constant current source and the input resistor are connected in series, and the series circuit of the constant current source and the input resistor is connected in parallel with the input capacitor, the third resistor A device is coupled to the input resistor and a connection node of the input capacitor.
  • the first resistor, the second resistor, and the third resistor have a resistance greater than the input resistor.
  • the second circuit further has: a switch, the switch is connected in parallel with the input capacitor, and the switch is connected in parallel with the series circuit of the constant current source and the input resistor .
  • the operational amplifier and the first resistor, the second resistor, the third resistor, and the fourth resistor constitute a differential amplifying circuit as a subtraction portion, in the subtraction
  • VDlb is the output voltage of the operational amplifier
  • Vdd is the voltage source
  • R1 is a resistance value of the first resistor
  • R2 is a resistance value of the second resistor
  • R3 is a resistance value of the third resistor
  • R4 is a resistance value of the fourth resistor
  • Vcth is the maximum amplitude of the voltage of the input capacitor
  • R3 is the resistance value of the third resistor
  • R4 is the resistance value of the fourth resistor.
  • an embodiment of the present application further provides a driving method of a display device, including:
  • the voltage level of the waveform of the scan signal rises in a slope manner of a first predetermined value, so that the waveform of the scan signal is within a range between a high voltage level and a low voltage level of the rising threshold A portion that varies with the slope of the first predetermined value.
  • the driving circuit includes:
  • a plurality of selections are respectively connected to the plurality of triggers, respectively, and respectively turned on or off according to the output of the corresponding plurality of triggers;
  • a plurality of control devices respectively connected to the input terminals of the plurality of selection switches, and controlling a slew rate of a rising waveform of the scan signal to be output to the scan signal line.
  • the driving method further includes: using a first circuit, where the first circuit has:
  • the drive circuit outputs a voltage having a waveform from the capacitor of the circuit.
  • the embodiment of the present application further provides a display device, including: [0054] a plurality of pixels;
  • the voltage level of the waveform of the scan signal rises in a slope manner of a first predetermined value and decreases in a slope manner of a second predetermined value, so that the waveform of the scan signal is at a high voltage level of rising ⁇ a portion between the low voltage levels having a slope of the first predetermined value and a waveform of the scan signal being within a range between a high voltage level and a low voltage level of the falling threshold a portion of the slope of the second predetermined value that varies;
  • the first predetermined value and the second predetermined value are opposite to each other;
  • the driving circuit comprises:
  • a plurality of selections are respectively connected to the plurality of triggers, and respectively turned on or off according to the output of the corresponding plurality of triggers;
  • a plurality of control devices are respectively connected to the input terminals of the plurality of selection switches, and control a slew rate of rising and falling waveforms of the scan signals to be output to the scan signal lines.
  • the embodiment of the present application has at least the following beneficial effects:
  • the embodiment of the present application enables the waveform near the input terminal of the scanning signal line and the vicinity of the terminal to be delayed from being delayed by the parasitic capacitance of the scanning signal line.
  • the influence of the characteristics is substantially the same, that is, the scanning signal is not distorted, and the generation rate of the voltage level shift is lowered, thereby effectively improving the display quality of the display device.
  • FIG. 1 is a schematic structural diagram of a display device according to an embodiment of the present application.
  • FIG. 2 is a circuit diagram of a scanning signal line driving circuit of a display device according to an embodiment of the present application.
  • FIG. 3 is a waveform diagram showing an output of a scanning signal line drive circuit of a display device according to an embodiment of the present application.
  • FIG. 4 is another waveform diagram of an output of a scanning signal line drive circuit of a display device according to an embodiment of the present application.
  • FIG. 5 is still another waveform diagram of an output of a scanning signal line drive circuit of a display device according to an embodiment of the present application.
  • FIG. 6 is a first circuit diagram of a circuit of a display device and a scanning signal line drive circuit of another embodiment of the present application.
  • FIG. 7 is a waveform diagram showing an output of a scanning signal line driving circuit of a display device according to another embodiment of the present application.
  • FIG. 8 is another waveform diagram of an output of a scanning signal line driving circuit of a display device according to another embodiment of the present application.
  • FIG. 9 is another waveform diagram of an output of a scanning signal line driving circuit of a display device according to another embodiment of the present application.
  • FIG. 10 is a circuit diagram of a second circuit of a display device and a scanning signal line driver circuit according to still another embodiment of the present application.
  • FIG. 11 is a waveform diagram showing an output of a scanning signal line drive circuit of a display device according to still another embodiment of the present application.
  • FIG. 12 is a flow chart showing the steps of a driving method of the display device of the present application.
  • FIG. 13 is a flow chart showing the steps of a driving method of a display device according to another embodiment of the present application.
  • FIG. 14 is a flow chart showing the steps of a driving method of a display device according to still another embodiment of the present application.
  • FIG. 1 is a schematic structural view of a display device according to an embodiment of the present application
  • FIG. 2 is a circuit diagram of a scanning signal line driving circuit of the display device according to the embodiment of the present application.
  • 3 is a waveform diagram showing an output of a scanning signal line drive circuit of the display device of the embodiment of the present application.
  • the display device provided by the embodiment of the present application includes an array arranged on the display panel 1 .
  • a plurality of data signal lines 104 respectively providing data signals to the plurality of pixels (including the pixel electrodes 103), and a plurality of scanning signal lines 105 disposed to intersect the data signal lines 104, wherein the data signals
  • the number of lines 104 may be the same as the number of the scanning signal lines 105, and a driving circuit portion connected to the display panel 1 and outputting a scanning signal to the scanning signal lines 105 to actuate the scanning signal lines 105.
  • the driving circuit portion includes a scanning signal line driving circuit 300, a data signal line driving circuit 200, and a counter electrode driving circuit COM, which are respectively connected to the scanning signal line 105, the data signal line 104, and the opposite substrate 101 of the display panel.
  • the control circuit 600 is a circuit for controlling the data signal line drive circuit 200 and the scan signal line drive circuit 300.
  • the display panel 1 can be formed by sealing a composition between a pair of electrode substrates and applying a deflecting plate to the outer surface of the electrode substrate.
  • the thin film transistor array substrate as one of the electrode substrates is formed by arranging a plurality of data signal lines 104 (S (1) , S ( 2 ) , ... S in an array form on a transparent insulating substrate 100 made of, for example, glass. (i) , ...S (N) ) and a plurality of scanning signal lines 105 (G (1) , G (2) , ... G (j) , ... G (M) ) crossing each other And formed.
  • a switching device 102 is formed at the boundary of the plurality of data signal lines 104 and the plurality of scanning signal lines 105, and the switching device 102 is constituted by a thin film transistor connected to the pixel electrode 103.
  • a plurality of scanning signal lines 105 (G (1) , G (2) , ... G (j) , ... G (M) ) are connected to the thin film transistor (ie, the switching device 102) a gate, and a plurality of data signal lines 104 (S (1), S (2), ... S (i), ... S (N)) are connected to the thin film transistor (ie, the switching device 102)
  • the drain Further, an alignment film which covers almost all of the pixel electrode 103 may be provided.
  • a transistor array substrate is formed.
  • the scanning signal line drive circuit 300 includes a shift register portion 3a composed of cascades of M flip-flops F1, F2, F3, ..., Fj, ... FM, and a flip-flop F1.
  • the selection of F2, F3, ...Fj, ...FM is turned on or off.
  • the gate start signal GSP may be sequentially transmitted through the plurality of flip-flops F1, F2, F3, ..., Fj . . . FM, and sequentially output to the plurality of selection gates 3b , to trigger multiple selections to close 3b.
  • each selection switch 3b selects a scan of a low voltage level.
  • the voltage VG, and a low voltage level scan voltage VG is output to the scan signal line 105 during one scan period to turn off the thin film transistor (i.e., the pass device 102 as shown in FIG. 1).
  • this ⁇ when choosing each of the other 3b The input terminals supply a shared voltage VD1 that is sufficient to bring the switching device 102 (see FIG.
  • each selection switch 3b selects a high voltage level of the scan voltage VG and applies a high voltage during one scan period.
  • the level of the scanning voltage VG is output to the scanning signal line 105 to turn on the thin film transistor (i.e., the switching device 102 as shown in FIG. 1).
  • an image signal (see Fig. 1) output from the data signal line drive circuit 200 to each of the data signal lines 104 (see Fig. 1) can be written in each corresponding pixel (including the pixel electrode 103).
  • the scan signal line drive circuit 300 may further include a plurality of control devices SC that scan the output of the signal line drive circuit 300. level.
  • each control device SC in the off state of the switching device 102, each control device SC is disposed between the shared voltage VD2 and the selection switch 3b; and when the switching device 102 is turned to the on state, each control device SC is set Between the shared voltage VD1 and the selection of the gate 3b.
  • the control device SC can be used to control the scanning signal output from the scanning signal line driving circuit 300 to the plurality of scanning signal lines 105 (G (1) , G (2) , ... G (j ) , ... G (M) )
  • the voltage of the VG waveform rises by the slew rate (linear rate).
  • the rising slope SI of VG is such that the voltage level of the waveform of the scanning signal VG rises by the slope S1 of the first predetermined value as shown in FIG. 3, so that the waveform of the scanning signal VG rises to a high voltage level and a low voltage. There is a portion within the range between the levels that varies with the slope of the first predetermined value.
  • FIG. 1 is a schematic structural view of a display device according to an embodiment of the present application
  • FIG. 2 is a scanning signal line driving circuit of the display device of the embodiment of the present application
  • FIG. 4 is another waveform diagram of the output of the scanning signal line driving circuit of the display device of the embodiment of the present application.
  • the scanning signal line driving circuit 300 may further include a plurality of control devices SC that scan the output of the signal line driving circuit 300 level.
  • each control device SC in the off state of the switching device 102, each control device SC is disposed between the shared voltage VD2 and the selection switch 3b; and when the switching device 102 is turned to the on state, each control device SC is set Between the shared voltage VD1 and the selection of the gate 3b.
  • Control device SC can be used to control the sweep The voltage of the waveform of the scanning signal VG outputted to the plurality of scanning signal lines 105 (G (1), G (2), ... G (j), ... G (M)) by the signal line driving circuit 300 rises And falling yaw rate (linear rate)
  • a plurality of scanning signals respectively output to the plurality of scanning signal lines 105 (G (1), G (2), ... G (j), ... G (M) ) can be controlled The rising slope SI of the VG and the falling slope S2, so that the voltage level of the waveform of the scanning signal VG rises by the slope S1 of the first predetermined value and decreases by the slope S2 of the second predetermined value, as shown in FIG.
  • the waveform of the scan signal VG has a portion that varies with the slope of the first predetermined value within a range between the high voltage level and the low voltage level of the rising ⁇ , and causes the waveform of the scan signal VG to be at a high voltage of the falling ⁇ a portion between the flat and low voltage levels having a slope that varies with the second predetermined value, wherein the absolute values of the first predetermined value and the second predetermined value may be the same (ie, the first The predetermined value and the second predetermined value are opposite to each other, and may be different, which means that the rising slope S1 and the falling slope S2 of the waveform of the scanning signal VG may be the same (ie, the rising slope S1 and the falling value) Slope S2 mutual For the opposite, it can be different.
  • FIG. 1 is a schematic structural view of a display device according to an embodiment of the present application
  • FIG. 2 is a scanning signal line driving circuit of the display device according to the embodiment of the present application
  • FIG. 5 is still another waveform diagram of the output of the scanning signal line driving circuit of the display device of the embodiment of the present application.
  • the scanning signal line driving circuit 300 may further include a plurality of control devices SC that scan the output stages of the signal line driving circuit 300.
  • each control device SC in the off state of the switching device 102, each control device SC is disposed between the shared voltage VD2 and the selection switch 3b; and when the switching device 102 is turned to the on state, each control device SC is set Between the shared voltage VD1 and the selection of the gate 3b.
  • the control device SC can be used to control the scanning signal output from the scanning signal line driving circuit 300 to the plurality of scanning signal lines 105 (G (1), G (2), ... G (j), ... G (M) )
  • the voltage of the VG waveform drops by the slew rate (linear rate).
  • a plurality of scanning signals respectively output to the plurality of scanning signal lines 105 can be controlled VG's falling slope S2, so as shown in Figure 3,
  • the voltage level of the waveform of the scan signal VG is decreased by the slope S2 of the second predetermined value, so that the waveform of the scan signal VG is within the range between the high voltage level and the low voltage level of the falling ⁇ The portion of the slope of the predetermined value that changes.
  • the waveform near the input terminal of the scanning signal line and the vicinity of the terminal is not affected by the signal delay propagation characteristics caused by the parasitic capacitance of the scanning signal line, and is substantially the same, that is, the output scanning signal is not distorted. Further, it is possible to effectively reduce the generation rate of the voltage level shift AVd, and realize a display device having no display defect such as a residual image.
  • the voltage may have a period of one scan period, and may have a waveform including a period of the voltage level change, and the driving circuit may pass the scan signal during a scan period.
  • the line outputs a full period waveform, and the voltage level output during a period other than the scan period is not greater than the end voltage level at which the voltage level changes.
  • FIG. 6 is a circuit diagram of a first circuit of a display device and a scan signal line driver circuit according to another embodiment of the present application
  • FIG. 7 is the other of the present application.
  • the structure of the scanning signal line driving circuit 300 different from the above-described embodiment is provided with a control device SC for controlling the rising slope S3 of the scanning signal VG.
  • the control device SC is not used, but The first circuit shown in FIG. 6 is provided in place of the control device SC and the trace signal line drive circuit 300.
  • the first circuit used in conjunction with the scanning signal line driving circuit 300 includes a resistor Rent and a capacitor Ccnt for charging and discharging, an inverter INV for controlling charging and discharging, and the like.
  • the switching states SW1 and SW2 are switched between the charging state and the discharging state, and the shared voltage VD11 generated by the first circuit is like the input voltage VD1 shown in FIG. 2 as the input voltage of the selection signal of the scanning signal line driving circuit 300.
  • the voltage source Vdd is applied to one terminal of the first switch SW1, and the other terminal of the first switch SW1 is connected to the input of the selection switch 3b of the scan signal line drive circuit 300.
  • the terminal, that is, the voltage source Vdd is connected to the scanning signal line drive circuit 300 through the first switch SW1.
  • the other terminal of the switch SW1 is connected to one terminal of the resistor Rent and one terminal of the capacitor Cent, and the terminal of the resistor Rent and the terminal of the capacitor Cent are connected to the selection of the scanning signal line drive circuit 300.
  • the input terminal of the gate 3b, wherein the other terminal of the resistor Rent passes through the gate SW2 is grounded.
  • the voltage source Vdd may be a DC voltage having a high voltage level, which is sufficient for the thin film transistor to be in an on state, for example, 15V to 20V, but not limited thereto.
  • the resistor Rent is connected in series with the second switch SW2, and the serial circuit of the resistor Rent and the second switch SW2 is connected in parallel with the capacitor Cent.
  • the signal Stc from the outside is transmitted as an input signal to the inverter INV, and the signal Stc is inverted by the inverter INV to control the SW2.
  • the signal Stc can be synchronized with each scanning period and also used to control the opening and closing control of SW1.
  • the signal Stc can also be arranged in synchronism with the chirp signal GCK and generated, for example, by using a mono multivibrator (not shown), but is not limited thereto.
  • the switch SW1 when the signal Stc is at a high voltage level (charge control signal) ⁇ , the switch SW1 is closed, and the switch SW2 is broken due to the low voltage level applied to the switch SW2 through the inverter INV.
  • the voltage source Vdd is supplied with power to the capacitor Cent to cause the capacitor Cent to start storing the electric charge, and the shared voltage VDla is output as a high voltage level to one input terminal of the selection switch 3b of the scanning signal line drive circuit 300.
  • the signal Stc is at a low voltage level (discharge control signal)
  • the switch SW1 when the signal Stc is at a low voltage level (discharge control signal), the switch SW1 is turned off, and the switch SW2 is closed due to the high voltage level voltage applied to the switch SW2 through the inverter INV, and is stored in the capacitor.
  • the charge in the Cent is discharged by the resistor Rent, and the voltage level of the scan signal output from the scanning signal line drive circuit 300 is gradually lowered.
  • the rising slope S3 can be adjusted by changing the resistance of the resistor Rent and the capacitance of the capacitor Cent.
  • the voltage level of the scan signal outputted by the scanning signal line drive circuit 300 is increased by a slope S3 of a first predetermined value as shown in FIG. 7, so that the waveform of the scan signal is at a high voltage level and a low voltage of rising ⁇ . There is a portion in the range between the levels that varies with the slope of the first predetermined value, thereby optimizing for each display panel 1 to be driven.
  • FIG. 6 is a circuit diagram of a first circuit of a display device and a scanning signal line driver circuit of another embodiment of the present application
  • FIG. 8 is another embodiment of the present application.
  • the first circuit described in FIG. 6 has been described in detail above, and thus will not be described again.
  • the rising slope S3 and the falling can be adjusted by changing the resistance of the resistor Rent and the capacitance of the capacitor Cent.
  • the slope S4 causes the voltage level of the scan signal outputted by the scanning signal line drive circuit 300 to rise as shown by the slope S3 of the first predetermined value and decrease by the slope S4 of the second predetermined value as shown in FIG.
  • the waveform of the signal has a portion that varies with the slope of the first predetermined value and a waveform of the scan signal at a high voltage level and a low voltage of the falling ⁇ in a range between a high voltage level and a low voltage level of the rising ⁇
  • the portion between the levels has a portion that varies with the slope of the second predetermined value, thereby optimizing for each of the liquid crystal display panels 1 to be driven.
  • FIG. 6 is a circuit diagram of a first circuit of a display device and a scanning signal line driver circuit configured according to another embodiment of the present application
  • FIG. 9 is the other of the present application.
  • the first circuit described in FIG. 6 has been described in detail above, and thus will not be described again.
  • the falling slope S4 can be adjusted by changing the resistance of the resistor Rent and the capacitance of the capacitor Cent such that the voltage level of the scanning signal output by the scanning signal line driving circuit 300 is a slope of the second predetermined value as shown in FIG.
  • the S4 mode is decreased such that the waveform of the scan signal has a portion that varies with the slope of the second predetermined value within a range between the high voltage level and the low voltage level of the falling chirp, thereby for each display to be driven Panel 1 is optimized.
  • FIG. 10 is a circuit diagram of a second circuit of a display device and a scanning signal line driver circuit according to still another embodiment of the present application
  • FIG. 11 is another A waveform diagram of an output of a scanning signal line drive circuit of the display device of the embodiment.
  • the switch SW3 is connected in parallel with the capacitor Cct and in parallel with the series circuit of the constant current source let and the input resistor Ret.
  • the signal Stc may be a slope turn-off control signal (a charge control signal and a discharge control signal), and the switch SW3 connected in parallel with the capacitor Cct is controlled to be turned on or off at a specific turn.
  • the constant current source let is connected to one end of the capacitor Cct through the resistor Ret, and the other end of the capacitor Cct is grounded, that is, the constant current source let and the resistor Ret are connected in series, and the constant current source let and the resistor Ret are connected in series
  • the circuit is connected in parallel with the capacitor Cct.
  • resistor R3 One end of the resistor R3 is connected to the inverting input terminal OP of the operational amplifier and the other end of the resistor R3 is connected to the connection node of the resistor Ret and the capacitor Cct, and the voltage Vet outputted by the capacitor Cct (that is, the potential difference across the capacitor Cct) is passed.
  • Resistor R3 is delivered to the inverting input terminal of operational amplifier OP.
  • the resistor R4 is connected between the inverting input terminal and the output terminal of the operational amplifier OP, the output terminal of the operational amplifier OP and the input terminal of the selection of the scanning signal line driving circuit 300 Connected, the shared voltage VD1b output from the operational amplifier OP is like the input voltage VD1 shown in FIG.
  • each of the resistors R1, R2, R3, and R4 may have a resistance greater than the resistor Rct.
  • the operational amplifier OP and the resistors R1, R2, R3, and R4 constitute a differential amplifying circuit as a subtraction portion.
  • VDlb Vdd x [R2/ (Rl + R2) ]x[l + (R4/R3) ] - (R4/R3) x Vct, where VDlb is the output voltage of the op amp Vdd is the voltage source, and Vet is the voltage of the input capacitor.
  • the switch SW3 is closed. Therefore, the electric charge stored in the capacitor Cct is discharged through the switch SW3, and the voltage output from the capacitor Cct becomes zero.
  • the waveform of the voltage Vet has the maximum amplitude Vcth
  • the waveform of the output signal VDlb has the slope Tslope and the slope amount Vslop e .
  • the slope can be easily adjusted by appropriately setting the resistances of the resistors R3 and R4 so that the voltage level of the scan signal outputted by the scanning signal line drive circuit 300 is inclined by the first predetermined value as shown in FIG.
  • the rate mode is increased, so that the waveform near the input terminal of the scanning signal line and the vicinity of the terminal is not distorted by the signal delay propagation characteristics of the scanning signal line parasitically, and the voltage level shift Vd can be effectively reduced.
  • the rate further realizes a display device having no display defects such as a residual image.
  • FIG. 12 is a flow chart of the steps of the driving method of the display device of the present application.
  • the present application provides a driving method for a display device including the following steps S11 ⁇ S12:
  • Step S11 providing a data signal to the plurality of pixels through a data signal line;
  • Step S12 outputting a scan signal to the scan signal line disposed to intersect the data signal line to activate the scan signal line by using a driving circuit, wherein the scan signal includes a voltage having a waveform of a voltage level change period And wherein the voltage level rises in a slope manner of a first predetermined value such that a waveform of the scan signal has a first predetermined value within a range between a high voltage level and a low voltage level of the rising chirp The part of the slope change.
  • the driving circuit includes:
  • a plurality of selections are respectively connected to the plurality of triggers, respectively, and respectively turned on or off according to the output of the corresponding plurality of triggers;
  • a plurality of control devices are respectively connected to the input terminals of the plurality of selection switches, and control a slew rate of a waveform of the scan signal to be output to the scan signal line.
  • the driving method further includes using a first circuit, where the first circuit has:
  • the drive circuit outputs a voltage having a waveform from the capacitor of the circuit.
  • the rising slope of the scan signal respectively output to the scan signal line can be controlled, so that the voltage level of the waveform of the scan signal rises by the slope of the first predetermined value, so that the waveform of the scan signal a portion having a slope of a first predetermined value in a range between a high voltage level and a low voltage level of the rising ,, so that a waveform near the input terminal of the scanning signal line and near the terminal is not subjected to the scanning signal line
  • the influence of the signal delay propagation characteristics of the parasitic ground is substantially the same, and the generation rate of the voltage level shift is lowered, and display of display defects such as no-image residual image is realized.
  • FIG. 13 is a flow chart showing the steps of a driving method of a display device according to another embodiment of the present application.
  • the application method for driving a display device further includes the following steps S21 to S22 :
  • Step S21 providing a data signal to the plurality of pixels through a data signal line;
  • Step S22 outputting a scan signal to the scan signal line disposed to intersect the data signal line to activate the scan signal line by using a driving circuit, wherein the scan signal includes a voltage having a waveform of a voltage level change period And wherein the voltage level rises in a slope manner of a first predetermined value and decreases in a slope manner of a second predetermined value, such that a waveform of the scan signal is in a range between a high voltage level and a low voltage level of the rising threshold a portion having a slope of the first predetermined value and a waveform of the scan signal having a slope of the second predetermined value in a range between a high voltage level and a low voltage level of the falling threshold And wherein the first predetermined value and the second predetermined value may be opposite to each other.
  • the driving circuit includes:
  • a plurality of selections are respectively connected to the plurality of triggers, respectively, and respectively turned on or off according to the output of the corresponding plurality of triggers;
  • a plurality of control devices are respectively connected to the input terminals of the plurality of selection switches, and control a slew rate of rising and falling waveforms of the scan signals to be output to the scan signal lines.
  • the driving method further includes using a first circuit, the circuit having:
  • the drive circuit outputs a voltage having a waveform from the capacitor of the circuit.
  • the driving method further includes: the driving method uses a circuit, and the circuit has:
  • an operational amplifier that receives a voltage source with a non-inverting input terminal
  • the drive circuit outputs a voltage having a waveform from the operational amplifier of the circuit.
  • the falling slope of the scan signal respectively output to the scan signal line can be controlled such that the voltage level of the waveform of the scan signal rises by a slope of the first predetermined value and is at a second predetermined value.
  • the slope of the falling mode is such that the waveform of the scan signal has a portion that varies with a slope of the first predetermined value and a waveform of the scan signal with a high voltage of a falling voltage within a range between a high voltage level and a low voltage level of the rising chirp a portion between the level of the low and low voltage levels having a slope of the second predetermined value, wherein the first predetermined value and the second predetermined value are opposite to each other, thereby causing the vicinity of the input terminal of the scanning signal line and the terminal
  • the nearby waveform is not affected by the signal delay propagation characteristics of the scanning signal line parasitically, and is substantially the same, and the rate of occurrence of the voltage level shift is lowered, thereby realizing a display device having no display defect such as
  • FIG. 14 is a flow chart showing the steps of a driving method of a display device according to still another embodiment of the present application.
  • the present application provides a driving method for a display device, which further includes the following steps S31 ⁇ S32:
  • Step S31 providing a data signal to the plurality of pixels through a data signal line;
  • Step S32 outputting, by the driving circuit, a scan signal to the scan signal line disposed to intersect the data signal line to actuate the scan signal line, wherein the scan signal includes a waveform having a voltage level change period a voltage, wherein the voltage level is decreased by a slope of a second predetermined value such that a waveform of the scan signal has a second predetermined value within a range between a high voltage level and a low voltage level of the falling chirp The part of the slope changes.
  • the driving circuit includes:
  • a plurality of selections are respectively connected to the plurality of triggers, and respectively turned on or off according to the output of the corresponding plurality of triggers;
  • a plurality of control devices are respectively connected to the input terminals of the plurality of selection switches, and control a slew rate of a waveform of the scan signal to be output to the scan signal line.
  • the driving method further includes using a first circuit, where the first circuit has:
  • a voltage source connected to an input terminal of the driving circuit through the first switch; [0152] connected to the resistor of the capacitor in parallel by the second switch;
  • the drive circuit outputs a voltage having a waveform from the capacitor of the circuit.
  • the falling slope of the scan signal respectively output to the scan signal line can be controlled, so that the voltage level of the waveform of the scan signal is decreased by the slope of the second predetermined value, so that the waveform of the scan signal a portion having a slope of a second predetermined value in a range between a high voltage level and a low voltage level of the falling ,, so that a waveform near the input terminal of the scanning signal line and near the terminal is not subjected to the scanning signal line
  • the parasitic ground has a influence on the propagation characteristics of the signal, and is substantially the same, and reduces the rate of occurrence of the voltage level shift, thereby realizing a display device having no display defect such as a residual image.

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  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

L'invention concerne un dispositif d'affichage et un procédé d'attaque, le dispositif d'affichage comprenant : de multiples pixels, des lignes de signal de données (104, S(1), S(2), ... S(i), ... S(N)) qui fournissent des signaux de données aux multiples pixels ; des lignes de signal de balayage (105, G(1), G(2), ... G(j), ... G(M)) agencées de sorte à couper les lignes de signal de données (104, S(1), S(2), ... S(i), ... S(N)) ; et un circuit d'attaque (300) qui délivre un signal de balayage (VG) aux lignes de signal de balayage (105, G(1), G(2), ... G(j), ... G(M)) de sorte à activer les lignes de signal de balayage (105, G(1), G(2), ... G(j), ... G(M)) ; le circuit d'attaque (300) délivre une tension ayant une forme d'onde qui présente un cycle de changement de niveau de tension, le niveau de tension de la forme d'onde du signal de balayage (VG) s'élevant au niveau d'une pente (S1, S3) d'une première valeur prédéfinie, de sorte que lorsque la forme d'onde du signal de balayage (VG) s'élève, la forme d'onde ait une partie qui change au niveau de la pente (S1, S3) de la première valeur préconfigurée dans la plage située entre le niveau haute tension et le niveau basse tension, permettant ainsi qu'un dispositif d'affichage soit dépourvu d'image rémanente.
PCT/CN2017/111189 2017-09-27 2017-11-15 Dispositif d'affichage et son procédé d'attaque WO2019061729A1 (fr)

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CN201710892118.3A CN107564487A (zh) 2017-09-27 2017-09-27 显示装置及其驱动方法
CN201710892118.3 2017-09-27

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Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107680545A (zh) * 2017-09-27 2018-02-09 惠科股份有限公司 显示装置及其驱动方法
CN107665682A (zh) * 2017-09-27 2018-02-06 惠科股份有限公司 显示装置及其驱动方法
CN112542128A (zh) * 2020-12-29 2021-03-23 天津市滨海新区微电子研究院 一种微显示面板驱动电路及方法

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009294306A (ja) * 2008-06-03 2009-12-17 Sharp Corp 表示装置および表示装置の駆動方法
US20100194726A1 (en) * 1998-03-27 2010-08-05 Sharp Kabushiki Kaisha Display device and display method
US20130234626A1 (en) * 2012-03-07 2013-09-12 Po-Ching Li Output Stage Circuit for Gate Driving Circuit in LCD
CN104952409A (zh) * 2015-07-07 2015-09-30 京东方科技集团股份有限公司 栅极驱动单元及其驱动方法、栅极驱动电路和显示装置
CN107665682A (zh) * 2017-09-27 2018-02-06 惠科股份有限公司 显示装置及其驱动方法
CN107680545A (zh) * 2017-09-27 2018-02-09 惠科股份有限公司 显示装置及其驱动方法

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20100194726A1 (en) * 1998-03-27 2010-08-05 Sharp Kabushiki Kaisha Display device and display method
JP2009294306A (ja) * 2008-06-03 2009-12-17 Sharp Corp 表示装置および表示装置の駆動方法
US20130234626A1 (en) * 2012-03-07 2013-09-12 Po-Ching Li Output Stage Circuit for Gate Driving Circuit in LCD
CN104952409A (zh) * 2015-07-07 2015-09-30 京东方科技集团股份有限公司 栅极驱动单元及其驱动方法、栅极驱动电路和显示装置
CN107665682A (zh) * 2017-09-27 2018-02-06 惠科股份有限公司 显示装置及其驱动方法
CN107680545A (zh) * 2017-09-27 2018-02-09 惠科股份有限公司 显示装置及其驱动方法

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