WO2019033382A1 - 图像传感电路以及图像深度传感系统 - Google Patents

图像传感电路以及图像深度传感系统 Download PDF

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Publication number
WO2019033382A1
WO2019033382A1 PCT/CN2017/097980 CN2017097980W WO2019033382A1 WO 2019033382 A1 WO2019033382 A1 WO 2019033382A1 CN 2017097980 W CN2017097980 W CN 2017097980W WO 2019033382 A1 WO2019033382 A1 WO 2019033382A1
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Prior art keywords
photosensitive
reference pixel
pixel array
pixel
clock signal
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PCT/CN2017/097980
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English (en)
French (fr)
Inventor
梁佑安
杨孟达
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深圳市汇顶科技股份有限公司
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Application filed by 深圳市汇顶科技股份有限公司 filed Critical 深圳市汇顶科技股份有限公司
Priority to PCT/CN2017/097980 priority Critical patent/WO2019033382A1/zh
Priority to CN202110390402.7A priority patent/CN113099072B/zh
Priority to EP17804786.6A priority patent/EP3462730B1/en
Priority to KR1020177033789A priority patent/KR101980722B1/ko
Priority to CN201780000972.2A priority patent/CN109743891B/zh
Priority to US15/813,156 priority patent/US10523849B2/en
Publication of WO2019033382A1 publication Critical patent/WO2019033382A1/zh

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00—Details of television systems
    • H04N5/222—Studio circuitry; Studio devices; Studio equipment
    • H04N5/2224—Studio circuitry; Studio devices; Studio equipment related to virtual studio applications
    • H04N5/2226—Determination of depth image, e.g. for foreground/background separation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/70—SSIS architectures; Circuits associated therewith
    • H04N25/703—SSIS architectures incorporating pixels for producing signals other than image signals
    • H04N25/705—Pixels for depth measurement, e.g. RGBZ
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
    • G01S17/00—Systems using the reflection or reradiation of electromagnetic waves other than radio waves, e.g. lidar systems
    • G01S17/02—Systems using the reflection of electromagnetic waves other than radio waves
    • G01S17/06—Systems determining position data of a target
    • G01S17/42—Simultaneous measurement of distance and other co-ordinates
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
    • G01S17/00—Systems using the reflection or reradiation of electromagnetic waves other than radio waves, e.g. lidar systems
    • G01S17/88—Lidar systems specially adapted for specific applications
    • G01S17/89—Lidar systems specially adapted for specific applications for mapping or imaging
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
    • G01S17/00—Systems using the reflection or reradiation of electromagnetic waves other than radio waves, e.g. lidar systems
    • G01S17/88—Lidar systems specially adapted for specific applications
    • G01S17/89—Lidar systems specially adapted for specific applications for mapping or imaging
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    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
    • G01S7/00—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00
    • G01S7/48—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00 of systems according to group G01S17/00
    • G01S7/483—Details of pulse systems
    • G01S7/486—Receivers
    • G01S7/4861—Circuits for detection, sampling, integration or read-out
    • G01S7/4863—Detector arrays, e.g. charge-transfer gates
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
    • G01S7/00—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00
    • G01S7/48—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00 of systems according to group G01S17/00
    • G01S7/483—Details of pulse systems
    • G01S7/486—Receivers
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    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
    • G01S7/00—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00
    • G01S7/48—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00 of systems according to group G01S17/00
    • G01S7/497—Means for monitoring or calibrating
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T3/00—Geometric image transformations in the plane of the image
    • G06T3/40—Scaling of whole images or parts thereof, e.g. expanding or contracting
    • G06T3/4023—Scaling of whole images or parts thereof, e.g. expanding or contracting based on decimating pixels or lines of pixels; based on inserting pixels or lines of pixels
    • G—PHYSICS
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    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
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    • G06T7/73—Determining position or orientation of objects or cameras using feature-based methods
    • G06T7/74—Determining position or orientation of objects or cameras using feature-based methods involving reference images or patches
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/60—Noise processing, e.g. detecting, correcting, reducing or removing noise
    • H04N25/617—Noise processing, e.g. detecting, correcting, reducing or removing noise for reducing electromagnetic interference, e.g. clocking noise
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/60—Noise processing, e.g. detecting, correcting, reducing or removing noise
    • H04N25/67—Noise processing, e.g. detecting, correcting, reducing or removing noise applied to fixed-pattern noise, e.g. non-uniformity of response
    • H04N25/671—Noise processing, e.g. detecting, correcting, reducing or removing noise applied to fixed-pattern noise, e.g. non-uniformity of response for non-uniformity detection or correction
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/60—Noise processing, e.g. detecting, correcting, reducing or removing noise
    • H04N25/67—Noise processing, e.g. detecting, correcting, reducing or removing noise applied to fixed-pattern noise, e.g. non-uniformity of response
    • H04N25/671—Noise processing, e.g. detecting, correcting, reducing or removing noise applied to fixed-pattern noise, e.g. non-uniformity of response for non-uniformity detection or correction
    • H04N25/673—Noise processing, e.g. detecting, correcting, reducing or removing noise applied to fixed-pattern noise, e.g. non-uniformity of response for non-uniformity detection or correction by using reference sources
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/70—SSIS architectures; Circuits associated therewith
    • H04N25/71—Charge-coupled device [CCD] sensors; Charge-transfer registers specially adapted for CCD sensors
    • H04N25/745—Circuitry for generating timing or clock signals
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/70—SSIS architectures; Circuits associated therewith
    • H04N25/76—Addressed sensors, e.g. MOS or CMOS sensors
    • H04N25/7795—Circuitry for generating timing or clock signals
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T2207/00—Indexing scheme for image analysis or image enhancement
    • G06T2207/10—Image acquisition modality
    • G06T2207/10028—Range image; Depth image; 3D point clouds

Definitions

  • the invention relates to an image sensing circuit and an image depth sensing system, in particular to an image sensing circuit and an image depth sensing system which can reduce the influence of a phase difference of a clock signal.
  • the 3D image sensing system can acquire its distance/depth information with respect to the target, and thus generate three-dimensional image data by the pitch value or distance value of each pixel of the 3D image, which is also referred to as a distance image or a depth map. Additional distance dimensions can be used in a variety of applications to get more information about objects in the scene captured by the camera, solving different tasks in the field of industrial sensors.
  • a 3D image sensing circuit emits incident light through a light emitting diode, and uses a plurality of pixel circuits in the pixel array to collect reflected light corresponding to the incident light and reflected from the target, and by comparing the incident light with The optical path difference between the reflected lights can be used to calculate the distance/depth between the electronic device (provided with the 3D image sensing circuit) and the target.
  • the clock signal input to the pixel array generates a phase difference in the pixel array, causing the 3D image sensing circuit to generate an error in calculating the distance/depth between the electronic device and the target.
  • the present invention provides an image sensing circuit including a photosensitive pixel array including a plurality of photosensitive pixel serials, wherein one of the plurality of photosensitive pixel serials includes a plurality of photosensitive pixels in series a first end of the series of photosensitive pixels receiving a clock signal, the clock signal being propagated by the first end of the series of photosensitive pixels to a second end of the serial of the photosensitive pixels
  • the photosensitive pixel array outputs a plurality of pixel values
  • the reference pixel array includes at least one reference pixel serial
  • the at least one reference pixel serial includes a plurality of reference pixel circuits serially, the reference pixel serial
  • the first end receives the clock signal, the clock signal is propagated by the first end of the reference pixel series to a second end of the reference pixel sequence, and the reference pixel array outputs the plurality of references a plurality of phase differences between the plurality of received clock signals received by the pixel circuit and the clock signal; and an image depth determining unit coupled to
  • the plurality of photosensitive pixels are serially parallel to each other, and the at least one reference pixel is serially parallel to the plurality of photosensitive pixels in series.
  • each photosensitive pixel circuit of the photosensitive pixel array includes a photosensitive component, and each reference pixel circuit of the reference pixel array does not include a photosensitive component.
  • the reference pixel array does not accept external illumination.
  • the reference pixel array is disposed adjacent to one side of the photosensitive pixel array.
  • the present invention further provides an image depth sensing system including a light emitting unit for emitting incident light; and an image sensing circuit comprising a photosensitive pixel array including a plurality of photosensitive pixel serials, wherein the plurality of photosensitive pixel strings a photosensitive pixel sequence in a row includes a plurality of photosensitive pixel circuits, the first end of the series of photosensitive pixels receiving a clock signal, the clock signal being propagated from the first end of the series of photosensitive pixels to the photosensitive a second end of the pixel serial, the photosensitive pixel array outputs a plurality of pixel values; the reference pixel array includes at least one reference pixel serial, the at least one reference pixel serial reference The pixel sequence includes a plurality of reference pixel circuits, the first end of the reference pixel series receiving the clock signal, the clock signal being propagated by the first end of the reference pixel series to the reference pixel string a second end of the row, the reference pixel array outputs a plurality of phase differences between the plurality of received
  • the invention utilizes a reference pixel array that is not subject to light to record the phase delay/phase difference caused by the conduction of the clock signal, and compensates the phase difference experienced by the photosensitive pixel array when calculating the image depth to solve the prior art.
  • FIG. 1 is a schematic diagram of an image depth sensing system according to an embodiment of the present invention.
  • FIG. 2 is a schematic diagram of an image sensing circuit according to an embodiment of the present invention.
  • FIG. 3 is a schematic diagram of a delayed shackle circuit according to an embodiment of the present invention.
  • FIG. 4 is a schematic diagram of a delay shackle unit according to an embodiment of the present invention.
  • Figure 5 is a schematic illustration of a pixel array.
  • Coupled is used to mean any direct or indirect electrical connection, and the term “electrical connection” refers to a direct electrical connection.
  • FIG. 1 is a schematic diagram of an image depth sensing system 10 according to an embodiment of the present invention.
  • the image depth sensing system 10 can be a Three Dimensional Image Sensor system, which can sense its relative to the target according to the time of flight (ToF) (not shown in FIG. 1). The distance/depth to construct a three-dimensional image of the object.
  • the image depth sensing system 10 includes a light emitting unit 12 and an image sensing circuit 14.
  • the light emitting unit 12 can be a Light Emitting Diode (LED), such as an infrared light emitting diode.
  • the illumination unit 12 is for emitting incident light, and the image sensing circuit 14 is capable of receiving reflected light corresponding to the incident light.
  • LED Light Emitting Diode
  • FIG. 2 is a schematic diagram of an image sensing circuit 14 according to an embodiment of the present invention.
  • the image sensing circuit 14 includes a photosensitive pixel array 140, a clock signal generating circuit 142, a reference pixel array 144, and an image depth determining unit 146 (not shown in FIG. 2).
  • the image sensing circuit 14 receives the reflected light corresponding to the incident light using the photosensitive pixel array 140, and the photosensitive pixel array 140 outputs a plurality of pixel values.
  • the reference pixel array 144 does not accept external illumination.
  • an opaque cover may be disposed above the reference pixel array 144 such that the reference pixel array 144 does not receive external illumination, and the reference pixel array 144 is used.
  • the image depth determining unit 146 is coupled to the photosensitive pixel array 140 and the reference pixel array 144 for receiving the plurality of pixel values and the reference pixel array 144 output by the photosensitive pixel array 140.
  • the plurality of phase differences are output, and the image depth is determined based on the plurality of pixel values and the plurality of phase differences.
  • the photosensitive pixel array 140 includes a plurality of photosensitive pixel serials PXS, and the photosensitive pixel serials PXS may be a column or a row of photosensitive pixels located in the photosensitive pixel array 140, which includes a plurality of photosensitive pixel circuits PX_1 ⁇ PX_M, each photosensitive pixel circuit PX_m includes a photosensitive component (wherein the photosensitive component can be a photodiode or a phototransistor), wherein the photosensitive component can be regarded as a light-controlled current source (Light-Control Current Source) ).
  • a plurality of photosensitive pixel serial PXSs are parallel to each other.
  • the photosensitive pixel circuit PX_1 is a photosensitive pixel circuit located at the first end (Terminal/End) of the photosensitive pixel serial PXS
  • the photosensitive pixel circuit PX_M is a photosensitive pixel circuit located at the second end of the photosensitive pixel serial PXS
  • the photosensitive pixel circuit PX_1 is a photosensitive pixel circuit
  • the PX_1 ⁇ PX_M first receives the photosensitive pixel circuit of the clock signal CK.
  • the clock signal CK is propagated from the first end/photosensitive pixel circuit PX_1 of the photosensitive pixel serial PXS to the second of the photosensitive pixel serial PXS. End/photosensitive pixel circuit PX_M.
  • the reference pixel array 144 is disposed adjacent to one side of the photosensitive pixel array 140, the reference pixel array 144 includes at least one reference pixel serial RPXS, and the reference pixel serial RPXS is parallel to the photosensitive pixel serial PXS, which includes a plurality of reference pixel circuits.
  • RPX_1 ⁇ RPX_M each reference pixel circuit RPX_m may not include any photosensitive component.
  • the reference pixel circuit RPX_m may have a similar circuit structure to the photosensitive pixel circuit PX_m.
  • the reference pixel circuit RPX_m does not have the photosensitive component in the photosensitive pixel circuit PX_m, but uses a voltage-controlled current.
  • the Voltage-Control Current Source replaces the photosensitive member in the photosensitive pixel circuit PX_m.
  • the reference pixel circuit RPX_1 is a reference pixel circuit located at the first end of the reference pixel serial RPXS
  • the reference pixel circuit PX_M is a reference pixel circuit located at the second end of the reference pixel serial RPXS
  • the reference pixel circuit RPX_1 is the reference pixel
  • the photosensitive pixel circuit that first receives the clock signal CK in the circuits RPX_1 ⁇ RPX_M in other words, the clock signal CK is propagated from the first end/reference pixel circuit RPX_1 of the reference pixel serial PXS to the second end of the reference pixel serial PXS/ Reference pixel circuit RPX_M.
  • the clock signal CK is conducted on the clock signal transmission line.
  • the photosensitive pixel serial PXS may include a clock signal transmission line PXTL, and the clock signal CK is propagated (Propagate) to the photosensitive pixel by the first end/photosensitive pixel circuit PX_1 of the photosensitive pixel serial PXS by the clock signal transmission line PXTL.
  • the reference pixel serial RPXS may include a clock signal transmission line PXTL', and the clock signal CK is reference pixels.
  • the first end/reference pixel circuit RPX_1 of the serial PXS is propagated to the second end/reference pixel circuit RPX_M of the reference pixel serial PXS by the clock signal transmission line PXTL'.
  • the clock signal CK Since the clock signal CK is transmitted to the clock signal transmission line PXTL with a propagation delay (Propagation Delay), the clock signal (referred to as the reception clock signal) actually received by the photosensitive pixel circuits PX_1 to PX_M of the same photosensitive pixel serial PXS is relatively untransmitted.
  • the delayed clock signal CK has a phase difference Phase difference It will affect the distance/depth calculation and increase the error when calculating the distance/depth.
  • the clock signal CK is conducted to the clock signal transmission line PXTL' also has a propagation delay such that the reception clock signal actually received by the reference pixel circuits RPX_1 to RPX_M of the reference pixel serial RPXS has a phase with respect to the clock signal CK having no propagation delay.
  • the clock signal transmission line PXTL and the clock signal transmission line PXTL' may have the same signal transmission characteristics for the same transmission medium, and the transmission distance and clock of the clock signal CK to the reference pixel circuits RPX_1 ⁇ RPX_M The transmission distance of the signal CK to the photosensitive pixel circuits PX_1 to PX_M is the same, so that the phase difference is Phase difference the same.
  • the image sensing circuit 14 uses the reference pixel array 144 to obtain the phase difference. And will be related to the phase difference
  • the information is output to the image depth determining unit 146, and the image depth determining unit 146 can be based on the phase difference
  • the compensation is back, and the judgment of the image depth is more accurate.
  • the image depth determining unit 146 can generate a plurality of pixel values according to the photosensitive pixel array 140 and the phase difference output by the reference pixel array 144. Judging the depth of the image makes the judgment of the image depth more precise.
  • the photosensitive pixel serial PXS is coupled to the clock signal generating circuit 142 through a delay lock loop (DLL) 148a, and the delayed latch circuit 148a receives the clock signal from the clock signal generating circuit 142. CK', and generates a clock signal CK according to the clock signal CK'.
  • DLL delay lock loop
  • the delay shackle circuit 148a can lock the delay of the clock signal, and the clock signal CK input to the photosensitive pixel serial PXS of the photosensitive pixel array 140 through the delayed shackle circuit 148a has the same delay. / phase.
  • the other delay latch circuit 148b receives the clock signal CK" from the clock signal generating circuit 142, generates the reference clock signal RCK according to the clock signal CK", and inputs the reference clock signal RCK to the reference pixel circuits RPX_1 - RPX_M.
  • the delayed shackle circuit 148b can lock the delay of the clock signal, and the reference clock signal RCK input to the delay ⁇ lock loop 148b to each of the reference pixel serials RPX_m has the same delay/phase.
  • the delayed shackle circuit 148a and the delayed shackle circuit 148b may have the same circuit structure, the circuit structure of which is well known to those skilled in the art, and is briefly described as follows. Please refer to FIG. 3 and FIG. 4.
  • FIG. 3 is a schematic diagram of a delay latch circuit 348 according to an embodiment of the present invention.
  • FIG. 4 is a schematic diagram of a delay latch unit DLL according to an embodiment of the present invention.
  • the delayed shackle loop 348 can be used to implement the delayed shackle loop 148a.
  • the delay shackle loop 348 includes a plurality of buffers BF and a plurality of delay shackle units DLL having input terminals in, ref and an output terminal out, and the delay ⁇ lock unit DLL is used to lock the delay/phase, so that the delay ⁇ lock unit DLL is used to lock the delay/phase
  • the signal output by the delay latch unit DLL at the output terminal out has the same delay/phase as the signal input at the input terminal ref.
  • the detailed circuit structure can be referred to FIG. In this way, the delay shackle circuit 348 can ensure that the clock signal CK output by each delay ⁇ lock unit DLL has the same delay/phase.
  • the delay shackle circuit 348 can also be used to implement the delayed shackle circuit 148b. For the operation principle, reference may be made to the foregoing paragraphs, and details are not described herein again.
  • the image sensing circuit 14 uses the reference pixel array 144 to obtain the phase difference. Due to phase difference Phase difference The same, so the phase difference generated by the reference pixel array 144 can be used when calculating the image depth.
  • the phase difference experienced by the photosensitive pixel circuits PX_1 to PX_M The compensation is back, and the judgment of the image depth is more accurate.
  • FIG. 5 is a schematic diagram of a conventional pixel array 540 .
  • the received clock signal corresponding to the pixel circuits PX_1 P PX_M in the pixel array 540 has a phase difference with respect to the clock signal CK having no propagation delay. There is no phase difference in the prior art. Compensate for phase difference The effect on the distance/depth calculation is increased, but the error in calculating the distance/depth is increased.
  • the present invention utilizes a reference pixel array that is not exposed to light (or does not have a photosensitive component) to record the phase delay/phase difference caused by conduction of the clock signal, and when the image depth is calculated, the photosensitive pixel array is experienced. The phase difference is compensated back, which makes the judgment of image depth more accurate.

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  • General Physics & Mathematics (AREA)
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  • Computer Networks & Wireless Communication (AREA)
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Abstract

一种图像传感电路(14)，包括感光像素阵列(140)，感光像素阵列(140)包括复数个感光像素串行，感光像素阵列(140)输出复数个像素值；参考像素阵列(144)，参考像素阵列(144)包括至少一参考像素串行，至少一参考像素串行中一参考像素串行包括复数个参考像素电路，参考像素串行的第一端接收一时钟信号，参考像素阵列(144)输出复数个参考像素电路所接收的复数个接收时钟信号与时钟信号之间的复数个相位差；以及影像深度判断单元(146)，耦接于感光像素阵列(140)以及参考像素阵列(144)，用来根据复数个像素值以及复数个相位差，判断影像深度。

Description

图像传感电路以及图像深度传感系统 技术领域
本发明涉及一种图像传感电路以及图像深度传感系统，尤其涉及一种可降低时钟信号相位差所造成影响的图像传感电路及图像深度传感系统。
背景技术
3D图像传感系统可采集其相对于目标物的距离/深度信息，并因此通过3D图像各个像素的间距值或距离值生成三维图像数据，所述3D图像也被称为距离图像或深度图。额外的距离维度可在多种应用中使用，以获取更多有关由相机所捕获的场景中对象的信息，从而解决工业传感器领域中的不同任务。
一般来说，3D图像传感电路透过发光二极管来发射入射光，并利用像素阵列中的复数个像素电路来采集对应于入射光且反射自目标物的反射光，并藉由比较入射光与反射光之间的光程差，可计算(设置有3D图像传感电路的)电子装置与目标物之间的距离/深度。然而，当像素阵列很大时，输入至像素阵列的时钟信号于像素阵列中会产生相位差，而导致3D图像传感电路在计算电子装置与目标物之间的距离/深度时产生误差。
因此，现有技术实有改进的必要。
发明内容
因此，本发明的主要目的即在于提供一种可降低时钟信号相位差所造成影响的图像传感电路及图像深度传感系统，以改善现有技术的缺点。
为了解决上述技术问题，本发明提供了一种图像传感电路，包括感光像素阵列，包括复数个感光像素串行，其中所述复数个感光像素串行中一感光像素串行包括复数个感光像素电路，所述感光像素串行的第一端接收时钟信号，所述时钟信号由所述感光像素串行的所述第一端传播(Propagate)至所述感光像素串行的第二端，所述感光像素阵列输出复数个像素值；参考像素阵列，包括至少一参考像素串行，所述至少一参考像素串行中一参考像素串行包括复数个参考像素电路，所述参考像素串行的第一端接收所述时钟信号，所述时钟信号由所述参考像素串行的所述第一端传播至所述参考像素串行的第二端，所述参考像素阵列输出所述复数个参考像素电路所接收的复数个接收时钟信号与所述时钟信号之间的复数个相位差；以及影像深度判断单元，耦接于所述感光像素阵列以及所述参考像素阵列，用来根据所述复数个像素值以及所述复数个相位差，判断影像深度
较佳地，所述复数个感光像素串行相互平行，所述至少一参考像素串行平行于所述复数个感光像素串行。
较佳地，所述感光像素阵列的每一感光像素电路包括感光组件，所述参考像素阵列的每一参考像素电路不包括感光组件。
较佳地，所述参考像素阵列不接受外来光照。
较佳地，所述参考像素阵列相邻设置于所述感光像素阵列的一边。
本发明另提供了一种图像深度传感系统，包括发光单元，用来发射入射光；以及图像传感电路，包括感光像素阵列，包括复数个感光像素串行，其中所述复数个感光像素串行中一感光像素串行包括复数个感光像素电路，所述感光像素串行的第一端接收时钟信号，所述时钟信号由所述感光像素串行的所述第一端传播至所述感光像素串行的第二端，所述感光像素阵列输出复数个像素值；参考像素阵列，包括至少一参考像素串行，所述至少一参考像素串行中一参考 像素串行包括复数个参考像素电路，所述参考像素串行的第一端接收所述时钟信号，所述时钟信号由所述参考像素串行的所述第一端传播至所述参考像素串行的第二端，所述参考像素阵列输出所述复数个参考像素电路所接收的复数个接收时钟信号与所述时钟信号之间的复数个相位差；以及影像深度判断单元，耦接于所述感光像素阵列以及所述参考像素阵列，用来根据所述复数个像素值以及所述复数个相位差，判断影像深度。
本发明利用不受光的参考像素阵列来纪录时钟信号因传导而造成的相位延迟/相位差，并于计算影像深度时，将感光像素阵列所经历到的相位差补偿回来，以解决现有技术中计算影像深度时受到时钟信号相位差影响的缺点。
附图说明
图1为本发明实施例一图像深度传感系统的示意图。
图2为本发明实施例一图像传感电路的示意图。
图3为本发明实施例一延迟拴锁回路的示意图。
图4为本发明实施例一延迟拴锁单元的示意图。
图5为一像素阵列的示意图。
具体实施方式
为了使本发明的目的、技术方案及优点更加清楚明白，以下结合附图及实施例，对本发明进行进一步详细说明。应当理解，此处所描述的具体实施例仅仅用以解释本发明，并不用于限定本发明。
在说明书以及权利要求中，「耦接」一词是指包含任何直接或间接的电气连接手段，「电性连接」一词是指直接电性连接。
请参考图1，图1为本发明实施例一图像深度传感系统10的示意图。图像深度传感系统10可为三维图像传感(Three Dimensional Image Sensor)系统，可根据射线/光的飞行时间(Time of Flight，ToF)感测其相对于目标物(未绘示于图1)的距离/深度，以建构该目标物的三维图像。图像深度传感系统10包括发光单元12以及图像传感电路14，发光单元12可为不可见光发光二极管(Light Emitting Diode，LED)，如红外线发光二极管。发光单元12用来发射入射光，而图像传感电路14可接收对应于该入射光的反射光。
详细来说，请参考图1及图2，图2为本发明实施例图像传感电路14的示意图。图像传感电路14包括感光像素阵列(Pixel Array)140、时钟信号产生电路142、参考像素阵列144以及影像深度判断单元146(图2中未示出)。图像传感电路14利用感光像素阵列140接收对应于该入射光的反射光，感光像素阵列140输出复数个像素值。另外，参考像素阵列144不接受外来光照，于一实施例中，可于参考像素阵列144的上方设置不透光的盖板，使得参考像素阵列144不接受外来光照，而参考像素阵列144用来纪录复数个相位差(其详述于后)，影像深度判断单元146耦接于感光像素阵列140以及参考像素阵列144，用来接收感光像素阵列140所输出的复数个像素值以及参考像素阵列144所输出的复数个相位差，并根据该复数个像素值以及该复数个相位差，判断影像深度。
详细来说，感光像素阵列140包括复数个感光像素串行PXS，感光像素串行PXS可为位于感光像素阵列140的一列(Column)或一行(Row)感光像素，其包括复数个感光像素电路PX_1～PX_M，每一感光像素电路PX_m包括一感光组件(其中感光组件可为感光二极管(Photo Diode)或感光二极管(PhotoTransistor)，其中感光组件可视为一光控电流源(Light-Control Current Source))。复数个感光像素串行PXS彼此之间相互平行。其中，感光像素电路 PX_1为位于感光像素串行PXS的第一端(Terminal/End)的感光像素电路，而感光像素电路PX_M为位于感光像素串行PXS的第二端的感光像素电路，感光像素电路PX_1为感光像素电路PX_1～PX_M中首先接收到时钟信号CK的感光像素电路，换句话说，时钟信号CK由感光像素串行PXS的第一端/感光像素电路PX_1传播(Propagate)至感光像素串行PXS的第二端/感光像素电路PX_M。
另外，参考像素阵列144相邻设置于感光像素阵列140的一边，参考像素阵列144包括至少一参考像素串行RPXS，参考像素串行RPXS平行于感光像素串行PXS，其包括复数个参考像素电路RPX_1～RPX_M，每一参考像素电路RPX_m可不包括任何感光组件。具体来说，参考像素电路RPX_m可与感光像素电路PX_m具有相似的电路结构，与感光像素电路PX_m不同的是，参考像素电路RPX_m不具备感光像素电路PX_m中的感光组件，而是利用压控电流源(Voltage-Control Current Source)取代感光像素电路PX_m中的感光组件。同样地，参考像素电路RPX_1为位于参考像素串行RPXS的第一端的参考像素电路，而参考像素电路PX_M为位于参考像素串行RPXS的第二端的参考像素电路，参考像素电路RPX_1为参考像素电路RPX_1～RPX_M中首先接收到时钟信号CK的感光像素电路，换句话说，时钟信号CK由参考像素串行PXS的第一端/参考像素电路RPX_1传播至参考像素串行PXS的第二端/参考像素电路RPX_M。
一般来说，时钟信号CK传导于时钟信号传输导线上。换句话说，感光像素串行PXS可包含时钟信号传输导线PXTL，而时钟信号CK由感光像素串行PXS的第一端/感光像素电路PX_1藉由时钟信号传输导线PXTL传播(Propagate)至感光像素串行PXS的第二端/感光像素电路PX_M。同样地，参考像素串行RPXS可包含时钟信号传输导线PXTL’，时钟信号CK由参考像素 串行PXS的第一端/参考像素电路RPX_1藉由时钟信号传输导线PXTL’传播至参考像素串行PXS的第二端/参考像素电路RPX_M。
由于时钟信号CK传导于时钟信号传输导线PXTL具有传播延迟(Propagation Delay)，使得同一感光像素串行PXS的感光像素电路PX_1～PX_M实际接收到的时钟信号(简称接收时钟信号)相对于未经传播延迟的时钟信号CK具有相位差
Figure PCTCN2017097980-appb-000001
而相位差
Figure PCTCN2017097980-appb-000002
会对距离/深度计算的造成影响，而增加计算距离/深度时的误差。
另外，时钟信号CK传导于时钟信号传输导线PXTL’亦具有传播延迟，使得参考像素串行RPXS的参考像素电路RPX_1～RPX_M实际接收到的接收时钟信号相对于未经传播延迟的时钟信号CK具有相位差
Figure PCTCN2017097980-appb-000003
于一实施例中，时钟信号传输导线PXTL与时钟信号传输导线PXTL’可为相同的传输介质而具有相通的信号传导特性，而时钟信号CK抵达参考像素电路RPX_1～RPX_M所经的传输距离与时钟信号CK抵达感光像素电路PX_1～PX_M所经的传输距离相同，使得相位差
Figure PCTCN2017097980-appb-000004
与相位差
Figure PCTCN2017097980-appb-000005
相同。
在此情形下，为了降低相位差
Figure PCTCN2017097980-appb-000006
会对距离/深度计算的造成影响，图像传感电路14利用参考像素阵列144来取得相位差
Figure PCTCN2017097980-appb-000007
并将相关于相位差
Figure PCTCN2017097980-appb-000008
的信息输出至影像深度判断单元146，影像深度判断单元146可根据相位差
Figure PCTCN2017097980-appb-000009
于计算影像深度时，将感光像素电路PX_1～PX_M所经历到的相位差
Figure PCTCN2017097980-appb-000010
补偿回来，而使得影像深度的判断更为精准。换句话说，影像深度判断单元146可根据感光像素阵列140所输出的复数个像素值以及参考像素阵列144所输出的相位差
Figure PCTCN2017097980-appb-000011
判断影像深度，使得影像深度的判断更为精准。
另外，如图2所示，感光像素串行PXS透过延迟拴锁回路(Delay Lock Loop，DLL)148a耦接于时钟信号产生电路142，延迟拴锁回路148a自时钟信号产生电路142接收时钟信号CK’，并根据时钟信号CK’产生时钟信号CK。需注意的是，延迟拴锁回路148a可将时钟信号的延迟锁住，而使通过延迟拴锁回路148a输入至感光像素阵列140中每一个感光像素串行PXS的时钟信号CK皆具有相同的延迟/相位。另外，另一延迟拴锁回路148b自时钟信号产生电路142接收时钟信号CK”，并根据时钟信号CK”产生参考时钟信号RCK，并将参考时钟信号RCK输入至参考像素电路RPX_1～RPX_M。同样地。延迟拴锁回路148b可将时钟信号的延迟锁住，而使延迟拴锁回路148b输入至每一个参考像素串行RPX_m的参考时钟信号RCK皆具有相同的延迟/相位。
延迟拴锁回路148a与延迟拴锁回路148b可具有相同的电路结构，其电路结构为本领域技术人员所公知，故简述如下。请参考图3及图4，图3为本发明实施例延迟拴锁回路348的示意图，图4为本发明实施例延迟拴锁单元DLL的示意图。延迟拴锁回路348可用来实现延迟拴锁回路148a。延迟拴锁回路348包括复数个缓冲器BF以及复数个延迟拴锁单元DLL，延迟拴锁单元DLL具有输入端in、ref以及输出端out，延迟拴锁单元DLL用来锁住延迟/相位，使得延迟拴锁单元DLL于输出端out输出的信号与于输入端ref所输入的信号具有相同的延迟/相位，其详细电路结构可参考图4。如此一来，延迟拴锁回路348可确保每一个延迟拴锁单元DLL所输出的时钟信号CK皆具有相同的延迟/相位。另外，延迟拴锁回路348亦可用来实现延迟拴锁回路148b，其操作原理可参考前述段落，于此不再赘述。
由上述可知，图像传感电路14利用参考像素阵列144来取得相位差
Figure PCTCN2017097980-appb-000012
Figure PCTCN2017097980-appb-000013
由于相位差
Figure PCTCN2017097980-appb-000014
与相位差
Figure PCTCN2017097980-appb-000015
相同，因此可于计算影像深度时， 利用参考像素阵列144所产生的相位差
Figure PCTCN2017097980-appb-000016
将感光像素电路PX_1～PX_M所经历到的相位差
Figure PCTCN2017097980-appb-000017
补偿回来，而使得影像深度的判断更为精准。
相较之下，请参考图5，图5为现有像素阵列540的示意图。像素阵列540中对应于像素电路PX_1～PX_M的接收时钟信号相对于未经传播延迟的时钟信号CK具有相位差
Figure PCTCN2017097980-appb-000018
现有技术中并未针对相位差
Figure PCTCN2017097980-appb-000019
进行补偿，而使得相位差
Figure PCTCN2017097980-appb-000020
对距离/深度计算的产生影响，反而增加计算距离/深度时的误差。
综上所述，本发明利用不受光(或不具有感光组件)的参考像素阵列来纪录时钟信号因传导而造成的相位延迟/相位差，并于计算影像深度时，将感光像素阵列所经历到的相位差补偿回来，而使得影像深度的判断更为精准。
以上所述仅为本发明的较佳实施例而已，并不用以限制本发明，凡在本发明的精神和原则之内所作的任何修改、等同替换和改进等，均应包括在本发明的保护范围之内。

Claims (10)

  1. 一种图像传感电路，其特征在于，所述图像传感电路包括：
    感光像素阵列，包括复数个感光像素串行，其中所述复数个感光像素串行中一感光像素串行包括复数个感光像素电路，所述感光像素串行的第一端接收时钟信号，所述时钟信号由所述感光像素串行的所述第一端传播至所述感光像素串行的第二端，所述感光像素阵列输出复数个像素值；
    参考像素阵列，包括至少一参考像素串行，所述至少一参考像素串行中一参考像素串行包括复数个参考像素电路，所述参考像素串行的第一端接收所述时钟信号，所述时钟信号由所述参考像素串行的所述第一端传播至所述参考像素串行的第二端，所述参考像素阵列输出所述复数个参考像素电路所接收的复数个接收时钟信号与所述时钟信号之间的复数个相位差；以及
    影像深度判断单元，耦接于所述感光像素阵列以及所述参考像素阵列，用来根据所述复数个像素值以及所述复数个相位差，判断影像深度。
  2. 如权利要求1所述的图像传感电路，其特征在于，所述复数个感光像素串行相互平行，所述至少一参考像素串行平行于所述复数个感光像素串行。
  3. 如权利要求1所述的图像传感电路，其特征在于，所述感光像素阵列的每一感光像素电路包括感光组件，所述参考像素阵列的每一参考像素电路不包括感光组件。
  4. 如权利要求1所述的图像传感电路，其特征在于，所述参考像素阵列不接受外来光照。
  5. 如权利要求1所述的图像传感电路，其特征在于，所述参考像素阵列相邻设置于所述感光像素阵列的一边。
  6. 一种图像深度传感系统，其特征在于，包括：
    发光单元，用来发射入射光；以及
    图像传感电路，包括：
    感光像素阵列，包括复数个感光像素串行，其中所述复数个感光像素串行中一感光像素串行包括复数个感光像素电路，所述感光像素串行的第一端接收时钟信号，所述时钟信号由所述感光像素串行的所述第一端传播至所述感光像素串行的第二端，所述感光像素阵列输出复数个像素值；
    参考像素阵列，包括至少一参考像素串行，所述至少一参考像素串行中一参考像素串行包括复数个参考像素电路，所述参考像素串行的第一端接收所述时钟信号，所述时钟信号由所述参考像素串行的所述第一端传播至所述参考像素串行的第二端，所述参考像素阵列输出所述复数个参考像素电路所接收的复数个接收时钟信号与所述时钟信号之间的复数个相位差；以及
    影像深度判断单元，耦接于所述感光像素阵列以及所述参考像素阵列，用来根据所述复数个像素值以及所述复数个相位差，判断影像深度。
  7. 如权利要求6所述的图像深度传感系统，其特征在于，所述复数个感光像素串行相互平行，所述至少一参考像素串行平行于所述复数个感光像素串行。
  8. 如权利要求6所述的图像深度传感系统，其特征在于，所述感光像素阵列的每一感光像素电路包括感光组件，所述参考像素阵列的每一参考像素电路不包括感光组件。
  9. 如权利要求6所述的图像深度传感系统，其特征在于，所述参考像素阵列不接受外来光照。
  10. 如权利要求6所述的图像深度传感系统，其特征在于，所述参考像素阵列相邻设置于所述感光像素阵列的一边。
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