WO2019033304A1 - 一种调压电路 - Google Patents

一种调压电路 Download PDF

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Publication number
WO2019033304A1
WO2019033304A1 PCT/CN2017/097690 CN2017097690W WO2019033304A1 WO 2019033304 A1 WO2019033304 A1 WO 2019033304A1 CN 2017097690 W CN2017097690 W CN 2017097690W WO 2019033304 A1 WO2019033304 A1 WO 2019033304A1
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WO
WIPO (PCT)
Prior art keywords
switching unit
unit
voltage
output voltage
switch
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Application number
PCT/CN2017/097690
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English (en)
French (fr)
Inventor
唐样洋
姚恩义
张臣雄
Original Assignee
华为技术有限公司
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Publication date
Application filed by 华为技术有限公司 filed Critical 华为技术有限公司
Priority to PCT/CN2017/097690 priority Critical patent/WO2019033304A1/zh
Priority to JP2019543804A priority patent/JP6757857B2/ja
Priority to EP17921858.1A priority patent/EP3672052A4/en
Priority to CN201780003325.7A priority patent/CN110168894B/zh
Priority to KR1020197024037A priority patent/KR102247386B1/ko
Publication of WO2019033304A1 publication Critical patent/WO2019033304A1/zh
Priority to US16/559,959 priority patent/US10984839B2/en
Priority to US17/171,333 priority patent/US11120845B2/en

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    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10—Regulating voltage or current
    • G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
    • G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
    • G05F1/59—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices including plural semiconductor devices as final control devices for a single load
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10—Regulating voltage or current
    • G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
    • G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
    • G05F1/563—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices including two stages of regulation at least one of which is output level responsive, e.g. coarse and fine regulation
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10—Regulating voltage or current
    • G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
    • G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
    • G05F1/575—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices characterised by the feedback circuit
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10—Regulating voltage or current
    • G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
    • G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
    • G05F1/59—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices including plural semiconductor devices as final control devices for a single load
    • G05F1/595—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices including plural semiconductor devices as final control devices for a single load semiconductor devices connected in series
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
    • G05F3/02—Regulating voltage or current
    • G05F3/08—Regulating voltage or current wherein the variable is dc
    • G05F3/10—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
    • G05F3/16—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
    • G05F3/20—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
    • G05F3/26—Current mirrors
    • G05F3/262—Current mirrors using field-effect transistors only
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/4074—Power supply or voltage generation circuits, e.g. bias voltage generators, substrate voltage generators, back-up power, power control circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/30—Power supply circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • G11C5/147—Voltage reference generators, voltage or current regulators; Internally lowered supply levels; Compensation for voltage drops
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/02—Arrangements for writing information into, or reading information out from, a digital store with means for avoiding parasitic signals
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/0045—Converters combining the concepts of switch-mode regulation and linear regulation, e.g. linear pre-regulator to switching converter, linear and switching converter in parallel, same converter or same transistor operating either in linear or switching mode
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/22—Conversion of dc power input into dc power output with intermediate conversion into ac
    • H02M3/24—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
    • H02M3/28—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
    • H02M3/325—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal
    • H02M3/335—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only

Definitions

  • the present application relates to the field of integrated circuit technology, and in particular, to a voltage regulating circuit.
  • Integrated circuits With the development of semiconductor processes, integrated circuits have been widely used. Integrated circuits usually have different working scenarios and uncertainties when working. Different working scenarios and uncertainties are generally caused by changes in various factors that affect the normal operation of integrated circuits, such as temperature changes, integrated circuits. Internal components are aging, etc. Moreover, different working scenarios and the uncertainty often bring many disadvantages to the integrated circuit, for example, causing fluctuations in the operating voltage in the integrated circuit, thereby affecting the stability of the system. Therefore, in order to ensure that the integrated circuit can work normally under uncertainty, it is necessary to adjust the operating voltage in the integrated circuit through the voltage regulating circuit.
  • the operating voltage in the integrated circuit can be regulated by the voltage regulating circuit shown in FIG. 1 to ensure the stability of the system.
  • the voltage regulating circuit includes a first switching unit 10, a second switching unit 20, a comparison control unit 30, and a load 40, each of which has a transformer function.
  • the first switching unit 10 is coupled to the load 40 for providing a first output voltage VVDD to the load 40.
  • the second switching unit 20 is a mirror image of the first switching unit 10, that is, the second switching unit 20 is an equal-scale reduction structure of the first switching unit 10, and the second output voltage VDR output by the second switching unit 20
  • the first output voltage VVDD that is unaffected by fluctuations in the load is equal in magnitude.
  • the comparison control unit 30 is connected to the first switching unit 10 and the second switching unit 20, respectively, for collecting the first output voltage VVDD and the second output voltage VDR, and based on the first output voltage VVDD, the second output voltage VDR and the reference.
  • the voltage V ref determines the bias voltage V1 to control the conduction state of the first switching unit 10 and the second switching unit 20 with the bias voltage V1, thereby adjusting the first output voltage VVDD.
  • the bias voltage V1 for controlling the first switching unit 10 is determined by two voltages, the two partial voltages include a voltage output based on VDR and V ref and a voltage output based on VVDD and V ref , and the second The output voltage VDR is not affected by the load and fluctuates. Therefore, the voltage based on the VDR and the reference voltage output can eliminate the error of the bias voltage V1 due to the fluctuation of the first output voltage VVDD, thereby ensuring the stability of the system.
  • a relatively wide output current range refers to a large span of the output current, for example, an output current.
  • the range can range from a few milliamps to a few amps, and how to ensure a high Power Supply Rejection Ratio (PSRR) is also a research hotspot in achieving a wide output current range.
  • PSRR Power Supply Rejection Ratio
  • the present application provides a voltage regulating circuit.
  • the technical solution is as follows:
  • the voltage regulating circuit includes a first switching unit, a second switching unit, a third switching unit, a first comparison control unit, a second comparison control unit, and a load, and the first switching unit and the second switching unit are both With variable pressure function;
  • the first switch unit and the second switch unit both receive a voltage input from a power source, and the first switch
  • the equivalent resistance of the unit is less than the equivalent resistance of the second switching unit
  • the first switching unit and the second switching unit are also respectively connected to the load for supplying a first output voltage to the load, the first output voltage being the first switching unit and the a voltage output by the second switching unit;
  • the first comparison control unit is connected to the first switch unit, configured to collect the first output voltage, and determine a first offset based on the first output voltage, the first reference voltage, and the second reference voltage And a voltage to control, by using the first bias voltage, a magnitude of an equivalent resistance of the first switching unit by a digital control manner, the first reference voltage being greater than the second reference voltage; the second comparison control unit Connected to the third switching unit and the second switching unit, respectively, for collecting the first output voltage and the second output voltage, and based on the first output voltage, the second output voltage, and the third Determining a second bias voltage by using a reference voltage, and controlling, by the second bias voltage, an magnitude of an equivalent resistance of the third switching unit and the second switching unit by an analog control manner, the third reference voltage being greater than The second reference voltage is smaller than the first reference voltage, and the third switch unit is a mirror image of the unit after the second switch unit and the first switch unit are connected in parallel, and is used for inputting The second output voltage to nullify the error to the second bias voltage
  • the voltage regulating circuit can adjust the first output voltage through the branch where the first switching unit is located, or can adjust the first output voltage through the branch where the second switching unit is located.
  • the first reference voltage, the second reference voltage, and the third reference voltage when the first output voltage is greatly disturbed, the first output voltage is adjusted by the branch where the first switching unit is located, When a small disturbance occurs in the first output voltage, the first output voltage is adjusted by the branch in which the second switching unit is located.
  • the first switching unit since the equivalent resistance of the first switching unit is smaller than the equivalent resistance of the second switching unit, and the first switching unit and the second switching unit are connected in parallel, the first switching unit flows through the first The current of the branch where the switching unit is located is greater than the current flowing through the branch of the second switching unit. Since the first switching unit in the digital control mode operates in the linear region, it can be ensured that the first open unit can flow a large current under a unit area, thereby realizing a wide output current capability.
  • the second switching unit since the second switching unit is controlled by the analog control mode, the equivalent transconductance of the output of the second switching unit can be improved, and the transconductance is proportional to the PSRR, and therefore, the second switching unit is located
  • the control of the branch ensures a high PSRR.
  • the first switching unit adopts a digital control mode, when a small disturbance occurs, the first comparison control unit does not control the switching tube in the first switching unit to be turned on, and therefore, the branch does not affect the system.
  • the PSRR has an effect that the branch does not degrade the PSRR of the system.
  • an equivalent resistance of the first switching unit is smaller than an equivalent resistance of the second switching unit; or
  • the first switching unit and the second switching unit are both switching units composed of metal oxide semiconductor MOS tubes, and the first switching unit includes a MOS tube having a width to length ratio greater than the second switch
  • the equivalent resistance of the first switching unit is smaller than the equivalent resistance of the second switching unit.
  • the equivalent resistance of the first switching unit may be smaller than the equivalent resistance of the second switching unit by setting the number of switches in the first switching unit and the second switching unit.
  • the flexibility of the implementation may be improved by setting the aspect ratio of the MOS tube in the first switching unit and the second switching unit to achieve an equivalent resistance of the first switching unit that is smaller than the equivalent resistance of the second switching unit.
  • the third switch unit includes a first mirror switch unit and a second mirror switch unit
  • the first mirror switch unit includes a number of switches that is one-Nth of the number of switches included in the first switch unit.
  • the number of switches included in the second mirror switch unit is one-Nth of the number of switches included in the second switch unit, and the N is greater than A positive integer of 1;
  • the voltage regulating circuit further includes a mirror resistor, the magnitude of the mirror resistor being one-Nth of a resistance included in the load.
  • the mirror switch unit included in the third switch unit may be reduced according to a certain ratio, that is, the number of switches included in the third switch unit is set to the first switch unit and the second switch. One tenth of the unit. In this way, the processability is simplified.
  • the width and length ratio of the MOS transistors included in the first mirror switching unit are both One ninth of the aspect ratio of the MOS transistor included in the first switching unit
  • the aspect ratio of the MOS transistor included in the second mirror switching unit is the aspect ratio of the MOS transistor included in the second switching unit One-ninth.
  • the width and length of the MOS tube can affect the magnitude of the current flowing through the MOS transistor, in order to implement the third switching unit, in this implementation, the width of the MOS transistor included in the mirrored third switching unit can be The length ratio is set to one-N of the MOS tube before mirroring. In this way, the effect of simplifying the process is also achieved.
  • the voltage regulating circuit further includes a fourth switching unit, and the fourth switching unit includes a plurality of switches, the fourth switching unit is connected in series with the second switching unit and the Between the loads, the fourth switching unit is configured to increase an equivalent resistance of a branch where the second switching unit is located to reduce a current flowing through the second switching unit; correspondingly, the third switching unit is A mirror image of the connected unit between the second switching unit, the first switching unit, and the fourth switching unit.
  • a fourth switching unit is connected in series between the second switching unit and the load. Specifically, an input end of the fourth switch unit is connected to an output end of the second switch unit, and an output end of the fourth switch unit is connected to the load. In this way, it can be ensured that the current flowing through the branch of the second switching unit is sufficiently small.
  • the fourth switch unit is connected to the first comparison control unit to control the fourth switch unit by using a first bias voltage determined by the first comparison control unit The size of the equivalent resistance.
  • the fourth switch unit is connected to the second comparison control unit to control the fourth switch by a second bias voltage determined by the second comparison control unit The size of the equivalent resistance of the unit.
  • the fourth switching unit can be controlled by different implementation manners according to actual needs, so that the flexibility of implementation can be improved.
  • the window comparator is configured to: when the first output voltage is greater than the first reference voltage, based on the first reference voltage and Determining, by the first output voltage, the first bias voltage; when the first output voltage is less than the second reference voltage, determining the first bias based on the second reference voltage and the first output voltage Set the voltage.
  • the first comparison control unit may be implemented by using a window comparator. If the first output voltage is greater than the first reference voltage, the voltage regulating circuit determines the first stage by using the first output voltage and the first reference voltage. A bias voltage controls the magnitude of the equivalent resistance of the first switching unit. In an actual implementation, if the determined first bias voltage is larger, that is, the difference between the first output voltage and the first reference voltage is larger, it is required to control the first switching unit, etc. The greater the effective resistance becomes, in one possible implementation, that is, the more switches in the first switching unit need to be controlled to be non-conducting.
  • the voltage regulating circuit controls the equivalent of the first switching unit by the first bias voltage determined based on the first output voltage and the second reference voltage The size of the resistor.
  • the determined first bias voltage is smaller, that is, the difference between the first output voltage and the second reference voltage is smaller, it is required to control the first switching unit, etc.
  • control of the first switching unit by the first comparison control unit is implemented by the window comparator, so that when the first output voltage is greatly disturbed, the first branch unit is connected to the first The output voltage is adjusted.
  • the second comparison control unit includes a first amplification module, a second amplification module, and a third amplification module, where the first amplification module is respectively connected to the second amplification module and the third amplification module, The second amplifying module is connected to the third amplifying module and connected to the second switching unit; the voltage regulating circuit further includes a feedback compensating unit, the feedback compensating unit and the second switching unit, the second The amplification module and the third amplification module are respectively connected to perform feedback compensation on the branch where the second amplification module is located and the branch where the third amplification module is located by using the feedback compensation capacitor included in the feedback compensation unit.
  • the embodiment of the present invention uses the circuit shown in FIG. 5 to implement control of the second switching unit by the second comparison control unit.
  • the first amplification module is a module including a transistor and having an amplification function.
  • the noise is proportional to the size of the transistor, that is, if the size of the transistor included in the first amplifying module is larger, the generated noise is smaller, and conversely, if the size of the transistor included in the first amplifying module is smaller, the generated The larger the noise, therefore, in the embodiment of the present invention, in order to achieve low noise, the first amplifying module adopts an amplifying function module including a thicker transistor, that is, the size of the transistor included in the first amplifying module is generally larger.
  • FIG. 6 is a specific implementation circuit diagram according to an exemplary embodiment, where the positive output end of the first amplification module is connected to the third amplification module, and The negative output terminal of the amplification module is connected to the second amplification module, and the output of the second amplification module is connected to the output of the third amplification module, and the second amplification module and the third amplification module are buffers.
  • connection mode that is, the output end of the second amplification module is connected to the positive input end of the second amplification module, and the output end of the third amplification module is connected to the negative input end of the third amplification module.
  • the voltage regulating circuit further includes a feedback compensation unit including a capacitor Cm, a G4 module and a G5 module.
  • the output end of the G4 module is connected to the third amplifying module, and the G4 module and the Cm are used for feedback compensation of the branch where the third amplifying module is located.
  • the output end of the G5 module is connected to the second amplifying module, and the G5 module and Cm are used for feedback compensation of the branch where the second amplifying module is located. In this way, the stability of the branch loop where the second amplification module is located and the branch loop where the third amplification module is located are ensured.
  • the voltage regulating circuit provided by the present application outputs the first output voltage to the load when the power source starts to supply power, and the first switching unit and the second switching unit output the first output voltage.
  • the voltage regulating circuit may control the first switching unit to perform voltage adjustment through the first comparison control unit, or control the second switching unit to perform voltage adjustment through the second comparison control unit. That is, the voltage regulating circuit can collect the first output voltage by using the first comparison control unit, and control the first switch list by digital control based on the first output voltage, the first reference voltage, and the second reference voltage. The equivalent resistance of the element is adjusted to adjust the first output voltage.
  • the first output voltage and the second output voltage are collected by the second comparison control unit, and the third switching unit and the second switch are controlled by an analog control manner based on the first output voltage, the second output voltage, and the third reference voltage.
  • the equivalent resistance of the cell is sized to regulate the first output voltage.
  • the equivalent resistance of the first switching unit is smaller than the equivalent resistance of the second switching unit, that is, the current flowing through the branch of the first switching unit is greater than the current flowing through the branch of the second switching unit, due to the number
  • the first switching unit in the control mode operates in the linear region, so that the first open unit can ensure a large current flowing per unit area, and a wide output current capability is realized.
  • the equivalent transconductance of the output of the second switching unit can be improved by using the analog control method, and the transconductance is proportional to the PSRR. Therefore, the control of the branch of the second switching unit is ensured. Higher PSRR.
  • the third reference voltage is greater than the second reference voltage and smaller than the first reference voltage, that is, when the first output voltage is greatly disturbed, the voltage is adjusted through the branch of the first switching unit. When a small disturbance occurs in the output voltage, the voltage is adjusted through the branch of the second switching unit.
  • the first switching unit adopts a digital control mode, when a small disturbance occurs, the first comparison control unit does not The switch in the first switching unit is controlled to be turned on. Therefore, the branch does not affect the PSRR of the system, that is, the branch does not lower the PSRR of the system.
  • FIG. 1 is a voltage regulating circuit according to an exemplary embodiment
  • FIG. 2 is a voltage regulating circuit according to another exemplary embodiment
  • FIG. 3 is a schematic diagram showing a connection between a first switching unit and a first comparison control unit, according to an exemplary embodiment
  • FIG. 4 is a voltage regulating circuit according to another exemplary embodiment
  • FIG. 5 is a schematic diagram showing a connection between a second comparison control unit and a second switching unit, according to an exemplary embodiment
  • FIG. 6 is a connection circuit diagram of a second comparison control unit and a second switching unit, according to an exemplary embodiment
  • FIG. 7 is a voltage regulating circuit according to another exemplary embodiment.
  • first switching unit 1: first switching unit; 2: second switching unit; 3: third switching unit; 4: first comparison control unit; 5: second comparison control unit; 6: load; 7: fourth switching unit; Feedback compensation unit;
  • 51 a first amplifier
  • 52 a second amplifier
  • G1 first amplification module
  • G2 second amplification module
  • G3 third amplification module.
  • PSRR is one of the important parameters to consider during the operation of the voltage regulator circuit.
  • the PSRR can reflect this The noise immunity of the voltage regulator circuit, the larger the value of the PSRR, indicating that the noise immunity of the voltage regulator circuit is stronger, and the stronger the noise immunity, the more stable the system.
  • a voltage regulating circuit is provided, which can ensure high PSRR performance in a wide output current range.
  • FIG. 2 is a schematic structural diagram of a voltage regulating circuit according to an embodiment of the present invention.
  • the voltage regulating circuit includes a first switching unit 1, a second switching unit 2, a third switching unit 3, a first comparison control unit 4, a second comparison control unit 5, and a load 6, wherein the first switch Both the unit 1 and the second switching unit 2 have a transformer function.
  • the first switching unit 1 and the second switching unit 2 both receive a voltage input from the power supply VDD, and the equivalent resistance of the first switching unit 1 is smaller than the equivalent resistance of the second switching unit 2, wherein the first Each of the switching unit 1 and the second switching unit 2 corresponds to a resistor.
  • the switching unit generally includes a plurality of paths and switching tubes (such as diodes) connected to each other in series or in parallel on the plurality of paths. In this case, the equivalent resistance of the switching unit is turned on. The total resistance of the switch tube on the path. Further, when comparing the magnitudes of the equivalent resistances of the two switching units, it can be achieved by comparing the total resistances of the two switching units.
  • the first switch unit 1 includes a plurality of switch tubes connected in series
  • the second switch unit 2 includes a switch tube
  • the total resistance of the plurality of switch tubes connected in series in the first switch unit 1 is determined.
  • the total resistance is compared with the equivalent of the switching tube in the second switching unit 2.
  • the principle of paralleling is the same.
  • the first switch unit 1 and the second switch unit 2 are also respectively connected to the load 6 for supplying the first output voltage VVDD to the load 6.
  • the first output voltage VVDD is the power supply VDD via the first The voltage output by the switching unit 1 and the second switching unit 2.
  • the third switching unit 3 receives the voltage input from the power supply VDD and outputs a second output voltage VDR.
  • the third switching unit 3 is a mirror image of the unit in which the first switching unit 1 and the second switching unit 2 are connected in parallel, and the output thereof
  • the second output voltage VDR is equal in magnitude to the first output voltage VVDD before the fluctuation is generated, to eliminate the error caused by the fluctuation of the load 6 to the second bias voltage by using the second output voltage VDR, and thus,
  • the third switching unit 3 ensures the stability of the system.
  • the second bias voltage is used to control the second switching unit 2, as described in detail below.
  • the first comparison control unit 4 is connected to the first switching unit 1 for controlling the magnitude of the equivalent resistance of the first switching unit 1 by digital control.
  • the second comparison control unit 5 is respectively connected to the third switching unit 3 and the second switching unit 2, and the second comparison control unit 5 is configured to control the second switching unit 2 and the third switching unit 3 by using an analog control manner. The size of the effect resistor.
  • the magnitude of the equivalent resistance of the switch unit when the magnitude of the equivalent resistance of the switch unit is controlled by the digital control manner, it generally refers to controlling the number of conduction of the plurality of switches included in the switch unit; when controlled by the analog control mode
  • the magnitude of the equivalent resistance of the switching unit generally refers to controlling the magnitude of the gate voltage of the switching unit, thereby controlling the amount of current flowing through the switching unit.
  • the branch of the first switching unit 1 or the second switching unit 2 may be The circuit adjusts the first output voltage VVDD. It is worth mentioning that, in the above voltage regulating circuit, since the equivalent resistance of the first switching unit 1 is smaller than the equivalent resistance of the second switching unit 2, and the first switching unit 1 and the second switching unit 2 The parallel connection is such that the current flowing through the branch of the first switching unit 1 is greater than the current flowing through the branch of the second switching unit 2.
  • the bias voltage for controlling the gate of the first switching unit 1 is a low voltage or a high voltage in the digital control mode, for example, the low voltage and the high voltage are respectively "0" and "1", that is, when The first switching unit 1 is turned on
  • the voltage of the gate of the first switching unit 1 is a low voltage
  • the voltage of the gate of the first switching unit 1 is a high voltage
  • the lower first switching unit 1 operates in the linear region, so that the first open unit 1 can ensure a large current flow per unit area, thereby ensuring that the voltage regulating circuit can realize a wide current output range.
  • the unit area referred to herein means a single switch tube included in the first switch unit 1.
  • the second switch needs to be added.
  • the number of transistors in unit 2 the number of transistors is proportional to the equivalent transconductance, that is, the equivalent transconductance of the output of the second switching unit 2 can be increased, and the transconductance is proportional to the PSRR, therefore, The control of the branch where the two switching units 2 are located ensures a high PSRR.
  • voltage regulation may be selected by which branch is performed based on the range of variation of the first output voltage VVDD.
  • a plurality of reference voltages are disposed in the voltage regulating circuit, including: a first reference voltage V ref1 , a second reference voltage V ref2 , and a third reference voltage V ref3 .
  • the first reference voltage V ref1 is greater than the second reference voltage V ref2
  • the third reference voltage V ref3 is greater than the second reference voltage V ref2 and smaller than the first reference voltage V ref1 .
  • the value of the third reference voltage V ref3 may be set to an actual required voltage value of the load.
  • the first reference voltage V ref1 may be a third reference voltage V ref3 plus a fixed value ⁇ V.
  • the third reference voltage V ref3 can be set to 9V, and the ⁇ V can be set to 1V.
  • the first reference voltage V ref1 is 10V
  • the second reference voltage is V ref2 is 8V.
  • the first output voltage VVDD may be considered to have a large fluctuation, if the first output voltage VVDD and the foregoing When the three reference voltages V ref3 are compared, that is, the first output voltage VVDD is between the first reference voltage V ref1 and the second reference voltage V ref2 , the first output voltage VVDD may be considered to have a small fluctuation.
  • the first switching unit 1 passes through The branch adjusts the first output voltage VVDD, and when the first output voltage VVDD exhibits a small disturbance, the first output voltage VVDD is adjusted by the branch of the second switching unit 2.
  • the first output voltage VVDD is adjusted by the branch where the first switching unit 1 is located, and the specific implementation of adjusting the first output voltage VVDD by the branch of the second switching unit 2 is separately performed.
  • the introduction is as follows:
  • the implementation process specifically includes: the first comparison control unit 4 is connected to the first switching unit 1 for Collecting the first output voltage VVDD, and determining a first bias voltage based on the first output voltage VVDD, the first reference voltage V ref1 and the second reference voltage V ref2 to utilize the first bias voltage by digital control The magnitude of the equivalent resistance of the first switching unit 1 is controlled.
  • the first output voltage VVDD outputted by the first switching unit 1 and the second switching unit 2 is supplied to the load 6, that is, the load input voltage is supplied to the load 6.
  • the adjustment The voltage circuit acquires the first output voltage VVDD through the first comparison control unit 4, and determines the first bias voltage based on the first output voltage VVDD, the first reference voltage Vref1, and the second reference voltage Vref2 . Thereafter, the magnitude of the equivalent resistance of the first switching unit 1 is controlled by digital control using the first bias voltage.
  • the first comparison control unit 4 may include a window comparator 41.
  • the switching transistor of the first switching unit is a P-type transistor as an example for description. Determining the first bias voltage based on the first reference voltage V ref1 and the first output voltage VVDD when the first output voltage VVDD is greater than the first reference voltage V ref1 ; when the first output voltage VVDD is less than the first When the reference voltage V ref2 is two, the first bias voltage is determined based on the second reference voltage V ref2 and the first output voltage VVDD.
  • the voltage regulating circuit passes the first bias voltage determined based on the first output voltage VVDD and the first reference voltage V ref1 .
  • the magnitude of the equivalent resistance of the first switching unit 1 is controlled.
  • the determined first bias voltage is larger, that is, the difference between the first output voltage VVDD and the first reference voltage V ref1 is larger, it is required to control the first switch.
  • the larger the equivalent resistance of the unit 1 becomes, in a possible implementation, that is, the more switches in the first switching unit 1 need to be controlled to be non-conducting.
  • the specific implementation of determining the first bias voltage based on the first reference voltage V ref1 and the first output voltage VVDD includes: the window comparator 41 the first reference voltage V ref1 and the first output voltage VVDD A comparison is made to determine a difference between the first reference voltage V ref1 and the first output voltage VVDD, after which the window comparator 41 determines the difference to determine the first bias voltage.
  • the voltage regulating circuit controls the first bias voltage determined by the first output voltage VVDD and the second reference voltage V ref2 The magnitude of the equivalent resistance of a switching unit 1.
  • the determined first bias voltage is smaller, that is, the smaller the difference between the first output voltage VVDD and the second reference voltage V ref2 is, the first switch needs to be controlled.
  • the specific implementation of determining the first bias voltage based on the second reference voltage V ref2 and the first output voltage VVDD includes: the window comparator 41 the first output voltage VVDD and the second reference voltage V ref2 A comparison is made to determine a difference between the first output voltage VVDD and the second reference voltage Vref2 , after which the window comparator 41 determines the difference to determine the first bias voltage.
  • the magnitude of the equivalent resistance of the first switching unit 1 is kept unchanged. In a possible implementation manner, it is ensured that the current number of conductions of the plurality of switches included in the first switching unit 1 does not change. That is, if the first output voltage VVDD is between the first reference voltage V ref1 and the second reference voltage V ref2 , it indicates that the first output voltage VVDD exhibits a small disturbance, and when the first output voltage VVDD appears smaller During the disturbance, the magnitude of the equivalent resistance of the first switching unit 1 does not change, thus ensuring that the first switching unit 1 does not affect the PSRR of the system. That is, although the first switching unit 1 adopts a digital control mode, the first switching unit 1 does not lower the PSRR of the system when the system reaches a steady state.
  • the specific implementation of controlling the magnitude of the equivalent resistance of the first switching unit 1 by using the first bias voltage by using the first bias voltage includes: determining, by the first comparison control unit 4, the first bias voltage, and storing from the stored Bias In the correspondence between the voltage range and the digital control information, digital control information corresponding to the bias voltage range in which the first bias voltage is located is obtained. Then, the magnitude of the equivalent resistance of the first switching unit 1 is controlled by using the acquired digital control information, that is, the switch in the first switching unit 1 is controlled to be turned on and off, thereby implementing the first switching unit. The size of the equivalent resistance of 1 is controlled.
  • the digital control information may be composed of binary "0" and "1", wherein for the P-type transistor, "0" represents the conduction of the switch, and "1" represents the non-conduction of the switch.
  • the first switching unit 1 adopts a digital control mode
  • the first comparison control unit 4 does not control the switching tube in the first switching unit 1. Turning on, therefore, the branch does not affect the PSRR of the system, ie the branch does not reduce the PSRR of the system.
  • the switch tube in the digital control mode works in the linear region, the current flowing through the digital control mode under the unit area is more, that is, the first switch unit 1 can be controlled by digital control. Improve the response speed to larger currents and achieve higher transient response capability.
  • the implementation process specifically includes: the second comparison control unit 5 is connected to the second switching unit 2, and is used for Collecting the first output voltage VVDD and the second output voltage VDR, and determining a second bias voltage based on the first output voltage VVDD, the second output voltage VDR, and the third reference voltage V ref3 , and using the second bias
  • the voltage controls the magnitude of the equivalent resistance of the second switching unit 2 by an analog control method.
  • the first output voltage VVDD outputted by the first switching unit 1 and the second switching unit 2 is supplied to the load 6, that is, the load input voltage is supplied to the load 6.
  • the voltage regulating circuit The first output voltage VVDD and the second output voltage VDR output by the third switching unit 3 are collected by the second comparison control unit 5, and based on the first output voltage VVDD, the second output voltage VDR, and the third reference voltage V ref3 The second bias voltage is determined. Then, the second bias voltage is used to control the magnitude of the equivalent resistance of the third switching unit 3 and the second switching unit 2, thereby adjusting the first output voltage VVDD.
  • the second comparison control unit 5 is always in an active state when actually implemented. Wherein, when a small fluctuation occurs, since the first comparison control unit 4 does not control the switching tube in the first switching unit 1 to be turned on, the first output is passed through the branch of the second switching unit 2 at this time. The voltage VVDD is adjusted. Of course, when a large fluctuation occurs, the second comparison control unit 5 is also in an active state, but since the equivalent resistance of the first switching unit 1 is smaller than the equivalent resistance of the second switching unit 2, The current flowing through the branch where the first switching unit 1 is located is large, that is, the first switching unit 1 is in a dominant role. Therefore, when a large fluctuation occurs, the first switching unit 1 is actually located. The branch adjusts the first output voltage VVDD.
  • the embodiment of the present invention is only described by taking the second comparison control unit 5 as an active state as an example.
  • the second comparison can also be controlled.
  • the control unit 5 does not work.
  • the first comparison control unit 4 can output a control signal to the second comparison control unit 5 to control the second comparison control unit 5 to be inoperative by the control signal. limited.
  • the second comparison control unit 5 may include a first amplifier 51 and a second amplifier 52, and the first input end of the first amplifier 51 and the output end of the third switch unit 3 connected, to collect the second output voltage, a second input terminal of the first amplifier 51 is connected to a third reference voltage V ref3, to collect the third reference voltage V ref3, the first amplifier 51 based on the acquired second The second output voltage VDR and the third reference voltage V ref3 determine and output a voltage.
  • the first input end of the second amplifier 52 is connected to the output end of the first switch unit 1 or the second switch unit 2 for collecting the first output of the first switch unit 1 or the second switch unit 2 a voltage VVDD
  • the second input terminal of the second amplifier 52 is also connected to the third reference voltage V ref3 to collect the third reference voltage V ref3
  • the second amplifier 52 is based on the collected first output voltage VVDD and The third reference voltage V ref3 determines and outputs another voltage.
  • the output end of the first amplifier 51 is connected to the output end of the second amplifier 52, that is, the second bias voltage actually includes two parts of voltage, the two parts of the voltage are respectively the first The voltage output from the amplifier 51 and the voltage output from the second amplifier 52 described above, wherein the voltage output by the first amplifier 51 is the same as the voltage output by the second amplifier 52.
  • the second bias voltage is used to control the gate voltages of the second switching unit 2 and the third switching unit 3 to control the second switching unit 2 and the third switch by an analog control manner based on the second bias voltage.
  • the first output voltage VVDD may be considered to have a small fluctuation.
  • the second switching unit 2 may be supported by the second switching unit 2 .
  • the circuit regulates the voltage of the first output voltage VVDD.
  • the second comparison control unit 5 includes a first amplification module G1, a second amplification module G2, and a third amplification module G3, and the first amplification module 1 and the second amplification module G2 and the The third amplification module G3 is connected, and the second amplification module G2 is connected to the third amplification module G3 and connected to the second switching unit 2.
  • the voltage regulating circuit further includes a feedback compensation unit 8 connected to the second switching unit 2, the second amplifying module G2 and the third amplifying module G3, respectively, for being included by the feedback compensating unit 8.
  • the feedback compensation capacitor Cm performs feedback compensation on the branch where the second amplification module G2 is located and the branch where the third amplification module G3 is located.
  • the embodiment of the present invention uses the circuit shown in FIG. 5 to implement control of the second switching unit 2 by the second comparison control unit 5.
  • the first amplification module G1 is a module including a transistor and having an amplification function. Since the noise is proportional to the size of the transistor, that is, if the size of the transistor included in the first amplifying module G1 is larger, the generated noise is smaller.
  • the first amplifying module G1 adopts an amplifying function module including a thicker transistor, that is, the size of the transistor included in the first amplifying module G1 is usually larger. .
  • FIG. 6 is a specific implementation circuit diagram of the first amplification module G1 and the third amplification module G3 , and
  • the negative output end of the first amplifying module G1 is connected to the second amplifying module G2, and the output of the second amplifying module G2 is connected to the output of the third amplifying module G3, and the second amplifying module G2 and the first
  • the third amplification module G3 is a buffer connection mode, that is, the output end of the second amplification module G2 is connected to the positive input end of the second amplification module G2, and the output end of the third amplification module G3 and the third The negative input terminal of the amplification module G3 is connected. In this way, the impedances of the outputs of the second amplification module G2 and the third amplification module G3 are reduced
  • the voltage regulation circuit further includes a feedback compensation unit 8.
  • the feedback compensation unit 8 Includes capacitors Cm, G4 modules and G5 modules.
  • the output of the G4 module is connected to the third amplifying module G3, and the G4 module and Cm are used for feedback compensation of the branch of the third amplifying module G3.
  • the output end of the G5 module is connected to the second amplifying module G2, and the G5 module and Cm are used for feedback compensation of the branch where the second amplifying module G2 is located.
  • the G4 module and the G5 module may be a current source or other amplifying unit, which is not limited in this embodiment of the present invention.
  • FIG. 6, shows a specific implementation of the G4 module and the G5 module in an actual circuit.
  • the third switch unit 3 is a mirror image of the second switch unit 2 and the first switch unit 1 in parallel.
  • the specific implementation there are two cases as follows:
  • the third switch unit 3 includes a first mirror switch unit and a second mirror switch unit
  • the first mirror switch unit includes a number of switches that are one-Nth of the number of switches included in the first switch unit 1.
  • the second mirror switch unit includes a number of switches that are one-Nth of the number of switches included in the second switch unit 2.
  • the voltage regulating circuit further includes a mirror resistor, and the size of the mirror resistor R2 is one N of the resistance R1 included in the load, and the N is a positive integer greater than 1.
  • the mirror switch unit included in the third switch unit 3 may be reduced according to a certain ratio, that is, the number of switches included in the third switch unit 3 is set to be the first The switching unit 1 and the second switching unit 2 are one-N times larger.
  • the second case when the first switching unit 1 and the second switching unit 2 are both switching units composed of a metal oxide semiconductor (MOS), the first mirror switching unit includes a MOS transistor
  • the width to length ratio is one N of the width to length ratio of the MOS tube included in the first switching unit 1.
  • the width and length ratio of the MOS tube included in the second mirror switching unit are both MOS included in the second switching unit 2.
  • the width to length ratio of the tube is one-N.
  • the width and length of the MOS tube can affect the magnitude of the current flowing through the MOS transistor.
  • the width-to-length ratio of the MOS transistors included in the mirrored third switching unit 3 can be set to one-Nth of the pre-image MOS tube.
  • the switch unit composed of the first switch unit 1 and the second switch unit 2 is exemplified by a MOS tube.
  • the first switch unit is used.
  • the second switching unit 2 can also be composed of other switches, for example, it can also be composed of a triode, which is not limited by the embodiment of the present invention.
  • the equivalent resistance of the first switching unit 1 is smaller than the equivalent resistance of the second switching unit 2.
  • the equivalent resistance of the first switch unit 1 is less than the equivalent resistance of the second switch unit 2.
  • the first switch unit 1 and the second switch unit 2 are both switch units composed of MOS tubes, and the first switch unit 1 includes a MOS tube having a width to length ratio greater than the second switch unit 2, When the width to length ratio of the MOS transistor is used, the equivalent resistance of the first switching unit 1 is smaller than the equivalent resistance of the second switching unit 2.
  • the voltage regulating circuit may further include a fourth switching unit 7 including a plurality of switches, the fourth switching unit 7 being connected in series between the second switching unit 2 and the load 6.
  • the fourth switching unit 7 is configured to increase the equivalent resistance of the branch where the second switching unit 2 is located to reduce the current flowing through the second switching unit 2.
  • a fourth switching unit 7 is connected in series between the second switching unit 2 and the load 6. Specifically, the input end of the fourth switching unit 7 is connected to the output end of the second switching unit 2, and the output end of the fourth switching unit 7 is connected to the load 6.
  • the size of the equivalent resistance of the fourth switching unit 7 can be controlled in various manners, and specifically includes the following possible implementation manners:
  • the fourth switching unit 7 is connected to the first comparison control unit 4 to control the magnitude of the equivalent resistance of the fourth switching unit 7 by the first bias voltage determined by the first comparison control unit 4. .
  • the gate of the fourth switching unit 7 is connected to the output end of the first comparison control unit 4, so that the fourth bias voltage determined and output by the first comparison control unit 4 controls the fourth switch.
  • the fourth switching unit 7 is connected to the second comparison control unit 5 to determine the magnitude of the equivalent resistance of the fourth switching unit 7 by the second comparison control unit 5 determining the second bias voltage.
  • the gate of the fourth switching unit 7 is connected to the output end of the second comparison control unit 5 to control the fourth switch by the second bias voltage determined and output by the second comparison control unit 5.
  • the above is only controlling the magnitude of the equivalent resistance of the fourth open unit 7 by the first bias voltage determined by the first comparison control unit 4, or the second offset determined by the second comparison control unit 5.
  • the magnitude of the equivalent resistance of the fourth switching unit 7 is controlled by setting the voltage as an example.
  • the voltage regulating circuit may further include a third comparison control unit, and the third comparison control unit is connected to the fourth switching unit 7. In this case, the voltage regulating circuit can pass the The third comparison control unit controls the magnitude of the equivalent resistance of the fourth switching unit 7, which is not limited in the embodiment of the present invention.
  • the third switching unit 3 is the second switching unit 2, the first switching unit 1, and the fourth switching unit 7. A mirror image of the interconnected cells.
  • the third switch unit 3 includes a first mirror switch unit, a second mirror switch unit, and a fourth mirror switch unit
  • the first mirror switch unit includes a switch number of the first switch unit 1 One-ninth of the number of switches included, the number of switches included in the second mirror switch unit is one-Nth of the number of switches included in the second switch unit 2, and the number of switches included in the fourth mirror switch unit is the number
  • the four switching unit 7 includes one-Nth of the number of switches.
  • the width of the MOS tube included in the first mirror switching unit is one N of the width to length ratio of the MOS tube included in the first switching unit 1.
  • the width and length ratio of the MOS tube included in the second mirror switching unit are both MOS tubes included in the second switching unit 2.
  • One-ninth of the width-to-length ratio, and the width-to-length ratio of the MOS tube included in the fourth mirror switching unit are one-N of the width-to-length ratio of the MOS tube included in the fourth switching unit 7.
  • the voltage regulating circuit provided by the present application outputs the first output voltage to the load when the power source starts to supply power, and the first switching unit and the second switching unit output the first output voltage.
  • the voltage regulating circuit may control the first switching unit to perform voltage adjustment through the first comparison control unit, or control the second switching unit to perform voltage adjustment through the second comparison control unit. That is, the voltage regulating circuit can collect the first output voltage by using the first comparison control unit, and control the first switch unit by digital control based on the first output voltage, the first reference voltage, and the second reference voltage.
  • the equivalent resistance is sized to regulate the first output voltage.
  • the second comparison control unit An output voltage and a second output voltage, and controlling an equivalent resistance of the third switching unit and the second switching unit by an analog control manner based on the first output voltage, the second output voltage, and the third reference voltage, to The first output voltage is adjusted.
  • the equivalent resistance of the first switching unit is smaller than the equivalent resistance of the second switching unit, that is, the current flowing through the branch of the first switching unit is greater than the current flowing through the branch of the second switching unit, due to the number
  • the first switching unit in the control mode operates in the linear region, so that the first open unit can ensure a large current flowing per unit area, and a wide output current capability is realized.
  • the equivalent transconductance of the output of the second switching unit can be improved by using the analog control method, and the transconductance is proportional to the PSRR. Therefore, the control of the branch of the second switching unit is ensured. Higher PSRR.
  • the third reference voltage is greater than the second reference voltage and smaller than the first reference voltage, that is, when the first output voltage is greatly disturbed, the voltage is adjusted through the branch of the first switching unit. When a small disturbance occurs in the output voltage, the voltage is adjusted through the branch of the second switching unit.
  • the first switching unit adopts a digital control mode, when a small disturbance occurs, the first comparison control unit does not The switch in the first switching unit is controlled to be turned on. Therefore, the branch does not affect the PSRR of the system, that is, the branch does not lower the PSRR of the system.

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Abstract

一种调压电路，包括：第一开关单元（1）、第二开关单元（2）、第三开关单元（3）、第一比较控制单元（4）、第二比较控制单元（5）和负载（6）。第一开关单元和第二开关单元均接收来自电源（VDD）的电压输入，用于将第一输出电压（VVDD）提供给负载；第一比较控制单元与第一开关单元连接，用于基于第一输出电压、第一参考电压（V ref1）和第二参考电压（V ref2），确定第一偏置电压，以利用第一偏置电压通过数字控制方式控制第一开关单元的等效电阻的大小；第二比较控制单元分别与第三开关单元和第二开关单元连接，用于基于第一输出电压、第二输出电压（VDR）和第三参考电压（V ref3）确定第二偏置电压，并利用第二偏置电压通过模拟控制方式控制第三开关单元和第二开关单元的等效电阻的大小。该调压电路能够保证在宽泛输出电流范围内实现较高的电源抑制比。

Description

一种调压电路 技术领域
本申请涉及集成电路技术领域，特别涉及一种调压电路。
背景技术
随着半导体工艺的发展，集成电路得到了广泛的应用。集成电路在工作时通常都带有不同的工作场景及不确定性，不同的工作场景和不确定性一般是由影响集成电路正常工作的各种因素的变化引起的，譬如，温度变化、集成电路内部元件老化等。而且不同的工作场景和该不确定性经常会给集成电路带来诸多弊端，比如，导致集成电路内的工作电压产生波动，从而影响了系统的稳定性。因此，为了保证集成电路能够在不确定性下正常工作，需要通过调压电路对集成电路内的工作电压进行调节。
在相关技术中，可以通过图1所示的调压电路对集成电路内的工作电压进行调压，以保证系统的稳定性。如图1所示，该调压电路包括第一开关单元10、第二开关单元20、比较控制单元30和负载40，该第一开关单元10和该第二开关单元20均具有变压功能。该第一开关单元10与负载40连接，用于将第一输出电压VVDD提供给负载40。该第二开关单元20为第一开关单元10的镜像，也即是，该第二开关单元20为第一开关单元10的等比例缩小结构，该第二开关单元20输出的第二输出电压VDR与未受负载的波动影响的第一输出电压VVDD大小相等。上述比较控制单元30分别与第一开关单元10和第二开关单元20连接，用于采集第一输出电压VVDD和第二输出电压VDR，并基于第一输出电压VVDD、第二输出电压VDR和参考电压Vref确定偏置电压V1，以利用该偏置电压V1控制第一开关单元10和第二开关单元20的导通状态，从而对第一输出电压VVDD进行调节。其中，由于控制该第一开关单元10的偏置电压V1是由两部分电压决定的，该两部分电压包括基于VDR与Vref输出的电压以及基于VVDD和Vref输出的电压，且该第二输出电压VDR不会受负载影响而产生波动，因此，基于该VDR和参考电压输出的电压可以消除由于第一输出电压VVDD波动导致偏置电压V1出现的误差，从而保证了系统的稳定性。
在实际实现中，在保证系统稳定的情况下，通常还需要根据实际需求考虑如何实现较为宽泛的输出电流范围，其中，较为宽泛的输出电流范围是指输出电流的跨度较大，例如，输出电流范围可以从几毫安到几安，并且，在实现宽泛输出电流范围内如何保证较高的电源抑制比(Power Supply Rejection Ratio，PSRR)也成为研究的热点。
发明内容
为了解决现有技术中在保证系统稳定性的同时实现宽泛输出电流范围内较高PSRR的问题，本申请提供了一种调压电路。所述技术方案如下：
所述调压电路包括第一开关单元、第二开关单元、第三开关单元、第一比较控制单元、第二比较控制单元和负载，且所述第一开关单元和所述第二开关单元均具有变压功能；
所述第一开关单元和所述第二开关单元均接收来自电源的电压输入，且所述第一开关 单元的等效电阻小于所述第二开关单元的等效电阻；
所述第一开关单元和所述第二开关单元还分别与所述负载连接，用于将第一输出电压提供给所述负载，所述第一输出电压为所述第一开关单元和所述第二开关单元输出的电压；
所述第一比较控制单元与所述第一开关单元连接，用于采集所述第一输出电压，并基于所述第一输出电压、第一参考电压和第二参考电压，确定第一偏置电压，以利用所述第一偏置电压通过数字控制方式控制所述第一开关单元的等效电阻的大小，所述第一参考电压大于所述第二参考电压；所述第二比较控制单元分别与所述第三开关单元和所述第二开关单元连接，用于采集所述第一输出电压和第二输出电压，以及基于所述第一输出电压、所述第二输出电压和第三参考电压确定第二偏置电压，并利用所述第二偏置电压通过模拟控制方式控制所述第三开关单元和所述第二开关单元的等效电阻的大小，所述第三参考电压大于所述第二参考电压且小于所述第一参考电压，所述第三开关单元为所述第二开关单元和所述第一开关单元并联后的单元的镜像，用于输出所述第二输出电压，以消除由于所述负载产生波动给所述第二偏置电压所带来的误差。
在实际工作过程中，该调压电路可以通过该第一开关单元所在支路对第一输出电压进行调节，也可以通过该第二开关单元所在支路对该第一输出电压进行调节。根据上述第一参考电压、第二参考电压和第三参考电压的大小关系可知，当第一输出电压出现较大扰动时，通过该第一开关单元所在支路对该第一输出电压进行调节，当第一输出电压出现较小扰动时，通过该第二开关单元所在支路对第一输出电压进行调节。
在本发明实施例中，由于该第一开关单元的等效电阻小于该第二开关单元的等效电阻，且该第一开关单元和该第二开关单元并联连接，因此，流经该第一开关单元所在分支的电流大于流经第二开关单元所在分支的电流。由于数字控制方式下的第一开关单元工作在线性区，如此，可以保证该第一开单元在单位面积下能够流过较大的电流，实现了宽泛输出电流能力。另外，相比于数字控制方式，由于采用模拟控制方式控制该第二开关单元可以提高第二开关单元输出的等效跨导，而跨导与PSRR成正比，因此，通过对第二开关单元所在支路的控制保证了较高的PSRR。并且，虽然第一开关单元是采用数字控制方式，但当出现较小扰动时，该第一比较控制单元不会控制第一开关单元中的开关管导通，因此，该支路不会对系统的PSRR产生影响，即该支路不会降低系统的PSRR。
其中，当所述第一开关单元包括的开关数量大于所述第二开关单元包括的开关数量时，所述第一开关单元的等效电阻小于所述第二开关单元的等效电阻；或者，当所述第一开关单元和所述第二开关单元均为由金属氧化物半导体MOS管构成的开关单元，且所述第一开关单元包括的MOS管的宽长比均大于所述第二开关单元包括的MOS管的宽长比时，所述第一开关单元的等效电阻小于所述第二开关单元的等效电阻。
也即是，在实际实现过程中，可以通过设置第一开关单元和第二开关单元中的开关数量以实现第一开关单元的等效电阻小于第二开关单元的等效电阻。或者，也可以通过设置第一开关单元和第二开关单元中MOS管的宽长比以实现第一开关单元的等效电阻小于第二开关单元的等效电阻，提高了实现的灵活性。
另外，所述第三开关单元包括第一镜像开关单元和第二镜像开关单元，所述第一镜像开关单元包括的开关数量为所述第一开关单元包括的开关数量的N分之一，所述第二镜像开关单元包括的开关数量为所述第二开关单元包括的开关数量的N分之一，所述N为大于 1的正整数；所述调压电路还包括镜像电阻，所述镜像电阻的大小为所述负载包括的电阻的N分之一。
为了便于工艺实现，在具体实现时，可以将该第三开关单元中包括的镜像开关单元按照一定比例进行缩小，即将该第三开关单元包括的开关数量均设置为第一开关单元和第二开关单元的N分之一倍。如此，简化了工艺性。
进一步地，当所述第一开关单元和所述第二开关单元均为由金属氧化物半导体MOS管构成的开关单元时，所述第一镜像开关单元包括的MOS管的宽长比均为所述第一开关单元包括的MOS管的宽长比的N分之一，所述第二镜像开关单元包括的MOS管的宽长比均为所述第二开关单元包括的MOS管的宽长比的N分之一。
由于MOS管的宽长大小可以影响流经该MOS管的电流大小，因此，为了实现第三开关单元，在该种实现方式中，可以将镜像后的第三开关单元中包括的MOS管的宽长比均设置为镜像前MOS管的N分之一。如此，同样达到了简化工艺的效果。
进一步地，在具体实现中，所述调压电路还包括第四开关单元，且所述第四开关单元中包括多个开关，所述第四开关单元串联在所述第二开关单元与所述负载之间，所述第四开关单元用于增加所述第二开关单元所在分支的等效电阻，以减小流经所述第二开关单元的电流；相应地，所述第三开关单元为所述第二开关单元、所述第一开关单元和所述第四开关单元三者之间相互连接后的单元的镜像。
为了保证流经该第二开关单元所在分支的电流较小，可以增加该第二开关单元所在分支的等效电阻。为此，在该第二开关单元与该负载之间串联第四开关单元。具体地，该第四开关单元的输入端与该第二开关单元的输出端连接，该第四开关单元的输出端与该负载连接。如此，可以保证流过该第二开关单元所在分支的电流足够小。
其中，在一种可能的实现方式中，所述第四开关单元与所述第一比较控制单元连接，以通过所述第一比较控制单元确定的第一偏置电压控制所述第四开关单元的等效电阻的大小。
或者，在另一种可能的实现方式中，所述第四开关单元与所述第二比较控制单元连接，以通过所述第二比较控制单元确定的第二偏置电压控制所述第四开关单元的等效电阻的大小。
也即是，在实际实现中，可以根据实际需求采用不同的实现方式控制该第四开关单元，如此，可以提高实现的灵活性。
在具体实现中，当所述第一比较控制单元包括窗口比较器时，所述窗口比较器用于当所述第一输出电压大于所述第一参考电压时，基于所述第一参考电压和所述第一输出电压确定所述第一偏置电压；当所述第一输出电压小于所述第二参考电压时，基于所述第二参考电压和所述第一输出电压确定所述第一偏置电压。
即该第一比较控制单元可以采用窗口比较器来实现，如果该第一输出电压大于该第一参考电压，那么，调压电路通过基于该第一输出电压和该第一参考电压确定的该第一偏置电压来控制该第一开关单元的等效电阻的大小。在实际实现中，如果所确定的该第一偏置电压越大，即该第一输出电压与该第一参考电压这两者的差值越大，则说明需要控制该第一开关单元的等效电阻变得越大，在一种可能的实现方式中，即需要控制该第一开关单元中越多的开关不导通。
如果该第一输出电压小于该第二参考电压，那么，该调压电路通过基于该第一输出电压和该第二参考电压确定的该第一偏置电压来控制该第一开关单元的等效电阻的大小。在实际实现中，如果所确定的该第一偏置电压越小，即该第一输出电压与该第二参考电压这两者的差值越小，则说明需要控制该第一开关单元的等效电阻变得越小，在一种可能的实现方式中，即需要控制该第一开关单元中越多的开关导通。
在本发明实施例中，通过窗口比较器实现了第一比较控制单元对第一开关单元的控制，从而使得当第一输出电压出现较大扰动时，通过第一开关单元所在支路对第一输出电压进行调节。
另外，所述第二比较控制单元包括第一放大模块、第二放大模块和第三放大模块，所述第一放大模块分别与所述第二放大模块和所述第三放大模块连接，所述第二放大模块与所述第三放大模块连接后与所述第二开关单元连接；所述调压电路还包括反馈补偿单元，所述反馈补偿单元与所述第二开关单元、所述第二放大模块和所述第三放大模块分别连接，用于通过所述反馈补偿单元包括的反馈补偿电容对所述第二放大模块所在支路以及所述第三放大模块所在支路进行反馈补偿。
为了实现高带宽高PRSS低噪声的性能，在具体实现中，本发明实施例采用图5所示的电路来实现第二比较控制单元对第二开关单元的控制。其中，该第一放大模块为包括有晶体管且具有放大功能的模块。由于噪声与晶体管的尺寸成正比，即若该第一放大模块包括的晶体管的尺寸越大，则产生的噪声越小，反之，若该第一放大模块包括的晶体管的尺寸越小，则产生的噪声越大，因此，本发明实施例中，为了实现低噪声，该第一放大模块采用包括较粗晶体管的放大功能模块，即该第一放大模块包括的晶体管的尺寸通常较大。
当第一放大模块包括的晶体管的尺寸较大时，会导致第一放大模块的带宽降低。为了弥补带宽上的缺陷，请参考图6，该图6是根据一示例性实施例示出的一种具体实现电路图，这里将第一放大模块的正输出端与第三放大模块连接，以及将第一放大模块的负输出端与第二放大模块连接，同时，该第二放大模块的输出和该第三放大模块的输出相连，并且，该第二放大模块和该第三放大模块均为缓冲器连接方式，也即是，该第二放大模块的输出端与该第二放大模块的正输入端连接，该第三放大模块的输出端与该第三放大模块的负输入端连接。如此，降低了第二放大模块和第三放大模块的输出端的阻抗，从而提高了带宽。
另外，该调压电路还包括反馈补偿单元，该反馈补偿单元包括电容Cm、G4模块和G5模块。该G4模块的输出端与第三放大模块连接，该G4模块和Cm用于对该第三放大模块所在支路进行反馈补偿。该G5模块的输出端与第二放大模块连接，该G5模块和Cm用于对第二放大模块所在支路进行反馈补偿。如此，保证了第二放大模块所在分支环路和第三放大模块所在分支环路的稳定性。
本申请提供的技术方案带来的有益效果是：
本申请提供的调压电路，当电源开始供电时，将第一开关单元和第二开关单元输出第一输出电压给负载。为了保证第一输出电压的稳定性，该调压电路可以通过第一比较控制单元控制第一开关单元进行电压调节，或者，通过第二比较控制单元控制第二开关单元进行电压调节。也即是，该调压电路可以通过第一比较控制单元采集该第一输出电压，并基于该第一输出电压、第一参考电压和第二参考电压，通过数字控制方式控制该第一开关单 元的等效电阻的大小，以对第一输出电压进行调节。或者，通过第二比较控制单元采集第一输出电压和第二输出电压，以及基于该第一输出电压、第二输出电压和第三参考电压，通过模拟控制方式控制第三开关单元和第二开关单元的等效电阻的大小，以对第一输出电压进行调节。其中，该第一开关单元的等效电阻小于该第二开关单元的等效电阻，即流经该第一开关单元所在支路的电流大于流经第二开关单元所在支路的电流，由于数字控制方式下的第一开关单元工作在线性区，如此，可以保证该第一开单元在单位面积下能够流过较大的电流，实现了宽泛输出电流能力。另外，相比于数字控制方式，由于采用模拟控制方式可以提高第二开关单元输出的等效跨导，而跨导与PSRR成正比，因此，通过对第二开关单元所在支路的控制保证了较高的PSRR。并且，上述第三参考电压大于第二参考电压且小于该第一参考电压，也即是，当第一输出电压出现较大扰动时，通过该第一开关单元所在支路进行电压调节，当第一输出电压出现较小扰动时，通过第二开关单元所在支路进行电压调节，如此，虽然第一开关单元是采用数字控制方式，但当出现较小扰动时，该第一比较控制单元不会控制该第一开关单元中的开关管导通，因此，该支路不会对系统的PSRR产生影响，即该支路不会降低系统的PSRR。
附图说明
图1是根据一示例性实施例示出的一种调压电路；
图2是根据另一示例性实施例示出的一种调压电路；
图3是根据一示例性实施例示出的一种第一开关单元与第一比较控制单元的连接示意图；
图4是根据另一示例性实施例示出的一种调压电路；
图5是根据一示例性实施例示出的一种第二比较控制单元与第二开关单元的连接原理图；
图6是根据一示例性实施例示出的一种第二比较控制单元与第二开关单元的连接电路图；
图7是根据另一示例性实施例示出的一种调压电路。
附图标记：
1：第一开关单元；2：第二开关单元；3：第三开关单元；4：第一比较控制单元；5：第二比较控制单元；6：负载；7：第四开关单元；8：反馈补偿单元；
41：窗口比较器；
51：第一放大器；52：第二放大器；
G1：第一放大模块；G2：第二放大模块；G3：第三放大模块。
具体实施方式
为使本申请的目的、技术方案和优点更加清楚，下面将结合附图对本申请的实施方式作进一步地详细描述。
在对本发明实施例进行详细地解释说明之前，先对本发明实施例涉及的应用场景予以说明。在调压电路工作的过程中，PSRR是需要考虑的重要参数之一。该PSRR能够体现该 调压电路的抗噪能力，该PSRR的值越大，说明该调压电路的抗噪能力越强，抗噪能力越强说明系统越稳定。在本发明实施例中提供了一种调压电路，该调压电路可以保证宽泛输出电流范围内实现较高的PSRR性能。
图2是本发明实施例提供的一种调压电路的结构示意图。参见图2，该调压电路包括第一开关单元1、第二开关单元2、第三开关单元3、第一比较控制单元4、第二比较控制单元5和负载6，其中，该第一开关单元1和该第二开关单元2均具有变压功能。
该第一开关单元1和该第二开关单元2均接收来自电源VDD的电压输入，且该第一开关单元1的等效电阻小于该第二开关单元2的等效电阻，其中，该第一开关单元1、第二开关单元2中的每个开关管相当于一个电阻。在可选择的实施例中，开关单元通常包括多条路径以及处于所述多条路径上的彼此串联或并联的开关管(比如二极管)，这种情况下，开关单元的等效电阻为导通的路径上的开关管的总电阻。进一步地，在比较两个开关单元的等效电阻的大小时，可以通过比较该两个开关单元的总电阻来实现。譬如，若第一开关单元1包括多个串联的开关管，该第二开关单元2包括一个开关管，则确定该第一开关单元1中多个串联的开关管的总电阻的大小，之后，将该总电阻与第二开关单元2中开关管等效成的电阻进行比较。当然，并联的原理相同。另外，该第一开关单元1和该第二开关单元2还分别与该负载6连接，用于将第一输出电压VVDD提供给该负载6，该第一输出电压VVDD为电源VDD经该第一开关单元1和该第二开关单元2输出的电压。
上述第三开关单元3接收来自电源VDD的电压输入，并输出第二输出电压VDR，该第三开关单元3为上述第一开关单元1和第二开关单元2并联后的单元的镜像，其输出的第二输出电压VDR与未产生波动之前的第一输出电压VVDD大小相等，以利用该第二输出电压VDR消除由于负载6产生波动给第二偏置电压所带来的误差，如此，通过该第三开关单元3来保证系统的稳定性。其中，该第二偏置电压用于控制第二开关单元2，具体如下文所述。
在该调压电路中，上述第一比较控制单元4与该第一开关单元1连接，用于采用数字控制方式控制该第一开关单元1的等效电阻的大小。上述第二比较控制单元5分别与第三开关单元3和第二开关单元2连接，该第二比较控制单元5用于采用模拟控制方式控制该第二开关单元2和第三开关单元3的等效电阻的大小。
需要说明的是，在本发明实施例中，当通过数字控制方式控制开关单元的等效电阻的大小时，通常是指控制开关单元包括的多个开关的导通数量；当通过模拟控制方式控制开关单元的等效电阻的大小时，通常是指控制开关单元的栅极电压大小，从而控制流经开关单元的电流大小。
由上述描述，在本发明实施例提供的调压电路中，若该第一输出电压VVDD受负载影响产生波动，则可以通过上述第一开关单元1所在支路或上述第二开关单元2所在支路对该第一输出电压VVDD进行调节。值得一提的是，在上述调压电路中，由于该第一开关单元1的等效电阻小于该第二开关单元2的等效电阻，且该第一开关单元1和该第二开关单元2并联连接，因此，流经该第一开关单元1所在分支的电流大于流经第二开关单元2所在分支的电流。由于在数字控制方式下，控制第一开关单元1的栅极的偏置电压为低电压或高电压，譬如，该低电压和高电压分别为“0”和“1”，也即是，当第一开关单元1导通 时，该第一开关单元1的栅极的电压为低电压，当该第一开关单元1不导通时，该第一开关单元1的栅极的电压为高电压，因此，在数字控制方式下的第一开关单元1工作在线性区，如此，可以保证该第一开单元1在单位面积下能够流过较大的电流，从而保证该调压电路能够实现宽泛的电流输出范围。其中，这里所说的单位面积是指第一开关单元1中包括的单个开关管。
另外，相比于数字控制方式，在相同输出电流的情况下采用模拟控制方式控制该第二开关单元2时，由于需要第二开关单元2流过较小的电流，因此，需要增加第二开关单元2中的晶体管的数量，晶体管的数量与等效跨导成正比，也即是，可以提高第二开关单元2输出的等效跨导，而跨导与PSRR成正比，因此，通过对第二开关单元2所在支路的控制保证了较高的PSRR。
在实际实现中，可以基于该第一输出电压VVDD的变化范围来选择通过上述哪个支路进行电压调节。请参考图2，该调压电路中设置多个参考电压，包括：第一参考电压Vref1、第二参考电压Vref2和第三参考电压Vref3。
其中，该第一参考电压Vref1大于该第二参考电压Vref2，该第三参考电压Vref3大于该第二参考电压Vref2且小于该第一参考电压Vref1。在实际实现中，该第三参考电压Vref3的值可以设置为该负载的实际需求电压值，另外，该第一参考电压Vref1可以为第三参考电压Vref3加上一个固定值△V，该第二参考电压Vref2可以为该第三参考电压Vref3减去一个固定值△V，即Vref1＝Vref3+△V，Vref2＝Vref3-△V，其中，该△V可以根据实际电路需求预先进行设置。例如，若负载实际需求的电压为9V，则该第三参考电压Vref3可以设置为9V，该△V可以设置为1V，此时，该第一参考电压Vref1为10V，该第二参考电压Vref2为8V。
如果该第一输出电压VVDD大于上述第一参考电压Vref1或小于上述第二参考电压Vref2，则可以认为该第一输出电压VVDD出现较大的波动，如果该第一输出电压VVDD与上述第三参考电压Vref3比较出现偏差，即该第一输出电压VVDD处于第一参考电压Vref1和第二参考电压Vref2之间，则可以认为该第一输出电压VVDD出现较小的波动。也即是，根据第一参考电压Vref1、第二参考电压Vref2和第三参考电压Vref3的大小关系可知，当第一输出电压VVDD出现较大扰动时，通过该第一开关单元1所在支路对该第一输出电压VVDD进行调节，当第一输出电压VVDD出现较小扰动时，通过该第二开关单元2所在支路对第一输出电压VVDD进行调节。
接下来，将对通过该第一开关单元1所在支路对第一输出电压VVDD进行调节，以及对通过该第二开关单元2所在支路对该第一输出电压VVDD进行调节的具体实现分别进行介绍，具体如下：
首先，对通过第一开关单元1的支路对第一输出电压VVDD进行调节的实现进行详细介绍，其实现过程具体包括：该第一比较控制单元4与该第一开关单元1连接，用于采集上述第一输出电压VVDD，并基于该第一输出电压VVDD、第一参考电压Vref1和第二参考电压Vref2，确定第一偏置电压，以利用该第一偏置电压通过数字控制方式控制该第一开关单元1的等效电阻的大小。
当电源VDD开始供电时，将该第一开关单元1和第二开关单元2输出的第一输出电压VVDD提供给负载6，即为负载6提供负载输入电压。在此过程中，如果该第一输出电压VVDD大于该第一参考电压Vref1或者小于该第二参考电压Vref2，则说明该第一输出电压 VVDD出现了较大的波动，此时，该调压电路通过第一比较控制单元4采集该第一输出电压VVDD，并基于该第一输出电压VVDD、第一参考电压Vref1和第二参考电压Vref2，确定第一偏置电压。之后，利用该第一偏置电压通过数字控制方式控制该第一开关单元1的等效电阻的大小。
在具体实现中，该第一比较控制单元4可以包括窗口比较器41。请参考图3，这里以第一开关单元的开关管为P型晶体管为例进行说明。当该第一输出电压VVDD大于该第一参考电压Vref1时，基于该第一参考电压Vref1和该第一输出电压VVDD确定该第一偏置电压；当该第一输出电压VVDD小于该第二参考电压Vref2时，基于该第二参考电压Vref2和该第一输出电压VVDD确定该第一偏置电压。
也即是，如果该第一输出电压VVDD大于该第一参考电压Vref1，那么，调压电路通过基于该第一输出电压VVDD和该第一参考电压Vref1确定的该第一偏置电压来控制该第一开关单元1的等效电阻的大小。在实际实现中，如果所确定的该第一偏置电压越大，即该第一输出电压VVDD与该第一参考电压Vref1这两者的差值越大，则说明需要控制该第一开关单元1的等效电阻变得越大，在一种可能的实现方式中，即需要控制该第一开关单元1中越多的开关不导通。
进一步地，基于该第一参考电压Vref1和该第一输出电压VVDD确定该第一偏置电压的具体实现包括：该窗口比较器41将该第一参考电压Vref1和该第一输出电压VVDD进行比较，以确定该第一参考电压Vref1和该第一输出电压VVDD之间的差值，之后，该窗口比较器41将该差值确定该第一偏置电压。
如果该第一输出电压VVDD小于该第二参考电压Vref2，那么，该调压电路通过基于该第一输出电压VVDD和该第二参考电压Vref2确定的该第一偏置电压来控制该第一开关单元1的等效电阻的大小。在实际实现中，如果所确定的该第一偏置电压越小，即该第一输出电压VVDD与该第二参考电压Vref2这两者的差值越小，则说明需要控制该第一开关单元1的等效电阻变得越小，在一种可能的实现方式中，即需要控制该第一开关单元1中越多的开关导通。
进一步地，基于该第二参考电压Vref2和该第一输出电压VVDD确定该第一偏置电压的具体实现包括：该窗口比较器41将该第一输出电压VVDD和该第二参考电压Vref2进行比较，以确定该第一输出电压VVDD和该第二参考电压Vref2之间的差值，之后，该窗口比较器41将该差值确定该第一偏置电压。
另外，需要说明的是，如果该第一输出电压VVDD处于该第一参考电压Vref1和第二参考电压Vref2之间，则保持该第一开关单元1的等效电阻的大小不变，在一种可能的实现方式中，即保证该第一开关单元1包括的多个开关当前的导通数量不发生变化。也即是，如果该第一输出电压VVDD处于该第一参考电压Vref1和第二参考电压Vref2之间，说明第一输出电压VVDD出现较小扰动，当该第一输出电压VVDD出现较小扰动时，该第一开关单元1的等效电阻的大小不发生变化，如此，保证了该第一开关单元1不会影响系统的PSRR。也即是，虽然该第一开关单元1采用数字控制方式，但是，当系统达到稳定状态时，该第一开关单元1也不会降低系统的PSRR。
进一步地，上述利用第一偏置电压通过数字控制方式控制第一开关单元1的等效电阻的大小的具体实现包括：通过该第一比较控制单元4确定第一偏置电压，并从存储的偏置 电压范围和数字控制信息间的对应关系中，获取该第一偏置电压所处的偏置电压范围对应的数字控制信息。之后，利用所获取的数字控制信息控制该第一开关单元1的等效电阻的大小，也即是，控制第一开关单元1中的开关导通和不导通，从而实现对第一开关单元1的等效电阻的大小进行控制。其中，该数字控制信息可以由二进制“0”和“1”组成，其中，对于P型晶体管，“0”代表对开关导通，“1”代表对开关不导通。
需要说明的是，虽然第一开关单元1是采用数字控制方式，但当第一输出电压VVDD出现较小扰动时，该第一比较控制单元4不会控制该第一开关单元1中的开关管导通，因此，该支路不会对系统的PSRR产生影响，即该支路不会降低系统的PSRR。
值得一提的是，由于数字控制方式下的开关管工作在线性区，因此，单位面积下数字控制方式的开关管流过的电流较多，即采用数字控制的方式控制第一开关单元1可以提高对较大电流的响应速度，实现了较高的瞬态响应能力。
接下来，对通过第二开关单元2的支路对第一输出电压VVDD进行调节的实现进行详细介绍，其实现过程具体包括：该第二比较控制单元5与第二开关单元2连接，用于采集该第一输出电压VVDD和第二输出电压VDR，以及基于该第一输出电压VVDD、该第二输出电压VDR和第三参考电压Vref3确定第二偏置电压，并利用该第二偏置电压通过模拟控制方式控制该第二开关单元2的等效电阻的大小。
当电源VDD开始供电时，将该第一开关单元1和第二开关单元2输出的第一输出电压VVDD提供给负载6，即为负载6提供负载输入电压。在此过程中，如果该第一输出电压VVDD处于第一参考电压Vref1和第二参考电压Vref2之间，则说明该第一输出电压VVDD出现较小的波动，此时，该调压电路通过第二比较控制单元5采集该第一输出电压VVDD和第三开关单元3输出的第二输出电压VDR，并基于该第一输出电压VVDD、该第二输出电压VDR和第三参考电压Vref3确定该第二偏置电压。之后，利用该第二偏置电压来控制该第三开关单元3和该第二开关单元2的等效电阻的大小，从而实现对该第一输出电压VVDD进行调节。
需要说明的是，在本发明实施例中，在实际实现时，该第二比较控制单元5一直处于工作状态。其中，当出现较小的波动时，由于第一比较控制单元4不会控制该第一开关单元1中的开关管导通，因此，此时通过第二开关单元2所在支路对第一输出电压VVDD进行调节。当然，当出现较大的波动时，该第二比较控制单元5也处于工作状态，但是，由于第一开关单元1的等效电阻小于第二开关单元2的等效电阻，所以，在单位时间内流经第一开关单元1所在支路的电流较多，也即是，该第一开关单元1处于主导作用，因此，当出现较大的波动时，实际上是通过第一开关单元1所在支路对该第一输出电压VVDD进行调节。
另外，还需要说明的是，本发明实施例仅是以第二比较控制单元5一直处于工作状态为例进行说明，在实际实现中，当出现较大的波动时，还可以控制该第二比较控制单元5不工作，譬如，第一比较控制单元4可以向第二比较控制单元5输出控制信号，以通过该控制信号控制该第二比较控制单元5不工作，本发明实施例对此不做限定。
在具体实现中，请参考图4，该第二比较控制单元5中可以包括第一放大器51和第二放大器52，该第一放大器51的第一输入端与该第三开关单元3的输出端连接，以采集该第二输出电压，该第一放大器51的第二输入端与第三参考电压Vref3连接，以采集该第三参考 电压Vref3，该第一放大器51基于所采集的该第二输出电压VDR和该第三参考电压Vref3，确定并输出一个电压。
另外，该第二放大器52的第一输入端与该第一开关单元1或第二开关单元2的输出端连接，用于采集该第一开关单元1或第二开关单元2输出的第一输出电压VVDD，该第二放大器52的第二输入端也与该第三参考电压Vref3连接，以采集该第三参考电压Vref3，该第二放大器52基于所采集的该第一输出电压VVDD和该第三参考电压Vref3，确定并输出另一个电压。
进一步地，该第一放大器51的输出端与该第二放大器52的输出端连接在一起，也即是，该第二偏置电压实际上包括两部分电压，该两部分电压分别为上述第一放大器51输出的电压和上述第二放大器52输出的电压，其中，该第一放大器51输出的电压和该第二放大器52输出的电压相同。该第二偏置电压用于控制该第二开关单元2和该第三开关单元3的栅极电压，以基于该第二偏置电压通过模拟控制方式控制该第二开关单元2和第三开关单元3的等效电阻的大小，从而对该第一输出电压VVDD进行调节。
基于上述描述，如果该第一输出电压VVDD与第三参考电压Vref3比较存在偏差，则可以认为该第一输出电压VVDD出现较小的波动，此时，可以通过该第二开关单元2所在支路对第一输出电压VVDD进行电压调节。
进一步地，请参考图5，该第二比较控制单元5包括第一放大模块G1、第二放大模块G2和第三放大模块G3，该第一放大模块1分别与该第二放大模块G2和该第三放大模块G3连接，该第二放大模块G2与该第三放大模块G3连接后与该第二开关单元2连接。该调压电路还包括反馈补偿单元8，该反馈补偿单元8与该第二开关单元2、该第二放大模块G2和该第三放大模块G3分别连接，用于通过该反馈补偿单元8包括的反馈补偿电容Cm对该第二放大模块G2所在支路以及该第三放大模块G3所在支路进行反馈补偿。
在实际实现中，为了实现高带宽高PRSS低噪声的性能，在具体实现中，本发明实施例采用图5所示的电路来实现第二比较控制单元5对第二开关单元2的控制。其中，该第一放大模块G1为包括有晶体管且具有放大功能的模块。由于噪声与晶体管的尺寸成正比，即若该第一放大模块G1包括的晶体管的尺寸越大，则产生的噪声越小，反之，若该第一放大模块G1包括的晶体管的尺寸越小，则产生的噪声越大，因此，本发明实施例中，为了实现低噪声，该第一放大模块G1采用包括较粗晶体管的放大功能模块，即该第一放大模块G1包括的晶体管的尺寸通常较大。
当第一放大模块G1包括的晶体管的尺寸较大时，会导致第一放大模块G1的带宽降低。为了弥补带宽上的缺陷，请参考图6，该图6是根据一示例性实施例示出的一种具体实现电路图，这里将第一放大模块G1的正输出端与第三放大模块G3连接，以及将第一放大模块G1的负输出端与第二放大模块G2连接，同时，该第二放大模块G2的输出和该第三放大模块G3的输出相连，并且，该第二放大模块G2和该第三放大模块G3均为缓冲器连接方式，也即是，该第二放大模块G2的输出端与该第二放大模块G2的正输入端连接，该第三放大模块G3的输出端与该第三放大模块G3的负输入端连接。如此，降低了第二放大模块G2和第三放大模块G3的输出端的阻抗，从而提高了带宽。
另外，为了保证第二放大模块G2所在分支环路和第三放大模块G3所在分支环路的稳定性，该调压电路还包括反馈补偿单元8。如图5所示，在具体实现中，该反馈补偿单元8 包括电容Cm、G4模块和G5模块。该G4模块的输出端与第三放大模块G3连接，该G4模块和Cm用于对该第三放大模块G3所在支路进行反馈补偿。该G5模块的输出端与第二放大模块G2连接，该G5模块和Cm用于对第二放大模块G2所在支路进行反馈补偿。
需要说明的是，该G4模块和G5模块可以为电流源或者其他放大单元，本发明实施例对此不做限定。例如，请参考图6，该图6中示出了该G4模块和G5模块在实际电路中的具体实现。
还需要说明的是，这里仅是以该第二比较控制单元6对第二开关单元2进行控制的具体实现为例进行说明，在实际实现中，上述图5或图6所示实施例可以适用于任一结构形式的比较控制单元对开关单元进行控制的具体实现。
需要说明的是，上述第三开关单元3为该第二开关单元2和该第一开关单元1并联后的镜像。在具体实现中，存在如下两种情况：
第一种情况：该第三开关单元3包括第一镜像开关单元和第二镜像开关单元，该第一镜像开关单元包括的开关数量为该第一开关单元1包括的开关数量的N分之一，该第二镜像开关单元包括的开关数量为该第二开关单元2包括的开关数量的N分之一。进一步地，该调压电路还包括镜像电阻，该镜像电阻R2的大小为该负载包括的电阻R1的N分之一，该N为大于1的正整数。
也即是，为了便于工艺实现，在具体实现时，可以将该第三开关单元3中包括的镜像开关单元按照一定比例进行缩小，即将该第三开关单元3包括的开关数量均设置为第一开关单元1和第二开关单元2的N分之一倍。
第二种情况：当该第一开关单元1和该第二开关单元2均为由金属氧化物半导体(Metal Oxide Semiconductor，MOS)构成的开关单元时，该第一镜像开关单元包括的MOS管的宽长比均为该第一开关单元1包括的MOS管的宽长比的N分之一，该第二镜像开关单元包括的MOS管的宽长比均为该第二开关单元2包括的MOS管的宽长比的N分之一。
其中，MOS管的宽长大小可以影响流经该MOS管的电流大小。为了实现第三开关单元3，在该种实现方式中，可以将镜像后的第三开关单元3中包括的MOS管的宽长比均设置为镜像前MOS管的N分之一。
当然，需要说明的是，这里仅是以该第一开关单元1和该第二开关单元2均为由MOS管构成的开关单元为例进行说明，在另一实施例中，该第一开关单元1和该第二开关单元2还可以由其它开关构成，例如，还可以由三极管构成，本发明实施例对此不做限定。
另外，如前文所述，该第一开关单元1的等效电阻小于该第二开关单元2的等效电阻。在具体实现中，当该第一开关单元1包括的开关数量大于该第二开关单元2包括的开关数量时，该第一开关单元1的等效电阻小于该第二开关单元2的等效电阻。
或者，当该第一开关单元1和该第二开关单元2均为由MOS管构成的开关单元，且该第一开关单元1包括的MOS管的宽长比均大于该第二开关单元2包括的MOS管的宽长比时，该第一开关单元1的等效电阻小于该第二开关单元2的等效电阻。
进一步地，该调压电路还可以包括第四开关单元7，该第四开关单元7中包括多个开关，该第四开关单元7串联在该第二开关单元2与该负载6之间，该第四开关单元7用于增加该第二开关单元2所在分支的等效电阻，以减小流经该第二开关单元2的电流。
请参考图7，为了保证流经该第二开关单元2所在分支的电流较小，可以增加该第二开 关单元2所在分支的等效电阻。为此，在该第二开关单元2与该负载6之间串联第四开关单元7。具体地，该第四开关单元7的输入端与该第二开关单元2的输出端连接，该第四开关单元7的输出端与该负载6连接。
在具体实现中，可以通过多种方式来控制该第四开关单元7的等效电阻的大小，具体可以包括如下几种可能的实现方式：
第一种情况：该第四开关单元7与该第一比较控制单元4连接，以通过该第一比较控制单元4确定的第一偏置电压控制该第四开关单元7的等效电阻的大小。
在具体实现中，该第四开关单元7的栅极与该第一比较控制单元4的输出端连接，从而通过该第一比较控制单元4确定并输出的第一偏置电压控制该第四开关单元7的等效电阻的大小。
第二种情况：该第四开关单元7与该第二比较控制单元5连接，以通过该第二比较控制单元5确定第二偏置电压控制该第四开关单元7的等效电阻的大小。
在具体实现中，该第四开关单元7的栅极与该第二比较控制单元5的输出端连接，以通过该第二比较控制单元5确定并输出的第二偏置电压控制该第四开关单元7的等效电阻的大小。
需要说明的是，上述仅是以通过第一比较控制单元4确定的第一偏置电压控制该第四开单元7的等效电阻的大小，或通过第二比较控制单元5确定的第二偏置电压控制该第四开关单元7的等效电阻的大小为例进行说明。在另一种可能的实现方式中，该调压电路还可以包括第三比较控制单元，该第三比较控制单元与该第四开关单元7连接，该种情况下，该调压电路可以通过该第三比较控制单元来控制该第四开关单元7的等效电阻的大小，本发明实施例对此不做限定。
另外，还需要说明的是，当该调压电路包括第四开关单元7时，该第三开关单元3为该第二开关单元2、第一开关单元1和该第四开关单元7三者之间相互连接后的单元的镜像。
在该种情况下，该该第三开关单元3中包括第一镜像开关单元、第二镜像开关单元和第四镜像开关单元，该第一镜像开关单元包括的开关数量为该第一开关单元1包括的开关数量的N分之一，该第二镜像开关单元包括的开关数量为该第二开关单元2包括的开关数量的N分之一，该第四镜像开关单元包括的开关数量为该第四开关单元7包括的开关数量的N分之一。
或者，当该第一开关单元1、该第二开关单元2和该第四开关单元7均为由金属氧化物半导体MOS管构成的开关单元时，该第一镜像开关单元包括的MOS管的宽长比均为该第一开关单元1包括的MOS管的宽长比的N分之一，该第二镜像开关单元包括的MOS管的宽长比均为该第二开关单元2包括的MOS管的宽长比的N分之一，以及该第四镜像开关单元包括的MOS管的宽长比均为第四开关单元7包括的MOS管的宽长比的N分之一。
本申请提供的调压电路，当电源开始供电时，将第一开关单元和第二开关单元输出第一输出电压给负载。为了保证第一输出电压的稳定性，该调压电路可以通过第一比较控制单元控制第一开关单元进行电压调节，或者，通过第二比较控制单元控制第二开关单元进行电压调节。也即是，该调压电路可以通过第一比较控制单元采集该第一输出电压，并基于该第一输出电压、第一参考电压和第二参考电压，通过数字控制方式控制该第一开关单元的等效电阻的大小，以对第一输出电压进行调节。或者，通过第二比较控制单元采集第 一输出电压和第二输出电压，以及基于该第一输出电压、第二输出电压和第三参考电压，通过模拟控制方式控制第三开关单元和第二开关单元的等效电阻的大小，以对第一输出电压进行调节。其中，该第一开关单元的等效电阻小于该第二开关单元的等效电阻，即流经该第一开关单元所在支路的电流大于流经第二开关单元所在支路的电流，由于数字控制方式下的第一开关单元工作在线性区，如此，可以保证该第一开单元在单位面积下能够流过较大的电流，实现了宽泛输出电流能力。另外，相比于数字控制方式，由于采用模拟控制方式可以提高第二开关单元输出的等效跨导，而跨导与PSRR成正比，因此，通过对第二开关单元所在支路的控制保证了较高的PSRR。并且，上述第三参考电压大于第二参考电压且小于该第一参考电压，也即是，当第一输出电压出现较大扰动时，通过该第一开关单元所在支路进行电压调节，当第一输出电压出现较小扰动时，通过第二开关单元所在支路进行电压调节，如此，虽然第一开关单元是采用数字控制方式，但当出现较小扰动时，该第一比较控制单元不会控制该第一开关单元中的开关管导通，因此，该支路不会对系统的PSRR产生影响，即该支路不会降低系统的PSRR。
以上所述为本申请提供的实施例，并不用以限制本申请，凡在本申请的精神和原则之内，所作的任何修改、等同替换、改进等，均应包含在本申请的保护范围之内。

Claims (9)

  1. 一种调压电路，其特征在于，所述调压电路包括第一开关单元、第二开关单元、第三开关单元、第一比较控制单元、第二比较控制单元和负载，且所述第一开关单元和所述第二开关单元均具有变压功能；
    所述第一开关单元和所述第二开关单元均接收来自电源的电压输入，且所述第一开关单元的等效电阻小于所述第二开关单元的等效电阻；
    所述第一开关单元和所述第二开关单元还分别与所述负载连接，用于将第一输出电压提供给所述负载，所述第一输出电压为所述第一开关单元和所述第二开关单元输出的电压；
    所述第一比较控制单元与所述第一开关单元连接，用于采集所述第一输出电压，并基于所述第一输出电压、第一参考电压和第二参考电压，确定第一偏置电压，以利用所述第一偏置电压通过数字控制方式控制所述第一开关单元的等效电阻的大小，所述第一参考电压大于所述第二参考电压；
    所述第二比较控制单元分别与所述第三开关单元和所述第二开关单元连接，用于采集所述第一输出电压和第二输出电压，以及基于所述第一输出电压、所述第二输出电压和第三参考电压确定第二偏置电压，并利用所述第二偏置电压通过模拟控制方式控制所述第三开关单元和所述第二开关单元的等效电阻的大小，所述第三参考电压大于所述第二参考电压且小于所述第一参考电压，所述第三开关单元为所述第二开关单元和所述第一开关单元并联后的单元的镜像，用于输出所述第二输出电压，以消除由于所述负载产生波动给所述第二偏置电压所带来的误差。
  2. 如权利要求1所述的电路，其特征在于，当所述第一开关单元包括的开关数量大于所述第二开关单元包括的开关数量时，所述第一开关单元的等效电阻小于所述第二开关单元的等效电阻；或者，
    当所述第一开关单元和所述第二开关单元均为由金属氧化物半导体MOS管构成的开关单元，且所述第一开关单元包括的MOS管的宽长比均大于所述第二开关单元包括的MOS管的宽长比时，所述第一开关单元的等效电阻小于所述第二开关单元的等效电阻。
  3. 如权利要求1所述的调压电路，其特征在于，所述第三开关单元包括第一镜像开关单元和第二镜像开关单元，所述第一镜像开关单元包括的开关数量为所述第一开关单元包括的开关数量的N分之一，所述第二镜像开关单元包括的开关数量为所述第二开关单元包括的开关数量的N分之一，所述N为大于1的正整数；
    所述调压电路还包括镜像电阻，所述镜像电阻的大小为所述负载包括的电阻的N分之一。
  4. 如权利要求1所述的调压电路，其特征在于，当所述第一开关单元和所述第二开关单元均为由金属氧化物半导体MOS管构成的开关单元时，所述第一镜像开关单元包括的MOS管的宽长比均为所述第一开关单元包括的MOS管的宽长比的N分之一，所述第二镜像开关单元包括的MOS管的宽长比均为所述第二开关单元包括的MOS管的宽长比的N分之一。
  5. 如权利要求1所述的调压电路，其特征在于，所述调压电路还包括第四开关单元，且所述第四开关单元中包括多个开关，所述第四开关单元串联在所述第二开关单元与所述负载之间，所述第四开关单元用于增加所述第二开关单元所在分支的等效电阻，以减小流经所述第二开关单元的电流；
    相应地，所述第三开关单元为所述第二开关单元、所述第一开关单元和所述第四开关单元三者之间相互连接后的单元的镜像。
  6. 如权利要求5所述的调压电路，其特征在于，所述第四开关单元与所述第一比较控制单元连接，以通过所述第一比较控制单元确定的第一偏置电压控制所述第四开关单元的等效电阻的大小。
  7. 如权利要求5所述的调压电路，其特征在于，所述第四开关单元与所述第二比较控制单元连接，以通过所述第二比较控制单元确定的第二偏置电压控制所述第四开关单元的等效电阻的大小。
  8. 如权利要求1所述的调压电路，其特征在于，当所述第一比较控制单元包括窗口比较器时，所述窗口比较器用于：
    当所述第一输出电压大于所述第一参考电压时，基于所述第一参考电压和所述第一输出电压确定所述第一偏置电压；当所述第一输出电压小于所述第二参考电压时，基于所述第二参考电压和所述第一输出电压确定所述第一偏置电压。
  9. 如权利要求1所述的调压电路，其特征在于，所述第二比较控制单元包括第一放大模块、第二放大模块和第三放大模块，所述第一放大模块分别与所述第二放大模块和所述第三放大模块连接，所述第二放大模块与所述第三放大模块连接后与所述第二开关单元连接；
    所述调压电路还包括反馈补偿单元，所述反馈补偿单元与所述第二开关单元、所述第二放大模块和所述第三放大模块分别连接，用于通过所述反馈补偿单元包括的反馈补偿电容对所述第二放大模块所在支路以及所述第三放大模块所在支路进行反馈补偿。
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EP3672052A4 (en) 2020-08-19
JP2020507860A (ja) 2020-03-12
KR20190103405A (ko) 2019-09-04
US20190392871A1 (en) 2019-12-26
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US11120845B2 (en) 2021-09-14
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