WO2018227981A1 - 显示基板及其制作方法、显示装置 - Google Patents

显示基板及其制作方法、显示装置 Download PDF

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Publication number
WO2018227981A1
WO2018227981A1 PCT/CN2018/074423 CN2018074423W WO2018227981A1 WO 2018227981 A1 WO2018227981 A1 WO 2018227981A1 CN 2018074423 W CN2018074423 W CN 2018074423W WO 2018227981 A1 WO2018227981 A1 WO 2018227981A1
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Prior art keywords
layer
pixel defining
substrate
transition pattern
photosensitive material
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PCT/CN2018/074423
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English (en)
French (fr)
Inventor
宫奎
段献学
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京东方科技集团股份有限公司
合肥京东方光电科技有限公司
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Application filed by 京东方科技集团股份有限公司, 合肥京东方光电科技有限公司 filed Critical 京东方科技集团股份有限公司
Priority to US16/079,131 priority Critical patent/US11211435B2/en
Publication of WO2018227981A1 publication Critical patent/WO2018227981A1/zh
Priority to US17/644,056 priority patent/US11785810B2/en
Priority to US18/459,495 priority patent/US20230413614A1/en

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/122—Pixel-defining structures or layers, e.g. banks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/10—OLEDs or polymer light-emitting diodes [PLED]
    • H10K50/14—Carrier transporting layers
    • H10K50/15—Hole transporting layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/10—OLEDs or polymer light-emitting diodes [PLED]
    • H10K50/14—Carrier transporting layers
    • H10K50/16—Electron transporting layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/10—OLEDs or polymer light-emitting diodes [PLED]
    • H10K50/17—Carrier injection layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/10—OLEDs or polymer light-emitting diodes [PLED]
    • H10K50/17—Carrier injection layers
    • H10K50/171—Electron injection layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/805—Electrodes
    • H10K50/82—Cathodes
    • H10K50/822—Cathodes characterised by their shape
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H10K71/20—Changing the shape of the active layer in the devices, e.g. patterning
    • H10K71/231—Changing the shape of the active layer in the devices, e.g. patterning by etching of existing layers
    • H10K71/233—Changing the shape of the active layer in the devices, e.g. patterning by etching of existing layers by photolithographic etching
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H10K71/621—Providing a shape to conductive layers, e.g. patterning or selective deposition
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/1201—Manufacture or treatment

Definitions

  • the present disclosure relates to a display substrate, a method of fabricating the same, and a display device.
  • OLED Organic Light-Emitting Diode
  • OLED display technology requires no backlight, and uses a very thin coating of organic materials and a glass substrate. When an electric current passes, these organic materials emit light.
  • the OLED display has many advantages, including flexible display, such as a flexible plastic substrate as a carrier, and a film packaging process to achieve a flexible OLED panel.
  • a method of fabricating a display substrate including:
  • a cathode is formed on the base substrate.
  • the removing the undercut to obtain a pattern of the pixel defining layer comprises: heating the pixel defining layer transition pattern, so that a portion of the pixel defining layer transition pattern is melted to remove the undercut forming a gentle Slope, the figure of the pixel defining layer is obtained.
  • the forming a pixel defining layer transition pattern on the base substrate comprises: forming at least two banks along the direction perpendicular to the substrate substrate on the base substrate, wherein The pixel defining layer transition pattern includes the at least two banks, the undercut being formed between two of the at least two banks.
  • the forming at least two banks on the base substrate comprises: forming a first bank on the base substrate, a second bank on the first bank, and a second a third bank on the bank, wherein an orthographic projection of a top surface of the second bank on the substrate substantially falls on a bottom surface of the third bank on the substrate Within the projection, an edge of the top surface of the second bank on the substrate substrate is spaced a distance from an edge of the bottom surface of the third bank on the substrate.
  • the forming the first bank on the base substrate, the second bank located on the first bank, and the third bank located on the second bank include:
  • the exposed first photosensitive material layer and the second photosensitive material layer are developed to form the first bank portion, the second bank portion, and the third bank portion.
  • the heating the pixel defining layer transition pattern, such that a portion of the pixel defining layer transition pattern is melted to remove the undercut to form a gentle slope surface comprises:
  • the thickness d of the exposed film layer ranges from 1/10 D to 1/5 D.
  • the thickness d1 of the second photosensitive material layer is 1/5D to 1/3D, and d1 is greater than d.
  • the forming at least two banks on the base substrate comprises: forming a second bank on the base substrate and a third bank on the second bank, wherein An orthographic projection of a top surface of the second bank on the substrate substrate completely falls within an orthographic projection of a bottom surface of the third bank on the substrate, and the second bank An edge of the top projection on the base substrate is spaced apart from an edge of the underside of the third bank on the substrate substrate.
  • the forming a second bank on the base substrate and the third bank on the second bank includes:
  • the exposed first photosensitive material layer and the second photosensitive material layer are developed to form the second bank portion and the third bank portion.
  • the heating the pixel defining layer transition pattern, such that a portion of the pixel defining layer transition pattern is melted to remove the undercut to form a gentle slope surface comprises:
  • the pixel defining layer transition pattern is heated such that a portion of the pixel defining layer transition pattern is melted to join the side surfaces of the second bank portion and the third bank portion into a gentle slope.
  • the heating the pixel defining layer transition pattern comprises:
  • forming the common layer broken at the undercut on the base substrate comprises: preparing a common layer on the base substrate, wherein the common layer comprises falling into the pixel definition a first common layer portion within the pixel region defined by the layer transition pattern and a second common layer portion at a top surface of the pixel defining layer transition pattern, wherein the first common layer portion and the second common layer portion Not connected to each other.
  • the preparing a common layer on the base substrate comprises:
  • the embodiment of the present disclosure further provides a display substrate, which is fabricated by the manufacturing method as described above, wherein the pattern of the pixel defining layer includes a first film layer and a second film layer, and the first film layer is disposed at The second film layer is adjacent to a side of the substrate substrate, and an etching rate of the first film layer is greater than an etching rate of the second film layer.
  • the pattern of the pixel defining layer further includes a third film layer disposed on a side of the first film layer adjacent to the substrate substrate, and the third film layer The etch rate is less than the etch rate of the first film layer.
  • the common layer breaks at the interface of the first film layer and the second film layer, and the cathode is continuous at the interface of the first film layer and the second film layer.
  • Embodiments of the present disclosure also provide a display device including the display substrate as described above.
  • FIG. 1 is a schematic view of an anode fabricated on a substrate according to an embodiment of the present disclosure
  • FIG. 2 is a schematic view showing a first photosensitive material layer formed on a base substrate according to an embodiment of the present disclosure
  • FIG. 3 is a schematic view showing the first photosensitive material layer after exposure according to an embodiment of the present disclosure
  • FIG. 4 is a schematic view showing exposure of a second photosensitive material layer and a first photosensitive material layer according to an embodiment of the present disclosure
  • FIG. 5 is a schematic view showing development of a first photosensitive material layer and a second photosensitive material layer according to an embodiment of the present disclosure
  • FIG. 6 is a schematic view of the hole injection layer and the hole transport layer after the fabrication of the hole in the embodiment of the present disclosure
  • FIG. 7 is a schematic view of the electron transport layer and the electron injection layer after the embodiment of the present disclosure is fabricated;
  • FIG. 8 is a schematic diagram of heating a pixel defining layer transition pattern according to an embodiment of the present disclosure
  • Figure 9 is a schematic view of the cathode of the present disclosure after the cathode is fabricated.
  • a common layer having a large thickness is deposited on a substrate substrate on which a pattern of a pixel defining layer is formed, and a common layer of different pixel regions is connected, thus providing holes to the sub-pixels There may be leakage into the adjacent other sub-pixel via the common layer, and there is a flowing leakage current between adjacent sub-pixels, resulting in a light leakage problem in the OLED display device.
  • embodiments of the present disclosure provide a display substrate, a method of fabricating the same, and a display device, which can prevent leakage current from flowing between adjacent sub-pixels and improve display quality of the display device.
  • Embodiments of the present disclosure provide a method of fabricating a display substrate, including:
  • a cathode is formed.
  • the side surface of the pixel defining layer transition pattern is formed with an undercut such that when the common layer is formed on the substrate substrate on which the pixel defining layer transition pattern is formed, the common layer can be made on the side surface of the pixel defining layer transition pattern A break occurs on the part, and a part falls in the pixel area defined by the pixel defining layer transition pattern, and the other part is located on the top surface of the pixel defining layer transition pattern, so that the common layers located in different pixel areas are independent of each other and are not connected to each other.
  • holes provided to the sub-pixels will not be able to leak into the adjacent other sub-pixel via the common layer, thereby avoiding leakage current flowing between adjacent sub-pixels, improving the display quality of the display device.
  • the pixel defining layer includes at least two film layers, for example, the pixel defining layer may include a first film layer and a second film layer stacked on each other, and the first film layer is disposed at the first The etch rate of the first film layer is greater than the etch rate of the second film layer.
  • the first film layer when the pixel defining layer transition pattern is formed by etching, the first film layer generates a certain amount of indentation, that is, an undercut phenomenon, with respect to the second film layer.
  • the pixel defining layer may further include a third film layer on a side of the first film layer adjacent to the substrate substrate, including the first film layer and the second film layer, The etching rate of the three film layers is smaller than the etching rate of the first film layer.
  • forming the pixel defining layer transition pattern comprises: forming at least two banks on the base substrate.
  • forming the pixel defining layer transition pattern comprises:
  • the orthographic projection may fall within the orthographic projection of the pixel defining layer on the substrate.
  • the pixel defining layer transition pattern comprising a first bank and a second bank located on the first bank And a third bank located on the second bank, the orthographic projection of the top surface of the second bank on the substrate substrate completely falls into the orthographic projection of the bottom surface of the third bank on the substrate And an edge of the top surface of the second bank on the substrate substrate is spaced apart from an edge of the bottom surface of the third bank on the substrate substrate by a distance.
  • the pixel defining layer transition pattern includes a first bank portion, a second bank portion located on the first bank portion, and a third bank portion located on the second bank portion.
  • the pixel defining layer transition pattern may not Further including a first bank portion including only a second bank portion and a third bank portion on the second bank portion, the orthographic projection of the top surface of the second bank portion on the substrate substrate completely falls into the third bank portion
  • the bottom surface of the bank is in the orthographic projection on the base substrate, and the edge of the top surface of the second bank on the substrate substrate and the bottom surface of the third bank are positive on the substrate
  • the edges of the projection are spaced apart by a certain distance, so that when the first exposure of the first photosensitive material layer is performed, not only is a portion of the surface layer of the first photosensitive material layer exposed, but the entire first photosensitive material layer is exposure.
  • the removing the undercut to obtain a pattern of a pixel defining layer includes:
  • the formed cathode when the cathode is formed on the base substrate on which the pixel defining layer pattern is formed, the formed cathode can have a continuous planar structure.
  • the heating the pixel defining layer transition pattern comprises:
  • the pixel-defining layer transition pattern is heated for 12 to 48 hours at a temperature of 80 ° C to 100 ° C.
  • the first photosensitive material layer has a thickness D
  • the exposed film layer has a thickness d of 1/10 D to 1/5 D.
  • the second photosensitive material layer has a thickness d1 of 1/5D to 1/3D, and d1 is greater than d.
  • the forming the pixel defining layer transition pattern comprises:
  • the pixel defining layer transition pattern comprising a second bank and a third bank located on the second bank a front projection of the top surface of the second bank on the substrate substrate completely falls into the orthographic projection of the bottom surface of the third bank on the substrate, and the top surface of the second bank
  • the edge of the orthographic projection on the base substrate is spaced apart from the edge of the orthographic projection of the bottom surface of the third bank on the substrate substrate.
  • all of the first layer of photosensitive material is exposed.
  • the side surface of the pixel defining layer transition pattern is formed with an undercut, which is disadvantageous for the subsequent formation of the entire layer of the cathode, it is also necessary to remove the undercut before the cathode is prepared to obtain a pattern of the pixel defining layer.
  • the removing the undercut to obtain a graphic of a pixel defining layer includes:
  • the formed cathode when the cathode is formed on the base substrate on which the pixel defining layer pattern is formed, the formed cathode can have a continuous planar structure.
  • the heating the pixel defining layer transition pattern comprises:
  • the pixel-defining layer transition pattern is heated for 12 to 48 hours at a temperature of 80 ° C to 100 ° C.
  • forming the common layer comprises:
  • the common layer is broken on a side surface of the pixel defining layer transition pattern, and a portion falling into the pixel defining layer transition pattern defines Another portion of the pixel area is located on the top surface of the pixel defining layer transition pattern.
  • the common layer may include a hole transport layer and/or an electron transport layer, and may further include a hole injection layer and/or an electron injection layer.
  • the common layer may be prepared by evaporation or by printing.
  • forming the common layer comprises:
  • the embodiment of the present disclosure further provides a display substrate, which is fabricated by the manufacturing method as described above, wherein the pattern of the pixel defining layer includes a first film layer and a second film layer, and the first film layer is disposed on the The second film layer is adjacent to one side of the substrate substrate, and an etching rate of the first film layer is greater than an etching rate of the second film layer.
  • the side surface of the pixel defining layer transition pattern is formed with an undercut such that when the common layer is formed on the substrate substrate on which the pixel defining layer transition pattern is formed, the common layer can be made on the side surface of the pixel defining layer transition pattern A break occurs on a part of the pixel area defined by the pixel-defined layer transition pattern, and another part is located on the top surface of the pixel-defined layer transition pattern, so that the common layers located in different pixel areas are independent of each other and are not connected to each other.
  • the holes thus provided to the sub-pixels will not be able to leak into the adjacent other sub-pixels via the common layer, thereby avoiding leakage current flowing between adjacent sub-pixels, improving the display quality of the display device.
  • the pattern of the pixel defining layer further includes a third film layer disposed on a side of the first film layer adjacent to the substrate substrate, and the third film The etch rate of the layer is less than the etch rate of the first film layer.
  • Embodiments of the present disclosure also provide a display device including the display substrate as described above.
  • the display device may be any product or component having a display function, such as an OLED panel, a television, a display, a digital photo frame, a mobile phone, a tablet computer, etc., wherein the display device further includes a flexible circuit board, a printed circuit board, and a backboard.
  • the method for fabricating the display substrate of the present disclosure includes the following steps:
  • Step a as shown in Figure 1, on the substrate 1 to prepare a thin film transistor array 2, a flat layer 3 and an anode 4;
  • the base substrate 1 may be a flexible substrate or a rigid substrate.
  • the thin film transistor array 2 includes a plurality of driving thin film transistors that drive the organic light emitting unit to emit light, and the anode 4 is connected to the drain of the driving thin film transistor.
  • Step b as shown in FIG. 2, a first photosensitive material layer 5 is formed on the base substrate 1 which has passed through step a.
  • a layer of organic photosensitive resin may be applied as the first photosensitive material layer 5 on the base substrate 1 subjected to the step a.
  • Step c as shown in FIG. 3, exposing the first photosensitive material layer 5 on the entire substrate 1;
  • the first photosensitive material layer 5 on the surface of the entire base substrate 1 is subjected to an empty exposure of a maskless mask, and attention should be paid to the control of the exposure dose during the exposure, for example, assuming a thickness D
  • the exposing dose of the first photosensitive material layer 5 is a, and the exposure dose b selected in the step is less than a, so that the first photosensitive material layer 5 has only the upper surface portion of the film having the thickness d being exposed, preferably, The size of d is about 1/10D to 1/5D.
  • a layer of exposed exposure film 51 is formed on the first photosensitive material layer 5.
  • the thickness of the exposed film layer 51 determines the size of the undercut portion of the side surface of the transition pattern of the subsequent pixel defining layer. If the thickness of the exposed film layer 51 is too large, it is not easy to form a pattern of the pixel defining layer having the smooth side surface. If the thickness of the exposed film layer 51 is too small, the undercut portion of the side surface of the pixel defining layer transition pattern is too small, and when the common layer is subsequently deposited, the common layer is not easily broken. Therefore, preferably, the exposed film layer 51 is The thickness is set to 1/10D to 1/5D.
  • Step d as shown in FIG. 4, forming a second photosensitive material layer 6 on the exposed first photosensitive material layer 5, and occluding the first photosensitive material layer 5 with the mask 7 for forming a pattern of the pixel defining layer
  • the second photosensitive material layer 6 is exposed such that the portions of the first photosensitive material layer 5 and the second photosensitive material layer 6 are not blocked by the light shielding pattern of the mask 7 are exposed;
  • An organic photosensitive resin having a thickness d1 is coated on the first photosensitive material layer 5 to form a second photosensitive material layer 6, preferably, the size of d1 is about 1/5D to 1/3D, and d1 is larger than d.
  • the entire array substrate is exposed by a mask 7, which includes a light-shielding pattern and a light-transmitting pattern, the light-shielding pattern corresponding to the pattern of the pixel defining layer. This exposure selects an exposure dose that is required to expose both the first photosensitive material layer 5 and the second photosensitive material layer 6, that is, the bottom first photosensitive material layer 5 is also sufficiently photosensitive in this exposure.
  • Step e as shown in FIG. 5, the exposed first photosensitive material layer 5 and the second photosensitive material layer 6 are developed to form a pixel defining layer transition pattern 8, and the pixel defining layer transition pattern 8 includes a first bank portion 52, a second bank portion 511 located on the first bank portion 52 and a third bank portion 61 located on the second bank portion 511.
  • the orthographic projection of the top surface of the second bank portion 511 on the base substrate 1 completely falls into the third
  • the bottom surface of the bank 61 is in the orthographic projection on the substrate 1 and the top surface of the second bank 511 on the substrate substrate 1 and the bottom surface of the third bank 61 on the substrate 1
  • the edges of the orthographic projections are separated by a certain distance;
  • the pixel defining layer transition pattern 8 includes a first bank portion 52, a second bank portion 511 on the first bank portion 52, and a third bank portion 61 on the second bank portion 511, wherein the second bank portion 511 passes through two Since the secondary exposure has the highest degree of exposure, it can more fully react with the developer during the development process, and after the development, the second bank portion 511 generates a certain amount of interior with respect to the first bank portion 52 and the third bank portion 61. Indentation, the undercut phenomenon. The undercut caused by the second bank 511 causes the side surface of the pixel defining layer transition pattern 8 to be broken, as shown by the area A in FIG.
  • Step f as shown in Figure 6, by vapor deposition method, the entire surface of the array substrate is vapor deposited a hole injection layer (HIL) and a hole transport layer (HTL) 9;
  • HIL hole injection layer
  • HTL hole transport layer
  • a single organic light emitting unit on a general OLED display device includes a stacked hole injection layer (HIL), a hole transport layer (HTL), an organic light emitting layer, an electron transport layer (ETL), an electron injection layer (EIL), of course. It is also possible to omit one or several of them. Since the hole injection layer, the hole transport layer, the electron transport layer, and the electron injection layer collectively cover the anode of the sub-pixel and the pixel defining layer, the hole injection layer, the hole transport layer, the electron transport layer, and the electron injection layer One or more layers can be defined as a common layer.
  • the hole injection layer and the hole transport layer are combined into a single layer, that is, the film layer 9, as shown in FIG. 6, the undercut layer is formed on the side surface of the pixel defining layer transition pattern 8, and the hole injection layer And the hole transport layer 9 is automatically disconnected at the region A during the deposition process, so that the hole injection layer and the hole transport layer 9 in the upper portion of the pixel defining layer transition pattern 8 and the hole in the lower portion of the pixel defining layer transition pattern 8 are formed.
  • the injection layer and the hole transport layer 9 are no longer connected, and the hole injection layer and the hole transport layer 9 at the lower portion of the pixel defining layer transition pattern 8 are located in the pixel region.
  • Step g as shown in FIG. 7, continue to vapor deposit a plurality of layers of organic light-emitting material layers 10, such as R, B, and G organic light-emitting materials, in a different pixel region by a vapor deposition mask.
  • a vapor deposition mask such as R, B, and G organic light-emitting materials
  • evaporation is further performed on the upper portion of the organic light-emitting material layer 10 to form an electron transport layer and an electron injection layer.
  • the electron transport layer and the electron injection layer are also part of the common layer. As shown in FIG. 8, the electron transport layer and the electron injection layer are combined.
  • the electron transport layer and the electron injecting layer 11 are automatically disconnected at the area A during the deposition process, so that the pixel defining layer transitions.
  • the electron transport layer and the electron injection layer 11 on the upper portion of the pattern 8 are no longer connected to the electron transport layer and the electron injection layer 11 at the lower portion of the pixel defining layer transition pattern 8, and the electron transport layer and the electron injection layer 11 at the lower portion of the pixel defining layer transition pattern 8 are located.
  • Step h heating the pixel defining layer transition pattern 8 and the common layer, because the second bank portion 511 is internally contracted at the region A, so that the upper third bank portion 61 and the common thereon
  • the layer generates a dangling, and in the process of heating the pixel defining layer transition pattern 8 and the common layer, the third bank portion 61 and the common layer thereon flow downward, thereby covering the floating region at the region A, eliminating the pixel defining layer
  • the undercut of the side surface of the transition pattern 8 forms a pattern 81 of the pixel-defining layer having a gentle side.
  • heating the pixel defining layer transition pattern 8 and the common layer may be performed under specific conditions, for example, heating may be performed at a temperature of 80 ° C to 100 ° C or lower for 12 to 48 hours, such as at 95 ° C. Heating was carried out for 24 hours at temperature.
  • the region A becomes the region B in the drawing
  • the pixel defining layer transition pattern 8 becomes the pattern 81 of the pixel defining layer whose side surface is a smooth slope.
  • the common layer portion and the pixel located on the top surface of the pattern 81 of the pixel defining layer are controlled by the temperature and duration of heating.
  • the common layer part of the area is still not connected.
  • Step i as shown in FIG. 9, the cathode 12 of the OLED display device is formed on the upper surface of the entire array substrate by evaporation or other means.
  • the surface of the pattern 81 of the pixel defining layer is formed by heat treatment.
  • the continuous whole is relatively flat, so the cathode 12 at the region B does not break like the common layer, but is formed into a continuous planar structure.
  • the OLED display substrate of the present disclosure can be fabricated through the above steps ai. It should be noted that the present disclosure does not limit the type of the OLED display substrate.
  • the OLED display substrate can be either a top-emitting OLED display substrate or a bottom-emitting type. OLED display substrate.
  • the side surface of the pixel defining layer transition pattern produced in this embodiment is formed with an undercut such that when a common layer is formed on the substrate substrate on which the pixel defining layer transition pattern is formed, the common layer can be made on the side surface of the pixel defining layer transition pattern A break occurs on a part of the pixel area defined by the pixel-defined layer transition pattern, and another part is located on the top surface of the pixel-defined layer transition pattern, so that the common layers located in different pixel areas are independent of each other and are not connected to each other.
  • the holes thus provided to the sub-pixels will not be able to leak into the adjacent other sub-pixels via the common layer, thereby preventing leakage current flowing between adjacent sub-pixels, and avoiding cross-color, light leakage, etc. of the OLED display device. , improved display quality of the display device.

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Abstract

提供一种显示基板及其制作方法、显示装置。其中，显示基板的制作方法包括：在衬底基板（1）上形成包括第一堤部（52）、第二堤部（511）和第三堤部（61）的像素界定层过渡图形（8），像素界定层过渡图形的侧表面形成底切；在衬底基板上形成在底切处断裂的公共层（9、11）；去除底切，得到像素界定层的图形（81）；在衬底基板上形成阴极（12）。

Description

显示基板及其制作方法、显示装置
相关申请的交叉引用
本申请要求于2017年6月14日提交中国专利局、申请号为201710449807.7的优先权，其全部内容据此通过引用并入本申请。
技术领域
本公开涉及一种显示基板及其制作方法、显示装置。
背景技术
OLED(Organic Light-Emitting Diode，有机发光二极管)，具备自发光、高亮度、宽视角、高对比度、可挠曲、低能耗等特性，因此受到广泛的关注，并作为新一代的显示方式，已开始逐渐取代传统液晶显示器，被广泛应用在手机屏幕、电脑显示器、全彩电视等。OLED显示技术与传统的液晶显示技术不同，无需背光，采用非常薄的有机材料涂层和玻璃基板，当有电流通过时，这些有机材料就会发光。OLED显示有诸多优点，其中包括可实现柔性显示，如以可绕曲的塑料基板等为载体，再配合薄膜封装制程，即可实现可绕曲的OLED面板。
发明内容
本公开的实施例提供技术方案如下：
一方面，提供一种显示基板的制作方法，包括：
在衬底基板上形成像素界定层过渡图形，其中所述像素界定层过渡图形的侧表面形成底切；
在所述衬底基板上形成在所述底切处断裂的公共层；
去除所述底切，得到像素界定层的图形；
在所述衬底基板上形成阴极。
可选地，所述去除所述底切，得到像素界定层的图形包括：对所述像素界定层过渡图形进行加热，使得部分所述像素界定层过渡图形融化以去除所 述底切形成平缓的坡面，得到所述像素界定层的图形。
可选地，所述在衬底基板上形成像素界定层过渡图形，包括：在所述衬底基板上形成沿着垂直于所述衬底基板的方向的至少两个堤部，其中，所述像素界定层过渡图形包括所述至少两个堤部，所述底切形成在所述至少两个堤部中的两个堤部之间。
可选地，所述在所述衬底基板上形成至少两个堤部，包括：在所述衬底基板上形成第一堤部、位于第一堤部上的第二堤部和位于第二堤部上的第三堤部，其中，所述第二堤部的顶面在所述衬底基板上的正投影完全落入所述第三堤部的底面在所述衬底基板上的正投影内，且所述第二堤部的顶面在所述衬底基板上的正投影的边缘与所述第三堤部的底面在所述衬底基板上的正投影的边缘间隔一定距离。
可选地，所述在所述衬底基板上形成第一堤部、位于第一堤部上的第二堤部和位于第二堤部上的第三堤部，包括：
形成第一感光材料层；
对所述第一感光材料层中距其上表面厚度为d的部分曝光，形成曝光膜层，其中所述第一感光材料层的厚度为D，D大于d；
在曝光后的第一感光材料层上形成第二感光材料层；
对所述第一感光材料层和所述第二感光材料层中未被掩模板的遮光图形遮挡的部分曝光，其中所述遮光图形与所述像素界定层在所述衬底基板上的正投影重叠；
对曝光后的第一感光材料层和第二感光材料层进行显影，形成所述第一堤部、所述第二堤部和所述第三堤部。
可选地，所述对所述像素界定层过渡图形进行加热，使得部分所述像素界定层过渡图形融化以去除所述底切形成平缓的坡面包括：
对所述像素界定层过渡图形进行加热，使得部分所述像素界定层过渡图形融化将所述第一堤部、所述第二堤部和所述第三堤部的侧表面连成一平缓的坡面。
可选地，所述曝光膜层的厚度d的取值范围为1/10D～1/5D。
可选地，所述第二感光材料层的厚度d1为1/5D～1/3D，且d1大于d。
可选地，所述在所述衬底基板上形成至少两个堤部，包括：在所述衬底基板上形成第二堤部和位于所述第二堤部上的第三堤部，其中所述第二堤部的顶面在所述衬底基板上的正投影完全落入所述第三堤部的底面在所述衬底基板上的正投影内，且所述第二堤部的顶面在所述衬底基板上的正投影的边缘与所述第三堤部的底面在衬底基板上的正投影的边缘间隔一定距离。
可选地，所述在所述衬底基板上形成第二堤部和位于所述第二堤部上的第三堤部，包括：
形成第一感光材料层；
对全部所述第一感光材料层曝光；
在曝光后的第一感光材料层上形成第二感光材料层；
对所述第一感光材料层和所述第二感光材料层中未被掩模板的遮光图形遮挡的部分曝光，其中所述遮光图形与所述像素界定层在所述衬底基板上的正投影重叠；
对曝光后的第一感光材料层和第二感光材料层进行显影，形成所述第二堤部和所述第三堤部。
可选地，所述对所述像素界定层过渡图形进行加热，使得部分所述像素界定层过渡图形融化以去除所述底切形成平缓的坡面包括：
对所述像素界定层过渡图形进行加热，使得部分所述像素界定层过渡图形融化将所述第二堤部和所述第三堤部的侧表面连成一平缓的坡面。
可选地，所述对所述像素界定层过渡图形进行加热包括：
在80℃至100℃的温度下对所述像素界定层过渡图形进行12至48小时的加热。可选地，所述在所述衬底基板上形成在所述底切处断裂的公共层，包括：在所述衬底基板上制备公共层，其中所述公共层包括落入所述像素界定层过渡图形限定出的像素区域内的第一公共层部分和位于所述像素界定层过渡图形的顶表面的第二公共层部分，其中所述第一公共层部分和所述第二公共层部分互不相连。
可选地，所述在所述衬底基板上制备公共层，包括：
在所述衬底基板上依次制备空穴注入层和空穴传输层，所述空穴注入层和空穴传输层在所述像素界定层过渡图形的侧表面的所述底切处发生断裂，一部分落入所述像素区域内，另一部分位于所述像素界定层过渡图形的顶表面上；
依次制备电子传输层和电子注入层，所述电子传输层和电子注入层在所述像素界定层过渡图形的侧表面的所述底切处发生断裂，一部分落入所述像素区域内，另一部分位于所述像素界定层过渡图形的顶表面上。
本公开实施例还提供了一种显示基板，采用如上所述的制作方法制作得到，其中，所述像素界定层的图形包括第一膜层和第二膜层，所述第一膜层设置在所述第二膜层靠近所述衬底基板的一侧，且所述第一膜层的刻蚀速率大于所述第二膜层的刻蚀速率。
可选地，所述像素界定层的图形还包括第三膜层，所述第三膜层设置在所述第一膜层靠近所述衬底基板的一侧，且所述第三膜层的刻蚀速率小于所述第一膜层的刻蚀速率。
可选地，所述公共层在所述第一膜层和所述第二膜层交界处断裂，以及所述阴极在所述第一膜层和所述第二膜层交界处连续。
本公开实施例还提供了一种显示装置，包括如上所述的显示基板。
附图说明
图1为本公开实施例在衬底基板上制作阳极后的示意图；
图2为本公开实施例在衬底基板上制作第一感光材料层后的示意图；
图3为本公开实施例对第一感光材料层进行曝光后的示意图；
图4为本公开实施例对第二感光材料层和第一感光材料层进行曝光的示意图；
图5为本公开实施例对第一感光材料层和第二感光材料层进行显影后的示意图；
图6为本公开实施例制作空穴注入层和空穴传输层后的示意图；
图7为本公开实施例制作电子传输层和电子注入层后的示意图；
图8为本公开实施例对像素界定层过渡图形进行加热后的示意图；
图9为本公开实施例制作阴极后的示意图。
具体实施方式
为使本公开的实施例要解决的技术问题、技术方案和优点更加清楚，下面将结合附图及具体实施例进行详细描述。
相关技术中的OLED显示基板中，是在形成有像素界定层的图形的衬底基板上沉积具有较大厚度的公共层，不同像素区域的公共层是连通的，这样提供至子像素的空穴经由公共层可能泄露到相邻的另一个子像素中，在临近的子像素之间存在流动的漏电流，导致OLED显示装置存在漏光问题。
为了解决上述问题，本公开的实施例提供一种显示基板及其制作方法、显示装置，能够避免临近的子像素之间出现流动的漏电流，改善显示装置的显示品质。
本公开实施例提供一种显示基板的制作方法，包括：
形成像素界定层过渡图形，所述像素界定层过渡图形的侧表面形成底切；
在形成有所述像素界定层过渡图形的衬底基板上形成公共层；
去除所述底切，得到像素界定层的图形；
形成阴极。
本实施例中，像素界定层过渡图形的侧表面形成有底切，这样在形成有像素界定层过渡图形的衬底基板上形成公共层时，能够使得公共层在像素界定层过渡图形的侧表面上发生断裂，一部分落入像素界定层过渡图形限定出的像素区域内，另一部分位于像素界定层过渡图形的顶表面，从而使得位于不同像素区域内的公共层之间相互独立，互不连接。这样，提供至子像素的空穴将不能够经由公共层泄露到相邻的另一个子像素中，从而避免临近的子像素之间出现流动的漏电流，改善了显示装置的显示品质。
其中，在通过上述制作方法制备的显示基板中，像素界定层包括至少两个膜层，例如像素界定层可以包括有相互层叠的第一膜层和第二膜层，第一膜层设置在第二膜层靠近衬底基板的一侧，第一膜层的刻蚀速率大于第二膜层的刻蚀速率。这样，在制备显示基板的过程中，在刻蚀形成像素界定层过 渡图形时，第一膜层相对于第二膜层会向内部产生一定量的缩进，即底切(undercut)现象。
在一些实施例中，像素界定层在包括第一膜层和第二膜层的基础上，还可以包括第三膜层，第三膜层位于第一膜层靠近衬底基板的一侧，第三膜层的刻蚀速率小于第一膜层的刻蚀速率。
可选地，形成像素界定层过渡图形包括：在所述衬底基板上形成至少两个堤部。
在一些实施例中，形成像素界定层过渡图形包括：
形成第一感光材料层；
对所述第一感光材料层进行曝光，使得所述第一感光材料层表面的一部分感光材料被曝光，形成曝光膜层；
在曝光后的第一感光材料层上形成第二感光材料层；
以制作像素界定层的图形的掩模板为遮挡对所述第一感光材料层和所述第二感光材料层进行曝光，使得所述第一感光材料层和所述第二感光材料层未被所述掩模板的遮光图形遮挡的部分曝光；可选地，所述遮光图形与所述像素界定层在所述衬底基板上的正投影重叠，例如，所述遮光图形在所述衬底基板上的正投影可以落入所述像素界定层在所述衬底基板上的正投影内。
对曝光后的第一感光材料层和第二感光材料层进行显影，形成所述像素界定层过渡图形，所述像素界定层过渡图形包括第一堤部、位于第一堤部上的第二堤部和位于第二堤部上的第三堤部，所述第二堤部的顶面在衬底基板上的正投影完全落入所述第三堤部的底面在衬底基板上的正投影内，且所述第二堤部的顶面在衬底基板上的正投影的边缘与所述第三堤部的底面在衬底基板上的正投影的边缘间隔一定距离。
上述实施例中，像素界定层过渡图形包括第一堤部、位于第一堤部上的第二堤部和位于第二堤部上的第三堤部，当然，像素界定层过渡图形还可以不再包括第一堤部，只包括第二堤部和位于第二堤部上的第三堤部，所述第二堤部的顶面在衬底基板上的正投影完全落入所述第三堤部的底面在衬底基板上的正投影内，且所述第二堤部的顶面在衬底基板上的正投影的边缘与所述第三堤部的底面在衬底基板上的正投影的边缘间隔一定距离，这样即是在 对第一感光材料层进行第一次曝光时，不只是使第一感光材料层得表层的一部分被曝光，而是使得第一感光材料层的全部被曝光。
由于像素界定层过渡图形的侧表面形成有底切，不利于后续形成整层的阴极，因此，在制备阴极之前，还需要去除所述底切，得到像素界定层的图形。所述去除所述底切，得到像素界定层的图形包括：
对所述像素界定层过渡图形进行加热，使得部分所述像素界定层过渡图形融化将所述第一堤部、所述第二堤部和所述第三堤部的侧表面连成一平缓的坡面，得到像素界定层的图形。
这样之后在形成有像素界定层图形的衬底基板上制作阴极时，能够使形成的阴极为连续的面状结构。
具体地，所述对所述像素界定层过渡图形进行加热包括：
在80℃至100℃的温度下对所述像素界定层过渡图形进行12至48小时的加热。
在一些实施例中，所述第一感光材料层的厚度为D，所述曝光膜层的厚度d为1/10D～1/5D。
在一些实施例中，所述第二感光材料层的厚度d1为1/5D～1/3D，且d1大于d。
在一些实施例中，所述形成像素界定层过渡图形包括：
形成第一感光材料层；
对所述第一感光材料层进行曝光，使得全部所述第一感光材料层被曝光；
在曝光后的第一感光材料层上形成第二感光材料层；
以制作像素界定层的图形的掩模板为遮挡对所述第一感光材料层和所述第二感光材料层进行曝光，使得所述第一感光材料层和所述第二感光材料层未被所述掩模板的遮光图形遮挡的部分曝光；
对曝光后的第一感光材料层和第二感光材料层进行显影，形成所述像素界定层过渡图形，所述像素界定层过渡图形包括第二堤部和位于第二堤部上的第三堤部，所述第二堤部的顶面在衬底基板上的正投影完全落入所述第三堤部的底面在衬底基板上的正投影内，且所述第二堤部的顶面在衬底基板上的正投影的边缘与所述第三堤部的底面在衬底基板上的正投影的边缘间隔一 定距离。
在一些实施例中，在第一次曝光时，是使全部的第一感光材料层被曝光。
由于像素界定层过渡图形的侧表面形成有底切，不利于后续形成整层的阴极，因此，在制备阴极之前，还需要去除所述底切，得到像素界定层的图形。示例的，所述去除所述底切，得到像素界定层的图形包括：
对所述像素界定层过渡图形进行加热，使得部分所述像素界定层过渡图形融化将所述第二堤部和所述第三堤部的侧表面连成一平缓的坡面，得到像素界定层的图形。
这样之后在形成有像素界定层图形的衬底基板上制作阴极时，能够使形成的阴极为连续的面状结构。
在一些实施例中，所述对所述像素界定层过渡图形进行加热包括：
在80℃至100℃的温度下对所述像素界定层过渡图形进行12至48小时的加热。
在一些实施例中，形成所述公共层包括：
在形成有所述像素界定层过渡图形的衬底基板上制备公共层，所述公共层在所述像素界定层过渡图形的侧表面上发生断裂，一部分落入所述像素界定层过渡图形限定出的像素区域内，另一部分位于所述像素界定层过渡图形的顶表面。
其中，公共层可以包括空穴传输层和/或电子传输层，还可以包括空穴注入层和/或电子注入层，公共层可以采用蒸镀的方式制备也可以采用打印的方式制备。
在一些实施例中，形成所述公共层包括：
在形成有所述像素界定层过渡图形的衬底基板上依次制备空穴注入层和空穴传输层，所述空穴注入层和空穴传输层在所述像素界定层过渡图形的侧表面上发生断裂，一部分落入所述像素区域内，另一部分位于所述像素界定层过渡图形的顶表面上；
依次制备电子传输层和电子注入层，所述电子传输层和电子注入层在所述像素界定层过渡图形的侧表面上发生断裂，一部分落入所述像素区域内，另一部分位于所述像素界定层过渡图形的顶表面上。
本公开实施例还提供了一种显示基板，采用如上所述的制作方法制作得到，所述像素界定层的图形包括第一膜层和第二膜层，所述第一膜层设置在所述第二膜层靠近所述衬底基板的一侧，且所述第一膜层的刻蚀速率大于所述第二膜层的刻蚀速率。
本实施例中，像素界定层过渡图形的侧表面形成有底切，这样在形成有像素界定层过渡图形的衬底基板上形成公共层时，能够使得公共层在像素界定层过渡图形的侧表面上发生断裂，一部分落入像素界定层过渡图形限定出的像素区域内，另一部分位于像素界定层过渡图形的顶表面，从而使得位于不同像素区域内的公共层之间相互独立，互不连接，这样提供至子像素的空穴将不能够经由公共层泄露到相邻的另一个子像素中，从而避免临近的子像素之间出现流动的漏电流，改善了显示装置的显示品质。
在一些实施例中，所述像素界定层的图形还包括第三膜层，所述第三膜层设置在所述第一膜层靠近所述衬底基板的一侧，且所述第三膜层的刻蚀速率小于所述第一膜层的刻蚀速率。
本公开实施例还提供了一种显示装置，包括如上所述的显示基板。所述显示装置可以为：OLED面板、电视、显示器、数码相框、手机、平板电脑等任何具有显示功能的产品或部件，其中，所述显示装置还包括柔性电路板、印刷电路板和背板。
下面结合附图对本公开的显示基板的制作方法进行详细介绍，本实施例的显示基板的制作方法包括以下步骤：
步骤a、如图1所示，在衬底基板1上制备薄膜晶体管阵列2、平坦层3以及阳极4；
其中，衬底基板1可以为柔性基底也可以为硬质基底。薄膜晶体管阵列2包括多个驱动有机发光单元进行发光的驱动薄膜晶体管，阳极4与驱动薄膜晶体管的漏极连接。
步骤b、如图2所示，在经过步骤a的衬底基板1上形成第一感光材料层5。
具体地，可以在经过步骤a的衬底基板1涂覆一层有机感光树脂，作为第一感光材料层5。
步骤c、如图3所示，对整个衬底基板1上的第一感光材料层5进行曝光；
本步骤中，对整个衬底基板1表面上的第一感光材料层5进行一次无掩模板遮挡的空曝光，曝光时需要注意的是对曝光剂量的控制，例如，假设能将厚度为D的第一感光材料层5曝光的曝光剂量为a，那本步骤中选用的曝光剂量b要小于a，这样第一感光材料层5只有上表面部分厚度为d的膜层才得以曝光，优选地，d的大小约为1/10D～1/5D。曝光完成后，如图4所示，第一感光材料层5上生成一层被曝光的曝光膜层51。曝光膜层51的厚度决定了后续像素界定层过渡图形侧表面出现底切部分的大小，如果曝光膜层51的厚度过大，则后续不容易形成具有平滑侧表面的像素界定层的图形，如果曝光膜层51的厚度过小，则像素界定层过渡图形侧表面出现底切部分过小，在后续沉积公共层时，不容易使公共层发生断裂，因此，优选地，将曝光膜层51的厚度设置为1/10D～1/5D。
步骤d、如图4所示，在曝光后的第一感光材料层5上形成第二感光材料层6，并以制作像素界定层的图形的掩模板7为遮挡对第一感光材料层5和第二感光材料层6进行曝光，使得第一感光材料层5和第二感光材料层6未被掩模板7的遮光图形遮挡的部分曝光；
在第一感光材料层5上涂覆一层厚度为d1的有机感光树脂，形成第二感光材料层6，优选地，d1的大小约为1/5D～1/3D，且d1大于d。利用掩模板7对整个阵列基板进行曝光，掩模板7包括有遮光图形和透光图形，遮光图形对应像素界定层的图形。本次曝光选用需将第一感光材料层5和第二感光材料层6都能曝光的曝光剂量，也就是说底部的第一感光材料层5在本次曝光中也要充分的感光。
步骤e、如图5所示，对曝光后的第一感光材料层5和第二感光材料层6进行显影，形成像素界定层过渡图形8，像素界定层过渡图形8包括第一堤部52、位于第一堤部52上的第二堤部511和位于第二堤部上511的第三堤部61，第二堤部511的顶面在衬底基板1上的正投影完全落入第三堤部61的底面在衬底基板上1的正投影内，且第二堤部511的顶面在衬底基板1上的正投影的边缘与第三堤部61的底面在衬底基板1上的正投影的边缘间隔一定距离；
像素界定层过渡图形8包括第一堤部52、位于第一堤部52上的第二堤部511和位于第二堤部上511的第三堤部61，其中，第二堤部511经过两次曝光，由于曝光的程度最高，因此在显影过程中能够更加充分地与显影液反应，在显影后第二堤部511相对第一堤部52、第三堤部61会向内部产生一定量的缩进，即底切(undercut)现象。第二堤部511造成的底切会使像素界定层过渡图形8的侧表面出现断裂，如图5中区域A所示。
步骤f、如图6所示，通过蒸镀的方法，在整个阵列基板的上表面蒸镀空穴注入层(HIL)和空穴传输层(HTL)9；
一般的OLED显示装置上的单个有机发光单元包括有层叠的空穴注入层(HIL)、空穴传输层(HTL)、有机发光层、电子传输层(ETL)、电子注入层(EIL)，当然也可以省略其中一层或者几层。由于空穴注入层、空穴传输层、电子传输层以及电子注入层公共地覆盖子像素的阳极以及像素界定层，因此空穴注入层、空穴传输层、电子传输层和电子注入层中的一层或多层可以定义为公共层。
为了描述简单，图6中将空穴注入层和空穴传输层合并成一层表示，即膜层9，如图6所示，由于像素界定层过渡图形8侧表面出现底切，空穴注入层和空穴传输层9在沉积过程中，在区域A处会自动断开，使像素界定层过渡图形8上部的空穴注入层和空穴传输层9与像素界定层过渡图形8下部的空穴注入层和空穴传输层9不再连接，像素界定层过渡图形8下部的空穴注入层和空穴传输层9位于像素区域内。
步骤g、如图7所示，继续通过蒸镀的方法，利用蒸镀掩模板，在不同的像素区域依次蒸镀出多种颜色的有机发光材料层10，比如R、B、G有机发光材料层。之后再在有机发光材料层10的上部继续蒸镀制作电子传输层和电子注入层，电子传输层和电子注入层也是公共层的一部分，如图8所示，将电子传输层和电子注入层合并成一层表示，即膜层11，同样地由于像素界定层过渡图形8侧表面出现底切，电子传输层和电子注入层11在沉积过程中在区域A处会自动断开，使像素界定层过渡图形8上部的电子传输层和电子注入层11与像素界定层过渡图形8下部的电子传输层和电子注入层11不再连接，像素界定层过渡图形8下部的电子传输层和电子注入层11位于像素区 域内。
可以看出，位于不同像素区域的公共层相互独立，互不连接。
步骤h、如图8所示，对像素界定层过渡图形8以及公共层进行加热，因为区域A处由于第二堤部511向内部产生缩进而使上部的第三堤部61以及其上的公共层产生悬空，在对像素界定层过渡图形8以及公共层进行加热的过程中，第三堤部61和其上的公共层会向下方流动，从而覆盖区域A处的悬空区，消除像素界定层过渡图形8侧表面的底切，形成侧面平缓的像素界定层的图形81。
其中，对像素界定层过渡图形8以及公共层进行加热可在特定的条件下进行，例如，可在80℃至100℃或者更低的温度下进行12至48小时的加热，比如在95℃的温度下进行24小时的加热。热处理完成后，如图8所示，区域A变成图中的区域B，像素界定层过渡图形8变成了侧表面为平滑的坡面的像素界定层的图形81。值得注意的是，虽然像素界定层的图形81的侧表面为平滑的坡面，但是通过对加热的温度和时长的控制，位于像素界定层的图形81的顶面上的公共层部分与位于像素区域内的公共层部分仍然不连接。
步骤i、如图9所示，通过蒸镀或者其他方式在整个阵列基板的上表面制作OLED显示装置的阴极12，如图9所示，由于经过加热处理，像素界定层的图形81的侧面成为连续的整体，且较为平缓，因此区域B处的阴极12不会像公共层那样产生断裂，而是形成为连续的面状结构。
经过上述步骤a-i即可制作得到本公开的OLED显示基板，需要注意的是，本公开并未限制上述OLED显示基板的类型，OLED显示基板既可以为顶发光型OLED显示基板也可以是底发光型OLED显示基板。
本实施例制作的像素界定层过渡图形的侧表面形成有底切，这样在形成有像素界定层过渡图形的衬底基板上形成公共层时，能够使得公共层在像素界定层过渡图形的侧表面上发生断裂，一部分落入像素界定层过渡图形限定出的像素区域内，另一部分位于像素界定层过渡图形的顶表面，从而使得位于不同像素区域内的公共层之间相互独立，互不连接，这样提供至子像素的空穴将不能够经由公共层泄露到相邻的另一个子像素中，从而防止临近的子像素之间出现流动的漏电流，避免OLED显示装置出现串色、漏光等不良， 改善了显示装置的显示品质。
除非另外定义，本公开使用的技术术语或者科学术语应当为本公开所属领域内具有一般技能的人士所理解的通常意义。本公开中使用的“第一”、“第二”以及类似的词语并不表示任何顺序、数量或者重要性，而只是用来区分不同的组成部分。“包括”或者“包含”等类似的词语意指出现该词前面的元件或者物件涵盖出现在该词后面列举的元件或者物件及其等同，而不排除其他元件或者物件。“连接”或者“相连”等类似的词语并非限定于物理的或者机械的连接，而是可以包括电性的连接，不管是直接的还是间接的。“上”、“下”、“左”、“右”等仅用于表示相对位置关系，当被描述对象的绝对位置改变后，则该相对位置关系也可能相应地改变。
可以理解，当诸如层、膜、区域或基板之类的元件被称作位于另一元件“上”或“下”时，该元件可以“直接”位于另一元件“上”或“下”，或者可以存在中间元件。
以上所述是本公开的优选实施方式，应当指出，对于本技术领域的普通技术人员来说，在不脱离本公开所述原理的前提下，还可以作出若干改进和润饰，这些改进和润饰也应视为本公开的保护范围。

Claims (19)

  1. 一种显示基板的制作方法，包括：
    在衬底基板上形成像素界定层过渡图形，其中所述像素界定层过渡图形的侧表面形成底切；
    在所述衬底基板上形成在所述底切处断裂的公共层；
    去除所述底切，得到像素界定层的图形；
    在所述衬底基板上形成阴极。
  2. 根据权利要求1所述的显示基板的制作方法，其中，所述在衬底基板上形成像素界定层过渡图形，包括：
    在所述衬底基板上形成沿着垂直于所述衬底基板的方向的至少两个堤部，其中，所述像素界定层过渡图形包括所述至少两个堤部，所述底切形成在所述至少两个堤部中的两个堤部之间。
  3. 根据权利要求2所述的显示基板的制作方法，其中，所述在所述衬底基板上形成至少两个堤部，包括：
    在所述衬底基板上形成第一堤部、位于第一堤部上的第二堤部和位于第二堤部上的第三堤部，其中，所述第二堤部的顶面在所述衬底基板上的正投影完全落入所述第三堤部的底面在所述衬底基板上的正投影内，且所述第二堤部的顶面在所述衬底基板上的正投影的边缘与所述第三堤部的底面在所述衬底基板上的正投影的边缘间隔一定距离。
  4. 根据权利要求3所述的显示基板的制作方法，其中，所述在所述衬底基板上形成第一堤部、位于第一堤部上的第二堤部和位于第二堤部上的第三堤部，包括：形成第一感光材料层；
    对所述第一感光材料层中距其上表面厚度为d的部分曝光，形成充分曝光膜层，其中所述第一感光材料层的厚度为D，D大于d；
    在曝光后的第一感光材料层上形成第二感光材料层；对所述第一感光材料层和所述第二感光材料层中未被掩模板的遮光图形遮挡的部分曝光，其中所述遮光图形与所述像素界定层在所述衬底基板上的正投影重叠；
    对曝光后的第一感光材料层和第二感光材料层进行显影，形成所述第一堤部、所述第二堤部和所述第三堤部。
  5. 根据权利要求4所述的显示基板的制作方法，其中，所述充分曝光膜层的厚度d的取值范围为1/10D～1/5D。
  6. 根据权利要求4或5所述的显示基板的制作方法，其中，所述第二感光材料层的厚度d1为1/5D～1/3D，且d1大于d。
  7. 根据权利要求1-6任一项所述的显示基板的制作方法，其中，所述去除所述底切，得到像素界定层的图形包括：
    对所述像素界定层过渡图形进行加热，使得部分所述像素界定层过渡图形融化以去除所述底切形成平缓的坡面，得到所述像素界定层的图形。
  8. 根据权利要求7所述的显示基板的制作方法，其中，所述对所述像素界定层过渡图形进行加热，使得部分所述像素界定层过渡图形融化以去除所述底切形成平缓的坡面包括：
    对所述像素界定层过渡图形进行加热，使得部分所述像素界定层过渡图形融化将所述第一堤部、所述第二堤部和所述第三堤部的侧表面连成一平缓的坡面。
  9. 根据权利要求2所述的显示基板的制作方法，其中，所述在所述衬底基板上形成至少两个堤部，包括：
    在所述衬底基板上形成第二堤部和位于所述第二堤部上的第三堤部，其中所述第二堤部的顶面在所述衬底基板上的正投影完全落入所述第三堤部的底面在所述衬底基板上的正投影内，且所述第二堤部的顶面在所述衬底基板上的正投影的边缘与所述第三堤部的底面在衬底基板上的正投影的边缘间隔一定距离。
  10. 根据权利要求9所述的显示基板的制作方法，其中，所述在所述衬底基板上形成第二堤部和位于所述第二堤部上的第三堤部，包括：
    形成第一感光材料层；
    对全部所述第一感光材料层充分曝光；
    在曝光后的第一感光材料层上形成第二感光材料层；
    对所述第一感光材料层和所述第二感光材料层中未被掩模板的遮光图形遮挡的部分充分曝光，其中所述遮光图形与所述像素界定层在所述衬底基板上的正投影重叠；
    对曝光后的第一感光材料层和第二感光材料层进行显影，形成所述第二堤部和所述第三堤部。
  11. 根据权利要求8或9所述的显示基板的制作方法，其中，所述去除所述底切，得到像素界定层的图形包括：
    对所述像素界定层过渡图形进行加热，使得部分所述像素界定层过渡图形融化以去除所述底切形成平缓的坡面，得到所述像素界定层的图形。
  12. 根据权利要求11所述的显示基板的制作方法，其中，所述对所述像素界定层过渡图形进行加热，使得部分所述像素界定层过渡图形融化以去除所述底切形成平缓的坡面包括：
    对所述像素界定层过渡图形进行加热，使得部分所述像素界定层过渡图形融化将所述第二堤部和所述第三堤部的侧表面连成一平缓的坡面。
  13. 根据权利要求7-8和11-12中任一项所述的显示基板的制作方法，其中，所述对所述像素界定层过渡图形进行加热包括：
    在80℃至100℃的温度下对所述像素界定层过渡图形进行12至48小时的加热。
  14. 根据权利要求1-13任一项所述的显示基板的制作方法，其中，所述在所述衬底基板上形成在所述底切处断裂的公共层，包括：
    在所述衬底基板上制备公共层，其中所述公共层包括落入所述像素界定层过渡图形限定出的像素区域内的第一公共层部分和位于所述像素界定层过渡图形的顶表面的第二公共层部分，其中所述第一公共层部分和所述第二公共层部分互不相连。
  15. 根据权利要求14所述的显示基板的制作方法，其中，所述在所述衬底基板上制备公共层，包括：
    在所述衬底基板上依次制备空穴注入层和空穴传输层，所述空穴注入层和空穴传输层在所述像素界定层过渡图形的侧表面的所述底切处发生断裂， 一部分落入所述像素区域内，另一部分位于所述像素界定层过渡图形的顶表面上；
    依次制备电子传输层和电子注入层，所述电子传输层和电子注入层在所述像素界定层过渡图形的侧表面的所述底切处发生断裂，一部分落入所述像素区域内，另一部分位于所述像素界定层过渡图形的顶表面上。
  16. 一种显示基板，采用如权利要求1-15中任一项所述的制作方法制作得到，其中，所述像素界定层的图形包括第一膜层和第二膜层，所述第一膜层设置在所述第二膜层靠近所述衬底基板的一侧，且所述第一膜层的刻蚀速率大于所述第二膜层的刻蚀速率。
  17. 根据权利要求16所述的显示基板，其中，所述像素界定层的图形还包括第三膜层，所述第三膜层设置在所述第一膜层靠近所述衬底基板的一侧，且所述第三膜层的刻蚀速率小于所述第一膜层的刻蚀速率。
  18. 根据权利要求16或17所述的显示基板，其中，所述公共层在所述第一膜层和所述第二膜层交界处断裂，以及所述阴极在所述第一膜层和所述第二膜层交界处连续。
  19. 一种显示装置，包括如权利要求16-18任一项所述的显示基板。
PCT/CN2018/074423 2017-06-14 2018-01-29 显示基板及其制作方法、显示装置 WO2018227981A1 (zh)

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