WO2018223416A1 - 一种fri稀疏采样核函数构建方法及电路 - Google Patents

一种fri稀疏采样核函数构建方法及电路 Download PDF

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WO2018223416A1
WO2018223416A1 PCT/CN2017/088676 CN2017088676W WO2018223416A1 WO 2018223416 A1 WO2018223416 A1 WO 2018223416A1 CN 2017088676 W CN2017088676 W CN 2017088676W WO 2018223416 A1 WO2018223416 A1 WO 2018223416A1
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sampling
signal
fourier series
frequency
fri
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宋寿鹏
江洲
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江苏大学
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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H17/00—Networks using digital techniques
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/10—Complex mathematical operations
    • G06F17/14—Fourier, Walsh or analogous domain transformations, e.g. Laplace, Hilbert, Karhunen-Loeve, transforms
    • G06F17/141—Discrete Fourier transforms
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/10—Complex mathematical operations
    • G06F17/14—Fourier, Walsh or analogous domain transformations, e.g. Laplace, Hilbert, Karhunen-Loeve, transforms
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H17/00—Networks using digital techniques
    • H03H17/02—Frequency selective networks
    • H03H17/0202—Two or more dimensional filters; Filters for complex signals
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H17/00—Networks using digital techniques
    • H03H17/02—Frequency selective networks
    • H03H17/0211—Frequency selective networks using specific transformation algorithms, e.g. WALSH functions, Fermat transforms, Mersenne transforms, polynomial transforms, Hilbert transforms
    • H03H17/0213—Frequency domain filters using Fourier transforms
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H17/00—Networks using digital techniques
    • H03H2017/0072—Theoretical filter design
    • H03H2017/0081—Theoretical filter design of FIR filters

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  • the invention belongs to the technical field of signal sparse sampling, and particularly relates to a nuclear function construction method and hardware circuit implementation of a sampling kernel in a sparse sampling of a pulse stream signal FRI.
  • the Finite Rate of Innovation (FRI) sampling theory is a new type of sparse sampling method proposed by Vetterli et al. in 2002.
  • the sampling theory sparsely samples the FRI signal at a rate much lower than the Nyquist sampling frequency and accurately reconstructs the original signal.
  • the sparse sampling problem of four types of non-band-limited signals such as Dirac flow signal, differential Dirac flow, non-uniform spline and piecewise polynomial, is theoretically solved, as long as the signal rate is new. It performs sparse sampling, and then estimates the signal amplitude and delay parameters through the spectral analysis algorithm, and finally reconstructs the time domain waveform of the signal from these parameters.
  • FRI sampling theory has been applied to ultra-wideband communications, GPS, radar, medical ultrasound imaging and industrial ultrasonic testing.
  • FRI sampling is still in the theoretical research stage.
  • the method of obtaining sparse data in the research results is to firstly sample the signal and then subsample it with digital signal processing algorithm to obtain FRI sparse sampling data.
  • the application research of FRI sampling theory in various fields is also based on simulation, and there is no real sparse sampling data from the hardware point of view. Therefore, in order to truly apply the FRI sparse sampling theory to practice, it is necessary to physically implement the FRI sampling theory.
  • One of the key issues in the theoretical implementation of FRI sampling theory is the hardware implementation of the sampling core.
  • the role of the sampling kernel is to convert the signal into a form of weighted sum of power series.
  • the amplitude is included in the weight, and the signal delay information is included in the power series.
  • the power series is solved to obtain the delay information, and then the amplitude information is obtained.
  • Different sampling cores can be divided into two categories according to different ways of converting signals into power series weighted sum forms.
  • the first method is to obtain the parameter estimation from the frequency domain using the special form of the Fourier series coefficient (with the power series weighted sum form) by acquiring the Fourier series coefficient of the signal.
  • the existing sinc core, SoS ( Sum of Sinc), etc. belong to this type of method.
  • the second method is to convolve the signal from the kernel function from the time domain, construct it into the form of weighted sum of power series, and then perform parameter estimation, mainly including Gaussian kernel and regenerative sampling kernel (polynomial regeneration, exponential regeneration).
  • parameter estimation mainly including Gaussian kernel and regenerative sampling kernel (polynomial regeneration, exponential regeneration).
  • the existing sampling kernel function is more inclined to the convenience of mathematics, but it is not described too much in terms of how it is implemented by hardware.
  • the Eldar team proposed a multi-channel FRI sampling hardware implementation method in the literature (Multichannel sampling of pulse streams at the rate of innovation. IEEE Transactions on Signal Processing, 2011, 59(2): 1491-1504). In this method, the number of system channels is proportional to the number of unknown parameters to be detected, and in the case of more unknown parameters, The hardware system is so complex that it cannot meet the actual FRI sampling.
  • the invention is directed to a pulse stream signal, and invents a kernel function construction method and hardware implementation of a sampling core in a sparse sampling of a pulse stream signal FRI.
  • the present invention provides a physical implementation method and circuit for the problem that the pulse stream signal FRI sparse sampling core has no physical implementation.
  • the circuit uses Chebyshev type II low-pass filtering and all-pass filtering to form a sampling core. After sampling the kernel, the sparsely sampled data can obtain the Fourier series coefficient of the signal through the digital signal processing algorithm, and then reconstruct the original signal. .
  • the method has the characteristics of simple hardware structure, easy implementation, and small amount of collected data.
  • a FRI sparse sampling kernel function construction method includes the following steps:
  • Step 1 Determine the number of signals and the distribution interval of the Fourier series coefficients required to accurately estimate the signal parameters from the sparse sample data according to the characteristics of the finite new interest rate pulse stream signal and the characteristics of the subsequent parameters to be estimated;
  • the characteristic of the stream signal is that there is a finite number of pulse signals in a finite time ⁇ , and the finite time ⁇ can be expanded to a signal of period ⁇ .
  • the subsequent estimated parameters refer to pulse delay and amplitude.
  • Step 2 estimating the required number of signal Fourier series coefficients and the distribution interval according to the parameters in step 1, and obtaining an amplitude-frequency condition that needs to be satisfied by sampling the frequency-frequency domain response;
  • Step 3 According to the amplitude and frequency conditions of the sampling kernel in step 2, design a frequency response function of the Fourier series coefficient screening circuit, and determine a performance parameter of the sampling core frequency response function, the parameters mainly include: a passband cutoff frequency, a stop band Cutoff frequency, passband maximum attenuation coefficient and stopband minimum attenuation coefficient;
  • Step 4 according to the Fourier series coefficient determined in step 3, the characteristics of the phase nonlinearity of the circuit frequency response function are filtered.
  • the phase correction module is used to transmit the signal.
  • the function performs phase correction to obtain the corrected transfer function of the sample kernel, that is, the final sample kernel function is obtained.
  • step 1 the limited innovation rate pulse stream signal described in step 1 can be extended to a periodic pulse stream signal, and the expression is
  • the sampling kernel parameter of the frequency response function of the circuit based on the Fourier series coefficient is obtained:
  • f p is the pass band cutoff frequency and f s is the stop band cutoff frequency.
  • the maximum attenuation a p of the sampling core passband and the minimum attenuation a s of the stopband can be comprehensively determined according to the accuracy requirements of the signal reconstruction and the physical difficulty of the sampling core.
  • the FRI sparse sampling core hardware implementation circuit proposed by the invention comprises: a Fourier series coefficient screening module and a phase correction module.
  • the Fourier series coefficient screening module adopts Chebyshev type II low-pass filter circuit; the phase correction module adopts all-pass filter circuit; the Fourier series coefficient screening circuit module and the phase correction module adopt series connection.
  • the Fourier series coefficient required for parameter estimation can be obtained; the phase correction module is used to filter the nonlinearity of the Fourier series coefficient module. The phase is compensated such that its phase is approximately linear in the passband.
  • the hardware circuit is used to obtain the pulsed stream signal FRI sparsely sampled data. Different from the existing ones, the digital signal is subsampled to obtain sparse data, and the sampling frequency is consistent with the signal's new interest rate, which is much lower than the conventional Nyquist. Special frequency.
  • the sampling core hardware circuit proposed by the invention has the characteristics of simple structure and easy implementation. Applying it to the sampling of the pulse stream signal can greatly reduce the signal sampling rate and the amount of data collected.
  • FIG. 1 is a functional block diagram of a system for sparse sampling and parameter estimation of a pulse stream signal according to an embodiment of the present invention
  • FIG. 2 is a schematic circuit diagram of a Fourier series coefficient screening module according to an embodiment of the present invention.
  • phase correction module 3 is a schematic circuit diagram of a phase correction module according to an embodiment of the present invention.
  • FIG. 5 is a frequency-domain response curve of a sampling core designed in an embodiment of the present invention.
  • t l is the pulse delay
  • a l is the pulse amplitude
  • ⁇ is the period of the signal x(t)
  • L is the number of pulses in a single period
  • h(t) is a pulse of known shape
  • m is an integer
  • Z Represents an integer set.
  • f p is the pass band cutoff frequency and f s is the stop band cutoff frequency.
  • the amplitude of the sampling core passband is required to be non-zero, and the stopband is zero.
  • the actual physically implementable low-pass filter function is difficult to achieve a stop-band amplitude of strictly zero. It can only be made large enough by setting the stop-band attenuation coefficient so that the stop-band amplitude is approximately zero.
  • the passband maximum attenuation a p and the stopband minimum attenuation a s are used to adjust the sampling nuclear passband and stopband amplitude. The smaller the a p is , the larger the a s is, the better the reconstruction effect of the sampling core is. But the higher the order of the filter, the more complicated the circuit will be.
  • the Chebyshev type II low-pass filter function is used as the sampling core, and the phase correction link is added later to make the sampling kernel function approximately linear in the passband.
  • the FRI sparse sampling core hardware circuit proposed by the present invention includes a Fourier series coefficient screening module Block and phase correction module; the analog input signal passes through the Fourier series coefficient screening module to eliminate unwanted Fourier series coefficients, and the phase correction module is used to filter the nonlinearity of the Fourier series coefficient module The phase is compensated such that the phase is approximately linear in the passband; the Fourier series coefficient screening module and the phase correcting module are in series.
  • the Fourier series coefficient screening module is implemented by a basic Sallink-key structure active low-pass filtering link, and is implemented by a three-stage operational amplifier circuit cascade configuration, wherein the active low-pass filtering link is 7th order,
  • the five-stage high-speed op amp ADA4857 is cascaded with the RC network, as shown in Figure 2.
  • the phase correction module is realized by an active all-pass filter link formed by the high-speed operational amplifier ADA4857 and the RC network, as shown in FIG.
  • the simulation parameters are as follows:
  • the periodic pulse stream signal is Where h(t) is a Gaussian pulse and its expression is ⁇ is the Gaussian pulse bandwidth factor.
  • the number of sampling points for sparse sampling is set to 7 according to the number of pulses.
  • sampling core parameters are determined based on the pulse stream signal:
  • a 7th-order Chebyshev type low-pass filter is designed, and its unit impulse response and amplitude-frequency response are shown in Fig. 4.
  • a 7-stage all-pass filter is designed to perform phase compensation.
  • the compensated post-sampling core unit impulse response and amplitude-frequency response are shown in Figure 5.
  • the designed sampling kernel is compared with the existing digital sampling core SoS kernel parameter estimation results.
  • the parameter estimation algorithm adopts the Annihilating Filter Method, the SoS sampling kernel unit impulse response and the amplitude frequency response. As shown in Figure 6.
  • the pulse flow signals are sparsely sampled by the above two kinds of sampling cores respectively, and the parameters are estimated by the zeroing filter method.
  • the experimental results are shown in Fig. 7.
  • both sampling cores can accurately recover the original signal delay and amplitude information.
  • the actual sampling pulse circuit is used to receive the actual ultrasonic pulse stream signal, and the output signal is sparsely sampled, and the number of sampling points is 7.
  • the actual ultrasonic pulse stream signal is oversampled, and the digital sample of the pulse stream signal is convolved with the SoS sample core and then equally spaced.
  • the sparse data is extracted and the number of extracted points is 7.
  • the sparse data obtained by the two sampling cores are used for parameter estimation, and the experimental results are shown in Fig. 8.
  • sampling core proposed by the present invention can be easily implemented by a hardware circuit, and the actual reconstruction effect is basically consistent with the SoS sampling core.
  • the sampling core proposed by the invention avoids the prior art that the signal is obtained by conventional sampling, and the signal is sparsely sampled by the software method, and the sparse data can be directly obtained from the hardware point of view, so that it can be applied to the FRI sparse sampling hardware system of the actual signal. , to achieve sparse sampling of the signal.

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Abstract

一种FRI稀疏采样核函数构建方法及电路，该方法根据模拟输入信号的特征与后续参数估计算法，确定采样核需满足的条件，并设计傅里叶级数系数筛选电路的频率响应函数，确定采样核频率响应函数的性能参数，经校正后得到采样核函数。电路由傅里叶级数系数筛选模块和相位矫正模块级联实现。傅里叶级数系数筛选模块采用切比雪夫Ⅱ型低通滤波电路，相位矫正模块采用全通滤波电路。信号经过该采样核电路后能够直接按照信号新息率进行稀疏采样，得到稀疏数据后可通过参数估计算法准确恢复原信号特征参数。该有限新息率稀疏采样核特别适用于脉冲流信号的FRI稀疏采样系统当中，采样率远低于常规奈奎斯特采样率，大大降低数据采集量。

Description

一种FRI稀疏采样核函数构建方法及电路 技术领域
本发明属于信号稀疏采样技术领域，特别涉及一种脉冲流信号FRI稀疏采样中采样核的核函数构建方法及硬件电路实现。
背景技术
有限新息率(Finite Rate of Innovation，FRI)采样理论是一种新型稀疏采样方法，由Vetterli等人于2002年提出。该采样理论以远低于奈奎斯特采样频率的速率对FRI信号进行稀疏采样，并可精确重构原信号。该方法在提出之初，从理论上解决了狄拉克流信号、微分狄拉克流、非均匀样条以及分段多项式这四类非带限信号的稀疏采样问题，只要按信号的新息率对其进行稀疏采样，再通过谱分析算法对信号幅值和时延参数进行估计，最终由这些参数重构出信号的时域波形。经过近15年的发展，FRI采样理论已经应用到超宽带通信、GPS、雷达、医学超声成像及工业超声检测等领域。目前，FRI采样还处于理论研究阶段，研究成果中稀疏数据的获取方法是先通过对信号进行常规采样，然后应用数字信号处理算法对其进行二次采样，得到FRI稀疏采样数据。FRI采样理论在各个领域的应用研究也是建立在仿真基础上的，并没有真正从硬件角度得到稀疏采样数据。因此，若要真正将FRI稀疏采样理论应用到实际当中，有必要对FRI采样理论进行物理实现。而FRI采样理论物理实现的关键问题之一是采样核的硬件实现。
FRI采样中，采样核的作用是将信号转换成幂级数加权和的形式，对于脉冲流信号，其幅值包含于权值当中，信号时延信息包含于幂级数当中，利用谱估计方法求解出幂级数，从而得到时延信息，进而得到幅值信息。根据将信号转换成幂级数加权和形式的途径不同，可以将现有的采样核分为两大类。第一类方法是通过获取信号的傅里叶级数系数，从频域利用傅里叶级数系数的特殊形式(具有幂级数加权和形式)进行参数估计，现有的sinc核、SoS(Sum of Sinc)核等，都属于这一类方法。第二类方法是从时域将信号与核函数卷积，将其构造成幂级数加权和的形式，进而进行参数估计，主要有高斯核、再生类采样核(多项式再生、指数再生)。然而现有的采样核函数更多的是倾向于数学上的便利性，对其如何通过硬件实现却没有过多描述。Eldar团队在文献(Multichannel sampling of pulse streams at the rate of innovation.IEEE Transactions on Signal Processing,2011,59(2):1491-1504)中提出一种多通道FRI采样硬件实现方法。该方法中系统通道数与需要检测的未知参量的个数成正比，对于未知参量较多的情形，其 硬件系统复杂度极大，无法满足实际的FRI采样。文献(Sub-Nyquist radar prototype:hardware and algorithms.IEEE Transactions on Aerospace and Electronic Systems,2014,50(2):809-822.)中针对雷达信号，利用高Q值的晶体带通滤波器构造成采样核，设计了一种四通道脉冲接收机，首次从硬件上实现了雷达信号的FRI采样，同时还将其应用到超声信号的稀疏采样。尽管该脉冲接收机能够以低于常规奈奎斯特采样率的速率对雷达信号以及超声信号进行稀疏采样，但其采样率依然远高于信号实际新息率，并没有真正实现新息率采样。
根据资料检索，目前尚没有可实际应用，并且采样速率满足新息率要求的硬件FRI采样系统。要想使FRI稀疏采样方法真正用于实际，必须从根本上解决采样核的物理实现问题。本发明就是专门针对脉冲流信号，发明了一种脉冲流信号FRI稀疏采样中采样核的核函数构建方法及硬件实现。
发明内容
本发明针对脉冲流信号FRI稀疏采样核尚无物理实现的问题，提供一种物理实现方法和电路。该电路利用切比雪夫Ⅱ型低通滤波和全通滤波环节构成采样核，经采样核后稀疏采样的数据可通过数字信号处理算法获得信号傅里叶级数系数，并进而重构出原信号。该方法具有硬件结构简单，易于实现，采集数据量少等特点。
实施本发明的具体步骤如下：
一种FRI稀疏采样核函数构建方法，包括如下步骤：
步骤1，根据有限新息率脉冲流信号的特征和后续待估计参数的特点，确定从稀疏采样数据中准确估计信号参数所需的信号傅里叶级数系数个数及分布区间；所述脉冲流信号的特征是指在有限时间τ内具有有限个脉冲信号，有限时间τ可以扩展为周期为τ的信号。所述后续估计参数是指脉冲时延和幅值。
步骤2，根据步骤1中所述参数估计所需的信号傅里叶级数系数个数及分布区间，得到采样核频域响应需要满足的幅频条件；
步骤3，根据步骤2中采样核幅频条件，设计傅里叶级数系数筛选电路频率响应函数，并确定采样核频率响应函数的性能参数，所述参数主要包括：通带截止频率、阻带截至频率、通带最大衰减系数和阻带最小衰减系数；
步骤4，根据步骤3中所确定的傅里叶级数系数筛选电路频率响应函数相位非线性的特点，为了提高其响应性能的稳定性和参数估计的准确性，利用相位矫正模块对所述传递函数进行相位矫正，从而得到采样核的校正传递函数，即得到最终的采样核函数。
进一步，步骤1中所述的有限新息率脉冲流信号可拓展为周期脉冲流信号，其表达式为
Figure PCTCN2017088676-appb-000001
其中，tl∈[0,τ)，al∈C，l＝1,...,L，τ为信号x(t)的周期，L为单个周期内脉冲数，h(t)为形状已知的脉冲；m表示整数，Z表示整数集。
进一步，根据步骤1中所述有限新息率脉冲流信号的周期τ和单个周期内脉冲数L，以及零化滤波器参数估计方法，确定所需傅里叶级数系数为
Figure PCTCN2017088676-appb-000002
进一步，根据步骤1中所述重构所需的信号傅里叶级数系数，得到采样核频域响应需要满足的条件为
Figure PCTCN2017088676-appb-000003
其中，S(f)为采样核频域响应，K＝{-L,...,L}。
进一步，根据所述采样核条件，得到基于傅里叶级数系数筛选电路频率响应函数采样核参数需要满足：
Figure PCTCN2017088676-appb-000004
其中，fp为通带截止频率，fs为阻带截止频率。
进一步优化采样核参数，得到其通带截止频率fp和阻带截止频率fs取值分别为：
Figure PCTCN2017088676-appb-000005
采样核通带最大衰减ap和阻带最小衰减as可根据信号重构精度要求和采样核的物理实现难易程度来综合确定。
本发明提出的一种FRI稀疏采样核硬件实现电路包括：傅里叶级数系数筛选模块和相位矫正模块。
傅里叶级数系数筛选模块采用切比雪夫Ⅱ型的低通滤波电路；相位矫正模块采用全通滤波电路；傅里叶级数系数筛选电路模块与相位矫正模块采用串联方式。
当模拟脉冲流信号经过该傅里叶级数系数筛选模块后，可得到参数估计所需要的傅里叶级数系数；相位矫正模块用于对所述傅里叶级数系数筛选模块的非线性相位进行补偿，使其在通频带内相位近似线性。
本发明的有益效果是：
直接采用硬件电路获取脉冲流信号FRI稀疏采样数据，不同于现有的通过对数字信号进行二次采样才能得到稀疏数据，并且采样频率与信号的新息率吻合，远低于常规的奈奎斯特频率。同时，本发明提出的采样核硬件电路具有结构简单，易于实现的特点。将其应用到脉冲流信号的采样中，能够大大降低信号采样速率及采集数据量。
附图说明
图1为本发明实施例中用于对脉冲流信号进行稀疏采样和参数估计的系统功能框图；
图2为本发明实施例中傅里叶级数系数筛选模块电路原理图；
图3为本发明实施例中相位矫正模块电路原理图；
图4为本发明实施例中7阶切比雪夫ΙΙ型低通滤波器时频域响应曲线；
(a)为单位脉冲响应曲线；(b)幅频曲线；
图5为本发明实施例中所设计采样核时频域响应曲线；
(a)为单位脉冲响应曲线；(b)为幅频曲线；
图6为现有的SoS采样核时频域响应曲线；
(a)为单位脉冲响应曲线；(b)为幅频曲线；
图7为本发明实施例中仿真信号实验结果；
(a)为本发明设计的采样核的实验结果；(b)SoS采样核的实验结果；
图8为本发明实施例中实测信号实验结果；
(a)为本发明设计的采样核的实验结果；(b)为SoS采样核的实验结果。
具体实施方式
以下结合附图和实施例对本发明的技术方案作进一步描述。
假设周期脉冲流信号
Figure PCTCN2017088676-appb-000006
其中，tl为脉冲时延，al为脉冲幅值，τ为信号x(t)的周期，L为单个周期内脉冲数，h(t)为形状已知的脉冲；m表示整数，Z表示整数集。
根据所述模拟输入FRI信号的周期τ和单个周期内回波数L，以及零化滤波器参数估计方法，确定所需傅里叶级数系数为
Figure PCTCN2017088676-appb-000007
根据所述参数估计所需的信号傅里叶级数系数，得到采样核频域响应需要满足的条件为
Figure PCTCN2017088676-appb-000008
其中，S(f)为采样核频域响应，K＝{-L,...,L}。
根据所述采样核条件，得到所述切比雪夫Ⅱ型低通滤波采样核参数需要满足：
Figure PCTCN2017088676-appb-000009
其中，fp为通带截止频率，fs为阻带截止频率。
为了使所设计采样核阶数尽量低，此处采样核的通带截止频率fp和阻带截止频率fs取值分别为：
Figure PCTCN2017088676-appb-000010
根据上述切比雪夫Ⅱ型低通滤波采样核参数条件，要求采样核通带内幅值不为零，阻带内为零。实际的可物理实现的低通滤波函数很难做到阻带幅值严格为零，只能通过设定阻带衰减系数，使其足够大，从而使阻带幅值近似为零。此处通过通带最大衰减ap和阻带最小衰减as两个参数来调节采样核通带和阻带幅值，ap越小，as越大，采样核的重构效果越好，但是滤波器的阶数也会越高，电路就会越复杂。
为了提高获取傅里叶级数系数的准确度，以切比雪夫Ⅱ型低通滤波函数作为采样核，后续增加相位矫正环节，使采样核函数在通频带内相位近似线性。
本发明提出的FRI稀疏采样核硬件电路，如图1所示，包括傅里叶级数系数筛选模 块和相位矫正模块；模拟输入信号经过该傅里叶级数系数筛选模块，剔除不需要的傅里叶级数系数，相位矫正模块用于对所述傅里叶级数系数筛选模块的非线性相位进行补偿，使其在通频带内相位近似线性；所述傅里叶级数系数筛选模块与所述相位矫正模块采用串联方式。
所述傅里叶级数系数筛选模块，以基本的Sallen-key结构有源低通滤波环节，通过三级运放电路级联构成方式实现，所述有源低通滤波环节为7阶，由五级高速运放ADA4857与阻容网络级联构成，如图2所示。
所述相位矫正模块，由高速运放ADA4857与阻容网络构成有源全通滤波环节实现，如图3所示。
本发明的效果通过以下仿真试验进一步说明：
仿真参数如下：
周期脉冲流信号为
Figure PCTCN2017088676-appb-000011
其中h(t)为高斯脉冲，其表达式为
Figure PCTCN2017088676-appb-000012
α为高斯脉冲带宽因子。信号周期τ＝10μs，脉冲数L＝3，采样点数为1001，高斯脉冲带宽因子α＝(2.5MHz)2，脉冲幅值分别为(1,0.3,0.8)，脉冲时延分别为(2μs,5μs,8μs)。根据脉冲数设置稀疏采样的采样点数为7。
根据脉冲流信号，确定采样核参数：
{fp,fs,ap,as}＝{300KHz,400KHz,3dB,40dB}
根据参数，设计7阶切比雪夫ΙΙ型低通滤波器，其单位脉冲响应以及幅频响应如图4所示。设计7阶全通滤波器，进行相位补偿，补偿后采样核单位脉冲响应以及幅频响应如图5所示。
实验中，将所设计的采样核与现有的数字式采样核SoS核参数估计结果进行对比，参数估计算法采用零化滤波器法(Annihilating Filter Method)，SoS采样核单位脉冲响应与幅频响应如图6所示。分别采用上述两种采样核对脉冲流信号进行稀疏采样，并利用零化滤波器法进行参数估计，实验结果如图7所示。
从实验结果看，两种采样核都能准确恢复原信号时延和幅值信息。
以下通过超声信号实测实验进一步说明本发明提出的采样核硬件电路的效果：
实测超声脉冲流信号有效时长τ＝10μs，脉冲数L＝3。实验中，利用所设计的采样核电路接收实际超声脉冲流信号，对输出信号进行稀疏采样，采样点数为7。同时对实际超声脉冲流信号进行过采样，将脉冲流信号数字样本与SoS采样核进行卷积后等间隔 抽取得到稀疏数据，抽取点数为7。分别利用两种采样核得到的稀疏数据进行参数估计，实验结果如图8所示。
由实验结果可知，本发明提出的采样核能够较容易地通过硬件电路实现，且其实际重构效果与SoS采样核基本一致。本发明提出的采样核避免了现有技术需要先按常规采样得到信号后通过软件方法实现信号的稀疏采样，能够从硬件角度直接获取稀疏数据，从而能够应用于实际信号的FRI稀疏采样硬件系统当中，实现信号的稀疏采样。
上文所列出的一系列的详细说明仅仅是针对本发明的可行性实施方式的具体说明，它们并非用以限制本发明的保护范围，凡未脱离本发明技艺精神所作的等效实施方式或变更均应包含在本发明的保护范围之内。

Claims (10)

  1. 一种FRI稀疏采样核函数构建方法，其特征在于，包括如下步骤：
    步骤1，根据有限新息率脉冲流信号的特征和后续待估计参数的特点，确定从稀疏采样数据中准确估计信号参数所需的信号傅里叶级数系数个数及分布区间；
    步骤2，根据步骤1中所述参数估计所需的信号傅里叶级数系数个数及分布区间，得到采样核频域响应需要满足的幅频条件；
    步骤3，根据步骤2中采样核的幅频条件，设计傅里叶级数系数筛选电路的频率响应函数，并确定采样核频率响应函数的性能参数，所述参数包括：通带截止频率、阻带截至频率、通带最大衰减系数和阻带最小衰减系数；
    步骤4，根据步骤3中所确定的傅里叶级数系数筛选电路频率响应函数相位非线性的特点，为了提高其响应性能的稳定性和参数估计的准确性，利用相位矫正模块对所述传递函数进行相位矫正，从而得到采样核的校正传递函数，即最终的采样核函数。
  2. 根据权利要求1所述的一种FRI稀疏采样核函数构建方法，其特征在于，所述步骤1中所述的有限新息率脉冲流信号拓展为周期脉冲流信号，其表达式为
    Figure PCTCN2017088676-appb-100001
    其中，tl∈[0,τ)，al∈C，l＝1,…,L，τ为信号x(t)的周期，L为单个周期内脉冲数，h(t)为形状已知的脉冲；m表示整数，Z表示整数集。
  3. 根据权利要求1所述的一种FRI稀疏采样核函数构建方法，其特征在于，根据步骤1中所述有限新息率脉冲流信号的周期τ和单个周期内脉冲数L、以及零化滤波器参数估计方法，确定所需傅里叶级数系数为
    Figure PCTCN2017088676-appb-100002
    k∈{-L,…,L}。
  4. 根据权利要求3所述的一种FRI稀疏采样核函数构建方法，其特征在于，还包括：根据步骤1中所述重构所需的信号傅里叶级数系数，步骤2得到的采样核频域响应需要满足的幅频条件为
    Figure PCTCN2017088676-appb-100003
    其中，S(f)为采样核频域响应，K＝{-L,…,L}。
  5. 根据权利要求4所述的一种FRI稀疏采样核函数构建方法，其特征在于，根据 所述采样核幅频条件，得到基于傅里叶级数系数筛选电路频率响应函数采样核参数需要满足：
    Figure PCTCN2017088676-appb-100004
    其中，fp为通带截止频率，fs为阻带截止频率。
  6. 根据权利要求5所述的一种FRI稀疏采样核函数构建方法，其特征在于，所述通带截止频率fp和阻带截止频率fs的优选值分别为：
    Figure PCTCN2017088676-appb-100005
  7. 根据权利要求1所述的一种FRI稀疏采样核函数构建方法，其特征在于，所述采样核通带最大衰减ap和阻带最小衰减as根据信号重构精度要求和采样核的物理实现难易程度综合确定。
  8. 一种FRI稀疏采样核函数的构建电路，其特征在于，包括傅里叶级数系数筛选模块、以及与之相串联的相位矫正模块；所述傅里叶级数系数筛选模块用于在脉冲流信号经过时能够得到参数估计所需要的傅里叶级数系数；所述相位矫正模块用于对所述傅里叶级数系数筛选模块的非线性相位进行补偿，使其在通频带内相位近似线性。
  9. 根据权利要求8所述的一种FRI稀疏采样核函数的构建电路，其特征在于，所述傅里叶级数系数筛选模块采用切比雪夫Ⅱ型的低通滤波电路；所述相位矫正模块采用全通滤波电路。
  10. 根据权利要求8所述的一种FRI稀疏采样核函数的构建电路，其特征在于，所述傅里叶级数系数筛选模块：以基本的Sallen-key结构有源低通滤波环节，通过三级运放电路级联构成方式实现；所述有源低通滤波环节为7阶，由五级高速运放ADA4857与阻容网络级联构成；所述相位矫正模块：由高速运放ADA4857与阻容网络构成有源全通滤波环节实现。
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