WO2018218487A1 - 预失真处理方法和装置 - Google Patents

预失真处理方法和装置 Download PDF

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Publication number
WO2018218487A1
WO2018218487A1 PCT/CN2017/086564 CN2017086564W WO2018218487A1 WO 2018218487 A1 WO2018218487 A1 WO 2018218487A1 CN 2017086564 W CN2017086564 W CN 2017086564W WO 2018218487 A1 WO2018218487 A1 WO 2018218487A1
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WIPO (PCT)
Prior art keywords
signal
baseband signal
channel
baseband
predistortion
Prior art date
Application number
PCT/CN2017/086564
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English (en)
French (fr)
Inventor
安德烈⋅伏罗比耶夫
洪艺伟
李珽
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华为技术有限公司
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Publication date
Application filed by 华为技术有限公司 filed Critical 华为技术有限公司
Priority to PCT/CN2017/086564 priority Critical patent/WO2018218487A1/zh
Priority to CA3065407A priority patent/CA3065407C/en
Priority to KR1020197038000A priority patent/KR102298431B1/ko
Priority to CN201780090885.0A priority patent/CN110771104B/zh
Priority to JP2019566148A priority patent/JP7058676B2/ja
Publication of WO2018218487A1 publication Critical patent/WO2018218487A1/zh
Priority to US16/696,130 priority patent/US10985705B2/en

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/38—Synchronous or start-stop systems, e.g. for Baudot code
    • H04L25/40—Transmitting circuits; Receiving circuits
    • H04L25/49—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/32—Modifications of amplifiers to reduce non-linear distortion
    • H03F1/3241—Modifications of amplifiers to reduce non-linear distortion using predistortion circuits
    • H03F1/3247—Modifications of amplifiers to reduce non-linear distortion using predistortion circuits using feedback acting on predistortion circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/32—Modifications of amplifiers to reduce non-linear distortion
    • H03F1/3241—Modifications of amplifiers to reduce non-linear distortion using predistortion circuits
    • H03F1/3258—Modifications of amplifiers to reduce non-linear distortion using predistortion circuits based on polynomial terms
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/189—High frequency amplifiers, e.g. radio frequency amplifiers
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
    • H03F3/24—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers of transmitter output stages
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/68—Combinations of amplifiers, e.g. multi-channel amplifiers for stereophonics
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/02—Transmitters
    • H04B1/04—Circuits
    • H04B1/0475—Circuits with means for limiting noise, interference or distortion
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B17/00—Monitoring; Testing
    • H04B17/30—Monitoring; Testing of propagation channels
    • H04B17/309—Measuring or estimating channel quality parameters
    • H04B17/336—Signal-to-interference ratio [SIR] or carrier-to-interference ratio [CIR]
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/32—Carrier systems characterised by combinations of two or more of the types covered by groups H04L27/02, H04L27/10, H04L27/18 or H04L27/26
    • H04L27/34—Amplitude- and phase-modulated carrier systems, e.g. quadrature-amplitude modulated carrier systems
    • H04L27/36—Modulator circuits; Transmitter circuits
    • H04L27/366—Arrangements for compensating undesirable properties of the transmission path between the modulator and the demodulator
    • H04L27/367—Arrangements for compensating undesirable properties of the transmission path between the modulator and the demodulator using predistortion
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2200/00—Indexing scheme relating to amplifiers
    • H03F2200/451—Indexing scheme relating to amplifiers the amplifier being a radio frequency amplifier
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/02—Transmitters
    • H04B1/04—Circuits
    • H04B2001/0408—Circuits with power amplifiers
    • H04B2001/0425—Circuits with power amplifiers with linearisation using predistortion

Definitions

  • the present application relates to the field of communications technologies, and in particular, to a predistortion processing method and apparatus.
  • the transmitting device of the wireless communication system includes a transmitting device and an antenna, and the transmitting device is connected to the antenna.
  • the transmitting device includes a plurality of transmitting channels, and the transmitting channel includes a mixer and a power amplifier (PA).
  • One transmitting channel corresponds to one antenna, and the antenna is connected to the transmitting device.
  • the transmitting device performs data transmission, in the transmitting channel, the transmitting device receives the baseband signal, converts the baseband signal into a radio frequency signal through the mixer, and amplifies the amplified radio frequency signal by the PA to amplify the power of the radio frequency signal, and amplifies the signal.
  • the transmitted RF signal is sent to the corresponding antenna of the transmitting channel, and the antenna can be sent to the amplified RF signal.
  • FIG. 1 shows a schematic diagram of the amplification function of the PA.
  • the signal before amplification is referred to as the input signal of the PA
  • the amplified signal is the output signal of the PA.
  • the amplification function of the PA on the input signal includes a linear region and a nonlinear region. In the linear region, the amplification gain of the PA is constant, that is, the power ratio of the input signal to the output signal is constant, and the phases of the input signal and the output signal are the same.
  • the amplification function of the PA is distorted, that is, the amplification gain of the PA decreases as the input signal power increases, and even the PA has no amplification effect; and the phase of the input signal and the output signal may also be different, that is, the PA
  • the nature of the signal that needs to be transmitted in the non-linear region may affect the demodulation performance of the signal at the receiving end. Therefore, the amplification efficiency is lowered when the PA operates in a non-linear region.
  • the present application provides several predistortion processing methods and apparatus to improve the efficiency of a power amplifier (PA).
  • PA power amplifier
  • the present application provides a predistortion processing apparatus, including: a first predistortion portion, a second predistortion portion, a feedback signal conversion portion, and a resolving portion; the first predistortion portion including N digital pre- a digital pre-distortion (DPD) processor, configured to receive a first baseband signal and N sets of predistortion parameters, and perform digital predistortion processing on the first baseband signal according to the N sets of predistortion parameters to obtain N a second baseband signal, the N second baseband signal is sent to the second predistortion portion; the second predistortion portion is configured to receive the N second baseband signal and a network coefficient, according to the The N-channel second baseband signal and the network coefficient determine the M-channel third baseband signal; the feedback signal conversion portion is configured to receive the R-channel RF signal amplified by the power amplifier, and the R-channel is amplified by the power amplifier.
  • DPD digital pre-distortion
  • the decoding part is configured to receive the first baseband signal and the fifth baseband signal, and determine the N sets of predistortion according to the first baseband signal and the fifth baseband signal And the network coefficient, the N sets of predistortion parameters are sent to the first predistortion portion, and the network coefficients are sent to the second predistortion portion; wherein, N, M, and R are integers, N is greater than or equal to 1, M is greater than or equal to N, and R is greater than or equal to 1 and less than or equal to M.
  • the first baseband signal may be a service signal or a signal dedicated to digital predistortion processing.
  • the first pre-distortion processing device provided by the embodiment of the present application can reduce the number of DPD processors and optimize the pre- The structure of the distortion processing device reduces design complexity, cost, and power consumption.
  • the first predistortion processing apparatus provided by the embodiment of the present application considers the difference of the nonlinear characteristics of different PAs, and can ensure that the amplification function of the signals in each of the transmission channels in the multi-antenna transmitting apparatus is linear.
  • the first predistortion portion specifically includes N digital predistortion DPD processors, wherein the xth DPD processor of the N DPD processors is used Receiving the xth pre-distortion parameter and the xth DPD processor input signal in the N sets of predistortion parameters, and performing digital predistortion on the xth DPD processor input signal according to the xth set of predistortion parameters Processing, obtaining the xth second baseband signal in the N second baseband signal, and sending the xth second baseband signal to the second predistortion portion; wherein x is an integer, and the value is 1 to N; when x is 1, the xth DPD processor input signal is the first baseband signal; when x is any one of 2 to N, the xth channel DPD processor input signal is The x-1th second baseband signal transmitted by the x-1th DPD processor of the N DPD processors, and the x-1th second baseband signal
  • the first predistortion portion specifically includes N DPD processors and N-1 multipliers, wherein the xth DPD processing of the N DPD processors And receiving the xth pre-distortion parameter of the N sets of predistortion parameters and the xth DPD processor input signal of the N DPD processor input signals, according to the xth set of predistortion parameters
  • the x-th DPD processor input signal is subjected to digital pre-distortion processing to obtain an output signal of the x-th DPD processor in the output signal of the N-channel DPD processor; wherein x is an integer, and the value is 1 to N; when x is 1st, the xth DPD processor input signal is the first baseband signal; when x is any one of 2 to N, the xth channel DPD processor input signal is: the N DPD processes The x-1th DPD processor output signal sent by the x-1th DPD processor in the device, wherein the x-1th
  • the signal is pre-distorted by the DPD processor, and the signal is subjected to feedback multiplication by the multiplier to obtain N pre-distorted signals.
  • the implementation is to reduce the nonlinear distortion more effectively and improve the amplification efficiency in a scene with obvious nonlinear distortion.
  • the first predistortion portion specifically includes N DPD processors and N-1 adders, wherein the xth of the N DPD processors a DPD processor, configured to receive a xth pre-distortion parameter and the first baseband signal in the N sets of predistortion parameters, and perform digital predistortion on the first baseband signal according to the xth predistortion parameter Processing, obtaining an output signal of the xth DPD processor in the output signal of the N-channel DPD processor; wherein x is an integer, and the value is 1 to N; the yth adder of the N-1 adders, Receiving a yth DPD processor output signal sent by a yth DPD processor of the N DPD processors and a yth sent by a y+1th DPD processor of the N DPD processors +1 channel DPD processor output signal, adding the y-th road and the y+1-channel DPD processor output signal to obtain a y
  • the signal is pre-distorted by the DPD processor, and the signal is fed back by the adder to obtain N pre-distorted signals.
  • the implementation is to reduce the nonlinear distortion more effectively and improve the amplification efficiency in a scene with obvious nonlinear distortion.
  • the first predistortion portion specifically includes N DPD processors and L adders, wherein L is equal to up ((N-2)/2) The obtained value;
  • the xth DPD processor of the N DPD processors is configured to receive the xth predistortion parameter of the N sets of predistortion parameters and the xth of the N DPD processor input signals a DPD processor input signal, performing digital predistortion processing on the xth DPD processor input signal according to the xth set of predistortion parameters, to obtain a xth second baseband in the N second baseband signal Transmitting, by the xth second baseband signal, the second predistortion portion; wherein x is an integer, and the value is 1 to N; the pth adder of the L adders Receiving a second p-1 second baseband signal sent by the 2p-1 DPD processors of the N DPD processors and transmitting by the 2pth DPD processor of the N DPD
  • the signal is pre-distorted by the DPD processor, and the signal is fed back by the adder to obtain N pre-distorted signals.
  • the implementation is to reduce the nonlinear distortion more effectively and improve the amplification efficiency in a scene with obvious nonlinear distortion.
  • the second predistortion portion includes W signal determining portions, wherein: the e signal determining portion e a signal determining portion, configured to receive the N second baseband signal and the network coefficient, and determine an eth second predistortion portion output signal according to the N second baseband signal and the network coefficient, where The second pre-distortion portion output signal of the e road corresponds to the third road of the M road At least one third baseband signal in the baseband signal; wherein e is an integer and takes a value from 1 to W.
  • the e-th signal determining portion obtains the second pre-distortion portion output signal of the e-th path by linearly transforming the N-channel second baseband signal and the network coefficient.
  • the M-channel pre-distorted signal can be obtained by linear transformation, and the M-channel pre-distorted signal is a pre-distortion opposite to the amplification performance of the M PAs of the multi-antenna transmitting device.
  • the signal maintains a linear relationship between the pre-amplified signal and the amplified signal of the signal to be transmitted, which can improve the amplification efficiency of the PA of the multi-antenna transmitting device.
  • the pre-distortion processing device Compared with the pre-distortion processing device in the conventional multi-antenna transmitting device, the pre-distortion processing device provided by the embodiment of the present application reduces MN DPD processors, optimizes the structure of the pre-distortion processing device, and reduces design complexity, cost, and The power consumption, while taking into account the difference in the nonlinear characteristics of different PAs, ensures that the amplification function of the signals in each of the transmission channels in the multi-antenna transmission device is linear.
  • the feedback signal conversion portion includes: a coupling portion, a mixing portion, and an analog-to-digital converter ADC, wherein: the coupling a part, configured to receive the RF signal amplified by the R channel through the power amplifier, obtain a coupled signal output signal according to the RF signal amplified by the R channel through the power amplifier, and send the output signal of the one coupled portion to the mixing And the mixing part is configured to receive the carrier signal and the one-way coupling part output signal, and down-convert the output signal of the one-way coupling part according to the carrier signal to obtain a sixth baseband signal, where the sixth a baseband signal is sent to the ADC; the ADC is configured to perform analog to digital conversion on the sixth baseband signal to obtain the fifth baseband signal, and send the fifth baseband signal to the solution Calculate the part.
  • the coupling a part configured to receive the RF signal amplified by the R channel through the power amplifier, obtain a coupled signal output signal according to the RF signal amplified by the R channel through the power
  • the RF signal amplified by the power amplifier can be fed back to the solution part of the predistortion processing device, so that the solution part can obtain the network coefficient and the N sets of predistortion parameters, and can support the first pre The distortion portion and the second predistortion portion are subjected to predistortion processing.
  • the feedback signal conversion portion includes: a coupling portion, a mixing portion, and a clipper And an ADC, wherein: the coupling portion is configured to receive the RF signal amplified by the R channel through the power amplifier, and obtain a coupled portion output signal according to the RF signal amplified by the R channel through the power amplifier, and the one coupling portion is coupled The output signal is sent to the mixing portion; the mixing portion is configured to receive a carrier signal and the one-way coupling portion output signal, and down-convert the output signal of the one-way coupling portion according to the carrier signal to obtain a sixth a baseband signal, the sixth baseband signal is sent to the clipper; the clipper is configured to perform a limiting process on the sixth baseband signal to obtain a seventh baseband signal, and the seventh baseband Transmitting a signal to the ADC; the ADC is configured to perform an analog signal to a digital signal conversion on the seventh base
  • a clipper is added to the seventh design of the first aspect.
  • the added clipper when the amplitude of the signal is large, the signal can be limited to reduce the peak of the signal to the trough, and further, the signal amplitude or interference of the signal can be reduced. .
  • the present application provides an apparatus comprising: the first aspect or any one of the first design to the fifth design of the first aspect, and the at least one DAC; the second predistortion portion further Transmitting, to the one of the at least one DAC, a third baseband signal of the Mth third baseband signal; the one of the at least one DAC for The third baseband signal of the t channel converts the digital signal to the analog signal, and obtains the fourth baseband signal of the tth channel in the fourth baseband signal of the M channel.
  • the present application provides an apparatus, including: a second aspect, an oscillator, and M mixing sections; the one of the at least one DAC is further configured to use the M-channel fourth baseband signal a fourth baseband signal in the tth channel is sent to the tth mixing portion of the M mixing portions; the oscillator is configured to generate a carrier signal, and the carrier signal is sent to the M mixing And a t-th mixing portion of the M mixing portions, configured to up-convert the fourth baseband signal of the t-th channel according to the carrier signal, to obtain a t-th in the first radio frequency signal of the M-channel First radio frequency signal; Where t is an integer and ranges from 1 to M.
  • the present application provides an apparatus comprising: a sixth design or a seventh design in the first aspect, and at least one DAC; the second predistortion portion is identical to the second predistortion portion of the second aspect The at least one DAC is identical to the at least one DAC of the second aspect.
  • the application provides an apparatus, comprising: a fourth aspect, an oscillator and M mixing sections, wherein: the one of the at least one DAC is further configured to use the M path fourth a tth fourth baseband signal in the baseband signal is transmitted to a tth mixing portion of the M mixing sections; the oscillator is configured to generate a carrier signal, and send the carrier signal to the M a mixing portion included in the mixing portion and the feedback signal converting portion; a t-th mixing portion of the M mixing portions, configured to fourth to the t-th channel according to the carrier signal
  • the baseband signal is upconverted to obtain a first radio frequency signal of the tth channel in the first radio frequency signal of the M channel; wherein t is an integer, and the value is 1 to M.
  • the present application provides a predistortion processing apparatus, including: a first predistortion portion, at least one DAC, a second predistortion portion, a feedback signal conversion portion, and a solution portion;
  • the first predistortion portion includes The N DPD processors are configured to receive the first baseband signal and the N sets of predistortion parameters, perform digital predistortion processing on the first baseband signal according to the N sets of predistortion parameters, and obtain N second baseband signals, Transmitting the N second baseband signals to the at least one DAC;
  • the at least one DAC is configured to perform a digital signal to analog signal conversion on the N second baseband signals to obtain N third baseband signals, Transmitting the N-way third baseband signal to the second pre-distortion portion;
  • the second pre-distortion portion configured to receive the N-channel third baseband signal and a network coefficient, according to the N-channel third baseband The signal and the network coefficient determine an M-channel fourth baseband signal
  • the first baseband signal may be a service signal or a signal dedicated to digital predistortion processing.
  • the predistortion processing function is implemented by the first predistortion portion and the second predistortion portion for improving the amplification efficiency of the PA in the multi-antenna transmitting apparatus.
  • the predistortion processing device can reduce the design complexity, cost and power consumption, and can ensure that the amplification function of the signals in each transmission channel in the multi-antenna transmitting device is linear.
  • the first predistortion portion specifically includes N DPD processors, wherein an xth DPD processor of the N DPD processors is configured to receive the The xth pre-distortion parameter and the xth DPD processor input signal in the N sets of predistortion parameters are subjected to digital predistortion processing on the input signal of the xth DPD processor according to the xth set of predistortion parameters, to obtain The xth second baseband signal of the N second baseband signals, the xth second baseband signal is sent to one of the at least one DAC; wherein x is an integer, and the value is 1 Up to N; when x is 1, the xth DPD processor input signal is the first baseband signal; when x is any one of 2 to N, the xth path DPD processor input signal is An x-1th second baseband signal sent by the x-1th DPD processor of the N DPD processors, where the x-1th second baseband signal
  • the first predistortion portion specifically includes N DPD processors and N-1 multipliers, wherein: xth DPD processing of the N DPD processors And receiving the xth pre-distortion parameter of the N sets of predistortion parameters and the xth DPD processor input signal of the N DPD processor input signals, according to The x-th pre-distortion parameter performs digital pre-distortion processing on the input signal of the x-th DPD processor to obtain an output signal of the x-th DPD processor in the output signal of the N-channel DPD processor; wherein x is an integer, The value is 1 to N; when x is 1, the xth DPD processor input signal is the first baseband signal; when x is any one of 2 to N, the xth path DPD processor The input signal is: an x-1th DPD processor output signal sent by the x-1th DPD processor of the N DPD processors, wherein the x-1th DPD processor output
  • the signal is pre-distorted by the DPD processor, and the signal is subjected to feedback multiplication by the multiplier to obtain N pre-distorted signals.
  • the implementation is to reduce the nonlinear distortion more effectively and improve the amplification efficiency in a scene with obvious nonlinear distortion.
  • the first predistortion portion specifically includes N DPD processors and N-1 adders, wherein: the xth of the N DPD processors a DPD processor, configured to receive a xth pre-distortion parameter and the first baseband signal in the N sets of predistortion parameters, and perform digital predistortion on the first baseband signal according to the xth predistortion parameter Processing, obtaining an output signal of the xth DPD processor in the output signal of the N-channel DPD processor; wherein x is an integer, and the value is 1 to N; the yth adder of the N-1 adders, Receiving a yth DPD processor output signal sent by a yth DPD processor of the N DPD processors and a yth sent by a y+1th DPD processor of the N DPD processors +1 channel DPD processor output signal, adding the y-th road and the y+1-channel DPD processor output signal to obtain a
  • the signal is pre-distorted by the DPD processor, and the signal is fed back by the adder to obtain N pre-distorted signals.
  • the implementation is to reduce the nonlinear distortion more effectively and improve the amplification efficiency in a scene with obvious nonlinear distortion.
  • the first predistortion portion includes a specific N DPD processors and L adders, wherein L is equal to up ((N-2)/2) The obtained value;
  • the xth DPD processor of the N DPD processors is configured to receive the xth predistortion parameter of the N sets of predistortion parameters and the xth of the N DPD processor input signals a DPD processor input signal, performing digital predistortion processing on the xth DPD processor input signal according to the xth set of predistortion parameters, to obtain a xth second baseband in the N second baseband signal Signaling, transmitting the xth second baseband signal to one of the at least one DAC; wherein x is an integer, and the value is 1 to N; a p-th adder of the L adders, configured to receive a second p-1 second baseband signal and the N of the second p-1 DPD processors of the N DPD processors a second p-base
  • the signal is pre-distorted by the DPD processor, and the signal is fed back by the adder to obtain N pre-distorted signals.
  • the implementation is to reduce the nonlinear distortion more effectively and improve the amplification efficiency in a scene with obvious nonlinear distortion.
  • the second predistortion portion includes W signal determining portions, wherein: the eth of the W signal determining portions a signal determining portion, configured to receive the N-channel third baseband signal and the network coefficient, and determine an e-path second pre-distortion portion output signal according to the N-channel third baseband signal and the network coefficient, where The e-channel second pre-distortion portion output signal corresponds to at least one of the M-th fourth baseband signals; wherein t is an integer ranging from 1 to M.
  • the e-th signal determining portion obtains the second pre-distortion portion output signal of the e-th path by linearly transforming the N-way third baseband signal and the network coefficient.
  • the technical effect of the fifth design of the sixth aspect is the same as the fifth design of the first aspect.
  • the feedback signal conversion portion is the same as the sixth design of the first aspect, according to any of the designs described in the sixth aspect or the sixth aspect.
  • the feedback signal conversion portion is the same as the seventh design of the first aspect.
  • the present application provides an apparatus comprising: any one of the first design to the fifth design of the sixth aspect or the sixth aspect, the oscillator and the M mixing sections, wherein: The second predistortion portion is further configured to send the tth fourth baseband signal in the M fourth fourth baseband signal to the tth mixing portion of the M mixing portions; Generating a carrier signal, and transmitting the carrier signal to the M mixing sections; a t-th mixing section of the M mixing sections, configured to perform the t-th path according to the carrier signal The four baseband signals are upconverted to obtain a first radio frequency signal of the tth channel in the first radio frequency signal of the M channel; wherein t is an integer, and the value is 1 to M.
  • the present application provides an apparatus comprising: a sixth design or a seventh design in the sixth aspect, oscillating And M mixing sections, wherein: the second predistortion portion is further configured to send a tth fourth baseband signal in the Mth fourth baseband signal to the first of the M mixing sections t mixing sections; said oscillator, configured to generate a carrier signal, to transmit said carrier signal to said M mixing sections and said mixing section included in said feedback signal converting section; said M a t-th mixing portion in the mixing portion, configured to up-convert the fourth baseband signal of the t-th channel according to the carrier signal, to obtain a first radio frequency signal of the t-th channel in the first radio frequency signal of the M-channel; Where t is an integer and ranges from 1 to M.
  • the present application provides an apparatus, comprising: any one of the third aspect, the fifth aspect, the seventh aspect, or the eighth aspect, and the M power amplifiers PA, wherein: the M mixing sections
  • the tth mixing portion is further configured to send the tth first radio frequency signal of the M first radio frequency signal to the tth PA of the M PAs; the first of the M PAs a plurality of PAs, configured to amplify the first radio frequency signal of the tth channel, obtain a second radio frequency signal of the tth channel of the second radio frequency signal of the M channel, and send the second radio frequency signal of the tth channel to the feedback signal
  • the conversion portion is a radio frequency signal amplified by the power amplifier through one of the radio signals amplified by the R amplifier received by the feedback signal conversion portion; wherein t is an integer ranging from 1 to M.
  • the present application provides an apparatus, including: a ninth aspect and an M antenna, wherein: the tth PA of the M PAs is further configured to send the tth second radio frequency signal to a t-th antenna of the M antennas; a t-th antenna of the M antennas is used to transmit the second radio frequency signal of the t-th channel; wherein t is an integer, and the value is 1 to M.
  • the present application provides a chip system, which may be any of the above devices.
  • the chip system can be composed of chips, and can also include chips and other discrete devices.
  • the chip may be an application-specific integrated circuit (ASIC), or may be another form of chip.
  • the chip system may further include a processor for supporting the predistortion processing device to implement the functions involved in the foregoing aspects.
  • the chip system further includes a memory for storing program instructions and data necessary for the predistortion processing device.
  • the present application provides a digital predistortion method, comprising: performing digital predistortion processing on a first baseband signal according to N sets of predistortion parameters to obtain N second baseband signals;
  • the baseband signal and the network coefficient determine the M-channel third baseband signal; and the fifth baseband signal is obtained according to the R-channel amplified by the power amplifier, wherein the R-channel is amplified by the power amplifier according to the M-channel third Determining, according to the first baseband signal and the fifth baseband signal, the N sets of predistortion parameters and the network coefficient; wherein, N, M, and R are integers, N is greater than 1, and M is greater than or equal to N.
  • the first baseband signal is digitally predistorted according to the N sets of predistortion parameters, and the N second baseband signals are obtained, including: x is an integer, and the value is 1 to N.
  • digital pre-distortion processing is performed on the first baseband signal according to the xth pre-distortion parameter of the N sets of predistortion parameters, to obtain the xth second of the N second baseband signals a baseband signal; when x is any one of 2 to N, the xth second baseband signal of the N second baseband signal is performed according to the xth set of predistortion parameters of the N sets of predistortion parameters Performing digital predistortion processing to obtain the xth second baseband signal of the N second baseband signal.
  • the first baseband signal is digitally predistorted according to the N sets of predistortion parameters to obtain N second baseband signals, including: x is an integer, and the value is 1 to N.
  • x is any one of 1 to N
  • digital pre-distortion processing is performed on the xth input signal of the N input signals according to the xth set of predistortion parameters in the N sets of predistortion parameters, to obtain N outputs.
  • the xth output signal of the signal wherein, when x is 1, the xth input signal is the first baseband signal, and when x is any one of 2 to N, the xth input signal
  • the x-1th output signal of the N output signals; when x is any one of 1 to N-1, the xth and x+1th output signals of the N output signals are Multiplying, obtaining the second baseband signal of the xth second baseband signal
  • the xth output signal of the N output signals is the xth second baseband signal of the N second baseband signals.
  • the first baseband signal is digitally predistorted according to the N sets of predistortion parameters to obtain N second baseband signals, including: x is an integer, and the value is 1 to N.
  • x is any one of 1 to N
  • digital pre-distortion processing is performed on the xth input signal of the N input signals according to the xth set of predistortion parameters in the N sets of predistortion parameters, to obtain N outputs.
  • the xth output signal of the signal wherein the xth input signal is the first baseband signal; and when x is any one of 1 to N-1, the xth path of the N output signal is Adding to the x+1th output signal to obtain the xth second baseband signal of the N second baseband signal; when x is N, the xth output signal of the N output signal is the The xth second baseband signal of the N second baseband signal.
  • the first baseband signal is digitally predistorted according to the N sets of predistortion parameters to obtain N second baseband signals, including: x is an integer, and the value is 1 to N.
  • x is any one of 1 to N
  • the xth second baseband signal of the second baseband signal wherein: when x is 1 or 2, the xth input signal is the first baseband signal; and when x is any one of 2 to N
  • the xth input signal is a signal obtained by adding the 2p-1th channel and the 2pth output signal of the N output signals, where p is equal to the ((x-2)/2) The resulting value.
  • the M-channel third baseband signal is determined according to the N-way second baseband signal and the network coefficient, including: according to the N-way The second baseband signal and the network coefficient determine a third baseband signal of the tth channel in the third baseband signal of the M channel, where t is an integer and takes a value of 1 to M.
  • the design of any one of the twelfth aspect or the twelfth aspect further comprising: performing an analog signal to the digital signal on the third baseband signal of the tth third baseband signal of the M channel Converting, obtaining a fourth baseband signal of the tth channel in the fourth baseband signal of the M channel; performing upconversion according to the fourth baseband signal of the tth channel according to the carrier signal, and obtaining the first radio frequency of the tth channel in the first radio frequency signal of the M channel a signal; performing power amplification on the first radio frequency signal of the t-th road to obtain a t-th radio frequency signal in the radio frequency signal amplified by the M-channel through the power amplifier; t is an integer, and the value is 1 to M.
  • the fifth baseband signal is obtained according to the radio frequency signal amplified by the R path through the power amplifier, comprising: amplifying according to the R path by the power amplifier
  • the RF signal obtains one output signal; the one output signal is down-converted according to the carrier signal to obtain a sixth baseband signal; and the sixth baseband signal is converted into an analog signal to a digital signal to obtain a fifth baseband signal.
  • the fifth baseband signal is obtained according to the RF signal amplified by the R path through the power amplifier, including: The R channel obtains an output signal by the RF signal amplified by the power amplifier; down-converting the one output signal according to the carrier signal to obtain a sixth baseband signal; and limiting the amplitude of the sixth baseband signal to obtain a seventh a baseband signal; converting the analog signal to the digital signal to the seventh baseband signal to obtain a fifth baseband signal.
  • the present application provides a digital predistortion method, comprising: performing digital predistortion processing on a first baseband signal according to N sets of predistortion parameters to obtain N second baseband signals;
  • the baseband signal converts the digital signal to the analog signal to obtain an N-channel third baseband signal; determines the M-channel fourth baseband signal according to the N-way third baseband signal and the network coefficient; and determines the RF signal amplified by the R-channel through the power amplifier a fifth baseband signal, wherein the radio frequency signal amplified by the R channel through the power amplifier is determined according to the M base fourth baseband signal; and the N sets are determined according to the first baseband signal and the fifth baseband signal a predistortion parameter and the network coefficient; wherein N, M, and R are integers, N is greater than 1, M is greater than or equal to N, and R is greater than or equal to 1 and less than or equal to M.
  • the first baseband signal is digitally pre-missed according to the N sets of predistortion parameters
  • the method of actually processing the N second baseband signal is the same as the design of any of the first design to the fourth design in the twelfth aspect.
  • determining the M-way fourth baseband signal according to the N-way third baseband signal and the network coefficient comprising: according to the N-way And determining, by the third baseband signal and the network coefficient, a fourth baseband signal of the tth channel in the fourth baseband signal of the M channel, where t is an integer and takes a value of 1 to M.
  • the first design of the thirteenth aspect, or the second design of the thirteenth aspect further comprising: a fourth channel of the fourth baseband signal of the M channel according to the carrier signal
  • the baseband signal is upconverted to obtain the first radio frequency signal of the tth channel in the first radio frequency signal of the M channel; and the first radio frequency signal of the tth channel in the first radio frequency signal of the M channel is subjected to power amplification to obtain the M channel passing power
  • the t-th RF signal in the amplified RF signal of the amplifier further comprising: a fourth channel of the fourth baseband signal of the M channel according to the carrier signal
  • the baseband signal is upconverted to obtain the first radio frequency signal of the tth channel in the first radio frequency signal of the M channel; and the first radio frequency signal of the tth channel in the first radio frequency signal of the M channel is subjected to power amplification to obtain the M channel passing power
  • the t-th RF signal in the amplified RF signal of the amplifier further comprising:
  • the method for determining the fifth baseband signal according to the RF signal amplified by the R channel through the power amplifier is the same as Twelve aspects of the seventh design or the eighth design of any one of the designs.
  • the embodiment of the present application provides a computer storage medium for storing computer software instructions for use in the foregoing predistortion processing apparatus, which includes a program designed to execute the above aspects.
  • 1 is a schematic diagram of an amplification function of a power amplifier
  • FIG. 2 is a schematic structural diagram of a predistortion processing apparatus according to an embodiment of the present application.
  • FIG. 3 is a schematic structural diagram of a transmitting device according to an embodiment of the present application.
  • FIG. 4 is a schematic structural diagram of a first predistortion processing apparatus according to an embodiment of the present application.
  • FIG. 5 is a schematic structural diagram of a second predistortion processing apparatus according to an embodiment of the present disclosure
  • FIG. 6 is a first structural diagram of a first predistortion portion provided by an embodiment of the present application.
  • FIG. 7 is a second schematic structural diagram of a first predistortion portion provided by an embodiment of the present application.
  • FIG. 8 is a third schematic structural diagram of a first pre-distortion portion provided by an embodiment of the present application.
  • FIG. 9 is a fourth structural diagram of a first pre-distortion portion provided by an embodiment of the present application.
  • FIG. 10 is a schematic structural diagram of a second predistortion portion provided by an embodiment of the present application.
  • FIG. 11 is a flowchart of a first pre-distortion processing method according to an embodiment of the present application.
  • FIG. 12 is a flowchart of a second pre-distortion processing method according to an embodiment of the present application.
  • the technical solution provided by the embodiment of the present application can be applied to various communication systems, for example, a global system for mobile communication (GSM), a code division multiple access (CDMA) system, and a broadband.
  • GSM global system for mobile communication
  • CDMA code division multiple access
  • WCDMA code division multiple access
  • TD-SCDMA time division-synchronous code division multiple access
  • UMTS universal mobile telecommunications system
  • LTE long term evolution
  • 5G fifth generation mobile communication technology
  • the terms “system” and “network” are similar in scope.
  • the device that applies the technical solution provided by the embodiment of the present application is a transmitting device, and the transmitting device may be a network device or a user device.
  • the transmitting device may also be referred to as a transmitting device.
  • the user equipment (UE) related to the embodiment of the present application includes a handheld device having a wireless communication function, an in-vehicle device, a wearable device, a computing device, or other processing device connected to the wireless modem.
  • the user equipment may also be referred to as a terminal, a mobile station (MS), a mobile terminal (MT), a user terminal (UT), and a user agent (UA). Or terminal equipment (TE), etc., this application is not limited.
  • the network device involved in the embodiment of the present application includes a base station (BS), a network controller, a mobile switching center, or other access network devices.
  • the base station includes various forms of macro base stations, micro base stations, relay stations, access points, and the like.
  • the base station may be a base station in GSM or CDMA: a base transceiver station (BTS); or a base station in WCDMA: a NodeB; or an evolved base station in LTE: an eNB or an e-NodeB (The evolutional Node B) can also be a base station in a 5G system.
  • the base station in the 5G system can be called a transmission reception point (TRP), and can also be called a gNB (generation Node B, gNB for short) or other. Further, the base station may also be a base station in a future network, which is not limited in this application.
  • TRP transmission reception point
  • gNB generation Node B, gNB for short
  • gNB generation Node B
  • the embodiments of the present application provide several predistortion processing methods and corresponding predistortion processing devices.
  • the method or apparatus can be applied to a transmitting device, and further, can be applied to a transmitting device of a transmitting device in order to reduce distortion of a PA amplification function in a non-linear region.
  • the transmitting device in order to overcome the distortion of the power amplifier (PA) in the nonlinear region amplifying function, the transmitting device includes a predistortion processing device including digital pre-distortion (digital pre-distortion, The DPD processor is used to generate a predistortion signal opposite to the amplification performance of the PA, so that the pre-amplification signal and the amplified signal of the signal to be transmitted remain in a linear relationship.
  • FIG. 2 is a schematic structural diagram of a predistortion processing apparatus. As shown in FIG.
  • the predistortion processing apparatus includes: a DPD processor, a digital to analog converter (DAC), and a first A mixing section, an oscillator, a second mixing section, a clipper, an analog to digital converter (ADC), and a predistortion parameter determining section.
  • the processing of the signal is: the DPD processor receives the first baseband signal and the predistortion parameter sent by the predistortion parameter determining portion, and the first baseband according to the predistortion parameter and the predistortion processing algorithm.
  • the signal is predistorted to obtain a second baseband signal, which is sent to the DAC; the DAC converts the digital signal to the analog signal of the second baseband signal to obtain a third baseband signal, which is sent to the first mixing portion; Generating a carrier signal and transmitting it to the first mixing portion and the second mixing portion; the first mixing portion upconverts the third baseband signal according to the carrier signal, Obtaining a first radio frequency signal and transmitting it to the PA; the PA amplifies the first radio frequency signal to obtain a second radio frequency signal, and sends the same to the antenna and feeds it back to the second mixing part; the antenna performs the second radio frequency signal Transmitting; the second mixing part down-converts the second radio frequency signal according to the carrier signal to obtain a fourth baseband signal, and sends the fourth baseband signal to the clipper; and the clipper performs limiting processing on the fourth baseband signal to obtain a fifth baseband a signal, which is sent to the ADC; the ADC converts the analog signal to the digital signal
  • a linear amplification relationship between the first baseband signal and the second radio frequency signal can be maintained, and the amplification efficiency of the PA is improved.
  • the “first”, “second”, “third”, “fourth”, “fifth”, “sixth” and “seventh” and the like in the embodiments of the present application are only used for distinguishing, and do not represent sequential or The meaning of size.
  • the DPD processor is used to implement a digital pre-distortion processing function, which may be implemented by hardware, software, or software plus hardware.
  • a digital pre-distortion processing function which may be implemented by hardware, software, or software plus hardware.
  • the implementation of the DPD processor is hardware or software plus hardware, it can be a stand-alone device or a component of the chip system.
  • the chip system is a predistortion processing device provided by an embodiment of the present application.
  • the mixing portion includes one or more mixers for up-converting the baseband signal to obtain a radio frequency signal, or down-converting the radio frequency signal to obtain a baseband signal. That is, the up-conversion function or the down-conversion function described in the embodiment of the present application may be implemented by one mixer, or may be implemented by multiple mixers, which is not limited in this application.
  • the mixing section includes two mixers, and the function of upconverting one baseband signal by the mixing section to obtain one RF signal can be realized by the two mixers.
  • the implementation is: up-converting one baseband signal by using a first mixer of the two mixers to obtain an intermediate frequency signal, and the second mixer of the two mixers is used to One IF signal is up-converted to obtain one RF signal.
  • the mixing section includes two mixers, and the function of downconverting one RF signal by the mixing section to obtain one baseband signal can be realized by the two mixers.
  • the implementation is: down-converting one radio frequency signal by using a first mixer in the two mixers to obtain an intermediate frequency signal, and the second mixer in the two mixers One intermediate frequency signal is down-converted to obtain one baseband signal.
  • the plurality of antennas includes a plurality of antennas, and any one of the plurality of antennas includes at least one antenna element, and one or more of the plurality of antennas may have a common antenna panel or a non-common antenna panel, and/or
  • the multiple antennas may have a common radome or a non-uniform radome, which is not limited in the embodiment of the present application.
  • FIG. 3 is a schematic structural diagram of a transmitting device.
  • the transmitting device includes multiple antennas and a transmitting device, and multiple antennas are connected to a transmitting device.
  • the transmitting device may also be referred to as a multi-antenna transmitting device.
  • the multi-antenna includes M antennas, and the transmitting device includes an oscillator and M transmitting channels.
  • the M antennas are in one-to-one correspondence with the M transmitting channels, and M is an integer greater than or equal to 1.
  • the PA, DAC, and mixing sections are included in the transmit channel.
  • the transmitting device receives a baseband signal that is coupled to each of the transmitting channels as the same input signal for each of the transmitting channels.
  • the oscillator generates a carrier signal that is sent to the mixing portion of each transmit channel.
  • the DAC converts the digital signal to the analog signal of the input signal of the transmitting channel to obtain a second baseband signal, which is sent to the mixing portion; the mixing portion is based on the carrier signal pair sent by the oscillator.
  • the second baseband signal is up-converted to obtain a first radio frequency signal, which is sent to the PA; the PA performs power amplification on the first radio frequency signal to obtain an amplified radio frequency signal, and sends the amplified radio frequency signal to an antenna corresponding to the transmission channel including the PA.
  • the antenna can be used to transmit the amplified RF signal.
  • the PA transmits the amplified radio frequency signal to the antenna.
  • the PA can be understood to be: the PA transmits the radio frequency signal to the antenna element included in the antenna; and the antenna transmits the amplified RF signal. :
  • the antenna includes an antenna element to transmit the amplified RF signal.
  • the multi-antenna transmitting apparatus includes the PA, the amplification function of the PA may be distorted in the nonlinear region, and the DPD processor can improve the amplification efficiency of the PA. Therefore, the pre-distortion processing apparatus can be provided in the multi-antenna transmitting apparatus, and the pre-distortion processing apparatus Includes DPD processor to increase the amplification efficiency of the PA. Since the multi-antenna transmitting apparatus includes a plurality of PAs, different PAs have different nonlinear characteristics. If a conventional pre-distortion processing technique is still employed in the multi-antenna transmitting apparatus, it is necessary to set an independent for each PA in the pre-distortion processing apparatus. The DPD processor, at this time, the cost, design complexity, and power consumption of the transmitting device will increase significantly.
  • the predistortion processing apparatus provided by the embodiment of the present application is applied to a multi-antenna transmission apparatus, and the pre-distortion processing apparatus provided in the embodiment of the present application is intended to be compared with the pre-distortion processing apparatus in the conventional multi-antenna transmission apparatus. Optimize the structure of the predistortion processing device.
  • the nonlinear nature of the PA mainly depends on the structure of the PA and the input signal of the PA, the input signals of the PAs of the multi-antenna transmitting apparatus are the same, and therefore, the conventional pre-distortion processing technique is adopted.
  • the antenna transmitting apparatus the nonlinear characteristics of different PAs are correlated, and the performance of the DPD processors corresponding to different PAs is correlated. Therefore, the structure of the predistortion processing apparatus in the multi-antenna transmitting apparatus can be optimized to reduce Design complexity, cost savings, and reduced power consumption of multi-antenna transmitters.
  • FIG. 4 is a schematic structural diagram of a first predistortion processing apparatus according to an embodiment of the present application.
  • the first predistortion processing apparatus includes: a first predistortion portion, a second predistortion portion, a feedback signal conversion portion, and a solution portion.
  • the first predistortion portion includes N DPD processors.
  • a first oscillator, at least one DAC, M mixing sections, M PAs, and M antennas are also shown in FIG. Where N and M are integers, N is greater than or equal to 1, and M is greater than or equal to N.
  • the first predistortion section receives a first baseband signal and N sets of predistortion parameters.
  • the first baseband signal is a service signal or a digital signal dedicated to the DPD processor.
  • the digital signal dedicated to the DPD processor is an orthogonal frequency division multiplexing (OFDM) symbol.
  • the first baseband signal may include an I (In-phase, I) signal and a Q (Quadrature-phase, Q) signal.
  • the signal processing procedure described in the embodiment of the present application is performed on the I channel signal and the Q channel signal, respectively.
  • the N sets of predistortion parameters are parameters that are sent to the first predistortion portion by the solution portion.
  • the first predistortion portion performs digital predistortion processing on the first baseband signal according to the N DPD processors and the N sets of predistortion parameters to obtain N second baseband signals, and sends N second baseband signals to the second predistortion portion.
  • the second predistortion portion receives the N second baseband signal and the network coefficient, and the network coefficient is a coefficient that the solution portion transmits to the second predistortion portion.
  • the second predistortion portion determines the M channel third baseband signal according to the N second baseband signal and the network coefficient, and sends the M third baseband signal to the DAC included in the predistortion processing device, that is, the M channel third baseband signal
  • the tth third baseband signal is sent to one of the DACs included in the predistortion processing apparatus. Where t is an integer and ranges from 1 to M.
  • the predistortion processing device includes a DAC that receives the M-channel third baseband signal transmitted by the second pre-distortion portion, and converts the digital signal to the analog signal of the M-channel third baseband signal to obtain the M-channel fourth baseband signal, and the M-channel The fourth baseband signal is sent to the M mixing sections.
  • the DAC receiving the third baseband signal of the tth third baseband signal performs the conversion of the digital signal to the analog signal of the third baseband signal of the tth road, and obtains the tth path of the fourth baseband signal of the M road.
  • the fourth baseband signal transmits the tth fourth baseband signal to the tth mixing portion of the M mixing sections.
  • the predistortion processing device comprises M DACs.
  • the second predistortion portion transmits the tth third baseband signal in the M third baseband signal to the tth DAC of the M DACs, and the tth DAC pair t
  • the third baseband signal is converted into a digital signal to an analog signal to obtain a fourth baseband signal of the tth channel, and the fourth baseband signal of the tth channel is sent to the tth mixing section.
  • t is an integer and ranges from 1 to M.
  • the first oscillator generates a carrier signal and transmits the carrier signal to the M mixing sections.
  • the M mixing sections receive the carrier signal and the M-channel fourth baseband signal transmitted by the DAC, and up-convert the M-channel fourth baseband signal according to the carrier signal to obtain the M-channel first RF signal, and send the M-channel first RF signal to M PAs. That is, the tth mixing portion of the M mixing portions receives the carrier signal and the tth fourth baseband signal, and the tth fourth baseband signal is the fourth tth of the Mth fourth baseband signal. Baseband signal.
  • the t-th mixing part up-converts the t-th fourth baseband signal according to the carrier signal, obtains the t-th first radio frequency signal in the M-channel first radio frequency signal, and sends the t-th first radio frequency signal to the M-th.
  • the tth PA in the PA t is an integer, and the value is 1 to M.
  • M PAs perform power amplification on the first RF signal of the M channel, obtain a second RF signal amplified by the M channel through the power amplifier, and send the second RF signal of the M channel to the M antennas, and the R in the second RF signal of the M channel The second RF signal is sent to the feedback signal conversion section.
  • R is an integer greater than or equal to 1 and less than or equal to M. That is, the tth PA of the M PAs power-amplizes the first radio frequency signal of the tth channel in the first radio frequency signal of the M channel, and obtains the tth channel of the second radio frequency signal amplified by the M channel through the power amplifier.
  • the radio frequency signal sends the second radio frequency signal of the tth to the tth antenna of the M antennas, and can also send the second radio frequency signal of the tth to the feedback signal conversion part, where t is an integer, and the value is 1 to M. .
  • the M antennas transmit the M-channel second RF signal, that is, the t-th antenna of the M antennas transmits the t-th second RF signal of the M-channel second RF signals.
  • the second RF signal amplified by the R channel through the power amplifier is coupled to the feedback signal conversion portion, that is, the feedback signal conversion portion receives the second RF signal amplified by the R channel through the power amplifier, and converts the R RF signal into a fifth baseband.
  • the signal sends a fifth baseband signal to the solution portion.
  • the solution part combines multiple sets of predistortion parameter solving algorithms by series, parallel or series plus parallel to obtain the solution algorithm of the solution part.
  • the pre-distortion parameter solving algorithm may be an algorithm commonly used by those skilled in the art. The present application is not limited.
  • the algorithm may be a least mean square (LMS) algorithm.
  • the decoding part receives the first baseband signal and the fifth baseband signal, determines N sets of predistortion parameters and network coefficients according to the solution algorithm of the solution part and the fifth baseband signal, and sends N sets of predistortion parameters to the first predistortion part Sending the network coefficient to the second predistortion portion.
  • LMS least mean square
  • the network coefficient may also be referred to as a first coefficient, a first parameter, or other name, which is output by the solution portion, is input to the second pre-distortion portion, and supports the second pre-distortion portion to implement pre-distortion processing.
  • the parameters of the function may also be referred to as a first coefficient, a first parameter, or other name, which is output by the solution portion, is input to the second pre-distortion portion, and supports the second pre-distortion portion to implement pre-distortion processing.
  • the predistortion processing function is implemented by the first predistortion portion and the second predistortion portion for improving the amplification efficiency of the M PAs in the multi-antenna transmitting apparatus.
  • the first pre-distortion portion includes N DPD processors for performing digital pre-distortion processing on the baseband signal to obtain N pre-distorted processed signals; and the second pre-distortion portion is obtained according to N pre-distorted processed signals.
  • the M path is pre-distorted.
  • the M-channel pre-distorted signal is approximately a pre-distortion signal opposite to the amplification performance of the M PAs, so that the pre-amplification signal and the amplified signal of the signal to be transmitted maintain a linear relationship, which can improve the amplification efficiency of the PA.
  • the first pre-distortion processing device provided by the embodiment of the present application can reduce the number of DPD processors, optimize the structure of the pre-distortion processing device, and reduce the design complexity. Degree, cost and power consumption.
  • the first predistortion processing apparatus considers the difference of the nonlinear characteristics of different PAs, and can ensure that the amplification function of the signals in each of the transmission channels in the multi-antenna transmitting apparatus is linear.
  • FIG. 5 is a schematic structural diagram of a second predistortion processing apparatus according to an embodiment of the present application.
  • the second predistortion processing apparatus includes: a first predistortion portion, at least one DAC, a second predistortion portion, a feedback signal conversion portion, and a solution portion.
  • the first predistortion portion includes N DPD processors.
  • N and M are integers, N is greater than or equal to 1, and M is greater than Equal to N.
  • the second predistortion processing apparatus is different from the first predistortion processing apparatus in that: in the first predistortion processing apparatus, after performing signal processing, after the signal processing in the second predistortion section Performing a conversion of the digital signal to the analog signal, that is, the second predistortion portion transmits a signal to the DAC; in the second predistortion processing device, performing signal processing, performing digital signal to analog before the signal processing in the second predistortion portion The conversion of the signal, that is, the DAC sends a signal to the second predistortion portion.
  • the first predistortion section receives one first baseband signal and N sets of predistortion parameters.
  • the first baseband signal described in the predistortion processing apparatus corresponding to FIG. 4 of the first baseband signal is not described herein.
  • the N sets of predistortion parameters are parameters that are sent to the first predistortion portion by the solution portion.
  • the first predistortion portion performs digital predistortion processing on the first baseband signal according to the N DPD processors and the N sets of predistortion parameters to obtain N second baseband signals, and sends N second baseband signals to the predistortion processing device.
  • the DAC is included, that is, the xth second baseband signal in the N second baseband signals is sent to one of the DACs included in the predistortion processing apparatus, and x is an integer ranging from 1 to N.
  • the predistortion processing device includes a DAC that performs digital signal to analog signal conversion on the N second baseband signal to obtain N third baseband signals, and sends N third baseband signals to the second predistortion portion. That is, the DAC that receives the xth second baseband signal in the N second baseband signal converts the digital signal to the analog signal of the xth second baseband signal to obtain the xth path in the Nth third baseband signal.
  • the third baseband signal transmits the xth third baseband signal to the second predistortion portion.
  • the predistortion processing device may include N DACs. Based on the configuration, the first predistortion portion transmits the xth second baseband signal to the xth DAC of the N DACs, and the xth DAC converts the xth second baseband signal to the analog signal. Obtaining a third baseband signal of the xth channel, and transmitting the third baseband signal of the xth channel to the second predistortion portion, where x is an integer, and the value is 1 to N.
  • the second predistortion portion receives the N third baseband signal and the network coefficient, the network coefficient is a coefficient sent by the solution portion to the second predistortion portion, and the M base fourth baseband signal is determined according to the N third baseband signal and the network coefficient, Transmitting the Mth fourth baseband signal to the M mixing sections, that is, transmitting the tth fourth baseband signal in the Mth fourth baseband signal to the tth mixing part of the M mixing sections, where t is an integer , with values from 1 to M.
  • the first oscillator generates a carrier signal and transmits the carrier signal to the mixing portion.
  • the M mixing sections receive the M-channel fourth baseband signal and the carrier signal sent by the first oscillator, and up-convert the M-channel fourth baseband signal according to the carrier signal to obtain the M-channel first RF signal, and the M-channel first RF The signal is sent to M PAs.
  • the tth mixing part of the M mixing sections receives the tth fourth baseband signal of the Mth fourth baseband signal and the carrier signal transmitted by the oscillator, and the tth fourth baseband signal according to the carrier signal Performing up-conversion to obtain the first radio frequency signal of the tth channel in the first radio frequency signal of the M channel, and transmitting the first radio frequency signal of the tth channel to the tth PA of the M PAs, where t is an integer, and the value is 1 to M.
  • the M PAs perform power amplification on the first RF signal of the M channel, obtain a second RF signal amplified by the M channel through the power amplifier, and send the second RF signal of the M channel to the M antennas, and the R in the second RF signal of the M channel
  • the second radio frequency signal is sent to the feedback signal conversion portion, and R is an integer greater than or equal to 1 and less than or equal to M. That is, the tth PA of the M PAs power-amplizes the first radio frequency signal of the tth channel in the first radio frequency signal of the M channel, and obtains the tth channel of the second radio frequency signal amplified by the M channel through the power amplifier.
  • the radio frequency signal sends the second radio frequency signal of the tth to the tth antenna of the M antennas, and can also send the second radio frequency signal of the tth to the feedback signal conversion part, where t is an integer, and the value is 1 to M.
  • the M antennas transmit the second RF signal of the M channel, that is, the tth antenna of the M antennas transmits the second RF signal of the tth channel of the second RF signal of the M channel, where t is an integer ranging from 1 to M.
  • the second RF signal amplified by the R channel through the power amplifier is coupled to the feedback signal conversion portion, that is, the feedback signal conversion portion receives the second RF signal amplified by the R channel through the power amplifier, and converts the R RF signal into a fifth baseband.
  • the signal sends a fifth baseband signal to the solution portion.
  • the solution part combines multiple sets of predistortion parameter solving algorithms by series, parallel or series plus parallel to obtain the solution algorithm of the solution part.
  • the pre-distortion parameter solving algorithm may be an algorithm commonly used by those skilled in the art, and the present application is not limited.
  • the algorithm may be an LMS algorithm.
  • the solving part receives the first baseband signal and the fifth baseband signal, according to a solution algorithm of the solving part, The first baseband signal and the fifth baseband signal determine N sets of predistortion parameters and network coefficients, send N sets of predistortion parameters to the first predistortion portion, and transmit the network coefficients to the second predistortion portion.
  • the second pre-distortion processing apparatus implements a pre-distortion processing function by using the first pre-distortion portion and the second pre-distortion portion, and is used for improving The amplification efficiency of the M PAs in the antenna transmitting device.
  • the predistortion processing device can reduce the design complexity, cost and power consumption, and can ensure that the amplification function of the signals in each transmission channel in the multi-antenna transmitting device is linear.
  • the first predistortion portion shown in FIG. 4 or FIG. 5 includes N DPD processors for receiving the first baseband signal and N sets of predistortion parameters, and the first baseband according to the N DPD processors and the N sets of predistortion parameters.
  • the signal is digitally predistorted to obtain N second baseband signals.
  • the first predistortion portion of the predistortion processing apparatus shown in FIG. 4 or FIG. 5 is any one of various implementations of the first predistortion portion shown in FIGS. 6 to 9.
  • the first predistortion portion shown in FIG. 6 is the first implementation of the first predistortion portion of the predistortion processing apparatus shown in FIG. 4 or FIG. 5, and as shown in FIG. 6, the first predistortion portion includes N. a DPD processor, the xth DPD processor of the N DPD processors receives the xth set of predistortion parameters and the xth DPD processor input signal of the N sets of predistortion parameters, according to the xth set of predistortion parameters Performing digital predistortion processing on the xth DPD processor input signal to obtain the xth second baseband signal in the N second baseband signal.
  • the xth DPD processor transmits the xth second baseband signal to the predistortion processing device shown in FIG. The second predistortion portion.
  • the xth DPD processor transmits the xth second baseband signal to the predistortion processing shown in FIG.
  • the device includes one of the DACs. Wherein, when x is 1, the input signal of the xth DPD processor is the first baseband signal, and when x is any one of 2 to N, the input signal of the xth DPD processor is the first of the N DPD processors.
  • the x-1th second baseband signal transmitted by the x-1 DPD processors, and the x-1th second baseband signal is the x-1th second baseband signal of the N second baseband signals.
  • x is an integer and ranges from 1 to N.
  • the signal is pre-distorted by the cascade of the DPD processor to obtain N signals subjected to pre-distortion processing, and the implementation is relatively simple in design, low in cost, and work is performed. Low consumption.
  • the first predistortion portion shown in FIG. 7 is a second implementation of the first predistortion portion of the predistortion processing apparatus shown in FIG. 4 or FIG. 5, as shown in FIG. 7, the first predistortion portion includes N.
  • the xth DPD processor of the N DPD processors receives the xth pre-distortion parameter and the xth DPD processor input signal of the N sets of predistortion parameters.
  • the xth DPD processor input signal is the xth DPD processor input signal of the N way DPD processor input signals.
  • the xth DPD processor digitally predistorts the input signal of the xth DPD processor according to the xth set of predistortion parameters to obtain an output signal of the xth DPD processor, wherein the xth DPD processor output signal is N
  • the xth DPD processor output signal in the output signal of the DPD processor, x is an integer, and the value is 1 to N.
  • the input signal of the xth DPD processor is the first baseband signal; when x is any one of 2 to N, the input signal of the xth DPD processor received by the xth DPD processor is specifically: The x-1th DPD processor output signal sent by the x-1th DPD processor of the N DPD processors, and the x-1th DPD processor output signal is the output signal of the Nth DPD processor output signal X-1 channel DPD processor output signal.
  • x is an integer and ranges from 1 to N.
  • the yth multiplier of the N-1 multipliers receives the yth DPD processor output signal transmitted by the yth DPD processor of the N DPD processors and the y+1th of the N DPD processors
  • the output signal of the y+1th DPD processor sent by the DPD processor multiplies the output signal of the yth DPD processor and the output signal of the y+1th DPD processor to obtain the second of the N baseband signals.
  • the y-channel DPD processor output signal is the y-channel DPD processor output signal in the N-channel DPD processor output signal
  • the y+1-channel DPD processor output signal is the N-channel DPD processor output signal.
  • the y+1 way DPD processor outputs the signal.
  • the yth multiplier transmits the yth second baseband signal to the second predistortion portion of the predistortion processing apparatus shown in FIG.
  • the yth multiplier transmits the yth second baseband signal to the predistortion processing device shown in FIG. A DAC in the DAC.
  • y is an integer and takes a value from 1 to N-1;
  • the xth DPD processor output signal in the N way DPD processor output signal is the xth second baseband signal in the N second baseband signal.
  • the xth DPD processor among the N DPD processors is further used to use the xth second baseband
  • the signal is sent to the second predistortion portion in the predistortion processing apparatus shown in FIG. 4; when the first predistortion portion shown in FIG. 7 is applied to the predistortion processing apparatus shown in FIG.
  • the xth DPD processor is further configured to send the xth second baseband signal to one of the DACs included in the predistortion processing apparatus shown in FIG.
  • the signal is pre-distorted by the DPD processor, and the signal is subjected to feedback multiplication by the multiplier to obtain N-channel pre-distorted processed signals.
  • the implementation is to reduce the nonlinear distortion more effectively and improve the amplification efficiency in a scene with obvious nonlinear distortion.
  • the first predistortion portion shown in FIG. 8 is a third implementation of the first predistortion portion of the predistortion processing apparatus shown in FIG. 4 or FIG. 5, and as shown in FIG. 8, the first predistortion portion includes N.
  • the xth DPD processor of the N DPD processors receives the xth set of predistortion parameters and the first baseband signal of the N sets of predistortion parameters, and performs digital predistortion on the first baseband signal according to the xth set of predistortion parameters Processing, obtaining the output signal of the xth DPD processor in the output signal of the N-channel DPD processor; wherein x is an integer, and the value is 1 to N.
  • the yth adder of the N-1 adders receives the yth DPD processor output signal sent by the yth DPD processor of the N DPD processors and the y+1th of the N DPD processors
  • the output signal of the y+1th DPD processor sent by the DPD processor adds the output signal of the yth DPD processor and the output signal of the y+1th DPD processor to obtain the second of the N baseband signals.
  • the y-channel DPD processor output signal is the y-channel DPD processor output signal in the N-channel DPD processor output signal
  • the y+1-channel DPD processor output signal is the N-channel DPD processor output signal.
  • the y+1 way DPD processor outputs the signal.
  • the yth adder transmits the yth second baseband signal to the predistortion processing device shown in FIG. The second predistortion portion.
  • the yth adder transmits the yth second baseband signal to the predistortion processing device shown in FIG. A DAC in the DAC.
  • the xth DPD processor output signal in the N way DPD processor output signal is the xth second baseband signal in the N second baseband signal.
  • the xth DPD processor among the N DPD processors is further used to use the xth second baseband
  • the signal is sent to the second predistortion portion in the predistortion processing apparatus shown in FIG. 4; when the first predistortion portion shown in FIG. 8 is applied to the predistortion processing apparatus shown in FIG.
  • the xth DPD processor is further configured to send the xth second baseband signal to one of the at least one DAC included in the predistortion processing apparatus shown in FIG. 5.
  • the signal is pre-distorted by the DPD processor, and the signal is fed back by the adder to obtain N signals subjected to pre-distortion processing.
  • the implementation is to reduce the nonlinear distortion more effectively and improve the amplification efficiency in a scene with obvious nonlinear distortion.
  • the first predistortion portion shown in FIG. 9 is a fourth implementation of the first predistortion portion of the predistortion processing apparatus shown in FIG. 4 or FIG. 5, and as shown in FIG. 9, the first predistortion portion includes N.
  • the xth DPD processor of the N DPD processors receives the xth pre-distortion parameter and the xth DPD processor input signal of the N sets of predistortion parameters.
  • the xth DPD processor input signal is the xth DPD processor input signal of the N way DPD processor input signals.
  • the xth DPD processor performs digital predistortion processing on the xth DPD processor input signal according to the xth set of predistortion parameters to obtain the xth second baseband signal in the Nth second baseband signal.
  • the xth DPD processor transmits the xth second baseband signal to the predistortion processing device shown in FIG. The second predistortion portion.
  • the xth DPD processor transmits the xth second baseband signal to the predistortion processing device shown in FIG. One DAC in the DAC.
  • the first baseband signal is the xth DPD processor input signal; when x is 2 to N, the xth channel DPD processor input and output signal is obtained by the corresponding adder of the L adders.
  • the pth adder of the L adders receives the second p-1 second baseband signal and N of the N second baseband signals transmitted by the 2p-1 DPD processors of the N DPD processors
  • the 2nd second baseband signal of the N second baseband signals transmitted by the 2pth DPD processor in the DPD processor adds the 2p-1th channel and the 2ndth second baseband signal to obtain N channels of DPD
  • the 2p+1 way and the 2p+2 way DPD processor input signals in the processor input signal that is, the 2p+1 way and the 2p+2 way DPD processor input signals are the same, the pth adder will be the 2p
  • the +1 channel and the 2p+2 channel DPD processor input signals are sent to the 2p+1th and 2p+2 DPD processors of the N DPD processors; wherein p is an integer ranging from 1 to L -1.
  • the Lth adder of the L adders receives the 2L-1 of the N second baseband signals transmitted by the 2L-1 DPD processors of the N DPD processors. a second baseband signal and a second baseband second baseband signal of the N second baseband signals transmitted by the second LDP processors of the N DPD processors, the second baseband of the second L-1 road and the second L2
  • the signals are added to obtain the input signals of the 2nd L+1 way and the 2nd L+2 DPD processors in the input signals of the N DPD processors, that is, the input signals of the 2L+1th and 2nd L+2 DPD processors are the same.
  • the 2L+1th channel and the 2nd L+2 channel DPD processor input signals are transmitted to the 2L+1th and 2L+2th DPD processors of the N DPD processors.
  • the Lth adder of the L adders receives the 2L- of the N second baseband signals transmitted by the 2L-1 DPD processors of the N DPD processors. a second baseband signal and a second baseband signal of the second L baseband signal transmitted by the second LPD processor of the N DPD processors, the second L-1 road and the second L road second The baseband signals are added to obtain a 2L+1-channel DPD processor input signal in the N-channel DPD processor input signal, and the 2L+1-channel DPD processor input signal is sent to the 2L in the N DPD processors. +1 DPD processors, where 2L+1 is equal to N.
  • the signal is pre-distorted by the DPD processor, and the signal is fed back by the adder to obtain N signals subjected to pre-distortion processing.
  • the implementation is to reduce the nonlinear distortion more effectively and improve the amplification efficiency in a scene with obvious nonlinear distortion.
  • the second predistortion portion shown in Fig. 10 is the second predistortion portion of the predistortion processing apparatus shown in Fig. 4 or Fig. 5.
  • the "N input signals” described in the second predistortion portion corresponding to FIG. 10 is the predistortion processing corresponding to FIG.
  • the device describes the "N-channel second baseband signal", the "network coefficient” described in the second pre-distortion portion corresponding to FIG. 10, that is, the "network coefficient" in the pre-distortion processing device corresponding to FIG. 4, and the second corresponding to FIG.
  • the "M-channel output signal” described in the pre-distortion portion that is, the "M-channel third baseband signal” is described in the pre-distortion processing device corresponding to FIG.
  • the "N input signals” described in the second predistortion portion corresponding to FIG. 10 is the predistortion processing corresponding to FIG.
  • the "N-way third baseband signal” is described in the apparatus, and the "network coefficient” described in the second pre-distortion portion corresponding to FIG. 10, that is, the "network coefficient” in the pre-distortion processing apparatus corresponding to FIG. 5, the second corresponding to FIG. "M described in the predistortion section"
  • the "road output signal”, that is, the pre-distortion processing device corresponding to FIG. 5, describes "M-channel fourth baseband signal".
  • the second predistortion portion includes W signal determining portions, and the eth signal determining portion of the W signal determining portions receives N input signals and network coefficients, and determines the first according to the N input signals and the network coefficients.
  • the second pre-distortion portion output signal of the e-path, the second pre-distortion portion output signal of the e-th channel corresponds to at least one of the M-channel output signals, and e is an integer, and the value is 1 to W, and W is less than or equal to M The integer.
  • the signal determination portion in the second predistortion portion is connected to the DAC in the predistortion processing device shown in FIG. If the e-signal determining portion is connected to a DAC, the function of the DAC includes receiving the t-th output signal in the M-channel output signal, and the e-th second pre-distortion portion output signal corresponds to the t-th path in the M-channel output signal
  • the output signal, that is, the second pre-distortion portion output signal of the e-th channel is the t-th output signal of the M-channel output signal
  • the e-th signal determining portion couples the t-th output signal to the DAC to which the signal determining portion is connected.
  • a mixing section is connected to a signal determining section.
  • W is equal to M; when a signal determining portion is connected to the plurality of mixing portions, W is smaller than M. If the e-th signal determining portion is connected to the t-th mixing portion of the M mixing portions in the pre-distortion processing device shown in FIG.
  • the e-th second pre-distortion portion output signal corresponds to the M-channel output signal
  • the t-th output signal that is, the second pre-distortion portion output signal of the e-th channel is the t-th output signal of the M-channel output signal
  • the e-th signal determining portion transmits the t-th output signal to the pre-show shown in FIG.
  • the t-th mixing portion of the M mixing sections in the distortion processing device Where t is an integer greater than or equal to 1 and less than or equal to M.
  • the N input signal is d_x, x is an integer, and the value is 1 to N, that is, the N input signals are d_1, d_2, ..., d_N;
  • the network coefficient is K, including N coefficients k_x, x It is an integer and takes a value from 1 to N, that is, the network coefficient K includes k_1, k_2, ..., k_N.
  • the ith signal determining portion included in the second predistortion portion linearly transforms d_1, d_2, ..., d_N and k_1, k_2, ..., k_N to obtain an output signal of the second predistortion portion of the eth path.
  • the linear transformation includes addition and multiplication operations.
  • the M-channel pre-distorted processed signal can be obtained by linear transformation, and the M-channel pre-distorted processed signal is approximately opposite to the amplification performance of the M PAs of the multi-antenna transmitting device.
  • the predistortion signal maintains a linear relationship between the preamplified signal and the amplified signal of the signal to be transmitted, which can improve the amplification efficiency of the PA of the multi-antenna transmitting device.
  • the pre-distortion processing device Compared with the pre-distortion processing device in the conventional multi-antenna transmitting device, the pre-distortion processing device provided by the embodiment of the present application reduces MN DPD processors, optimizes the structure of the pre-distortion processing device, and reduces design complexity, cost, and The power consumption, while taking into account the difference in the nonlinear characteristics of different PAs, ensures that the amplification function of the signals in each of the transmission channels in the multi-antenna transmission device is linear.
  • the feedback signal conversion portion of the predistortion processing device shown in FIG. 4 or FIG. 5 will be described below with reference to FIG. 4 or FIG. 5, and the feedback signal conversion portion is implemented in any of the following two implementation manners.
  • the "predistortion processing apparatus" described in the following two implementation modes is the predistortion processing apparatus corresponding to FIG.
  • the "predistortion processing apparatus” described in the following two implementation modes is the predistortion processing apparatus corresponding to FIG.
  • the first implementation of the feedback signal conversion section described above is that the feedback signal conversion section includes a coupling section, a mixing section, and an ADC.
  • the coupling portion receives the RF signal amplified by the R channel through the power amplifier, and obtains a coupled portion output signal according to the RF signal amplified by the R channel through the power amplifier, and sends the coupled portion output signal to the mixing portion.
  • the method for obtaining the output signal of one coupling portion according to the RF signal amplified by the R channel through the power amplifier can be commonly used by those skilled in the art. For example, a method of time division can select one of the RF signals amplified by the R channel through the power amplifier.
  • the signal is used as the output signal of the coupling part, and can also be passed through the power amplifier according to the R path by averaging.
  • the amplified RF signal obtains one signal as the output signal of the coupling portion, and can also obtain a signal as a coupling portion output signal according to the RF signal amplified by the R channel through the power amplifier by a linear combination method, and the like, which is not limited in this application.
  • the mixing portion of the feedback signal converting portion down-converts the coupling portion output signal according to the carrier signal to obtain a sixth baseband signal, and transmits the sixth baseband signal to the ADC of the feedback signal converting portion.
  • the ADC of the feedback signal converting portion converts the analog signal to the digital signal of the sixth baseband signal to obtain a fifth baseband signal, and transmits the fifth baseband signal to the solving portion of the predistortion processing device.
  • the carrier signal may be a carrier signal that is sent by the first oscillator of the predistortion processing device to the mixing portion of the feedback signal conversion portion.
  • the predistortion processing device may further include a second oscillator, and the carrier signal may also be a carrier signal that is sent by the second oscillator to the mixing portion of the feedback signal converting portion.
  • the RF signal amplified by the power amplifier can be fed back to the solution part of the predistortion processing device, so that the solution part can obtain the network coefficient and the N sets of predistortion parameters, which can support the first A predistortion portion and a second predistortion portion perform predistortion processing.
  • a second implementation of the feedback signal conversion portion is that the feedback signal conversion portion includes a coupling portion, a mixing portion, a clipper, and an ADC.
  • the coupling portion receives the RF signal amplified by the R path through the power amplifier, obtains a coupled portion output signal according to the RF signal amplified by the R channel through the power amplifier, and sends the coupled portion output signal to the mixing portion of the feedback signal conversion portion.
  • the method for obtaining the output signal of one coupling portion according to the RF signal amplified by the R path through the power amplifier may be a method commonly used by those skilled in the art, and the method is correspondingly described in the first implementation manner of the feedback signal conversion portion. No longer.
  • the mixing portion of the feedback signal converting portion down-converts the coupling portion output signal according to the carrier signal to obtain a sixth baseband signal, and transmits the sixth baseband signal to the clipper.
  • the clipper performs a clipping process on the sixth baseband signal to obtain a seventh baseband signal, and sends the seventh baseband signal to the ADC of the feedback signal conversion section.
  • the ADC of the feedback signal converting portion converts the analog signal to the digital signal of the seventh baseband signal to obtain a fifth baseband signal, and transmits the fifth baseband signal to the solving portion of the digital predistortion processing apparatus shown in FIG.
  • the carrier signal may be a carrier signal that is sent by the first oscillator of the predistortion processing device to the mixing portion of the feedback signal conversion portion.
  • the predistortion processing apparatus may further include a second oscillator, and the carrier signal may be a carrier signal that is sent by the second oscillator to the mixing portion of the feedback signal converting portion.
  • the second pre-distortion portion and the second pre-distortion portion can be pre-distorted by the second implementation of the feedback signal conversion portion.
  • a clipper is added to the second implementation of the feedback signal conversion portion. With the added clipper, when the amplitude of the signal is large, the signal can be limited to reduce the peak of the signal to the trough, and further, the signal amplitude or interference of the signal can be reduced. .
  • predistortion processing apparatus shown in FIG. 4 to FIG. 10 or the components included therein only include the key components for implementing the embodiments of the present application, and the various parts and/or devices may also be in accordance with the system. It is required to set other software and hardware processing modules, for example, between the PA and the antenna, a duplexer can be provided, a filter can be provided between the mixing section and the ADC, and the like.
  • the predistortion processing apparatus shown in FIGS. 4 to 10 or a component thereof may be a circuit.
  • This circuit can be implemented by a chip system.
  • the chip system may include: a central processing unit (CPU), a general-purpose processor, a network processor (NP), a digital signal processing (DSP), an application specific integrated circuit. (application-specific integrated circuit, ASIC for short), programmable logic device (PLD), transistor logic device, discrete device, hardware component, or any combination of the above.
  • the PLD may be a complex programmable logic device (CPLD), a field-programmable gate array (FPGA), a general array logic (GAL) or Any combination.
  • the chip system can implement or perform the various exemplary logical blocks, modules and circuits described in the present disclosure.
  • the chip system may also be a combination of computing functions, for example comprising at least one microprocessor combination, a combination of a DSP and a microprocessor, and the like.
  • the predistortion processing apparatus provided in the embodiment of the present application may be implemented by a combination of a baseband chip and a radio frequency chip.
  • the baseband chip is a device for processing a baseband signal in the above embodiment
  • the radio frequency chip is a device for processing a radio frequency signal in the above embodiment.
  • the radio frequency chip may further include a chip for processing the intermediate frequency signal and a chip for processing the radio frequency signal.
  • the foregoing mainly describes the predistortion processing apparatus provided by the embodiment of the present application, and the predistortion processing apparatus is a possible implementation of the predistortion processing method provided by the embodiment of the present application.
  • a method of predistortion processing provided by an embodiment of the present application will be described with reference to FIGS. 11 and 12.
  • FIG. 11 is a flowchart of a first pre-distortion processing method according to an embodiment of the present application.
  • the first predistortion processing method is a method corresponding to the first predistortion processing apparatus, that is, the first predistortion processing apparatus is a possible implementation of the first predistortion processing method.
  • step 1101 the first baseband signal is digitally predistorted according to the N sets of predistortion parameters to obtain N second baseband signals.
  • the first baseband signal described in the predistortion processing apparatus corresponding to FIG. 4 of the first baseband signal is not described herein.
  • the first baseband signal is digitally predistorted according to the N sets of predistortion parameters by any one of the following four processing methods to obtain N second baseband signals.
  • the second baseband signal of the N second baseband signals may be referred to as the xth second baseband signal of the N second baseband signals, where x is an integer ranging from 1 to N.
  • the first processing method of the above four processing methods is: x is an integer, and the value is 1 to N.
  • x is 1, the first baseband signal is performed according to the xth pre-distortion parameter of the N sets of predistortion parameters.
  • the digital predistortion process obtains the xth second baseband signal in the N second baseband signal.
  • x is any one of 2 to N, digital pre-distortion processing is performed on the x-1th second baseband signal of the N second baseband signal according to the xth pre-distortion parameter of the N sets of predistortion parameters, to obtain N The xth second baseband signal of the second baseband signal.
  • the second processing method of the above four processing methods is: x is an integer, and the value is 1 to N.
  • x is any integer from 1 to N, according to the xth set of predistortion in the N sets of predistortion parameters.
  • the parameter performs digital predistortion processing on the xth input signal of the N input signals to obtain the xth output signal of the N output signals.
  • x is 1, the xth input signal is the first baseband signal, and when x is any one of 2 to N, the xth input signal is the x-1th output signal of the N output signals.
  • the third processing method among the above four processing methods is: x is an integer, and the value is 1 to N.
  • x is any integer from 1 to N, according to the xth set of predistortion in the N sets of predistortion parameters.
  • the parameter performs digital predistortion processing on the xth input signal of the N input signals to obtain an xth output signal of the N output signals, wherein the xth input signal is the first baseband signal.
  • the xth and x+1th output signals of the N output signals are added to obtain the xth second baseband signal of the N second baseband signal;
  • the xth output signal of the N output signals is the xth second baseband signal of the N second baseband signals.
  • the fourth processing method of the above four processing methods is: x is an integer, and the value is 1 to N.
  • x is any one of 1 to N, according to the xth set of predistortion in the N sets of predistortion parameters.
  • the parameter performs digital predistortion processing on the xth input signal of the N input signals to obtain the xth second baseband signal of the N second baseband signal, wherein when x is 1 or 2, the xth input signal is a first baseband signal; when x is any one of 2 to N, the xth input signal is a signal obtained by adding the 2p-1th channel and the 2pth output signal of the N output signals, where p is equal to Yes ((x-2) /2) The value obtained by rounding up.
  • an M-way third baseband signal is determined based on the N-way second baseband signal and the network coefficient.
  • the third baseband signal of the tth channel in the third baseband signal of the M channel is determined by linearly transforming the N second baseband signal and the network coefficient.
  • t is an integer and takes a value from 1 to M.
  • the linear transformation includes multiplication and addition.
  • a fifth baseband signal is obtained based on the radio frequency signal amplified by the R path through the power amplifier.
  • the RF signal amplified by the R path through the power amplifier is the RF signal determined according to the M-channel third baseband signal described in step 1102. Converting the analog signal to the digital signal of the third baseband signal of the M channel, and obtaining the fourth baseband signal of the M channel, that is, converting the analog signal to the digital signal of the third baseband signal of the tth channel in the third baseband signal of the M channel, Obtaining a fourth baseband signal of the tth channel in the fourth baseband signal of the M channel; and upconverting the fourth baseband signal of the Mth channel according to the carrier signal to obtain a first radio frequency signal of the M channel, that is, the fourth baseband signal of the M channel according to the carrier signal
  • the fourth baseband signal of the tth road is upconverted to obtain the first radio frequency signal of the tth channel in the first radio frequency signal of the M channel; the power of the first radio frequency signal of the M channel is amplified, and the second path of the M channel is amplified by the power amplifier.
  • the radio frequency signal that is, the first radio frequency signal of the tth channel in the first radio frequency signal of the M channel is power amplified, and the second radio frequency signal of the tth channel of the second radio frequency signal amplified by the power amplifier is obtained.
  • t is an integer and ranges from 1 to M.
  • the R-channel amplified by the power amplifier described in this step is the R-channel second RF signal in the second RF signal of the M-channel, that is, the R-channel is amplified by the power amplifier according to the second RF signal of the M-channel.
  • the signal, R is an integer greater than or equal to 1 and less than or equal to M.
  • the fifth baseband signal can be obtained according to the second radio frequency signal amplified by the R path through the power amplifier according to any one of the following two methods.
  • the first method of the above two methods is: obtaining an output signal according to the second RF signal amplified by the R channel through the power amplifier, and down-converting the output signal according to the carrier signal to obtain a sixth baseband signal, for the sixth
  • the baseband signal converts the analog signal to the digital signal to obtain a fifth baseband signal.
  • the carrier signal in the embodiment of the present application is a carrier signal used when mixing a baseband signal or a radio frequency signal, and the baseband signal is up-converted according to the carrier signal to obtain a radio frequency signal, and the radio frequency signal is down-converted according to the carrier signal to obtain a baseband. signal.
  • the second method of the above two methods is: obtaining an output signal according to the second RF signal amplified by the R path through the power amplifier, and down-converting the output signal according to the carrier signal to obtain a sixth baseband signal, for the sixth
  • the baseband signal is subjected to clipping processing to obtain a seventh baseband signal, and the seventh baseband signal is converted from an analog signal to a digital signal to obtain a fifth baseband signal.
  • N sets of predistortion parameters and network coefficients are determined based on the fifth baseband signal.
  • the solution algorithm is obtained by series, parallel or series plus parallel sets of predistortion parameter solving algorithms. Based on the solution algorithm, the N sets of predistortion parameters described in step 1101 are determined according to the fifth baseband signal and described in step 1102. Network coefficient.
  • the predistortion parameter solving algorithm is corresponding to the predistortion processing device corresponding to FIG. 4 or FIG. 5, and details are not described herein again.
  • FIG. 12 is a flowchart of a second digital pre-distortion processing method according to an embodiment of the present application.
  • the second predistortion processing method is a method corresponding to the second predistortion processing apparatus, that is, the second predistortion processing apparatus is a possible implementation of the second predistortion processing method.
  • step 1201 the first baseband signal is digitally predistorted according to the N sets of predistortion parameters to obtain N second baseband signals.
  • step 1202 the N-channel second baseband signal is converted into a digital signal to an analog signal to obtain an N-way third baseband signal.
  • x is an integer and ranges from 1 to N.
  • an M-channel fourth baseband signal is obtained based on the N-way third baseband signal and the network coefficient.
  • the fourth baseband signal of the tth channel in the fourth baseband signal of the M channel is obtained by linearly transforming the third baseband signal of the Nth channel and the network coefficient, where t is an integer ranging from 1 to M, and the linear transformation includes multiplication And addition.
  • a fifth baseband signal is determined based on the RF signal amplified by the R path through the power amplifier.
  • the RF signal amplified by the R path through the power amplifier is the RF signal determined according to the M-channel fourth baseband signal described in step 1203. Up-converting the fourth baseband signal of the M channel according to the carrier signal, and obtaining the first radio frequency signal of the M channel, that is, up-converting the fourth baseband signal of the tth channel of the fourth baseband signal of the M channel according to the carrier signal, to obtain the first M-channel signal.
  • a radio frequency signal is subjected to power amplification to obtain a second radio frequency signal of the tth channel of the second radio frequency signal amplified by the power amplifier, wherein t is an integer ranging from 1 to M.
  • the R-channel amplified by the power amplifier described in this step is the R-channel second RF signal in the second RF signal of the M-channel, that is, the R-channel is amplified by the power amplifier according to the second RF signal of the M-channel.
  • the signal, R is an integer greater than or equal to 1 and less than or equal to M.
  • the method for obtaining the fifth baseband signal according to the radio frequency signal amplified by the R path through the power amplifier is the same as that described in step 1103 corresponding to FIG.
  • N sets of predistortion parameters and network coefficients are determined based on the fifth baseband signal.
  • the apparatus for performing the digital predistortion processing method provided by the embodiment of the present application may be a predistortion processing apparatus, for example, the predistortion processing apparatus shown in FIG. 4 to FIG. 10, or may be another apparatus in a system or a network device, such as a digital device. Processing device and/or medium RF processing device, etc.
  • the apparatus for performing the predistortion processing method provided by the embodiment of the present application may further include a memory for storing program instructions of the apparatus, or program instructions and data.
  • the memory includes a volatile memory such as a random-access memory (RAM); the memory may also include a non-volatile memory such as a flash memory.
  • the computer can be a general purpose computer, a special purpose computer, a computer network, a network device, a user device, or other programmable device.
  • the computer instructions can be stored in a computer readable storage medium or transferred from one computer readable storage medium to another computer readable storage medium, for example,
  • the computer instructions can be from a website site, computer, server or data center via wired (eg coaxial cable, fiber optic, digital subscriber line (DSL)) or wireless (eg infrared, wireless, microwave, etc.) Another website site, computer, server, or data center for transmission.
  • the computer readable storage medium can be any available media that can be accessed by a computer or a data storage device such as a server, data center, or the like that includes one or more available media.
  • the usable medium may be a magnetic medium (eg, a floppy disk, a hard disk, a magnetic tape), an optical medium (eg, a digital video disc (DVD), or a semiconductor medium (eg, SSD)).

Abstract

本申请提供了一种预失真处理方法和装置，其中，该装置包括第一预失真部分和第二预失真部分，第一预失真部分包括N个DPD处理器，通过第一预失真部分和第二预失真部分对信号进行预失真处理，以支持功率放大器对信号的线性放大。通过本申请提供的预失真处理装置，可以提高功率放大器的放大效率，降低预失真处理装置的设计复杂度，节省成本，降低功耗。

Description

预失真处理方法和装置 技术领域
本申请涉及通信技术领域，尤其涉及预失真处理方法和装置。
背景技术
无线通信系统的发射设备包括发送装置和天线，发送装置和天线连接。其中，发送装置包括若干个发射通道，发射通道中包括混频器和功率放大器(power amplifier，简称PA)。一个发射通道对应一个天线，该天线和发送装置连接。在发射设备进行数据发送时，在发射通道中，发送装置接收基带信号，通过混频器将基带信号转换为射频信号，通过PA对射频信号的功率进行放大得到放大后的射频信号，并将放大后的射频信号发送到该发射通道对应的天线，可以使该天线发送放大后的射频信号。发送装置通过PA对需要发送的信号的功率进行放大，可以使接收设备收到满意的接收电平，从而实现对接收信号的正确解调。示例性的，图1所示为PA的放大功能示意图。对于PA，称放大前的信号为PA的输入信号，放大后的信号为PA的输出信号，如图1所示，PA对输入信号的放大功能包括线性区域和非线性区域。在线性区域，PA的放大增益为常数，即输入信号和输出信号的功率比为常数，输入信号和输出信号的相位相同。在非线性区域，PA的放大功能会失真，即PA的放大增益随着输入信号功率的增加而减小，甚至出现PA无放大效果；且，输入信号和输出信号的相位也可能不同，即PA在非线性区域可能改变需要发送的信号的性质，会影响到该信号在接收端的解调性能。因此，当PA工作在非线性区域时放大效率会降低。
发明内容
本申请提供了几种预失真处理方法和装置，以提高功率放大器(power amplifier，简称PA)的效率。
第一方面，本申请提供了一种预失真处理装置，包括：第一预失真部分、第二预失真部分、反馈信号转换部分和解算部分；所述第一预失真部分，包括N个数字预失真(digital pre-distortion，简称DPD)处理器，用于接收第一基带信号和N套预失真参数，根据所述N套预失真参数对所述第一基带信号进行数字预失真处理，得到N路第二基带信号，将所述N路第二基带信号发送至所述第二预失真部分；所述第二预失真部分，用于接收所述N路第二基带信号和网络系数，根据所述N路第二基带信号和网络系数确定M路第三基带信号；反馈信号转换部分，用于接收R路经过功率放大器放大的射频信号，所述R路经过功率放大器放大的射频信号是根据所述M路第三基带信号得到的射频信号，将所述R路经过功率放大器放大的射频信号转换成第五基带信号，将所述第五基带信号发送至所述解算部分；所述解算部分，用于接收所述第一基带信号和所述第五基带信号，根据所述第一基带信号和所述第五基带信号确定所述N套预失真参数和所述网络系数，将所述N套预失真参数发送至所述第一预失真部分，将所述网络系数发送至所述第二预失真部分；其中，N、M和R为整数，N大于等于1，M大于等于N，R大于等于1且小于等于M。可选地，所述第一基带信号，可以是业务信号，也可以是专用于数字预失真处理的信号。相对于传统的多天线发送装置中的预失真处理装置，本申请实施例提供的第一种预失真处理装置可以减少DPD处理器的个数，优化了预 失真处理装置的结构，降低了设计复杂度、成本和功耗。进一步地，本申请实施例提供的第一种预失真处理装置考虑了不同PA的非线性特性的差异性，可以保证多天线发送装置中各发射通道中对信号的放大功能是线性的。
在第一个设计中，根据第一方面，所述第一预失真部分具体包括N个数字预失真DPD处理器，其中，所述N个DPD处理器中的第x个DPD处理器，用于接收所述N套预失真参数中的第x套预失真参数和第x路DPD处理器输入信号，根据所述第x套预失真参数对所述第x路DPD处理器输入信号进行数字预失真处理，得到所述N路第二基带信号中的第x路第二基带信号，将所述第x路第二基带信号发送至所述第二预失真部分；其中，x为整数，取值为1至N；当x为1时，所述第x路DPD处理器输入信号为所述第一基带信号；当x为2至N中任何一个时，所述第x路DPD处理器输入信号为所述N个DPD处理器中的第x-1个DPD处理器发送的第x-1路第二基带信号，所述第x-1路第二基带信号为所述N路第二基带信号中的第x-1路第二基带信号。第一方面的第一个设计中，通过DPD处理器的级联对信号进行预失真处理，得到N路经过预失真处理的信号，该实现方式设计相对简单，成本较低，功耗较低。
在第二个设计中，根据第一方面，所述第一预失真部分具体包括N个DPD处理器和N-1个乘法器，其中，所述N个DPD处理器中的第x个DPD处理器，用于接收所述N套预失真参数中的第x套预失真参数和N路DPD处理器输入信号中的第x路DPD处理器输入信号，根据所述第x套预失真参数对所述第x路DPD处理器输入信号进行数字预失真处理，得到N路DPD处理器输出信号中的第x路DPD处理器输出信号；其中，x为整数，取值为1至N；当x为1时，所述第x路DPD处理器输入信号为所述第一基带信号；当x为2至N中任何一个时，所述第x路DPD处理器输入信号为：所述N个DPD处理器中的第x-1个DPD处理器发送的第x-1路DPD处理器输出信号，其中，所述第x-1路DPD处理器输出信号为所述N路DPD处理器输出信号中的第x-1路DPD处理器输出信号；所述N-1个乘法器中的第y个乘法器，用于接收所述N个DPD处理器中的第y个DPD处理器发送的第y路DPD处理器输出信号和所述N个DPD处理器中的第y+1个DPD处理器发送的第y+1路DPD处理器输出信号，将所述第y路和第y+1路DPD处理器输出信号相乘，得到所述N路第二基带信号中的第y路第二基带信号，将所述第y路第二基带信号发送至所述所述第二预失真部分；其中，所述第y路DPD处理器输出信号为所述N路DPD处理器输出信号中的第y路DPD处理器输出信号，所述第y+1路DPD处理器输出信号为所述N路DPD处理器输出信号中的第y+1路DPD处理器输出信号，y为整数，取值为1至N-1；当x为N时，所述第x路DPD处理器输出信号为所述N路第二基带信号中的第x路第二基带信号，所述第x个DPD处理器还用于将所述第x路第二基带信号发送至所述所述第二预失真部分。第一方面的第二个设计中，通过DPD处理器对信号进行预失真处理，通过乘法器对信号进行反馈辅乘，得到N路经过预失真处理的信号。在对信号进行放大时，该实现方式以期在非线性失真明显的场景下，更有效地减少非线性失真，提高放大效率。
在第三个设计中，根据第一方面，所述所述第一预失真部分具体包括N个DPD处理器和N-1个加法器，其中，所述N个DPD处理器中的第x个DPD处理器，用于接收所述N套预失真参数中的第x套预失真参数和所述第一基带信号,根据所述第x套预失真参数对所述第一基带信号进行数字预失真处理，得到N路DPD处理器输出信号中的第x路DPD处理器输出信号；其中，x为整数，取值为1至N；所述N-1个加法器中的第y个加法器，用于接收所述N个DPD处理器中的第y个DPD处理器发送的第y路DPD处理器输出信号和所述N个DPD处理器中的第y+1个DPD处理器发送的第y+1路DPD处理器输出信号，将所述第y路和第y+1路DPD处理器输出信号相加，得到所述N路第二基带信号中的第y路第二基带信号，将所述第y路 第二基带信号发送至所述所述第二预失真部分；其中，所述第y路DPD处理器输出信号为所述N路DPD处理器输出信号中的第y路DPD处理器输出信号，所述第y+1路DPD处理器输出信号为所述N路DPD处理器输出信号中的第y+1路DPD处理器输出信号，y为整数，取值为1至N-1；当x为N时，所述第x路DPD处理器输出信号为所述N路第二基带信号中的第x路第二基带信号，所述第x个DPD处理器还用于将所述第x路第二基带信号发送至所述所述第二预失真部分。第一方面的第三个设计中，通过DPD处理器对信号进行预失真处理，通过加法器对信号进行反馈辅加，得到N路经过预失真处理的信号。在对信号进行放大时，该实现方式以期在非线性失真明显的场景下，更有效地减少非线性失真，提高放大效率。
在第四个设计中，根据第一方面，所述第一预失真部分具体包括N个DPD处理器和L个加法器，其中，L等于对((N-2)/2)进行上取整得到的值；所述N个DPD处理器中的第x个DPD处理器，用于接收所述N套预失真参数中的第x套预失真参数和N路DPD处理器输入信号中的第x路DPD处理器输入信号,根据所述第x套预失真参数对所述第x路DPD处理器输入信号进行数字预失真处理，得到所述N路第二基带信号中的第x路第二基带信号，将所述第x路第二基带信号发送至所述所述第二预失真部分；其中，x为整数，取值为1至N；所述L个加法器中的第p个加法器，用于接收所述N个DPD处理器中的第2p-1个DPD处理器发送的第2p-1路第二基带信号和所述N个DPD处理器中的第2p个DPD处理器发送的第2p路第二基带信号，将所述第2p-1路和第2p路第二基带信号相加，得到所述N路DPD处理器输入信号中的第2p+1路和第2p+2路DPD处理器输入信号，将所述第2p+1路和第2p+2路DPD处理器输入信号发送到所述N个DPD处理器中的第2p+1个和第2p+2个DPD处理器；其中，所述第2p-1路第二基带信号为所述N路第二基带信号中的第2p-1路第二基带信号，所述第2p路第二基带信号为所述N路第二基带信号中的第2p路第二基带信号，p为整数，取值为1至L-1；L为2的倍数，所述L个加法器中的第L个加法器，用于接收所述N个DPD处理器中的第2L-1个DPD处理器发送的第2L-1路第二基带信号和所述N个DPD处理器中的第2L个DPD处理器发送的第2L路第二基带信号，将所述第2L-1路和第2L路第二基带信号相加，得到所述N路DPD处理器输入信号中的第2L+1路和第2L+2路DPD处理器输入信号，将所述第2L+1路和第2L+2路DPD处理器输入信号发送到所述N个DPD处理器中的第2L+1个和第2L+2个DPD处理器；或者，L不为2的倍数，所述L个加法器中的第L个加法器，用于接收所述N个DPD处理器中的第2L-1个DPD处理器发送的第2L-1路第二基带信号和所述N个DPD处理器中的第2L个DPD处理器发送的第2L路第二基带信号，将所述第2L-1路和第2L路第二基带信号相加，得到所述N路DPD处理器输入信号中的第2L+1路DPD处理器输入信号，将所述第2L+1路DPD处理器输入信号发送到所述N个DPD处理器中的第2L+1个DPD处理器；其中，所述第2L-1路第二基带信号为所述N路第二基带信号中的第2L-1路第二基带信号，所述第2L路第二基带信号为所述N路第二基带信号中的第2L路第二基带信号，当x为1至2时，所述第一基带信号为所述第x路DPD处理器输入信号。第一方面的第四个设计中，通过DPD处理器对信号进行预失真处理，通过加法器对信号进行反馈辅加，得到N路经过预失真处理的信号。在对信号进行放大时，该实现方式以期在非线性失真明显的场景下，更有效地减少非线性失真，提高放大效率。
在第五个设计中，根据第一方面或第一方面中之前描述的任何一个设计，所述第二预失真部分包括W个信号确定部分，其中：所述W个信号确定部分中的第e信号确定部分，用于接收所述N路第二基带信号和所述网络系数,根据所述N路第二基带信号和所述网络系数确定第e路第二预失真部分输出信号，所述第e路第二预失真部分输出信号对应于所述M路第三 基带信号中的至少一路第三基带信号；其中，e为整数，取值为1至W。具体地，所述第e信号确定部分通过对所述N路第二基带信号和所述网络系数进行线性变换，得到所述第e路第二预失真部分输出信号。第一方面的第五个设计中，可以通过线性变换得到M路经过预失真处理的信号，该M路经过预失真处理的信号为和多天线发送装置的M个PA的放大性能相反的预失真信号，使得需要发送的信号的放大前信号和放大后信号保持线性关系，可以提高多天线发送装置的PA的放大效率。相对于传统的多天线发送装置中的预失真处理装置，本申请实施例提供的预失真处理装置减少了M-N个DPD处理器，优化了预失真处理装置的结构，降低了设计复杂度、成本和功耗，同时又考虑了不同PA的非线性特性的差异性，可以保证多天线发送装置中各发射通道中对信号的放大功能是线性的。
在第六个设计中，根据第一方面或第一方面中之前描述的任何一个设计，所述反馈信号转换部分，包括：耦合部分、混频部分和模数转换器ADC，其中：所述耦合部分，用于接收所述R路经过功率放大器放大的射频信号，根据所述R路经过功率放大器放大的射频信号得到一路耦合部分输出信号，将所述一路耦合部分输出信号发送至所述混频部分；所述混频部分，用于接收载波信号和所述一路耦合部分输出信号，根据所述载波信号对所述一路耦合部分输出信号进行下变频，得到第六基带信号，将所述第六基带信号发送至所述ADC；所述ADC，用于对所述第六基带信号进行模拟信号到数字信号的转换，得到所述第五基带信号，将所述第五基带信号发送至所述解算部分。通过第一方面的第六个设计，可以将经过功率放大器放大的射频信号反馈至预失真处理装置的解算部分，使得解算部分可以得到网络系数和N套预失真参数，可以支持第一预失真部分和第二预失真部分进行预失真处理。
在第七个设计中，根据第一方面或第一方面中第一个设计至第五个设计中的任何一个设计，所述反馈信号转换部分，包括：耦合部分、混频部分、削波器和ADC，其中：所述耦合部分，用于接收所述R路经过功率放大器放大的射频信号，根据所述R路经过功率放大器放大的射频信号得到一路耦合部分输出信号，将所述一路耦合部分输出信号发送至所述混频部分；所述混频部分，用于接收载波信号和所述一路耦合部分输出信号，根据所述载波信号对所述一路耦合部分输出信号进行下变频，得到第六基带信号，将所述第六基带信号发送至所述削波器；所述削波器，用于对所述第六基带信号进行限幅处理，得到第七基带信号，将所述第七基带信号发送至所述ADC；所述ADC，用于对所述第七基带信号进行模拟信号到数字信号的转换，得到所述第五基带信号，将所述第五基带信号发送至所述解算部分。相对第一方面的第六个设计，第一方面的第七个设计中增加了削波器。通过该增加的削波器，当信号的幅度较大时，可以对信号进行限幅处理，降低信号的波峰对波谷的干扰，进一步地，还可以降低过强的信号幅度或干扰对ADC的损伤。
第二方面，本申请提供了一种装置，包括：第一方面或第一方面中第一个设计至第五个设计中的任何一个设计，和至少一个DAC；所述第二预失真部分还用于将所述M路第三基带信号中的第t路第三基带信号发送至所述至少一个DAC中的一个DAC；所述至少一个DAC中的所述一个DAC，用于对所述第t路第三基带信号进行数字信号到模拟信号的转换，得到M路第四基带信号中的第t路第四基带信号。
第三方面，本申请提供了一种装置，包括：第二方面、振荡器和M个混频部分；所述至少一个DAC中的所述一个DAC还用于将所述M路第四基带信号中的第t路第四基带信号发送至所述M个混频部分中的第t个混频部分；所述振荡器用于生成载波信号，将所述载波信号发送至所述M个混频部分；所述M个混频部分中的第t个混频部分，用于根据所述载波信号对所述第t路第四基带信号进行上变频，得到M路第一射频信号中的第t路第一射频信号； 其中，t为整数，取值为1至M。
第四方面，本申请提供了一种装置，包括：第一方面中第六个设计或第七个设计，和至少一个DAC；所述第二预失真部分同第二方面的第二预失真部分，所述至少一个DAC同第二方面的所述至少一个DAC。
第五方面，本申请提供了一种装置，包括：第四方面，振荡器和M个混频部分，其中：所述至少一个DAC中的所述一个DAC还用于将所述M路第四基带信号中的第t路第四基带信号发送至所述M个混频部分中的第t个混频部分；所述振荡器，用于生成载波信号，将所述载波信号发送至所述M个混频部分和所述反馈信号转换部分包括的所述混频部分；所述M个混频部分中的第t个混频部分，用于根据所述载波信号对所述第t路第四基带信号进行上变频，得到M路第一射频信号中的第t路第一射频信号；其中，t为整数，取值为1至M。
第六方面，本申请提供了一种预失真处理装置，包括：第一预失真部分、至少一个DAC、第二预失真部分、反馈信号转换部分和解算部分；所述第一预失真部分，包括N个DPD处理器，用于接收第一基带信号和N套预失真参数，根据所述N套预失真参数对所述第一基带信号进行数字预失真处理，得到N路第二基带信号，将所述N路第二基带信号发送至所述至少一个DAC；所述至少一个DAC，用于对所述N路第二基带信号进行数字信号到模拟信号的转换，得到N路第三基带信号，将所述N路第三基带信号发送至所述第二预失真部分；所述第二预失真部分，用于接收所述N路第三基带信号和网络系数，根据所述N路第三基带信号和所述网络系数确定M路第四基带信号；所述反馈信号转换部分，用于接收R路经过功率放大器放大的射频信号，所述R路经过功率放大器放大的射频信号是根据所述M路第四基带信号得到的射频信号，将所述R路经过功率放大器放大的射频信号转换成第五基带信号，将所述第五基带信号发送至所述解算部分,R为大于等于1且小于等于M的整数；所述解算部分，用于接收所述第一基带信号和所述第五基带信号，根据所述第一基带信号和所述第五基带信号确定所述N套预失真参数和所述网络系数，将所述N套预失真参数发送至所述第一预失真部分，将所述网络系数发送至所述第二预失真部分；其中，N和M为整数，N大于1，M大于等于N。可选地，所述第一基带信号，可以是业务信号，也可以是专用于数字预失真处理的信号。在第六方面的装置中，通过第一预失真部分和第二预失真部分实现预失真处理功能，用于提高多天线发送装置中的PA的放大效率。该预失真处理装置既可以降低设计复杂度、成本和功耗，又可以保证多天线发送装置中各发射通道中对信号的放大功能是线性的。
在第一个设计中，根据第六方面，所述第一预失真部分具体包括N个DPD处理器，其中，所述N个DPD处理器中的第x个DPD处理器，用于接收所述N套预失真参数中的第x套预失真参数和第x路DPD处理器输入信号，根据所述第x套预失真参数对所述第x路DPD处理器输入信号进行数字预失真处理，得到所述N路第二基带信号中的第x路第二基带信号，将所述第x路第二基带信号发送至所述至少一个DAC中的一个DAC；其中，x为整数，取值为1至N；当x为1时，所述第x路DPD处理器输入信号为所述第一基带信号；当x为2至N中任何一个时，所述第x路DPD处理器输入信号为所述N个DPD处理器中的第x-1个DPD处理器发送的第x-1路第二基带信号，所述第x-1路第二基带信号为所述N路第二基带信号中的第x-1路第二基带信号。第六方面的第一个设计中，通过DPD处理器的级联对信号进行预失真处理，得到N路经过预失真处理的信号，该实现方式设计相对简单，成本较低，功耗较低。
在第二个设计中，根据第六方面，所述第一预失真部分具体包括N个DPD处理器和N-1个乘法器，其中：所述N个DPD处理器中的第x个DPD处理器，用于接收所述N套预失真参数中的第x套预失真参数和N路DPD处理器输入信号中的第x路DPD处理器输入信号，根据 所述第x套预失真参数对所述第x路DPD处理器输入信号进行数字预失真处理，得到N路DPD处理器输出信号中的第x路DPD处理器输出信号；其中，x为整数，取值为1至N；当x为1时，所述第x路DPD处理器输入信号为所述第一基带信号；当x为2至N中任何一个时，所述第x路DPD处理器输入信号为：所述N个DPD处理器中的第x-1个DPD处理器发送的第x-1路DPD处理器输出信号，其中，所述第x-1路DPD处理器输出信号为所述N路DPD处理器输出信号中的第x-1路DPD处理器输出信号；所述N-1个乘法器中的第y个乘法器，用于接收所述N个DPD处理器中的第y个DPD处理器发送的第y路DPD处理器输出信号和所述N个DPD处理器中的第y+1个DPD处理器发送的第y+1路DPD处理器输出信号，将所述第y路和第y+1路DPD处理器输出信号相乘，得到所述N路第二基带信号中的第y路第二基带信号，将所述第y路第二基带信号发送至所述至少一个DAC中的一个DAC；其中，所述第y路DPD处理器输出信号为所述N路DPD处理器输出信号中的第y路DPD处理器输出信号，所述第y+1路DPD处理器输出信号为所述N路DPD处理器输出信号中的第y+1路DPD处理器输出信号，y为整数，取值为1至N-1；当x为N时，所述第x路DPD处理器输出信号为所述N路第二基带信号中的第x路第二基带信号，所述第x个DPD处理器还用于将所述第x路第二基带信号发送至所述至少一个DAC中的一个DAC。第六方面的第二个设计中，通过DPD处理器对信号进行预失真处理，通过乘法器对信号进行反馈辅乘，得到N路经过预失真处理的信号。在对信号进行放大时，该实现方式以期在非线性失真明显的场景下，更有效地减少非线性失真，提高放大效率。
在第三个设计中，根据第六方面，所述所述第一预失真部分具体包括N个DPD处理器和N-1个加法器，其中：所述N个DPD处理器中的第x个DPD处理器，用于接收所述N套预失真参数中的第x套预失真参数和所述第一基带信号,根据所述第x套预失真参数对所述第一基带信号进行数字预失真处理，得到N路DPD处理器输出信号中的第x路DPD处理器输出信号；其中，x为整数，取值为1至N；所述N-1个加法器中的第y个加法器，用于接收所述N个DPD处理器中的第y个DPD处理器发送的第y路DPD处理器输出信号和所述N个DPD处理器中的第y+1个DPD处理器发送的第y+1路DPD处理器输出信号，将所述第y路和第y+1路DPD处理器输出信号相加，得到所述N路第二基带信号中的第y路第二基带信号，将所述第y路第二基带信号发送至所述至少一个DAC中的一个DAC；其中，所述第y路DPD处理器输出信号为所述N路DPD处理器输出信号中的第y路DPD处理器输出信号，所述第y+1路DPD处理器输出信号为所述N路DPD处理器输出信号中的第y+1路DPD处理器输出信号，y为整数，取值为1至N-1；当x为N时，所述第x路DPD处理器输出信号为所述N路第二基带信号中的第x路第二基带信号，所述第x个DPD处理器还用于将所述第x路第二基带信号发送至所述至少一个DAC中的一个DAC。第六方面的第三个设计中，通过DPD处理器对信号进行预失真处理，通过加法器对信号进行反馈辅加，得到N路经过预失真处理的信号。在对信号进行放大时，该实现方式以期在非线性失真明显的场景下，更有效地减少非线性失真，提高放大效率。
在第四个设计中，根据第六方面，所述第一预失真部分包括具体N个DPD处理器和L个加法器，其中，L等于对((N-2)/2)进行上取整得到的值；所述N个DPD处理器中的第x个DPD处理器，用于接收所述N套预失真参数中的第x套预失真参数和N路DPD处理器输入信号中的第x路DPD处理器输入信号,根据所述第x套预失真参数对所述第x路DPD处理器输入信号进行数字预失真处理，得到所述N路第二基带信号中的第x路第二基带信号，将所述第x路第二基带信号发送至所述至少一个DAC中的一个DAC；其中，x为整数，取值为1至N； 所述L个加法器中的第p个加法器，用于接收所述N个DPD处理器中的第2p-1个DPD处理器发送的第2p-1路第二基带信号和所述N个DPD处理器中的第2p个DPD处理器发送的第2p路第二基带信号，将所述第2p-1路和第2p路第二基带信号相加，得到所述N路DPD处理器输入信号中的第2p+1路和第2p+2路DPD处理器输入信号，将所述第2p+1路和第2p+2路DPD处理器输入信号发送到所述N个DPD处理器中的第2p+1个和第2p+2个DPD处理器；其中，所述第2p-1路第二基带信号为所述N路第二基带信号中的第2p-1路第二基带信号，所述第2p路第二基带信号为所述N路第二基带信号中的第2p路第二基带信号，p为整数，取值为1至L-1；L为2的倍数，所述L个加法器中的第L个加法器，用于接收所述N个DPD处理器中的第2L-1个DPD处理器发送的第2L-1路第二基带信号和所述N个DPD处理器中的第2L个DPD处理器发送的第2L路第二基带信号，将所述第2L-1路和第2L路第二基带信号相加，得到所述N路DPD处理器输入信号中的第2L+1路和第2L+2路DPD处理器输入信号，将所述第2L+1路和第2L+2路DPD处理器输入信号发送到所述N个DPD处理器中的第2L+1个和第2L+2个DPD处理器；或者，L不为2的倍数，所述L个加法器中的第L个加法器，用于接收所述N个DPD处理器中的第2L-1个DPD处理器发送的第2L-1路第二基带信号和所述N个DPD处理器中的第2L个DPD处理器发送的第2L路第二基带信号，将所述第2L-1路和第2L路第二基带信号相加，得到所述N路DPD处理器输入信号中的第2L+1路DPD处理器输入信号，将所述第2L+1路DPD处理器输入信号发送到所述N个DPD处理器中的第2L+1个DPD处理器；其中，所述第2L-1路第二基带信号为所述N路第二基带信号中的第2L-1路第二基带信号，所述第2L路第二基带信号为所述N路第二基带信号中的第2L路第二基带信号，当x为1至2时，所述第一基带信号为所述第x路DPD处理器输入信号。第六方面的第四个设计中，通过DPD处理器对信号进行预失真处理，通过加法器对信号进行反馈辅加，得到N路经过预失真处理的信号。在对信号进行放大时，该实现方式以期在非线性失真明显的场景下，更有效地减少非线性失真，提高放大效率。
在第五个设计中，根据第六方面或第六方面中之前描述的任何一个设计，所述第二预失真部分包括W个信号确定部分，其中：所述W个信号确定部分中的第e信号确定部分，用于接收所述N路第三基带信号和所述网络系数,根据所述N路第三基带信号和所述网络系数确定第e路第二预失真部分输出信号，所述第e路第二预失真部分输出信号对应于所述M路第四基带信号中的至少一路第四基带信号；其中，t为整数，取值为1至M。具体地，所述第e信号确定部分通过对所述N路第三基带信号和所述网络系数进行线性变换，得到所述第e路第二预失真部分输出信号。第六方面的第五个设计的技术效果同第一方面的第五个设计。
在第六个设计中，根据第六方面或第六方面中之前描述的任何一个设计，所述反馈信号转换部分同第一方面的第六个设计。
在第七个设计中，根据第六方面或第六方面中第一个设计至第五个设计中的任何一个设计，所述反馈信号转换部分同第一方面的第七个设计。
第七方面，本申请提供了一种装置，包括：第六方面或第六方面中第一个设计至第五个设计中的任何一个设计，振荡器和M个混频部分，其中：所述第二预失真部分还用于将所述M路第四基带信号中的第t路第四基带信号发送至所述M个混频部分中的第t个混频部分；所述振荡器，用于生成载波信号，将所述载波信号发送至所述M个混频部分；所述M个混频部分中的第t个混频部分，用于根据所述载波信号对所述第t路第四基带信号进行上变频，得到M路第一射频信号中的第t路第一射频信号；其中，t为整数，取值为1至M。
第八方面，本申请提供了一种装置，包括：第六方面中第六个设计或第七个设计，振荡 器和M个混频部分，其中：所述第二预失真部分还用于将所述M路第四基带信号中的第t路第四基带信号发送至所述M个混频部分中的第t个混频部分；所述振荡器，用于生成载波信号，将所述载波信号发送至所述M个混频部分和所述反馈信号转换部分包括的所述混频部分；所述M个混频部分中的第t个混频部分，用于根据所述载波信号对所述第t路第四基带信号进行上变频，得到M路第一射频信号中的第t路第一射频信号；其中，t为整数，取值为1至M。
第九方面，本申请提供了一种装置，包括：第三方面、第五方面、第七方面或第八方面的任何一个方面和M个功率放大器PA，其中：所述M个混频部分中的第t个混频部分还用于将所述M路第一射频信号中的第t路第一射频信号发送至所述M个PA中的第t个PA；所述M个PA中的第t个PA，用于将所述第t路第一射频信号进行放大，得到M路第二射频信号中的第t路第二射频信号，将所述第t路第二射频信号发送至反馈信号转换部分,作为所述反馈信号转换部分接收的所述R路经过功率放大器放大的射频信号中的一路经过功率放大器放大的射频信号；其中，t为整数，取值为1至M。
第十方面，本申请提供了一种设备，包括：第九方面和M个天线，其中：所述M个PA中的第t个PA还用于将所述第t路第二射频信号发送至所述M个天线中的第t个天线；所述M个天线的第t个天线用于发送所述第t路第二射频信号；其中，t为整数，取值为1至M。
第十一方面，本申请提供了一种芯片系统，该芯片系统可以为上述任一种装置。该芯片系统可以由芯片构成，也可以包含芯片和其他分立器件。所述芯片，可以是一种专用集成电路(application-specific integrated circuit，简称ASIC)，也可以是其他形式的芯片。可选的，所述芯片系统还可以包含处理器，用于支持预失真处理装置实现上述方面中所涉及的功能。在一种可能的设计中，所述芯片系统还包括存储器，所述存储器，用于存储预失真处理装置必要的程序指令和数据。
第十二方面，本申请提供了一种数字预失真方法，包括：根据N套预失真参数对第一基带信号进行数字预失真处理，得到N路第二基带信号；根据所述N路第二基带信号和网络系数确定M路第三基带信号；根据R路经过功率放大器放大的射频信号得到第五基带信号，其中，所述R路经过功率放大器放大的射频信号是根据所述M路第三基带信号确定的；根据所述第一基带信号和所述第五基带信号确定所述N套预失真参数和所述网络系数；其中，N、M和R为整数，N大于1，M大于等于N。
在第一个设计中，根据第十二方面，根据N套预失真参数对第一基带信号进行数字预失真处理，得到N路第二基带信号，包括：x为整数，取值为1至N；当x为1时，根据所述N套预失真参数的第x套预失真参数对所述第一基带信号进行数字预失真处理，得到所述N路第二基带信号的第x路第二基带信号；当x为2至N中任何一个整数时，根据所述N套预失真参数的第x套预失真参数对所述N路第二基带信号的第x-1路第二基带信号进行进行数字预失真处理，得到所述N路第二基带信号的第x路第二基带信号。
在第二个设计中，根据第十二方面，根据N套预失真参数对第一基带信号进行数字预失真处理，得到N路第二基带信号，包括：x为整数，取值为1至N；当x为1至N中任何一个整数时，根据所述N套预失真参数中的第x套预失真参数对N路输入信号的第x路输入信号进行数字预失真处理，得到N路输出信号的第x路输出信号，其中，当x为1时，所述第x路输入信号为所述第一基带信号，当x为2至N中任何一个整数时，所述第x路输入信号为所述N路输出信号的第x-1路输出信号；当x为1至N-1中任何一个整数时，将所述N路输出信号的第x路和第x+1路输出信号相乘，得到所述N路第二基带信号的第x路第二基带信 号；当x为N时，所述N路输出信号的第x路输出信号为所述N路第二基带信号的第x路第二基带信号。
在第三个设计中，根据第十二方面，根据N套预失真参数对第一基带信号进行数字预失真处理，得到N路第二基带信号，包括：x为整数，取值为1至N；当x为1至N中任何一个整数时，根据所述N套预失真参数中的第x套预失真参数对N路输入信号的第x路输入信号进行数字预失真处理，得到N路输出信号的第x路输出信号，其中，所述第x路输入信号为所述第一基带信号；当x为1至N-1中任何一个整数时，将所述N路输出信号的第x路和第x+1路输出信号相加，得到所述N路第二基带信号的第x路第二基带信号；当x为N时，所述N路输出信号的第x路输出信号为所述N路第二基带信号的第x路第二基带信号。
在第四个设计中，根据第十二方面，根据N套预失真参数对第一基带信号进行数字预失真处理，得到N路第二基带信号，包括：x为整数，取值为1至N；当x为1至N中任何一个整数时，根据所述N套预失真参数中的第x套预失真参数对N路输入信号的第x路输入信号进行数字预失真处理，得到所述N路第二基带信号的第x路第二基带信号，其中：当x为1或2时，所述第x路输入信号为所述第一基带信号；当x为2至N中任何一个整数时，所述第x路输入信号为将所述N路输出信号的第2p-1路和第2p路输出信号相加得到的信号，其中p等于对((x-2)/2)进行上取整得到的值。
在第五个设计中，根据第十二方面或第十二方面中任何一个设计，根据所述N路第二基带信号和网络系数确定M路第三基带信号，包括：根据所述N路第二基带信号和所述网络系数，确定M路第三基带信号中的第t路第三基带信号，其中，t为整数，取值为1至M。
在第六个设计中，根据第十二方面或第十二方面中任何一个设计，还包括：对所述M路第三基带信号中的第t路第三基带信号进行模拟信号到数字信号的转换，得到M路第四基带信号中的第t路第四基带信号；根据载波信号所述第t路第四基带信号进行上变频，得到M路第一射频信号中的第t路第一射频信号；对所述第t路第一射频信号进行功率放大，得到所述M路经过功率放大器放大的射频信号中的第t路射频信号；t为整数，取值为1至M。
在第七个设计中，根据第十二方面或第十二方面中任何一个设计，根据R路经过功率放大器放大的射频信号得到第五基带信号，包括：根据所述R路经过功率放大器放大的射频信号得到一路输出信号；根据载波信号对所述一路输出信号进行下变频，得到第六基带信号；对所述第六基带信号进行模拟信号到数字信号的转换，得到第五基带信号。
在第八个设计中，根据第十二方面或第十二方面第一个设计至第六个设计中任何一个设计，根据R路经过功率放大器放大的射频信号得到第五基带信号，包括：根据所述R路经过功率放大器放大的射频信号得到一路输出信号；根据载波信号对所述一路输出信号进行下变频，得到第六基带信号；对所述第六基带信号进行限幅处理，得到第七基带信号；对所述第七基带信号进行模拟信号到数字信号的转换，得到第五基带信号。
第十三方面，本申请提供了一种数字预失真方法，包括：根据N套预失真参数对第一基带信号进行数字预失真处理，得到N路第二基带信号；对所述N路第二基带信号进行数字信号到模拟信号的转换，得到N路第三基带信号；根据所述N路第三基带信号和网络系数确定M路第四基带信号；根据R路经过功率放大器放大的射频信号确定第五基带信号，其中，所述R路经过功率放大器放大的射频信号是根据所述M路第四基带信号确定的；根据所述第一基带信号和所述第五基带信号确定所述N套预失真参数和所述网络系数；其中，N、M和R为整数，N大于1，M大于等于N，R大于等于1且小于等于M。
在第一个设计中，根据第十三方面，根据N套预失真参数对第一基带信号进行数字预失 真处理得到N路第二基带信号的方法同第十二方面中第一个设计至第四个设计中任何一个设计。
在第二个设计中，根据第十三方面或第十三方面的第一个设计，根据所述N路第三基带信号和网络系数确定M路第四基带信号，包括：根据所述N路第三基带信号和所述网络系数，确定所述M路第四基带信号中的第t路第四基带信号，其中，t为整数，取值为1至M。
在第三个设计中，根据第十三方面、第十三方面第一个设计或第十三方面第二个设计，还包括：根据载波信号对M路第四基带信号的第t路第四基带信号进行上变频，得到M路第一射频信号中的第t路第一射频信号；对M路第一射频信号中的第t路第一射频信号进行功率放大，得到所述M路经过功率放大器放大的射频信号中的第t路射频信号。
在第四个设计中，根据第十三方面或第十三方面第一个设计至第三个设计中任何一个设计，根据R路经过功率放大器放大的射频信号确定第五基带信号的方法同第十二方面第七个设计或第八个设计中任何一个设计。
第十四方面，本申请实施例提供了一种预失真处理装置，该预失真处理装置具有实现第十二方面、第十二方面的各设计、第十三方面和第十三方面的各设计中任一种方法的功能。所述功能可以通过硬件实现，也可以通过硬件执行相应的软件实现。所述硬件或软件包括一个或多个与上述功能相对应的模块。
第十五方面，本申请实施例提供了一种计算机存储介质，用于存储上述预失真处理装置所用的计算机软件指令，其包含用于执行上述方面所设计的程序。
附图说明
为了更清楚地说明本申请实施例或背景技术中的技术方案，下面将对本申请实施例或背景技术中所需要使用的附图进行说明。
图1是功率放大器的放大功能示意图；
图2是本申请实施例提供的一种预失真处理装置结构示意图；
图3是本申请实施例提供的一种发射设备的结构示意图；
图4是本申请实施例提供的第一种预失真处理装置结构示意图；
图5是本申请实施例提供的第二种预失真处理装置结构示意图；
图6是本申请实施例提供的第一预失真部分的第一种结构示意图；
图7是本申请实施例提供的第一预失真部分的第二种结构示意图；
图8是本申请实施例提供的第一预失真部分的第三种结构示意图；
图9是本申请实施例提供的第一预失真部分的第四种结构示意图；
图10是本申请实施例提供的第二预失真部分的结构示意图；
图11为本申请实施例提供的第一种预失真处理方法的流程图；
图12为本申请实施例提供的第二种预失真处理方法的流程图。
具体实施方式
下面将结合附图对本申请实施例进行描述。
本申请实施例描述的网络架构和业务场景是为了更加清楚的说明本申请实施例的技术方案，并不构成对本申请实施例提供的技术方案的限定，随着网络架构的演变和新业务场景的 出现，本申请实施例提供的技术方案对于类似的技术问题，同样适用。
本申请实施例提供的技术方案可应用于各种通信系统中,例如：全球移动通信系统(global system for mobile communication，简称GSM)，码分多址(code division multiple access，简称CDMA)系统、宽带码分多址(wideband code division multiple access，简称WCDMA)系统、时分同步码分多址(time division-synchronous code division multiple access，简称TD-SCDMA)系统、通用移动通信系统(universal mobile telecommunications system，简称UMTS)、长期演进(long term evolution，简称LTE)系统、第五代移动通信技术(the fifth generation mobile communication technology，简称5G)系统等。随着通信技术的不断发展，本申请实施例提供的技术方案还可应用于未来网络。进一步的，本申请实施例提供的技术方案还可以应用于其它需要实现预失真处理的通信系统。本申请实施例中，术语“系统”和“网络”的范围类似。在通信系统中，应用本申请实施例提供的技术方案的设备为发射设备，该发射设备可以是网络设备，也可以是用户设备。其中，发射设备也可以称为发送设备。
本申请实施例涉及的用户设备(user equipment，简称UE)包括具有无线通信功能的手持式设备、车载设备、可穿戴设备、计算设备或连接到无线调制解调器的其它处理设备。用户设备还可以称为终端(terminal)、移动台(mobile station，简称MS)、移动终端(mobile terminal，简称MT)、用户终端(user terminal，简称UT)、用户代理(user agent，简称UA)或终端设备(terminal equipment，简称TE)等，本申请不做限定。
本申请实施例涉及的网络设备包括基站(base station，简称BS)、网络控制器、移动交换中心或者其它接入网设备。其中，基站包括各种形式的宏基站，微基站，中继站，接入点等等。例如，基站可以是GSM或CDMA中的基站：基站收发台(base transceiver station，简称BTS)；也可以是WCDMA中的基站：NodeB；还可以是LTE中的演进型基站：eNB或e-NodeB(evolutional Node B)；还可以是5G系统中的基站,5G系统中的基站可以称为发送接收点TRP(transmission reception point，简称TRP)，也可以称为gNB(generation Node B，简称gNB)或其它名称；进一步地，基站还可以是未来网络中的基站，本申请不做限定。
本申请实施例提供了几种预失真处理方法和相应的预失真处理装置。该方法或装置可以应用于发射设备中，进一步地，可以应用于发射设备的发送装置中，以期减少PA在非线性区域放大功能的失真。
在发射设备的发送装置中，为了克服功率放大器(power amplifier，简称PA)在非线性区域放大功能的失真，发送装置包括预失真处理装置，预失真处理装置包括数字预失真(digital pre-distortion，简称DPD)处理器，用于产生与PA的放大性能相反的预失真信号，使得需要发送的信号的放大前信号和放大后信号保持线性关系。示例性的，图2是一种预失真处理装置的结构示意图，如图2中所示，该预失真处理装置包括：DPD处理器、数模转换器(digital to analog converter，简称DAC)、第一混频部分、振荡器、第二混频部分、削波器、模数转换器(analog to digital converter，简称ADC)和预失真参数确定部分。为了示意信号流向和预失真处理装置对信号的处理过程，图2中还示出了PA和天线。对于图2示出的预失真处理装置，信号的处理过程为：DPD处理器接收第一基带信号和预失真参数确定部分发送的预失真参数，根据预失真参数和预失真处理算法对第一基带信号进行预失真处理，得到第二基带信号，将其发送到DAC；DAC对第二基带信号进行数字信号到模拟信号的转换，得到第三基带信号，将其发送到第一混频部分；振荡器生成载波信号，将其发送到第一混频部分和第二混频部分；第一混频部分根据载波信号对第三基带信号进行上变频， 得到第一射频信号，将其发送到PA；PA对第一射频信号进行放大，得到第二射频信号，将其发送到天线以及将其反馈到第二混频部分；天线将第二射频信号进行发送；第二混频部分根据载波信号对第二射频信号进行下变频，得到第四基带信号，将其发送到削波器；削波器对第四基带信号进行限幅处理，得到第五基带信号，将其发送到ADC；ADC对第五基带信号进行模拟信号到数字信号的转换，得到第六基带信号，将其发送到预失真参数确定部分；预失真参数确定部分接收第六基带信号和第一基带信号，根据第六基带信号、第一基带信号和预失真参数解算算法确定预失真参数，将其发送到DPD处理器。通过图2所示的预失真处理装置，可以使第一基带信号和第二射频信号之间保持线性放大关系，提高了PA的放大效率。本申请实施例中的“第一”、“第二”、“第三”、“第四”、“第五”、“第六”和“第七”等只是用于区分，不代表先后或大小的含义。
本申请实施例中，DPD处理器用于实现数字预失真处理功能，其可以由硬件、软件或软件加硬件的形式实现。当DPD处理器的实现形式为硬件或软件加硬件时，其可以为独立的器件，也可以为芯片系统的组成部分。在一个示例中，该芯片系统为本申请实施例提供的预失真处理装置。
本申请实施例中，混频部分包括一个或者多个混频器，用于对基带信号进行上变频得到射频信号，或者对射频信号进行下变频得到基带信号。即，本申请实施例中描述的上变频功能或者下变频功能可以由一个混频器实现，也可以由多个混频器实现，本申请不做限制。示例性地，混频部分包括两个混频器，通过混频部分对一路基带信号进行上变频得到一路射频信号的功能可以由该两个混频器实现。具体地，该实现为：通过该两个混频器中的第一混频器对该一路基带信号进行上变频得到一路中频信号，通过该两个混频器中的第二混频器对该一路中频信号进行上变频得到一路该射频信号。示例性地，混频部分包括两个混频器，通过混频部分对一路射频信号进行下变频得到一路基带信号的功能可以由该两个混频器实现。具体地，该实现为：通过该两个混频器中的第一混频器对该一路射频信号进行下变频得到一路中频信号，通过该两个混频器中的第二混频器对该一路中频信号进行下变频得到一路该基带信号。
随着无线通信技术的发展，提出了通过多天线传输相同信号的技术方案，通过该技术方案，可以在信号传输中提高信道的传输质量，提高信号传输速率。其中，多天线中包括多个天线，该多个天线中的任一个天线包括至少一个天线振子，该多个天线中的一个或多个可以共天线面板或者不共天线面板，和/或，该多个天线可以共天线罩或者不共天线罩，本申请实施例不做限制。多天线也可以称为子阵(sub-array)天线、分子阵天线、阵列(array)天线、天线阵列(array)或者其它名称，主要用于通过多个天线传输相同信号。示例性的，图3为一种发射设备的结构示意图，如图3中所示，该发射设备包括多天线和发送装置，多天线和发送装置连接，该发送装置也可以称为多天线发送装置。其中，多天线中包括M个天线，发送装置中包括振荡器和M个发射通道，该M个天线和该M个发射通道一一对应，M为大于等于1的整数。发射通道中包括PA、DAC和混频部分。使用图3所示的发射设备发送信号时，发送装置接收一路基带信号，将该基带信号耦合至各发射通道中作为各发射通道的相同的输入信号。振荡器生成载波信号，将其发送至各发射通道中的混频部分。在发送装置的各发射通道中，DAC对发射通道的输入信号进行数字信号到模拟信号的转换，得到第二基带信号，将其发送至混频部分；混频部分根据振荡器发送的载波信号对第二基带信号进行上变频，得到第一射频信号，将其发送至PA；PA对第一射频信号进行功率放大，得到放大后的射频信号，将其发送至包括该PA的发射通道对应的天线，可以使该天线将放大后的射频信号进行发送。 在本申请实施例中，PA将放大后的射频信号发送至天线可以理解为：PA将放到后的射频信号耦合至该天线包括的天线振子；天线将放大后的射频信号进行发送可以理解为：天线包括的天线振子将放大后的射频信号进行发送。由于多天线发送装置中包括PA，PA的放大功能在非线性区域可能失真，DPD处理器可以提高PA的放大效率，因此，在多天线发送装置中可以设置预失真处理装置，预失真处理装置中包括DPD处理器，用于提高PA的放大效率。由于多天线发送装置中包括多个PA，不同的PA的非线性性质不同，如果在多天线发送装置中仍然采用传统的预失真处理技术，需要在预失真处理装置中为每个PA设置独立的DPD处理器，此时，发送装置的成本、设计复杂度以及功耗都将大幅度增加。
在一个示例中，本申请实施例提供的预失真处理装置应用于多天线发送装置中，其相对于传统的多天线发送装置中的预失真处理装置，本申请实施例提供的预失真处理装置以期优化预失真处理装置的结构。
在多天线发送装置中，由于PA的非线性性质主要依赖于PA的结构和该PA的输入信号，多天线发送装置的各PA的输入信号相同，因此，在采用传统的预失真处理技术的多天线发送装置中，不同的PA的非线性性质存在相关性，不同的PA对应的DPD处理器的性能存在相关性，因此，多天线发送装置中的预失真处理装置的结构可以进行优化，从而降低设计复杂度，节省成本，降低多天线发送装置的功耗。
图4是本申请实施例提供的第一种预失真处理装置的结构示意图。
如图4中所示，本申请实施例提供的第一种预失真处理装置包括：第一预失真部分，第二预失真部分、反馈信号转换部分和解算部分。其中，第一预失真部分包括N个DPD处理器。为了示意信号流向和预失真处理装置对信号的处理过程，图4中还示出了第一振荡器、至少一个DAC、M个混频部分、M个PA和M个天线。其中，N和M为整数，N大于等于1，M大于等于N。
当图4所示的预失真处理装置应用于发送装置中进行信号发送时，第一预失真部分接收一路第一基带信号和N套预失真参数。第一基带信号为业务信号或专用于DPD处理器的数字信号，示例性地，该专用于DPD处理器的数字信号为正交频分复用(orthogonal frequency division multiplexing，简称OFDM)符号。进一步的，第一基带信号可以包括I(In-phase,简称I)路信号和Q(Quadrature-phase，简称Q)路信号。当第一基带信号包括I路信号和Q路信号时，分别对I路信号和Q路信号进行本申请实施例描述的信号处理过程。N套预失真参数为解算部分发送至第一预失真部分的参数。第一预失真部分根据N个DPD处理器和N套预失真参数对第一基带信号进行数字预失真处理，得到N路第二基带信号，将N路第二基带信号发送至第二预失真部分。第二预失真部分接收N路第二基带信号和网络系数，网络系数为解算部分发送至第二预失真部分的系数。第二预失真部分根据N路第二基带信号和网络系数确定M路第三基带信号，将M路第三基带信号发送至该预失真处理装置包括的DAC，即将M路第三基带信号中的第t路第三基带信号发送至该预失真处理装置包括的DAC中的一个DAC。其中，t为整数，取值为1至M。该预失真处理装置包括的DAC接收第二预失真部分发送的M路第三基带信号，对M路第三基带信号进行数字信号到模拟信号的转换，得到M路第四基带信号，将M路第四基带信号发送至M个混频部分。即，接收到M路第三基带信号中的第t路第三基带信号的DAC对第t路第三基带信号进行数字信号到模拟信号的转换，得到M路第四基带信号中的第t路第四基带信号，将第t路第四基带信号发送至M个混频部分中的第t个混频部分。可选地，该预失真处理装置包括M个DAC。基于该配置，第二预失真部分将M路第三基带信号中的第t路第三基带信号发送至M个DAC中的第t个DAC，第t个DAC对第t 路第三基带信号进行数字信号到模拟信号的转换，得到第t路第四基带信号，将第t路第四基带信号发送至第t个混频部分。t为整数，取值为1至M。第一振荡器生成载波信号，将载波信号发送至M个混频部分。M个混频部分接收载波信号和DAC发送的M路第四基带信号，根据载波信号对M路第四基带信号进行上变频，得到M路第一射频信号，将M路第一射频信号发送至M个PA。即，M个混频部分中的第t个混频部分接收载波信号和第t路第四基带信号，该第t路第四基带信号为上述M路第四基带信号中的第t路第四基带信号。第t个混频部分根据载波信号对第t路第四基带信号进行上变频，得到M路第一射频信号中的第t路第一射频信号，将第t路第一射频信号发送至M个PA中的第t个PA，t为整数，取值为1至M。M个PA对M路第一射频信号进行功率放大，得到M路经过功率放大器放大的第二射频信号，将M路第二射频信号发送至M个天线，将M路第二射频信号中的R路第二射频信号发送至反馈信号转换部分。其中，R为大于等于1且小于等于M的整数。即，M个PA中的第t个PA对M路第一射频信号中的第t路第一射频信号进行功率放大，得到M路经过功率放大器放大的第二射频信号中的第t路第二射频信号，将第t路第二射频信号发送至M个天线中的第t个天线，还可以将第t路第二射频信号发送至反馈信号转换部分，t为整数，取值为1至M。M个天线发送M路第二射频信号，即M个天线的第t个天线发送M路第二射频信号中的第t路第二射频信号。将R路经过功率放大器放大的第二射频信号耦合至反馈信号转换部分，即反馈信号转换部分接收R路经过功率放大器放大的第二射频信号，将R路第二射频信号转换成一路第五基带信号，将第五基带信号发送至解算部分。解算部分通过串联、并联或者串联加并联的方式组合多套预失真参数解算算法，得到解算部分的解算算法。其中，预失真参数解算算法可以为本领域技术人员常用的算法，本申请不做限制，示例性地，该算法可以为最小均方(least mean square，简称LMS)算法。解算部分接收第一基带信号和第五基带信号，根据解算部分的解算算法和第五基带信号确定N套预失真参数和网络系数，将N套预失真参数发送至第一预失真部分，将网络系数发送至第二预失真部分。本申请的实施例中，网络系数还可以称为第一系数、第一参数或者其它的名称，为解算部分输出的，被输入第二预失真部分，支持第二预失真部分实现预失真处理功能的参数。
在本申请实施例提供的第一种预失真处理装置中，通过第一预失真部分和第二预失真部分实现预失真处理功能，用于提高多天线发送装置中的M个PA的放大效率。其中，第一预失真部分包括N个DPD处理器，用于对基带信号进行数字预失真处理，得到N路经过预失真处理的信号；第二预失真部分根据N路经过预失真处理的信号得到M路经过预失真处理的信号。该M路经过预失真处理的信号近似为和所述M个PA的放大性能相反的预失真信号，使得需要发送的信号的放大前信号和放大后信号保持线性关系，可以提高PA的放大效率。相对于传统的多天线发送装置中的预失真处理装置，本申请实施例提供的第一种预失真处理装置可以减少DPD处理器的个数，优化了预失真处理装置的结构，降低了设计复杂度、成本和功耗。进一步地，本申请实施例提供的第一种预失真处理装置考虑了不同PA的非线性特性的差异性，可以保证多天线发送装置中各发射通道中对信号的放大功能是线性的。
图5是本申请实施例提供的第二种预失真处理装置的结构示意图。
如图5中所示，本申请实施提供的第二种预失真处理装置包括：第一预失真部分，至少一个DAC，第二预失真部分、反馈信号转换部分和解算部分。其中，第一预失真部分包括N个DPD处理器。为了示意信号流向和预失真处理装置对信号的处理过程，图5中还示出了第一振荡器、M个混频部分、M个PA和M个天线。其中，N和M为整数，N大于等于1，M大于 等于N。本申请实施例提供的第二种预失真处理装置相对于第一种预失真处理装置的区别在于：第一种预失真处理装置中，进行信号处理时，在第二预失真部分对信号处理之后进行数字信号到模拟信号的转换，即第二预失真部分向DAC发送信号；在第二种预失真处理装置中，进行信号处理时，在第二预失真部分对信号处理之前进行数字信号到模拟信号的转换，即DAC向第二预失真部分发送信号。
当图5所示的预失真处理装置应用于发送装置中，进行信号发送时，第一预失真部分接收一路第一基带信号和N套预失真参数。第一基带信号同图4对应的预失真处理装置中描述的第一基带信号，这里不再赘述。N套预失真参数为解算部分发送至第一预失真部分的参数。第一预失真部分根据N个DPD处理器和N套预失真参数对第一基带信号进行数字预失真处理，得到N路第二基带信号，将N路第二基带信号发送至该预失真处理装置包括的DAC，即将N路第二基带信号中的第x路第二基带信号发送至该预失真处理装置包括的DAC中的一个DAC，x为整数，取值为1至N。该预失真处理装置包括的DAC对N路第二基带信号进行数字信号到模拟信号的转换，得到N路第三基带信号，将N路第三基带信号发送至第二预失真部分。即，接收到N路第二基带信号中的第x路第二基带信号的DAC对第x路第二基带信号进行数字信号到模拟信号的转换，得到N路第三基带信号中的第x路第三基带信号,将第x路第三基带信号发送至第二预失真部分。可选地，该预失真处理装置可以包括N个DAC。基于该配置，第一预失真部分将第x路第二基带信号发送至该N个DAC中的第x个DAC，第x个DAC对第x路第二基带信号进行数字信号到模拟信号的转换，得到第x路第三基带信号，将第x路第三基带信号发送至第二预失真部分，x为整数，取值为1至N。第二预失真部分接收N路第三基带信号和网络系数，网络系数为解算部分发送至第二预失真部分的系数，根据N路第三基带信号和网络系数确定M路第四基带信号，将M路第四基带信号发送至M个混频部分，即将M路第四基带信号中的第t路第四基带信号发送至M个混频部分中的第t个混频部分，t为整数，取值为1至M。第一振荡器生成载波信号，将载波信号发送至混频部分。M个混频部分接收M路第四基带信号和第一振荡器发送的载波信号，根据载波信号对M路第四基带信号进行上变频，得到M路第一射频信号，将M路第一射频信号发送至M个PA。即，M个混频部分中的第t个混频部分接收M路第四基带信号中的第t路第四基带信号和振荡器发送的载波信号，根据载波信号对第t路第四基带信号进行上变频，得到M路第一射频信号中的第t路第一射频信号，将第t路第一射频信号发送至M个PA中的第t个PA，t为整数，取值为1至M。M个PA对M路第一射频信号进行功率放大，得到M路经过功率放大器放大的第二射频信号，将M路第二射频信号发送至M个天线，将M路第二射频信号中的R路第二射频信号发送至反馈信号转换部分，R为大于等于1且小于等于M的整数。即，M个PA中的第t个PA对M路第一射频信号中的第t路第一射频信号进行功率放大，得到M路经过功率放大器放大的第二射频信号中的第t路第二射频信号，将第t路第二射频信号发送至M个天线中的第t个天线，还可以将第t路第二射频信号发送至反馈信号转换部分，t为整数，取值为1至M。M个天线发送M路第二射频信号，即M个天线中的第t个天线发送M路第二射频信号中的第t路第二射频信号，t为整数，取值为1至M。将R路经过功率放大器放大的第二射频信号耦合至反馈信号转换部分，即反馈信号转换部分接收R路经过功率放大器放大的第二射频信号，将R路第二射频信号转换成一路第五基带信号，将第五基带信号发送至解算部分。解算部分通过串联、并联或者串联加并联的方式组合多套预失真参数解算算法，得到解算部分的解算算法。其中，预失真参数解算算法可以为本领域技术人员常用的算法，本申请不做限制，示例性地，该算法可以为LMS算法。解算部分接收第一基带信号和第五基带信号，根据解算部分的解算算法、 第一基带信号和第五基带信号确定N套预失真参数和网络系数，将N套预失真参数发送至第一预失真部分，将网络系数发送至第二预失真部分。
类似本申请实施例提供的第一种预失真处理装置，本申请实施例提供的第二种预失真处理装置通过第一预失真部分和第二预失真部分实现预失真处理功能，用于提高多天线发送装置中的M个PA的放大效率。该预失真处理装置既可以降低设计复杂度、成本和功耗，又可以保证多天线发送装置中各发射通道中对信号的放大功能是线性的。
图4或图5所示的第一预失真部分包括N个DPD处理器，用于接收第一基带信号和N套预失真参数，根据N个DPD处理器和N套预失真参数对第一基带信号进行数字预失真处理，得到N路第二基带信号。具体地，图4或图5所示的预失真处理装置的第一预失真部分为图6至图9所示的第一预失真部分的多种实现方式中的任一种实现方式。
图6所示的第一预失真部分是图4或图5所示的预失真处理装置的第一预失真部分的第一种实现方式，如图6中所示，第一预失真部分包括N个DPD处理器，该N个DPD处理器中的第x个DPD处理器接收N套预失真参数中的第x套预失真参数和第x路DPD处理器输入信号，根据第x套预失真参数对第x路DPD处理器输入信号进行数字预失真处理，得到N路第二基带信号中的第x路第二基带信号。当图6所示的第一预失真部分应用于图4所示的预失真处理装置时，第x个DPD处理器将第x路第二基带信号发送至图4所示的预失真处理装置的第二预失真部分。当图6所示的第一预失真部分应用于图5所示的预失真处理装置时，第x个DPD处理器将第x路第二基带信号发送至发送至图5所示的预失真处理装置包括的DAC中的一个DAC。其中，当x为1时，第x路DPD处理器输入信号为第一基带信号，当x为2至N中任何一个时，第x路DPD处理器输入信号为N个DPD处理器中的第x-1个DPD处理器发送的第x-1路第二基带信号，该第x-1路第二基带信号为N路第二基带信号中的第x-1路第二基带信号。x为整数，取值为1至N。第一预失真部分的第一种实现方式中，通过DPD处理器的级联对信号进行预失真处理，得到N路经过预失真处理的信号，该实现方式中设计相对简单，成本较低，功耗较低。
图7所示的第一预失真部分是图4或图5所示的预失真处理装置的第一预失真部分的第二种实现方式，如图7中所示，第一预失真部分包括N个DPD处理器和N-1个乘法器。
N个DPD处理器中的第x个DPD处理器，接收N套预失真参数中的第x套预失真参数和第x路DPD处理器输入信号。其中，第x路DPD处理器输入信号为N路DPD处理器输入信号中的第x路DPD处理器输入信号。第x个DPD处理器根据第x套预失真参数对第x路DPD处理器输入信号进行数字预失真处理，得到第x路DPD处理器输出信号，其中，第x路DPD处理器输出信号为N路DPD处理器输出信号中的第x路DPD处理器输出信号，x为整数，取值为1至N。当x为1时，第x路DPD处理器输入信号为第一基带信号；当x为2至N中任何一个时，第x个DPD处理器接收的第x路DPD处理器输入信号具体为：N个DPD处理器中的第x-1个DPD处理器发送的第x-1路DPD处理器输出信号，第x-1路DPD处理器输出信号为上述N路DPD处理器输出信号中的第x-1路DPD处理器输出信号。x为整数，取值为1至N。
N-1个乘法器中的第y个乘法器，接收N个DPD处理器中的第y个DPD处理器发送的第y路DPD处理器输出信号和N个DPD处理器中的第y+1个DPD处理器发送的第y+1路DPD处理器输出信号，将第y路DPD处理器输出信号和第y+1路DPD处理器输出信号相乘，得到N路第二基带信号中的第y路第二基带信号。其中，第y路DPD处理器输出信号为N路DPD处理器输出信号中的第y路DPD处理器输出信号，第y+1路DPD处理器输出信号为N路DPD处理器输出信号中的第y+1路DPD处理器输出信号。当图7所示的第一预失真部分应用于图4所 示的预失真处理装置时，第y个乘法器将第y路第二基带信号发送至图4所示的预失真处理装置的第二预失真部分。当图7所示的第一预失真部分应用于图5所示的预失真处理装置时，第y个乘法器将第y路第二基带信号发送至图5所示的预失真处理装置包括的DAC中的一个DAC。其中，y为整数，取值为1至N-1；
当x为N时，N路DPD处理器输出信号中的第x路DPD处理器输出信号为N路第二基带信号中的第x路第二基带信号。此时，当图7所示的第一预失真部分应用于图4所示的预失真处理装置时，N个DPD处理器中的第x个DPD处理器还用于将第x路第二基带信号发送至图4所示的预失真处理装置中的第二预失真部分；当图7所示的第一预失真部分应用于图5所示的预失真处理装置时，N个DPD处理器中的第x个DPD处理器还用于将第x路第二基带信号发送至图5所示的预失真处理装置包括的DAC中的一个DAC。第一预失真部分的第二种实现方式中，通过DPD处理器对信号进行预失真处理，通过乘法器对信号进行反馈辅乘，得到N路经过预失真处理的信号。在对信号进行放大时，该实现方式以期在非线性失真明显的场景下，更有效地减少非线性失真，提高放大效率。
图8所示的第一预失真部分是图4或图5所示的预失真处理装置的第一预失真部分的第三种实现方式，如图8中所示，第一预失真部分包括N个DPD处理器和N-1个加法器。
N个DPD处理器中的第x个DPD处理器，接收N套预失真参数中的第x套预失真参数和第一基带信号,根据第x套预失真参数对第一基带信号进行数字预失真处理，得到N路DPD处理器输出信号中的第x路DPD处理器输出信号；其中，x为整数，取值为1至N。
N-1个加法器中的第y个加法器，接收N个DPD处理器中的第y个DPD处理器发送的第y路DPD处理器输出信号和N个DPD处理器中的第y+1个DPD处理器发送的第y+1路DPD处理器输出信号，将第y路DPD处理器输出信号和第y+1路DPD处理器输出信号相加，得到N路第二基带信号中的第y路第二基带信号。其中，第y路DPD处理器输出信号为N路DPD处理器输出信号中的第y路DPD处理器输出信号，第y+1路DPD处理器输出信号为N路DPD处理器输出信号中的第y+1路DPD处理器输出信号。当图8所示的第一预失真部分应用于图4所示的预失真处理装置时，第y个加法器将第y路第二基带信号发送至图4所示的预失真处理装置中的第二预失真部分。当图8所示的第一预失真部分应用于图5所示的预失真处理装置时，第y个加法器将第y路第二基带信号发送至图5所示的预失真处理装置包括的DAC中的一个DAC。其中，y为整数，取值为1至N-1；
当x为N时，N路DPD处理器输出信号中的第x路DPD处理器输出信号为N路第二基带信号中的第x路第二基带信号。此时，当图8所示的第一预失真部分应用于图4所示的预失真处理装置时，N个DPD处理器中的第x个DPD处理器还用于将第x路第二基带信号发送至图4所示的预失真处理装置中的第二预失真部分；当图8所示的第一预失真部分应用于图5所示的预失真处理装置时，N个DPD处理器中的第x个DPD处理器还用于将第x路第二基带信号发送至图5所示的预失真处理装置包括的至少一个DAC中的一个DAC。第一预失真部分的第三种实现方式中，通过DPD处理器对信号进行预失真处理，通过加法器对信号进行反馈辅加，得到N路经过预失真处理的信号。在对信号进行放大时，该实现方式以期在非线性失真明显的场景下，更有效地减少非线性失真，提高放大效率。
图9所示的第一预失真部分是图4或图5所示的预失真处理装置的第一预失真部分的第四种实现方式，如图9中所示，第一预失真部分包括N个DPD处理器和L个加法器，其中，L等于对((N-2)/2)进行上取整得到的值。
N个DPD处理器中的第x个DPD处理器，接收N套预失真参数中的第x套预失真参数和第x路DPD处理器输入信号。其中，第x路DPD处理器输入信号为N路DPD处理器输入信号中的第x路DPD处理器输入信号。第x个DPD处理器根据第x套预失真参数对第x路DPD处理器输入信号进行数字预失真处理，得到N路第二基带信号中的第x路第二基带信号。当图9所示的第一预失真部分应用于图4所示的预失真处理装置时，第x个DPD处理器将第x路第二基带信号发送至图4所示的预失真处理装置中的第二预失真部分。当图9所示的第一预失真部分应用于图5所示的预失真处理装置时，第x个DPD处理器将第x路第二基带信号发送至图5所示的预失真处理装置包括的DAC中的一个DAC。
当x为1至2时，第一基带信号为第x路DPD处理器输入信号；当x为2至N时，第x路DPD处理器出入信号由L个加法器中相应的加法器得到。
L个加法器中的第p个加法器，接收N个DPD处理器中的第2p-1个DPD处理器发送的N路第二基带信号中的第2p-1路第二基带信号和N个DPD处理器中的第2p个DPD处理器发送的N路第二基带信号中的第2p路第二基带信号，将第2p-1路和第2p路第二基带信号相加，得到N路DPD处理器输入信号中的第2p+1路和第2p+2路DPD处理器输入信号，即第2p+1路和第2p+2路DPD处理器输入信号相同，第p个加法器将第2p+1路和第2p+2路DPD处理器输入信号发送至N个DPD处理器中的第2p+1个和第2p+2个DPD处理器；其中，p为整数，取值为1至L-1。
当L为2的倍数时，L个加法器中的第L个加法器，接收N个DPD处理器中的第2L-1个DPD处理器发送的N路第二基带信号中的第2L-1路第二基带信号和N个DPD处理器中的第2L个DPD处理器发送的N路第二基带信号中的第2L路第二基带信号，将第2L-1路和第2L路第二基带信号相加，得到N路DPD处理器输入信号中的第2L+1路和第2L+2路DPD处理器输入信号，即第2L+1路和第2L+2路DPD处理器输入信号相同，将第2L+1路和第2L+2路DPD处理器输入信号发送到N个DPD处理器中的第2L+1个和第2L+2个DPD处理器。
当L不为2的倍数时，L个加法器中的第L个加法器，接收N个DPD处理器中的第2L-1个DPD处理器发送的N路第二基带信号中的第2L-1路第二基带信号和N个DPD处理器中的第2L个DPD处理器发送的N路第二基带信号中的第2L路第二基带信号，将第2L-1路和第2L路第二基带信号相加，得到N路DPD处理器输入信号中的第2L+1路DPD处理器输入信号，将第2L+1路DPD处理器输入信号发送到所述N个DPD处理器中的第2L+1个DPD处理器，其中，2L+1等于N。第一预失真部分的第四种实现方式中，通过DPD处理器对信号进行预失真处理，通过加法器对信号进行反馈辅加，得到N路经过预失真处理的信号。在对信号进行放大时，该实现方式以期在非线性失真明显的场景下，更有效地减少非线性失真，提高放大效率。
图10所示的第二预失真部分是图4或图5所示的预失真处理装置的第二预失真部分。当图10所示的第二预失真部分应用于图4所示的预失真处理装置时，图10对应的第二预失真部分中描述的“N路输入信号”即图4对应的预失真处理装置中描述“N路第二基带信号”，图10对应的第二预失真部分中描述的“网络系数”即图4对应的预失真处理装置中描述“网络系数”，图10对应的第二预失真部分中描述的“M路输出信号”即图4对应的预失真处理装置中描述“M路第三基带信号”。当图10所示的第二预失真部分应用于图5所示的预失真处理装置时，图10对应的第二预失真部分中描述的“N路输入信号”即图5对应的预失真处理装置中描述“N路第三基带信号”，图10对应的第二预失真部分中描述的“网络系数”即图5对应的预失真处理装置中描述“网络系数”，图10对应的第二预失真部分中描述的“M 路输出信号”即图5对应的预失真处理装置中描述“M路第四基带信号”。
如图10中所示，第二预失真部分包括W个信号确定部分，W个信号确定部分中的第e信号确定部分接收N路输入信号和网络系数,根据N路输入信号和网络系数确定第e路第二预失真部分输出信号，该第e路第二预失真部分输出信号对应于M路输出信号中的至少一路输出信号，e为整数，取值为1至W，W为小于等于M的整数。当图10所示的第二预失真部分应用于图4所示的预失真处理装置时，第二预失真部分中的信号确定部分连接于图4所示的预失真处理装置中的DAC。如果第e信号确定部分和一个DAC连接，该DAC的功能包括接收M路输出信号中的第t路输出信号，第e路第二预失真部分输出信号对应于M路输出信号中的第t路输出信号，即第e路第二预失真部分输出信号为M路输出信号中的第t路输出信号，第e信号确定部分将第t路输出信号耦合至该信号确定部分连接的该DAC。当图10所示的第二预失真部分应用于图5所示的预失真处理装置时，第二预失真部分中的一个信号确定部分连接于图5所示的预失真处理装置中的至少一个混频部分，一个混频部分连接于一个信号确定部分。当信号确定部分和混频部分一一对应连接时，W等于M；当一个信号确定部分连接于多个混频部分时，W小于M。如果第e信号确定部分和图5所示的预失真处理装置中的M个混频部分中的第t个混频部分连接，第e路第二预失真部分输出信号对应于M路输出信号中的第t路输出信号，即第e路第二预失真部分输出信号为M路输出信号中的第t路输出信号，第e信号确定部分将第t路输出信号发送至图5所示的预失真处理装置中的M个混频部分中的第t个混频部分。其中，t为大于等于1且小于等于M的整数。示例性地，记N路输入信号为d_x，x为整数，取值为1至N,即N路输入信号为d_1,d_2,…,d_N；记网络系数为K，包括N个系数k_x，x为整数，取值为1至N，即网络系数K包括k_1,k_2,…,k_N。第二预失真部分包括的第e信号确定部分通过对d_1,d_2,…,d_N和k_1,k_2,…,k_N进行线性变换，获得第e路第二预失真部分输出信号。其中，该线性变换包括加法和乘法运算。通过图10所示的第二预失真部分，可以通过线性变换得到M路经过预失真处理的信号，该M路经过预失真处理的信号近似为和多天线发送装置的M个PA的放大性能相反的预失真信号，使得需要发送的信号的放大前信号和放大后信号保持线性关系，可以提高多天线发送装置的PA的放大效率。相对于传统的多天线发送装置中的预失真处理装置，本申请实施例提供的预失真处理装置减少了M-N个DPD处理器，优化了预失真处理装置的结构，降低了设计复杂度、成本和功耗，同时又考虑了不同PA的非线性特性的差异性，可以保证多天线发送装置中各发射通道中对信号的放大功能是线性的。
下面结合图4或图5，描述图4或图5所示的预失真处理装置的反馈信号转换部分，该反馈信号转换部分为以下两种实现方式中的任一种实现方式。当下述两种实现方式中的反馈信号转换部分应用于图4所示的预失真处理装置时，下述两种实现方式中描述的“预失真处理装置”即图4对应的预失真处理装置。当下述两种实现方式中的反馈信号转换部分应用于图5所示的预失真处理装置时，下述两种实现方式中描述的“预失真处理装置”即图5对应的预失真处理装置。
上述反馈信号转换部分的第一种实现方式为：反馈信号转换部分包括耦合部分、混频部分和ADC。耦合部分接收R路经过功率放大器放大的射频信号，根据R路经过功率放大器放大的射频信号得到一路耦合部分输出信号，将该耦合部分输出信号发送至混频部分。耦合部分根据R路经过功率放大器放大的射频信号得到一路耦合部分输出信号的方法可以为本领域技术人员常用的方法，例如：可以通过时分的方法从R路经过功率放大器放大的射频信号中选择一路信号作为耦合部分输出信号，也可以通过求平均值的方法根据R路经过功率放大器 放大的射频信号得到一路信号作为耦合部分输出信号，还可以通过线性组合的方法根据R路经过功率放大器放大的射频信号得到一路信号作为耦合部分输出信号等等，本申请不做限制。反馈信号转换部分的混频部分根据载波信号对耦合部分输出信号进行下变频，得到第六基带信号，将第六基带信号发送至反馈信号转换部分的ADC。反馈信号转换部分的ADC对第六基带信号进行模拟信号到数字信号的转换，得到第五基带信号，将第五基带信号发送至预失真处理装置的解算部分。其中，载波信号可以为预失真处理装置的第一振荡器发送至反馈信号转换部分的混频部分的载波信号。可选地，预失真处理装置还可以包括第二振荡器，载波信号还可以为第二振荡器发送至反馈信号转换部分的混频部分的载波信号。通过反馈信号转换部分的第一种实现方式，可以将经过功率放大器放大的射频信号反馈至预失真处理装置的解算部分，使得解算部分可以得到网络系数和N套预失真参数，可以支持第一预失真部分和第二预失真部分进行预失真处理。
上述反馈信号转换部分的第二种实现方式为：反馈信号转换部分包括耦合部分、混频部分、削波器和ADC。耦合部分接收R路经过功率放大器放大的射频信号，根据R路经过功率放大器放大的射频信号得到一路耦合部分输出信号，将该耦合部分输出信号发送至反馈信号转换部分的混频部分。耦合部分根据R路经过功率放大器放大的射频信号得到一路耦合部分输出信号的方法可以为本领域技术人员常用的方法，该方法同上述反馈信号转换部分的第一种实现方式中相应的描述，这里不再赘述。反馈信号转换部分的混频部分根据载波信号对耦合部分输出信号进行下变频，得到第六基带信号，将第六基带信号发送至削波器。削波器对第六基带信号进行限幅处理，得到第七基带信号，将第七基带信号发送至反馈信号转换部分的ADC。反馈信号转换部分的ADC对第七基带信号进行模拟信号到数字信号的转换，得到第五基带信号，将第五基带信号发送至图4所示的数字预失真处理装置的解算部分。其中，载波信号可以为预失真处理装置的第一振荡器发送至反馈信号转换部分的混频部分的载波信号。进一步地，预失真处理装置还可以包括第二振荡器，载波信号可以为第二振荡器发送至反馈信号转换部分的混频部分的载波信号。类似反馈信号转换部分的第一种实现方式，通过反馈信号转换部分的第二种实现方式可以支持第一预失真部分和第二预失真部分进行预失真处理。相对反馈信号转换部分的第一种实现方式，反馈信号转换部分的第二种实现方式中增加了削波器。通过该增加的削波器，当信号的幅度较大时，可以对信号进行限幅处理，降低信号的波峰对波谷的干扰，进一步地，还可以降低过强的信号幅度或干扰对ADC的损伤。
需要说明的是，图4至图10所示的预失真处理装置或其所包含的组成部分中仅包含了实现本申请实施例的关键组成部分，各个部分和/或器件之间还可以根据系统需求设置其他的软硬件处理模块，例如，在PA和天线之间，还可以设置有双工器，在混频部分和ADC之间，还可以设置有滤波器，等等。
图4至图10所示的预失真处理装置或其所包含的组成部分，可以是一种电路。该电路可以由芯片系统实现。所述芯片系统可以包括：中央处理器(central processing unit，简称CPU)、通用处理器、网络处理器(network processor，简称NP)、数字信号处理器(digital signal processing，简称DSP)、专用集成电路(application-specific integrated circuit，简称ASIC)，可编程逻辑器件(programmable logic device，简称PLD)、晶体管逻辑器件、分立器件、硬件部件或者上述器件的任意组合。其中，PLD可以是复杂可编程逻辑器件(complex programmable logic device，简称CPLD)，现场可编程逻辑门阵列(field-programmable gate array，简称FPGA)，通用阵列逻辑(generic array logic，简称GAL)或它们的任意组合。所芯片系统可以实现或执行本申请公开内容所描述的各种示例性的逻辑方框，模块和电路。 所述芯片系统也可以是实现计算功能的组合，例如包含至少一个微处理器组合，DSP和微处理器的组合等。在一个具体的示例中，本申请实施例中所提供的预失真处理装置可以由基带芯片和射频芯片联合实现。其中，基带芯片为上述实施例中处理基带信号的器件，射频芯片为上述实施例中处理射频信号的器件。可选的，射频芯片还可以包含处理中频信号的芯片和处理射频信号的芯片。
上述主要描述了本申请实施例提供的预失真处理装置，该预失真处理装置为本申请实施例提供的预失真处理方法的可能的实现。接下来，将结合图11和图12描述本申请实施例提供的预失真处理的方法。
图11为本申请实施例提供的第一种预失真处理方法的流程图。第一种预失真处理方法为对应于第一种预失真处理装置的方法，即第一种预失真处理装置是第一种预失真处理方法的可能的实现。
在步骤1101，根据N套预失真参数对第一基带信号进行数字预失真处理，得到N路第二基带信号。
第一基带信号同图4对应的预失真处理装置中描述的第一基带信号，这里不再赘述。
通过以下四种处理方法中任何一种方法，根据N套预失真参数对第一基带信号进行数字预失真处理，得到N路第二基带信号。其中，N路第二基带信号中的一路第二基带信号可以称为N路第二基带信号中的第x路第二基带信号，x为整数，取值为1至N。
上述四种处理方法中的第一种处理方法为：x为整数，取值为1至N，当x为1时，根据N套预失真参数的第x套预失真参数对第一基带信号进行数字预失真处理，得到N路第二基带信号中的第x路第二基带信号。当x为2至N中任何一个整数时，根据N套预失真参数的第x套预失真参数对N路第二基带信号的第x-1路第二基带信号进行数字预失真处理，得到N路第二基带信号的第x路第二基带信号。
上述四种处理方法中的第二种处理方法为：x为整数，取值为1至N，当x为1至N中任何一个整数时，根据N套预失真参数中的第x套预失真参数对N路输入信号的第x路输入信号进行数字预失真处理，得到N路输出信号的第x路输出信号。其中，当x为1时，第x路输入信号为第一基带信号，当x为2至N中任何一个整数时，第x路输入信号为N路输出信号的第x-1路输出信号。当x为1至N-1中任何一个整数时，将N路输出信号的第x路和第x+1路输出信号相乘，得到N路第二基带信号的第x路第二基带信号；当x为N时，N路输出信号的第x路输出信号为N路第二基带信号的第x路第二基带信号。
上述四种处理方法中的第三种处理方法为：x为整数，取值为1至N，当x为1至N中任何一个整数时，根据N套预失真参数中的第x套预失真参数对N路输入信号的第x路输入信号进行数字预失真处理，得到N路输出信号的第x路输出信号，其中，第x路输入信号为第一基带信号。当x为1至N-1中任何一个整数时，将N路输出信号的第x路和第x+1路输出信号相加，得到N路第二基带信号的第x路第二基带信号；当x为N时，N路输出信号的第x路输出信号为N路第二基带信号的第x路第二基带信号。
上述四种处理方法中的第四种处理方法为：x为整数，取值为1至N，当x为1至N中任何一个整数时，根据N套预失真参数中的第x套预失真参数对N路输入信号的第x路输入信号进行数字预失真处理，得到N路第二基带信号的第x路第二基带信号，其中，当x为1或2时，第x路输入信号为第一基带信号；当x为2至N中任何一个整数时，第x路输入信号为将N路输出信号的第2p-1路和第2p路输出信号相加得到的信号，其中，p等于对((x-2) /2)进行上取整得到的值。
在步骤1102，根据N路第二基带信号和网络系数确定M路第三基带信号。
通过对N路第二基带信号和网络系数进行线性变换，确定M路第三基带信号中的第t路第三基带信号。其中，t为整数，取值为1至M，该线性变换包括乘法和加法。
在步骤1103，根据R路经过功率放大器放大的射频信号得到第五基带信号。
R路经过功率放大器放大的射频信号为根据步骤1102中描述的M路第三基带信号确定的射频信号。对M路第三基带信号进行模拟信号到数字信号的转换，得到M路第四基带信号，即对M路第三基带信号中的第t路第三基带信号进行模拟信号到数字信号的转换，得到M路第四基带信号中的第t路第四基带信号；根据载波信号对M路第四基带信号进行上变频，得到M路第一射频信号，即根据载波信号对M路第四基带信号的第t路第四基带信号进行上变频，得到M路第一射频信号中的第t路第一射频信号；对M路第一射频信号进行功率放大，得到M路经过功率放大器放大的第二射频信号，即对M路第一射频信号中的第t路第一射频信号进行功率放大，得到M路经过功率放大器放大的第二射频信号中的第t路第二射频信号。其中，t为整数，取值为1至M。本步骤中描述的R路经过功率放大器放大的射频信号为M路第二射频信号中的R路第二射频信号，即根据该M路第二射频信号耦合得到该R路经过功率放大器放大的射频信号，R为大于等于1且小于等于M的整数。
可以根据以下两种方法中的任何一种方法根据R路经过功率放大器放大的第二射频信号得到第五基带信号。
上述两种方法中的第一种方法为：根据R路经过功率放大器放大的第二射频信号得到一路输出信号，根据载波信号对该一路输出信号进行下变频，得到第六基带信号，对第六基带信号进行模拟信号到数字信号的转换，得到第五基带信号。本申请实施例中的载波信号为对基带信号或射频信号进行混频时使用的载波信号，根据载波信号对基带信号进行上变频可以得到射频信号，根据载波信号对射频信号进行下变频可以得到基带信号。
上述两种方法中的第二种方法为：根据R路经过功率放大器放大的第二射频信号得到一路输出信号，根据载波信号对该一路输出信号进行下变频，得到第六基带信号，对第六基带信号进行限幅处理，得到第七基带信号，对第七基带信号进行模拟信号到数字信号的转换，得到第五基带信号。
在步骤1104，根据第五基带信号确定N套预失真参数和网络系数。
通过串联、并联或者串联加并联多套预失真参数解算算法的方式得到解算算法，基于该解算算法，根据第五基带信号确定步骤1101中描述的N套预失真参数和步骤1102中描述的网络系数。其中，预失真参数解算算法同图4或图5对应的预失真处理装置中相应的，这里不再赘述。
图12为本申请实施例提供的第二种数字预失真处理方法流程图。第二种预失真处理方法为对应于第二种预失真处理装置的方法，即第二种预失真处理装置是第二种预失真处理方法的可能的实现。
在步骤1201，根据N套预失真参数对第一基带信号进行数字预失真处理，得到N路第二基带信号。
同图11对应的方法中的步骤1101。
在步骤1202，对N路第二基带信号进行数字信号到模拟信号的转换，得到N路第三基带信号。
对N路第二基带信号中的第x路第二基带信号进行数字信号到模拟信号的转换，得到N路第三基带信号中第x路第三基带信号。其中，x为整数，取值为1至N。
在步骤1203，根据N路第三基带信号和网络系数获得M路第四基带信号。
通过对N路第三基带信号和网络系数进行线性变换，获得M路第四基带信号中的第t路第四基带信号，其中，t为整数，取值为1至M，该线性变换包括乘法和加法。
在步骤1204，根据R路经过功率放大器放大的射频信号确定第五基带信号。
R路经过功率放大器放大的射频信号为根据步骤1203中描述的M路第四基带信号确定的射频信号。根据载波信号对M路第四基带信号进行上变频，得到M路第一射频信号，即根据载波信号对M路第四基带信号的第t路第四基带信号进行上变频，得到M路第一射频信号中的第t路第一射频信号；对M路第一射频信号进行功率放大，得到M路经过功率放大器放大的第二射频信号，即对M路第一射频信号中的第t路第一射频信号进行功率放大，得到M路经过功率放大器放大的第二射频信号中的第t路第二射频信号，其中，t为整数，取值为1至M。本步骤中描述的R路经过功率放大器放大的射频信号为M路第二射频信号中的R路第二射频信号，即根据该M路第二射频信号耦合得到该R路经过功率放大器放大的射频信号，R为大于等于1且小于等于M的整数。
根据R路经过功率放大器放大的射频信号得到第五基带信号的方法同图11对应的步骤1103中相应的描述。
在步骤1205，根据第五基带信号确定N套预失真参数和网络系数。
同图11对应的方法中的步骤1104。
执行本申请实施例提供的数字预失真处理方法的装置可以是预失真处理装置，例如，图4至图10所示的预失真处理装置，也可以是系统或网络设备中的其它装置，例如数字处理装置和/或中射频处理装置等。可选地，执行本申请实施例提供的预失真处理方法的装置还可以包括存储器，用于存储该装置的程序指令，或程序指令和数据。存储器包括易失性存储器(volatile memory)，例如随机存取存储器(random-access memory，简称RAM)；存储器也可以包括非易失性存储器(non-volatile memory)，例如快闪存储器(flash memory)，硬盘(hard disk drive，简称HDD)或固态硬盘(solid-state drive，简称SSD)；存储器还可以包括上述种类的存储器的组合。
在上述实施例中，可以全部或部分地通过软件、硬件、固件或者其任意组合来实现。当使用软件实现时，可以全部或部分地以计算机程序产品的形式实现。所述计算机程序产品包括一个或多个计算机指令。在计算机上加载和执行所述计算机程序指令时，全部或部分地产生按照本发明实施例所述的流程或功能。所述计算机可以是通用计算机、专用计算机、计算机网络、网络设备、用户设备或者其他可编程装置。所述计算机指令可以存储在计算机可读存储介质中，或者从一个计算机可读存储介质向另一个计算机可读存储介质传输，例如，所 述计算机指令可以从一个网站站点、计算机、服务器或数据中心通过有线(例如同轴电缆、光纤、数字用户线(digital subscriber line，简称DSL))或无线(例如红外、无线、微波等)方式向另一个网站站点、计算机、服务器或数据中心进行传输。所述计算机可读存储介质可以是计算机可以存取的任何可用介质或者是包含一个或多个可用介质集成的服务器、数据中心等数据存储设备。所述可用介质可以是磁性介质，(例如，软盘、硬盘、磁带)、光介质(例如，数字视频光盘(digital videodisc，简称DVD)、或者半导体介质(例如,SSD)等。
以上所述的具体实施方式，对本申请的目的、技术方案和有益效果进行了进一步详细说明，所应理解的是，以上所述仅为本申请的具体实施方式而已，并不用于限定本申请的保护范围，凡在本申请的技术方案的基础之上，所做的任何修改、等同替换、改进等，均应包括在本申请的保护范围之内。

Claims (20)

  1. 一种预失真处理装置，其特征在于，包括：第一预失真部分、至少一个数模转换器DAC、第二预失真部分、反馈信号转换部分和解算部分；
    所述第一预失真部分，包括N个数字预失真DPD处理器，用于接收第一基带信号和N套预失真参数，根据所述N个DPD处理器和所述N套预失真参数对所述第一基带信号进行数字预失真处理，得到N路第二基带信号，将所述N路第二基带信号发送至所述至少一个DAC；
    所述至少一个DAC，用于对所述N路第二基带信号进行数字信号到模拟信号的转换，得到N路第三基带信号，将所述N路第三基带信号发送至所述第二预失真部分；
    所述第二预失真部分，用于接收所述N路第三基带信号和网络系数，根据所述N路第三基带信号和所述网络系数确定M路第四基带信号；
    所述反馈信号转换部分，用于接收R路经过功率放大器放大的射频信号，所述R路经过功率放大器放大的射频信号是根据所述M路第四基带信号得到的射频信号，将所述R路经过功率放大器放大的射频信号转换成第五基带信号，将所述第五基带信号发送至所述解算部分；
    所述解算部分，用于接收所述第一基带信号和所述第五基带信号，根据所述第一基带信号和所述第五基带信号确定所述N套预失真参数和所述网络系数，将所述N套预失真参数发送至所述第一预失真部分，将所述网络系数发送至所述第二预失真部分；
    其中，N、M和R为整数，N大于等于1，M大于等于N，R大于等于1且小于等于M。
  2. 如权利要求1所述的装置，其特征在于，所述第一预失真部分包括N个数字预失真DPD处理器，用于接收第一基带信号和N套预失真参数，根据所述N个DPD处理器和所述N套预失真参数对所述第一基带信号进行数字预失真处理，得到N路第二基带信号，其中，所述第一预失真部分具体包括N个数字预失真DPD处理器，其中：
    所述N个DPD处理器中的第x个DPD处理器，用于接收所述N套预失真参数中的第x套预失真参数和第x路DPD处理器输入信号，根据所述第x套预失真参数对所述第x路DPD处理器输入信号进行数字预失真处理，得到所述N路第二基带信号中的第x路第二基带信号，将所述第x路第二基带信号发送至所述至少一个DAC中的一个DAC；其中，x为整数，取值为1至N；
    当x为1时，所述第x路DPD处理器输入信号为所述第一基带信号；
    当x为2至N中任何一个时，所述第x路DPD处理器输入信号为所述N个DPD处理器中的第x-1个DPD处理器发送的第x-1路第二基带信号，其中，所述第x-1路第二基带信号为所述N路第二基带信号中的第x-1路第二基带信号。
  3. 如权利要求1所述的装置，其特征在于，所述第一预失真部分包括N个数字预失真DPD处理器，用于接收第一基带信号和N套预失真参数，根据所述N个DPD处理器和所述N套预失真参数对所述第一基带信号进行数字预失真处理，得到N路第二基带信号，其中，所述第一预失真部分具体包括N个DPD处理器和N-1个乘法器，其中：
    所述N个DPD处理器中的第x个DPD处理器，用于接收所述N套预失真参数中的第x套预失真参数和N路DPD处理器输入信号中的第x路DPD处理器输入信号，根据所述第x套预失真参数对所述第x路DPD处理器输入信号进行数字预失真处理，得到N路DPD处理器输出 信号中的第x路DPD处理器输出信号；其中，x为整数，取值为1至N；当x为1时，所述第x路DPD处理器输入信号为所述第一基带信号；当x为2至N中任何一个时，所述第x路DPD处理器输入信号为：所述N个DPD处理器中的第x-1个DPD处理器发送的第x-1路DPD处理器输出信号，其中，所述第x-1路DPD处理器输出信号为所述N路DPD处理器输出信号中的第x-1路DPD处理器输出信号；
    所述N-1个乘法器中的第y个乘法器，用于接收所述N个DPD处理器中的第y个DPD处理器发送的第y路DPD处理器输出信号和第y+1个DPD处理器发送的第y+1路DPD处理器输出信号，将所述第y路和第y+1路DPD处理器输出信号相乘，得到所述N路第二基带信号中的第y路第二基带信号，将所述第y路第二基带信号发送至所述至少一个DAC中的一个DAC；其中，所述第y路DPD处理器输出信号为所述N路DPD处理器输出信号中的第y路DPD处理器输出信号，所述第y+1路DPD处理器输出信号为所述N路DPD处理器输出信号中的第y+1路DPD处理器输出信号，y为整数，取值为1至N-1；
    当x为N时，所述第x路DPD处理器输出信号为所述N路第二基带信号中的第x路第二基带信号，所述第x个DPD处理器还用于将所述第x路第二基带信号发送至所述至少一个DAC中的一个DAC。
  4. 如权利要求1所述的装置，其特征在于，所述第一预失真部分包括N个数字预失真DPD处理器，用于接收第一基带信号和N套预失真参数，根据所述N个DPD处理器和所述N套预失真参数对所述第一基带信号进行数字预失真处理，得到N路第二基带信号，其中，所述第一预失真部分具体包括N个DPD处理器和N-1个加法器，其中：
    所述N个DPD处理器中的第x个DPD处理器，用于接收所述N套预失真参数中的第x套预失真参数和所述第一基带信号,根据所述第x套预失真参数对所述第一基带信号进行数字预失真处理，得到N路DPD处理器输出信号中的第x路DPD处理器输出信号；其中，x为整数，取值为1至N；
    所述N-1个加法器中的第y个加法器，用于接收所述N个DPD处理器中的第y个DPD处理器发送的第y路DPD处理器输出信号和所述N个DPD处理器中的第y+1个DPD处理器发送的第y+1路DPD处理器输出信号，将所述第y路和第y+1路DPD处理器输出信号相加，得到所述N路第二基带信号中的第y路第二基带信号，将所述第y路第二基带信号发送至所述至少一个DAC中的一个DAC；其中，所述第y路DPD处理器输出信号为所述N路DPD处理器输出信号中的第y路DPD处理器输出信号，所述第y+1路DPD处理器输出信号为所述N路DPD处理器输出信号中的第y+1路DPD处理器输出信号，y为整数，取值为1至N-1；
    当x为N时，所述第x路DPD处理器输出信号为所述N路第二基带信号中的第x路第二基带信号，所述第x个DPD处理器还用于将所述第x路第二基带信号发送至所述至少一个DAC中的一个DAC。
  5. 如权利要求1所述的装置，其特征在于，所述第一预失真部分包括N个数字预失真DPD处理器，用于接收第一基带信号和N套预失真参数，根据所述N个DPD处理器和所述N套预失真参数对所述第一基带信号进行数字预失真处理，得到N路第二基带信号，其中，所述第一预失真部分具体包括N个DPD处理器和L个加法器，其中，L等于对((N-2)/2)进行上取整得到的值；
    所述N个DPD处理器中的第x个DPD处理器，用于接收所述N套预失真参数中的第x套 预失真参数和N路DPD处理器输入信号中的第x路DPD处理器输入信号,根据所述第x套预失真参数对所述第x路DPD处理器输入信号进行数字预失真处理，得到所述N路第二基带信号中的第x路第二基带信号，将所述第x路第二基带信号发送至所述至少一个DAC中的一个DAC；其中，x为整数，取值为1至N；
    所述L个加法器中的第p个加法器，用于接收所述N个DPD处理器中的第2p-1个DPD处理器发送的第2p-1路第二基带信号和所述N个DPD处理器中的第2p个DPD处理器发送的第2p路第二基带信号，将所述第2p-1路和第2p路第二基带信号相加，得到所述N路DPD处理器输入信号中的第2p+1路和第2p+2路DPD处理器输入信号，将所述第2p+1路和第2p+2路DPD处理器输入信号发送到所述N个DPD处理器中的第2p+1个和第2p+2个DPD处理器；其中，所述第2p-1路第二基带信号为所述N路第二基带信号中的第2p-1路第二基带信号，所述第2p路第二基带信号为所述N路第二基带信号中的第2p路第二基带信号，p为整数，取值为1至L-1；
    L为2的倍数，所述L个加法器中的第L个加法器，用于接收所述N个DPD处理器中的第2L-1个DPD处理器发送的第2L-1路第二基带信号和所述N个DPD处理器中的第2L个DPD处理器发送的第2L路第二基带信号，将所述第2L-1路和第2L路第二基带信号相加，得到所述N路DPD处理器输入信号中的第2L+1路和第2L+2路DPD处理器输入信号，将所述第2L+1路和第2L+2路DPD处理器输入信号发送到所述N个DPD处理器中的第2L+1个和第2L+2个DPD处理器；或者，
    L不为2的倍数，所述L个加法器中的第L个加法器，用于接收所述N个DPD处理器中的第2L-1个DPD处理器发送的第2L-1路第二基带信号和所述N个DPD处理器中的第2L个DPD处理器发送的第2L路第二基带信号，将所述第2L-1路和第2L路第二基带信号相加，得到所述N路DPD处理器输入信号中的第2L+1路DPD处理器输入信号，将所述第2L+1路DPD处理器输入信号发送到所述N个DPD处理器中的第2L+1个DPD处理器；
    其中，所述第2L-1路第二基带信号为所述N路第二基带信号中的第2L-1路第二基带信号，所述第2L路第二基带信号为所述N路第二基带信号中的第2L路第二基带信号，当x为1至2时，所述第一基带信号为所述第x路DPD处理器输入信号。
  6. 如权利要求1至5任一项所述的装置，其特征在于，所述第二预失真部分包括W个信号确定部分，其中：
    所述W个信号确定部分中的第e信号确定部分，用于接收所述N路第三基带信号和所述网络系数,根据所述N路第三基带信号和所述网络系数确定第e路第二预失真部分输出信号，所述第e路第二预失真部分输出信号对应于所述M路第四基带信号中的至少一路第四基带信号；
    其中，e为整数，取值为1至W。
  7. 如权利要求1至6中任一项所述的装置，其特征在于，所述反馈信号转换部分，包括：耦合部分、混频部分和模数转换器ADC，其中：
    所述耦合部分，用于接收所述R路经过功率放大器放大的射频信号，根据所述R路经过功率放大器放大的射频信号得到一路耦合部分输出信号，将所述一路耦合部分输出信号发送至所述混频部分；
    所述混频部分，用于接收载波信号和所述一路耦合部分输出信号，根据所述载波信号对 所述一路耦合部分输出信号进行下变频，得到第六基带信号，将所述第六基带信号发送至所述ADC；
    所述ADC，用于对所述第六基带信号进行模拟信号到数字信号的转换，得到所述第五基带信号，将所述第五基带信号发送至所述解算部分。
  8. 如权利要求1至6中任一项所述的装置，其特征在于，所述反馈信号转换部分，包括：耦合部分、混频部分、削波器和ADC，其中：
    所述耦合部分，用于接收所述R路经过功率放大器放大的射频信号，根据所述R路经过功率放大器放大的射频信号得到一路耦合部分输出信号，将所述一路耦合部分输出信号发送至所述混频部分；
    所述混频部分，用于接收载波信号和所述一路耦合部分输出信号，根据所述载波信号对所述一路耦合部分输出信号进行下变频，得到第六基带信号，将所述第六基带信号发送至所述削波器；
    所述削波器，用于对所述第六基带信号进行限幅处理，得到第七基带信号，将所述第七基带信号发送至所述ADC；
    所述ADC，用于对所述第七基带信号进行模拟信号到数字信号的转换，得到所述第五基带信号，将所述第五基带信号发送至所述解算部分。
  9. 一种装置，其特征在于，包括：如权利要求1至6任一项所述的预失真处理装置、振荡器和M个混频部分，其中：
    所述第二预失真部分还用于将所述M路第四基带信号中的第t路第四基带信号发送至所述M个混频部分中的第t个混频部分；
    所述振荡器，用于生成载波信号，将所述载波信号发送至所述M个混频部分；
    所述M个混频部分中的第t个混频部分，用于根据所述载波信号对所述第t路第四基带信号进行上变频，得到M路第一射频信号中的第t路第一射频信号；
    其中，t为整数，取值为1至M。
  10. 一种装置，其特征在于，包括：如权利要求7或8所述的预失真处理装置、振荡器和M个混频部分，其中：
    所述第二预失真部分还用于将所述M路第四基带信号中的第t路第四基带信号发送至所述M个混频部分中的第t个混频部分；
    所述振荡器，用于生成载波信号，将所述载波信号发送至所述M个混频部分和所述反馈信号转换部分包括的混频部分；
    所述M个混频部分中的第t个混频部分，用于根据所述载波信号对所述第t路第四基带信号进行上变频，得到M路第一射频信号中的第t路第一射频信号；
    其中，t为整数，取值为1至M。
  11. 一种装置，其特征在于，包括：如权利要求9或10所述的装置和M个功率放大器PA，其中：
    所述M个混频部分中的第t个混频部分还用于将所述M路第一射频信号中的第t路第一射频信号发送至所述M个PA中的第t个PA；
    所述M个PA中的第t个PA，用于将所述第t路第一射频信号进行放大，得到M路第二射频信号中的第t路第二射频信号，将所述第t路第二射频信号发送至反馈信号转换部分,作为所述反馈信号转换部分接收的所述R路经过功率放大器放大的射频信号中的一路经过功率放大器放大的射频信号；
    其中，t为整数，取值为1至M。
  12. 一种设备，其特征在于，包括：如权利要求11所述的装置和M个天线，M为整数，其中：
    所述M个PA中的第t个PA还用于将所述第t路第二射频信号发送至所述M个天线中的第t个天线；
    所述M个天线的第t个天线用于在空口发送所述第t路第二射频信号；
    其中，t为整数，取值为1至M。
  13. 一种数字预失真方法，其特征在于，包括：
    根据N套预失真参数对第一基带信号进行数字预失真处理，得到N路第二基带信号；
    对所述N路第二基带信号进行数字信号到模拟信号的转换，得到N路第三基带信号；
    根据所述N路第三基带信号和网络系数确定M路第四基带信号；
    根据R路经过功率放大器放大的射频信号确定第五基带信号，其中，所述R路经过功率放大器放大的射频信号是根据所述M路第四基带信号确定的；
    根据所述第一基带信号和所述第五基带信号确定所述N套预失真参数和所述网络系数；
    其中，N、M和R为整数，N大于等于1，M大于等于N，R大于等于1且小于等于M。
  14. 如权利要求13所述的方法，其特征在于，根据N套预失真参数对第一基带信号进行数字预失真处理，得到N路第二基带信号，包括：
    x为整数，取值为1至N；
    当x为1时，根据所述N套预失真参数的第x套预失真参数对所述第一基带信号进行数字预失真处理，得到所述N路第二基带信号的第x路第二基带信号；
    当x为2至N中任何一个整数时，根据所述N套预失真参数的第x套预失真参数对所述N路第二基带信号的第x-1路第二基带信号进行进行数字预失真处理，得到所述N路第二基带信号的第x路第二基带信号。
  15. 如权利要求13所述的方法，其特征在于，根据N套预失真参数对第一基带信号进行数字预失真处理，得到N路第二基带信号，包括：
    x为整数，取值为1至N；
    当x为1至N中任何一个整数时，根据所述N套预失真参数中的第x套预失真参数对N路输入信号的第x路输入信号进行数字预失真处理，得到N路输出信号的第x路输出信号，其中，当x为1时，所述第x路输入信号为所述第一基带信号，当x为2至N中任何一个整数时，所述第x路输入信号为所述N路输出信号的第x-1路输出信号；
    当x为1至N-1中任何一个整数时，将所述N路输出信号的第x路和第x+1路输出信号相乘，得到所述N路第二基带信号的第x路第二基带信号；
    当x为N时，所述N路输出信号的第x路输出信号为所述N路第二基带信号的第x路第 二基带信号。
  16. 如权利要求13所述的方法，其特征在于，根据N套预失真参数对第一基带信号进行数字预失真处理，得到N路第二基带信号，包括：
    x为整数，取值为1至N；
    当x为1至N中任何一个整数时，根据所述N套预失真参数中的第x套预失真参数对N路输入信号的第x路输入信号进行数字预失真处理，得到N路输出信号的第x路输出信号，其中，所述第x路输入信号为所述第一基带信号；
    当x为1至N-1中任何一个整数时，将所述N路输出信号的第x路和第x+1路输出信号相加，得到所述N路第二基带信号的第x路第二基带信号；
    当x为N时，所述N路输出信号的第x路输出信号为所述N路第二基带信号的第x路第二基带信号。
  17. 如权利要求13所述的方法，其特征在于，根据N套预失真参数对第一基带信号进行数字预失真处理，得到N路第二基带信号，包括：
    x为整数，取值为1至N；
    当x为1至N中任何一个整数时，根据所述N套预失真参数中的第x套预失真参数对N路输入信号的第x路输入信号进行数字预失真处理，得到所述N路第二基带信号的第x路第二基带信号，其中：
    当x为1或2时，所述第x路输入信号为所述第一基带信号；
    当x为2至N中任何一个整数时，所述第x路输入信号为将所述N路输出信号的第2p-1路和第2p路输出信号相加得到的信号，其中p等于对((x-2)/2)进行上取整得到的值。
  18. 如权利要求13至权利要求17中任何一个所述的方法，其特征在于，根据所述N路第三基带信号和网络系数确定M路第四基带信号，包括：
    根据所述N路第三基带信号和所述网络系数，确定所述M路第四基带信号中的第t路第四基带信号，其中，t为整数，取值为1至M。
  19. 如权利要求13至18中任一项所述的方法，其特征在于，所述方法还包括：
    根据载波信号对M路第四基带信号进行上变频，得到M路第一射频信号；
    对M路第一射频信号进行功率放大，得到M路经过功率放大器放大的射频信号,所述R路经过功率放大器放大的射频信号为所述M路经过功率放大器放大的射频信号中的R路射频信号。
  20. 一种预失真处理装置，其特征在于，包括：第一预失真部分、第二预失真部分、反馈信号转换部分和解算部分；
    所述第一预失真部分，包括N个DPD处理器，用于接收第一基带信号和N套预失真参数，根据所述N套预失真参数对所述第一基带信号进行数字预失真处理，得到N路第二基带信号，将所述N路第二基带信号发送至所述第二预失真部分；
    所述第二预失真部分，用于接收所述N路第二基带信号和网络系数，根据所述N路第二基带信号和网络系数确定M路第三基带信号；
    反馈信号转换部分，用于接收R路经过功率放大器放大的射频信号，所述R路经过功率放大器放大的射频信号是根据所述M路第三基带信号得到的射频信号，将所述R路经过功率放大器放大的射频信号转换成第五基带信号，将所述第五基带信号发送至所述解算部分；
    所述解算部分，用于接收所述第一基带信号和所述第五基带信号，根据所述第一基带信号和所述第五基带信号确定所述N套预失真参数和所述网络系数，将所述N套预失真参数发送至所述第一预失真部分，将所述网络系数发送至所述第二预失真部分；
    其中，N、M和R为整数，N大于等于1，M大于等于N，R大于等于1且小于等于M。
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