WO2018171777A1 - 一种构造编码序列的方法,装置 - Google Patents

一种构造编码序列的方法,装置 Download PDF

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Publication number
WO2018171777A1
WO2018171777A1 PCT/CN2018/080379 CN2018080379W WO2018171777A1 WO 2018171777 A1 WO2018171777 A1 WO 2018171777A1 CN 2018080379 W CN2018080379 W CN 2018080379W WO 2018171777 A1 WO2018171777 A1 WO 2018171777A1
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sequence
elements
reliability
length
constructing
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PCT/CN2018/080379
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English (en)
French (fr)
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黄凌晨
张公正
陈莹
乔云飞
李榕
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华为技术有限公司
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Priority to KR1020197026302A priority Critical patent/KR20190116394A/ko
Priority to EP18771540.4A priority patent/EP3573266B1/en
Publication of WO2018171777A1 publication Critical patent/WO2018171777A1/zh
Priority to US16/579,532 priority patent/US11063700B2/en

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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/004Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056Systems characterized by the type of code used
    • H04L1/0067Rate matching
    • H04L1/0068Rate matching by puncturing
    • H04L1/0069Puncturing patterns
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/13Linear codes
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/63Joint error correction and other techniques
    • H03M13/635Error control coding in combination with rate matching
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/63Joint error correction and other techniques
    • H03M13/635Error control coding in combination with rate matching
    • H03M13/6356Error control coding in combination with rate matching by repetition or insertion of dummy data, i.e. rate reduction
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/63Joint error correction and other techniques
    • H03M13/635Error control coding in combination with rate matching
    • H03M13/6362Error control coding in combination with rate matching by puncturing
    • H03M13/6368Error control coding in combination with rate matching by puncturing using rate compatible puncturing or complementary puncturing
    • H03M13/6375Rate compatible punctured convolutional [RCPC] codes
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/65Purpose and implementation aspects
    • H03M13/6502Reduction of hardware complexity or efficient processing
    • H03M13/6505Memory efficient implementations
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/004Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0041Arrangements at the transmitter end
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/004Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056Systems characterized by the type of code used
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/004Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056Systems characterized by the type of code used
    • H04L1/0057Block codes
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/004Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056Systems characterized by the type of code used
    • H04L1/0057Block codes
    • H04L1/0058Block-coded modulation
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/004Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056Systems characterized by the type of code used
    • H04L1/0067Rate matching

Definitions

  • the present application relates to the field of communications, and in particular to a technical solution for constructing a coding sequence.
  • the rapid evolution of wireless communication indicates that the future 5G communication system will present some new features.
  • the most typical three communication scenarios include eMBB (English full name: Enhanced Mobile Broadband, Chinese full name: enhanced mobile broadband), mMTC (English full name: Massive Machine Type Communication, full name in Chinese: massive machine connection communication) and URLLC (English full name: Ultra Reliable Low Latency Communication, full name in Chinese: high reliability and low latency communication), the demand for these communication scenarios will propose new LTE technology challenge.
  • channel coding is one of the important research objects to meet the needs of 5G communication.
  • Shannon's theory was put forward, researchers from all over the world have been working on finding a codec method that can reach the Shannon limit and have relatively low complexity.
  • the LDPC code has been adopted as the data channel coding scheme of the eMBB scenario
  • the Polar code has been adopted as the control channel coding scheme of the eMBB scenario.
  • the URLLC and mMTC scenarios impose strict requirements on the delay and reliability of channel coding.
  • Polar Codes are An encoding method based on channel polarization.
  • the polarization code is the first and only known channel coding method that can be rigorously proven to "reach" the channel capacity.
  • the Polar code is a linear block code. Its generator matrix is F N and its encoding process is among them Is a binary line vector of length N (ie code length); F N is an N ⁇ N matrix, and Here defined as The Kronecker product of the matrix F 2 ; the addition and multiplication operations mentioned above are addition and multiplication operations on the binary Galois field.
  • F N is an N ⁇ N matrix, and Here defined as The Kronecker product of the matrix F 2 ; the addition and multiplication operations mentioned above are addition and multiplication operations on the binary Galois field.
  • a part of the bits are used to carry information, called information bits, and the set of indexes of these bits is recorded as The other part of the bit is set to a fixed value pre-agreed by the transceiver, which is called a fixed bit, and the index is used as a set. Complement Said.
  • the information bits are the part carrying the information.
  • the index set of the construction process of the Polar code Including K info + K check information bit number with the highest reliability except punch bits, where K info is the number of information bits, K check is the number of check bits, and check bits include but are not limited to cyclic redundancy check ( English full name Cyclic Redundancy Check, English abbreviation CRC) bit and dynamic check bits, K check ⁇ 0 without loss of generality, in the Polar construction example below, taking the number of information bits K as an example, the check bits are included in the information bits in.
  • the construction process of the Polar code includes online calculation of the reliability (error probability) of each subchannel and the offline storage reliability sequence, the reliability ranking sequence and the like.
  • the present application provides a method and a corresponding apparatus for constructing a code sequence.
  • the reliability sequence corresponding to the mother code sequence with the maximum length of N max is transformed, and the reliability sequence of the mother code sequence is characterized by the basic sequence correspondence reliability sequence and the reliability reference sequence.
  • the coded sequence is then constructed based on the stored base sequence correspondence reliability sequence and reliability reference sequence.
  • the coding sequence in the embodiment of the present application is a polarization code sequence.
  • the length of the reliability sequence corresponding to the basic sequence is less than or equal to the length of the reliability sequence corresponding to the mother code sequence, and the basic sequence is a subset of the mother code sequence, and the reliability sequence corresponding to the basic sequence is a mother code.
  • the sequence corresponds to a subset of the reliability sequence, the reliability reference sequence including at least one element other than the reliability sequence corresponding to the basic sequence in the reliability sequence corresponding to the mother code sequence;
  • the length of the reliability sequence corresponding to the basic sequence plus the length of the reliability reference sequence is much smaller than the mother code sequence.
  • the length of the corresponding reliability sequence can therefore save storage overhead and can also be done to characterize the reliability sequence corresponding to the mother code sequence.
  • the method provided by the present application further includes: storing a reliable quantized sequence and a reliable quantized reference sequence, where the reliable quantized sequence is a sequence obtained by quantizing a reliability sequence corresponding to the basic sequence, the reliability The quantized reference sequence is obtained by quantizing the reliability reference sequence.
  • the present application provides an apparatus for constructing a polarization code, comprising:
  • a memory configured to store a reliability sequence corresponding to the basic sequence, where the length of the reliability sequence corresponding to the basic sequence is less than or equal to the length of the reliability sequence corresponding to the mother code sequence;
  • the memory is further configured to store a reliability reference sequence, where the reliability reference sequence includes at least one element other than the reliability sequence corresponding to the basic sequence in the reliability sequence corresponding to the mother code sequence;
  • a processor configured to construct a coding sequence by using a reliability sequence corresponding to the basic sequence stored by the memory and the reliability reference sequence.
  • the apparatus for constructing the coding sequence is specifically a terminal or a network side device.
  • a terminal provided by the embodiment of the present application may be implemented by using a hardware, and the structure includes a transceiver and a processor.
  • the corresponding software implementation can also be performed by hardware.
  • the hardware or software includes one or more modules corresponding to the functions described above.
  • the modules can be software and/or hardware.
  • the network side device provided by the embodiment of the present application may be a base station or a control node.
  • the embodiment of the present application provides a base station, which has a function of realizing the behavior of the base station in the actual method.
  • the functions may be implemented by hardware or by corresponding software implemented by hardware.
  • the hardware or software includes one or more modules corresponding to the functions described above.
  • the structure of the base station includes a processor and a transceiver configured to support the base station to perform the corresponding functions in the above methods.
  • the transceiver is configured to support communication between the base station and the terminal, and send information or signaling involved in the foregoing method to the terminal, and receive information or instructions sent by the base station.
  • the base station can also include a memory for coupling with the processor that stores the necessary program instructions and data for the base station.
  • an embodiment of the present application provides a control node, which may include a controller/processor, a memory, and a communication unit.
  • the controller/processor can be used to coordinate resource management and configuration between multiple base stations, and can be used to perform the methods described in the above embodiments.
  • the memory can be used to store program code and data for the control node.
  • the communication unit is configured to support the control node to communicate with the base station.
  • an embodiment of the present application provides a communication system, where the system includes the base station and the terminal in the foregoing aspect.
  • the control node in the above embodiment may also be included.
  • the embodiment of the present application provides a computer storage medium for storing computer software instructions used by the base station, which includes a program designed to perform the above aspects.
  • the embodiment of the present application provides a computer storage medium for storing computer software instructions used by the terminal, which includes a program designed to execute the above aspects.
  • the present application provides a reliability sequence and a reliability reference sequence for constructing a coding sequence, the reliability sequence including the reliability of the basic sequence correspondence.
  • the reliability sequence refers to the description of the reliability sequence corresponding to the basic sequence in the embodiment, or the description of the reliable quantized sequence corresponding to the basic sequence in the embodiment.
  • the above reliability sequence and reliability reference sequence may be present in a terminal or a network device.
  • FIG. 1 is a schematic diagram of a method for implementing a method for constructing a coding sequence provided by the present application
  • Embodiment 1 is a schematic diagram of Embodiment 1 of a method for constructing a coding sequence provided by the present application;
  • Embodiment 3 is a schematic diagram of Embodiment 2 of a method for constructing a coding sequence provided by the present application;
  • Embodiment 4 is another schematic diagram of Embodiment 2 of a method for constructing a coding sequence provided by the present application;
  • FIG. 5 is a schematic diagram of Embodiment 3 of a method for constructing a coding sequence provided by the present application.
  • FIG. 6 is another schematic diagram of Embodiment 3 of a method for constructing a coding sequence provided by the present application.
  • Embodiment 7 is a schematic diagram of Embodiment 4 of a method for constructing a coding sequence provided by the present application.
  • FIG. 8 is still another schematic diagram of Embodiment 5 of a method for constructing a coding sequence provided by the present application.
  • FIG. 9 is a schematic diagram of an apparatus for constructing a coding sequence provided by the present application.
  • Channel coding which improves data transmission reliability and guarantees communication quality, is the most basic wireless access technology. As shown in FIG. 1, channel information is first encoded on the source information, and then the encoded information is modulated. The coded and modulated information is transmitted to the receiving end through the channel, and corresponding digital demodulation and de-rate matching are performed at the receiving end. Finally, information is obtained by a decoding technique corresponding to channel coding.
  • the present application provides a technical solution for constructing a reliability sequence and constructing a coding sequence according to the channel coding process as shown in FIG.
  • the coding sequence is polarized as an example for description.
  • the mother code sequence can calculate the reliability sequence of length N max by different methods such as density evolution, capacity transfer, and empirical formula.
  • the reliability sequence of length N max is from high to low or low to reliability value.
  • the order is sorted in a high order, and the reliability sort sequence Q is obtained.
  • the frozen location set is a union of the location sets obtained in steps 2 and 3, and the information bit sequence number set (size K) is a complement of the frozen location set;
  • a reliability sequence corresponding to the basic sequence and a storage reliability reference sequence are stored, and the length of the reliability sequence corresponding to the basic sequence is less than or equal to a length of the reliability sequence corresponding to the mother code sequence; and the reliability reference sequence includes at least one element other than the reliability sequence corresponding to the basic sequence in the reliability sequence corresponding to the mother code sequence;
  • the coding sequence is constructed using the reliability sequence corresponding to the basic sequence and the reliability reference sequence.
  • the reliability sequence corresponding to the mother code sequence is used.
  • To indicate that the reliability sequence corresponding to the basic sequence is used. (i) dec @(B n-1 B n-2 ... B 0 ) bin , where (i) dec is expressed as i is a decimal number,
  • the length N s of the reliability sequence corresponding to the basic sequence is smaller than the length N max of the reliability sequence corresponding to the mother code sequence, and the reliability reference sequence holds several elements capable of characterizing the reliability sequence corresponding to the mother code sequence, which may use Can also be used It is shown that the reliability reference sequence is only l max -l s in length. Therefore, when storing, it is only necessary to store only N s + (l max -l s ) values, which is much smaller than the value of N max , thus greatly reducing the storage overhead. In the process of reading, by expanding or multiple reading the reference sequence, a highly reliable subchannel set is obtained; the manner of expanding or multiple reading is related to the type of the reliability sequence.
  • the stored basic sequence corresponds to a reliability sequence length of Then according to the calculation formula of the PW sequence Where (i) dec @(B n-1 B n-2 ...B 0 ) bin , then store Sequence of equal reliability reference values That is, the reliability sequence corresponding to the mother code sequence of length N max can be completely represented.
  • K info +K check is selected to have the highest reliability information bit number set except the punch bits.
  • K info is the number of information bits
  • K check is the number of check bits
  • check bits include but are not limited to CRC bits and dynamic check bits, K check ⁇ 0.
  • the information bit number set is first obtained as an example for description. First, the frozen bit number set is obtained, and then the complement is obtained to obtain the information bit sequence. The principle of the combination is the same, and details are not described herein.
  • the first embodiment will describe the storage process of the reliability sequence and the reliability reference sequence corresponding to the basic sequence.
  • the reliability sequence corresponding to the basic sequence is:
  • the reliability reference sequence is The reliability reference sequence has a length of l max -l s .
  • the reliability sequence of the mother code sequence of different lengths N max for example, when l max ⁇ [8, 9, 10, 11, 12], the mother code length is l s ⁇ [0,1,2,3,4,5,6,7,8,9,10,11], the length of the reliability sequence corresponding to the basic sequence is
  • the reliability sequence corresponding to the length of the mother code sequence and the length range of the reliability sequence corresponding to the basic sequence are not limited thereto, and the method provided by the embodiment of the present application may be used.
  • the element values storing 512 reliability sequences are quantized according to 13 bits, as shown in Table 1:
  • This application provides an implementation method of transforming a reliability sequence of length 512 into a reliability sequence corresponding to a basic sequence plus a reliability reference sequence, which may be as follows:
  • the reliability sequence can be obtained by the above formula, and the reliability sequence is obtained by quantizing the value according to 13 bits. 8 shows:
  • the sequence value is 14-bit quantized, and 1024 values are stored, as shown in Table 14:
  • the application provides a method for converting a reliability sequence corresponding to a mother code sequence of length 1024 into a reliability sequence corresponding to a basic sequence and a reliability reference sequence, which may be as follows:
  • the reliability sequence may also be a finite precision quantized value of the original reliability sequence PW i as long as the quantized reliability sequence still satisfies the same relative size relationship as the original reliability sequence.
  • 14-bit quantization can be performed on Table 17 and Table 18.
  • PW i is the PW sequence before quantization
  • max ⁇ PW ⁇ is the maximum value of the pre-quantization PW sequence.
  • the quantization precision is 14 bits.
  • Tables 19 and 20 are obtained.
  • the quantization precision is positively correlated with the length N max of the mother code sequence.
  • N max a larger quantization precision is usually required to ensure that the reliability sequence corresponding to the quantized mother code sequence still satisfies the same original reliability sequence. Relative size relationship.
  • the quantization method of the reliability sequence of the mother code sequences of other lengths has the same principle and will not be described again.
  • the storage side will store 2048 values, as shown in Table 31:
  • the application provides the implementation of transforming the maximum mother code length reliability sequence of length 2048 into a reliability sequence plus reliability reference sequence, which may be as follows:
  • the reliability sequence corresponding to the basic sequence can be obtained by the above formula, and quantize the value according to 14 bits to obtain the quantization.
  • the reliability sequence corresponding to the following basic sequence is shown in Table 36:
  • different l s can also be selected, and the value range is 0 ⁇ l s ⁇ l max ; the reliability sequence corresponding to the basic sequence corresponding to l s and the length of the reliability reference sequence are respectively And l max -l s .
  • a sequence of reliability corresponding to different mother code sequences of length N max can be used for storage.
  • the reliability sequence corresponding to the mother code sequence is calculated by using the PW formula to calculate the length.
  • the reliability sequence corresponding to the basic sequence the embodiment provides a corresponding reading mode.
  • the second embodiment to the fourth embodiment will be separately described below.
  • the code length is M
  • the information length is K info
  • the reliability sequence N s corresponding to the basic sequence provided in the first embodiment is configured to construct a Polar code
  • N the reliability of obtaining the N elements from the base sequence corresponding to a sequence, the value larger than the value of N elements -N N s N s of the elements in the elements;
  • the N elements form a coding sequence corresponding to corresponding bit positions in the basic sequence;
  • the reliability sequence corresponding to the basic sequence is extended to form a reliability sequence of length N, and the length is N reliable.
  • the corresponding sequence of bit positions in the mother code sequence constitutes a coding sequence
  • the code length N of the reliability sequence is determined according to the code length M and the information length K info .
  • M is the code length, Round up.
  • FIG. 3 The schematic diagram of reading the reliability sequence in this embodiment is shown in FIG. 3, and the flow is shown in FIG. 4, and the steps are as follows:
  • Step 100 determine the size of N s and N; when N ⁇ N s, proceeds to step 101; in N> N s, proceeds to step 102;
  • Step 101 When N ⁇ N s , read the first N elements of the reliability sequence corresponding to the basic sequence of length N s to form a reliability sequence of length N, where the values of the N elements values greater than N s -N s elements in said N elements; N elements of the corresponding bit position in the base sequence constituting a coding sequence;
  • the first N elements of the reliability sequence corresponding to the basic sequence are all elements of the reliability sequence of length N.
  • Step 102 at N>N s , using a reliability reference sequence
  • the element in the reliability sequence corresponding to the basic sequence of length N s Expand.
  • Step 103 Record a reliability ranking sequence Q; the reliability ranking sequence Q is obtained by sequentially sorting the elements of the reliability sequence of length N according to the reliability level;
  • Step 104 sequentially read the elements in the reliability sorting sequence Q in order from back to front (or from front to back) according to the rate matching condition;
  • Step 105 If the sequence number corresponding to the read element satisfies the rate matching condition, the element is skipped.
  • step 106 the sequence number of the element is added to the information bit number set.
  • the most reliable sequence number set is a set of frozen bit numbers.
  • the method for constructing a polarization code by reading the reliability sorting sequence in the second embodiment has a small storage overhead and can flexibly adapt to different rate matching modes.
  • Embodiment 3 is a diagrammatic representation of Embodiment 3
  • the code length M, the information length K, and the rate matching manner of each Polar code that may appear in the system are pre-composed.
  • storing the threshold PW th .
  • the threshold can be stored in the form of a threshold table.
  • K check is the value of the CRC bit and/or the dynamic check bit length.
  • steps 200 to 202 of the third embodiment are the same as steps 100 to 102 of the first embodiment, that is, when N ⁇ N s , the read length is N s .
  • the reliability sequence corresponding to the basic sequence of length N s Expand until the extended reliability sequence has a length of N.
  • the reliability sequence of length N is the basis for constructing the coding sequence, and the N elements of the basic sequence form a coding sequence corresponding to the bit positions.
  • step 203 searching for a threshold of a Polar code that needs to be constructed
  • each element PW i and serial number of the length N reliability sequence are simultaneously compared with the threshold PW th .
  • step 204 it is determined whether the value of PW i whose length is N reliability sequence is greater than or equal to (or greater than) the threshold PW th ;
  • step 205 it is determined whether the sequence number i corresponding to the PW i satisfies a rate matching condition
  • Step 206 adding all the elements satisfying step 204 and not satisfying step 205 to the information bit number set
  • the most reliable sequence number set is a set of frozen bit numbers.
  • the reliability sequence corresponding to the basic sequence is read in the third embodiment, and the extended N reliability values can be compared with the threshold at the same time.
  • the comparison process supports parallel processing, and the processing efficiency is high, thereby improving the efficiency of constructing the polarization code.
  • Embodiment 4 is a diagrammatic representation of Embodiment 4:
  • the code length M, the information length K, and the rate matching manner of each Polar code that may appear in the system are pre-composed.
  • storing the threshold PW th .
  • the threshold can be stored in the form of a threshold table.
  • the threshold value indicates that the subchannel sequence number size of the subchannel whose reliability is greater than or equal to (or greater than) the threshold and the sequence number of the subchannel does not satisfy the rate matching condition is K.
  • Step 300 determine the size of N s and N; when N ⁇ N s, proceeds to step 301; in N> N s, proceeds to step 302;
  • Step 301 when N ⁇ N s, the reliability of obtaining the N elements from the base sequence corresponding to a sequence, the value larger than the value of N elements -N N s N s of the elements in the elements;
  • Step 303 searching for a threshold value PW th of the Polar code to be constructed
  • Step 304 when the information bit number set is read x times (the binary representation of x is Calculation Read from the reliability reference sequence.
  • each element PW i and serial number of the reliability sequence corresponding to the basic sequence are simultaneously compared with the threshold PW th, x-1 .
  • step 305 it is determined whether the value of the PW i of the reliability sequence corresponding to the basic sequence is greater than or equal to (or greater than) the threshold PW th, x-1 ; it should be noted that when the x+1 is read, According to the rate matching condition and the reliability sequence of length N s , each element PW i and serial number of the reliability sequence corresponding to the basic sequence are simultaneously compared with the threshold PW th,x (as shown in FIG. 6 ).
  • step 306 it is determined whether the extension sequence number i+(x-1)gN s corresponding to the sequence number i of the PW i satisfies the rate matching condition;
  • Step 307 adding all the numbers i+(x-1)gN s of the elements satisfying step 305 and not satisfying step 306 to the information bit number set
  • the most reliable sequence number set is a set of frozen bit numbers.
  • the frozen bit number set can be read first. Then take the complement set to get the information bit number set
  • Embodiment The method for constructing a polarization code by reading the reliability sort sequence provided in the fourth embodiment does not need to extend the stored short reliability sequence, and supports segmented parallel reading of the short reliability sequence (each segment can be simultaneously Threshold comparison), therefore, the read latency is small, thereby increasing the efficiency of constructing the polarization code.
  • the maximum mother code length reliability sequence with the maximum mother code length of N max is transformed, and the maximum mother code length reliability sequence is referenced by the reliability sequence and reliability. Sequence to characterize.
  • the polarization code is then constructed based on the stored reliability sequence and the reliability reference sequence.
  • the reliability sequence is a subset of a maximum mother code length reliability sequence, and an element in the reliability reference sequence represents an offset between the reliability sequence and the maximum mother code length reliability sequence.
  • each scheme for constructing a polarization code provided by the embodiment of the present application is introduced from the perspective of storing a reliability sequence and reading a reliability sequence and obtaining a set of information bit numbers.
  • each network element such as a terminal, a base station, a control node, etc., includes a hardware structure and/or a software module corresponding to each function.
  • the present application can be implemented in a combination of hardware or hardware and computer software in combination with the elements and algorithm steps of the various examples described in the embodiments disclosed herein.
  • the apparatus for constructing a polarization code includes:
  • the memory 403 stores a reliability sequence corresponding to the basic sequence, where the length of the reliability sequence corresponding to the basic sequence is less than or equal to the length of the reliability sequence corresponding to the mother code sequence; the length of the reliability sequence corresponding to the mother code sequence is The length of the reliability sequence corresponding to the basic sequence is Wherein, 0 ⁇ 1 s ⁇ l max ; the memory 403 is further configured to store a reliability reference sequence, where the reliability reference sequence includes reliability corresponding to the basic sequence in the reliability sequence corresponding to the mother code sequence At least one element outside the sequence; the reliability reference sequence has a length of l max -l s .
  • a reliability sequence corresponding to the basic sequence and the reliability reference sequence are used to construct a coding sequence, such as a polarization code sequence;
  • the controller/processor 402 is configured to construct a coding sequence, such as a polarization code sequence, using the reliability sequence stored by the memory 403 and the reliability reference sequence.
  • the reliability sequence corresponding to the basic sequence is among them, (i) dec @(B n-1 B n-2 ... B 0 ) bin .
  • the reliability reference sequence is
  • controller/processor 402 is further configured to quantize the reliability sequence corresponding to the basic sequence to obtain the reliable quantized sequence, and used to quantize the reliability reference sequence to obtain a location. Resolving a reliable quantified reference sequence;
  • the memory 401 is then also used to store a reliable quantized sequence and a reliable quantized reference sequence.
  • controller/processor 402 may be implemented by circuitry or by general purpose hardware executing software code which, when employed, is also used to store program code that can be executed by the controller/processor 402. The foregoing functions are performed when the controller/processor 402 runs the program code stored in the memory 403.
  • the controller/processor 402 is configured to acquire N elements from the reliability sequence corresponding to the basic sequence when N ⁇ N s , where the value of the N elements is greater than the N s a value of N s -N elements in the element; the corresponding bit positions of the N elements in the basic sequence constitute a coding sequence;
  • the controller/processor 402 is further configured to expand a reliability sequence corresponding to the basic sequence according to an element in the reliability reference sequence to form a reliability sequence of length N, where the length is N.
  • the reliability sequence forms a coding sequence in a corresponding bit position in the mother code sequence; wherein the reliability sequence of length N is the processor reliability reference sequence
  • the reliability sequence corresponding to the element in length Ns Extend it.
  • the memory 403 is further configured to record a reliability ranking sequence Q; the reliability ranking sequence Q is that the controller/processor 402 performs an element of the reliability sequence of length N according to a reliability level. Obtained after sorting in order.
  • the controller/processor 402 is further configured to obtain a set of information bit numbers A; the number of elements in the set of information bit numbers A is equal to a threshold K; the elements in the set of information bit numbers A are sorted by the reliability In the sequence Q, the element whose sequence number does not satisfy the rate matching condition.
  • the controller/processor 402 is further configured to obtain a set of information bit numbers A; the number of elements in the set of information bit numbers A is equal to a threshold K; The element is the element of the reliability sequence of length N, the value is greater than or equal to the threshold PW th of the polarization code, and the sequence number does not satisfy the rate matching condition.
  • controller/processor 402 is further configured to acquire N elements from the reliability sequence corresponding to the basic sequence when N ⁇ N s , the values of the N elements is greater than the value s N s -N element in the elements N; N elements of the corresponding bit position in the base sequence constituting a coding sequence.
  • the controller/processor 402 is further configured to acquire N elements from the reliability sequence corresponding to the basic sequence by N seg times, where the N elements correspond to the mother code sequence.
  • K of the N elements are used to transmit information bits in corresponding bit positions in the mother code sequence
  • the K elements are elements of the reliability sequence of length N, the value is greater than or equal to the threshold PW th of the polarization code, and the sequence number does not satisfy the element of the rate matching condition; the processor takes the K of the transmission information bit The complement of the elements, get NK elements that transmit frozen bits;
  • the NK elements except the K elements in the N elements are used to transmit frozen bits in a corresponding bit position in the mother code sequence, and the NK elements used to transmit the frozen bits are the length In the reliability sequence of N, the value is smaller than the threshold PW th of the coding sequence, or the sequence number satisfies the rate matching element; the controller/processor 402 takes the complement of the elements of the NK transmission freeze bits to obtain the transmission information bits.
  • K elements; the K elements of the transmission information bits and the elements of the NK transmission freeze bits constitute N elements of the code length.
  • the controller/processor 402 reads N s elements of the reliability sequence corresponding to the basic sequence of length N s at the xth read of the N seg read, according to the threshold PW of the coding sequence th calculating the threshold value PW th, x-1, and according to the index i of the N s elements calculated number i + (x-1) gN s, take N s elements in reliability than or equal to the threshold value PW th, x-1 And i+(x-1)gN s does not satisfy the element of the rate matching condition, and the element number i+(x-1)gN s of the element is added to the information bit number set A of the transmission information bit; the information bit number set A is The number of elements is equal to the threshold K;
  • the controller/processor 402 takes the complement of the information bit number set A to obtain NK elements of the transmission freeze bit; the K element of the information bit set in the information bit number set A and the NK transmission freeze
  • the elements of the bits constitute the N elements of the encoded code length; or
  • the sub-N seg times obtain N elements from the reliability sequence corresponding to the basic sequence, including:
  • the controller/processor 402 reads N s elements of the reliability sequence of length N s at the xth read of the N seg read, and calculates according to the threshold PW th of the polarization code Threshold PW th, x-1 ;
  • the controller/processor 402 calculates the sequence number i+(x-1)gN s according to the sequence number i of the N s elements, and takes the reliability of the N s elements to be less than the threshold PW th, x-1 or the sequence number i+ ( X-1) gN s an element satisfying the rate matching condition, the element number i+(x-1)gN s of the element is added to the frozen bit number set A c of the transmission freeze bit;
  • the controller/processor 402 takes the complement of the frozen bit number set A c , and obtains K elements of the transmission information bits to form an information bit number set A; the number of elements in the information bit number set A is equal to the threshold. K;
  • the K elements of the information bits and the elements of the N-K transmission freeze bits in the information bit number set A constitute N elements of the code length.
  • the apparatus for constructing a polarization code may further include an encoder 4051, a modulator 4052, a demodulator 4054, and a decoder 4053.
  • the encoder 4051 is configured to acquire data/signaling that the network side device is to send to the terminal or the terminal is to be sent to the network side device, and encode the data/signaling.
  • the modulator 4052 modulates the data/signal coded by the encoder 4051 and transmits it to the transceiver 401, which is transmitted by the transceiver 401 to the terminal or other network side device.
  • the demodulator 4054 is configured to acquire data and signaling sent by the terminal or other network side device, and perform demodulation.
  • the decoder 4053 is configured to decode the demodulated data/signal of the demodulator 4054.
  • the encoder 4051, the modulator 4052, the demodulator 4054, and the decoder 4053 may be implemented by a synthesized modem processor 405. These units are processed according to the radio access technology employed by the radio access network (e.g., access technologies of LTE and other evolved systems).
  • the radio access network e.g., access technologies of LTE and other evolved systems.
  • the network side device may further include a communication interface 404 for supporting communication between the device configuring the polarization code and other network entities.
  • a communication interface 404 for supporting communication between the device configuring the polarization code and other network entities.
  • Figure 8 only shows a simplified design of the apparatus for constructing a polarization code.
  • the transceiver 401 described above may include a transmitter and a receiver, and the device may include any number of transceivers, processors, controllers/processors, memories, and/or communication interfaces, and the like.
  • the foregoing device may be a terminal or a network side device.
  • the network side device can in turn be a base station or a control node.
  • the controller/processor of the above base station, terminal, or control node of the present application may be a central processing unit (CPU), a general purpose processor, a digital signal processor (DSP), an application specific integrated circuit (ASIC), and a field programmable gate array ( FPGA) or other programmable logic device, transistor logic device, hardware component, or any combination thereof. It is possible to implement or carry out the various illustrative logical blocks, modules and circuits described in connection with the present disclosure.
  • the processor may also be a combination of computing functions, for example, including one or more microprocessor combinations, a combination of a DSP and a microprocessor, and the like.
  • the steps of a method or algorithm described in connection with the present disclosure may be implemented in a hardware or may be implemented by a processor executing software instructions (eg, program code).
  • the software instructions may be comprised of corresponding software modules that may be stored in RAM memory, flash memory, ROM memory, EPROM memory, EEPROM memory, registers, hard disk, removable hard disk, CD-ROM, or any other form of storage well known in the art.
  • An exemplary storage medium is coupled to the processor to enable the processor to read information from, and write information to, the storage medium.
  • the storage medium can also be an integral part of the processor.
  • the processor and the storage medium can be located in an ASIC. Additionally, the ASIC can be located in the terminal.
  • the processor and the storage medium can also exist as discrete components in the terminal.
  • the functions described herein can be implemented in hardware, software, firmware, or any combination thereof.
  • the functions may be stored in a computer readable medium or transmitted as one or more instructions or code on a computer readable medium.
  • Computer readable media includes both computer storage media and communication media including any medium that facilitates transfer of a computer program from one location to another.
  • a storage medium may be any available media that can be accessed by a general purpose or special purpose computer.

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Abstract

本申请实施例提供了一种构造编码序列的方法,装置。所述方法包括:存储基本序列对应的可靠度序列,所述基本序列对应的可靠度序列的长度小于等于母码序列对应的可靠度序列的长度;存储可靠度参考序列,所述可靠度参考序列包括所述母码序列对应的可靠度序列中除所述基本序列对应的可靠度序列之外至少一个元素;利用所述基本序列对应的可靠度序列以及所述可靠度参考序列中的元素构造编码序列。实施本申请,在存储的时候只存储所述基本序列对应的可靠度序列和可靠度参考序列,由于基本序列对应的可靠度序列的长度加上所述可靠度参考序列的长度,远远小于所述原可靠性序列的长度,因此能够节省存储开销。

Description

一种构造编码序列的方法,装置
本申请要求于2017年3月24日提交中国专利局、申请号为201710184944.2、申请名称为“一种构造编码序列的方法,装置”的中国专利申请的优先权,其全部内容通过引用结合在本申请中。
技术领域
本申请涉及通信领域,尤其涉及构造编码序列的技术方案。
背景技术
无线通信的快速演进预示着未来5G通信系统将呈现出一些新的特点,最典型的三个通信场景包括eMBB(英文全称:Enhanced Mobile Broadband,中文全称:增强型移动宽带),mMTC(英文全称:Massive Machine Type Communication,中文全称:海量机器连接通信)和URLLC(英文全称:Ultra Reliable Low Latency Communication,中文全称:高可靠低时延通信),这些通信场景的需求将对现有LTE技术提出新的挑战。
信道编码作为最基本的无线接入技术,是满足5G通信需求的重要研究对象之一。在香农理论提出后,各国学者一直致力于寻找能够达到香农极限同时具有相对较低复杂度的编译码方法。在5G的标准制定进展中,LDPC码已经被采纳为eMBB场景的数据信道编码方案,而Polar码已经被采纳为eMBB场景的控制信道编码方案。而URLLC与mMTC场景则对信道编码的时延和可靠度提出了严格的要求。
极化码(Polar Codes)是
Figure PCTCN2018080379-appb-000001
基于信道极化提出的一种编码方式。极化码是第一种、也是已知的唯一一种能够被严格证明“达到”信道容量的信道编码方法。
Polar码的编译码的简单描述如下:
Polar码是一种线性块码。其生成矩阵为F N,其编码过程为
Figure PCTCN2018080379-appb-000002
其中
Figure PCTCN2018080379-appb-000003
是一个二进制的行矢量,长度为N(即码长);F N是一个N×N的矩阵,且
Figure PCTCN2018080379-appb-000004
这里
Figure PCTCN2018080379-appb-000005
定义为
Figure PCTCN2018080379-appb-000006
个矩阵F 2的克罗内克(Kronecker)乘积;以上涉及的加法、乘法操作均为二进制伽罗华域(Galois Field)上的加法、乘法操作。Polar码的编码过程中,
Figure PCTCN2018080379-appb-000007
中的一部分比特用来携带信息,称 为信息比特,这些比特的索引的集合记作
Figure PCTCN2018080379-appb-000008
另外的一部分比特置为收发端预先约定的固定值,称之为固定比特,其索引的集合用
Figure PCTCN2018080379-appb-000009
的补集
Figure PCTCN2018080379-appb-000010
表示。
注意到,在经典的Polar码中,信息比特为携带信息的部分。而实际中,由于Polar码编码之前,信息比特还会经历循环冗余校验编码、奇偶校验编码等,Polar码的构造过程的索引集合
Figure PCTCN2018080379-appb-000011
包括K info+K check个除打孔比特外可靠度最高的信息比特序号,其中,K info为信息比特数量,K check为校验比特数量,校验比特包括但不限于循环冗余校验(英文全称Cyclic Redundancy Check,英文简称CRC)比特和动态校验比特,K check≥0不失一般性的,下文在Polar的构造举例中,以信息比特数量K为例,校验比特包含在信息比特中。
根据信息比特长度、编码码字的长度,确定信息比特集合
Figure PCTCN2018080379-appb-000012
的过程称为Polar码的构造过程。目前,Polar码的构造包括在线计算每个子信道的可靠度(错误概率)和离线存储可靠度序列、可靠度排序序列等方法。
但是,发明人在本申请的创造过程中发现,现有技术的可靠度序列的存储开销十分大,不利于产品实现。
发明内容
为解决现有技术中存在的构造极化码的存储开销大的问题,本申请提供了一种构造编码序列的方法和相应的装置。
本申请对最大长度为N max的母码序列对应的可靠度序列做一些变换,将母码序列对应可靠度序列用基本序列对应可靠度序列和可靠度参考序列来表征。然后基于存储的基本序列对应可靠度序列和可靠度参考序列,构造编码序列。一种实现方式中,本申请实施例中的编码序列为极化码序列。
其中,所述基本序列对应的可靠度序列的长度小于等于母码序列对应的可靠度序列的长度,所述基本序列是母码序列的子集,所述基本序列对应的可靠度序列为母码序列对应可靠度序列的子集,所述可靠度参考序列包括所述母码序列对应的可靠度序列中除所述基本序列对应的可靠度序列之外至少一个元素;
在存储的时候只存储所述基本序列对应的可靠度序列和可靠度参考序列,由于基本序列对应的可靠度序列的长度加上所述可靠度参考序列的长度,远远小于所述母码序列对应的可靠性序列的长度,因此能够节省存储开销,并且还能完成的表征母码序列对应的可靠度序列的特性。
另外,本申请提供的方法还包括:存储可靠度量化序列和可靠度量化参考序列,所述可靠度量化序列是对所述基本序列对应的可靠度序列进行量化后得到的序列,所述可靠度量化参考序列是对所述可靠度参考序列进行量化后得到的。
另一方面,本申请提供了构造极化码的装置,包括:
存储器,用于存储基本序列对应的可靠度序列,所述基本序列对应的可靠度序列的长度小于等于母码序列对应的可靠度序列的长度;
所述存储器还用于存储可靠度参考序列,所述可靠度参考序列包括所述母码序列对应的可靠度序列中除所述基本序列对应的可靠度序列之外至少一个元素;
处理器,用于利用所述存储器存储的基本序列对应的可靠度序列以及所述可靠度参考序列构造编码序列。
本申请实施例中,构造编码序列的装置具体为终端或者网络侧设备。
本申请实施例提供的一种终端,该所述功能可以通过硬件实现,其结构中包括收发器和处理器。也可以通过硬件执行相应的软件实现。所述硬件或软件包括一个或多个与上述功能相对应的模块。所述模块可以是软件和/或硬件。
再一方面,本申请实施例提供的网络侧设备,该网络侧设备可以是一种基站,也可以是一种控制节点。
另一方面,本申请实施例提供了一种基站,该基站具有实现上述方法实际中基站行为的功能。所述功能可以通过硬件实现,也可以通过硬件执行相应的软件实现。所述硬件或软件包括一个或多个与上述功能相对应的模块。
在一个可能的设计中,基站的结构中包括处理器和收发器,所述处理器被配置为支持基站执行上述方法中相应的功能。所述收发器用于支持基站与终端之间的通信,向终端发送上述方法中所涉及的信息或者信令,接收基站所发送的信息或指令。所述基站还可以包括存储器,所述存储器用于与处理器耦合,其保存基站必要的程序指令和数据。
又一方面,本申请实施例提供了一种控制节点,可以包括控制器/处理器,存储器以及通信单元。所述控制器/处理器可以用于协调多个基站之间的资源管理和配置,可以用于执行上述实施例描述的方法。存储器可以用于存储控制节点的程序代码和数据。所述通信单元,用于支持该控制节点与基站进行通信。
又一方面,本申请实施例提供了一种通信系统,该系统包括上述方面所述的基站和终端。可选地,还可以包括上述实施例中的控制节点。
再一方面,本申请实施例提供了一种计算机存储介质,用于储存为上述基站所用的计算机软件指令,其包含用于执行上述方面所设计的程序。
再一方面,本申请实施例提供了一种计算机存储介质,用于储存为上述终端所用的计算机软件指令,其包含用于执行上述方面所设计的程序。
本申请提供了一种用于构造编码序列的可靠度序列和可靠度参考序列,所述可靠度序列中包括基本序列对应的可靠度。
所述可靠度序列的具体形式可以参见实施例中对基本序列对应的可靠度序列的描述,或者实施例中对基本序列对应的可靠度量化序列的描述。
上述可靠度序列和可靠度参考序列可以存在终端或者网络设备中。
附图说明
为了更清楚地说明本申请实施例的技术方案,下面将对本申请实施例中所需要使用的附图作简单地介绍,显而易见地,下面所描述的附图仅仅是本申请的一些实施例,对于本领域普通技术人员来讲,在不付出创造性劳动的前提下,还可以根据这些附图获得其他的附图。
图1是本申请提供的构造编码序列的方法实施场景示意图;
图2是本申请提供的构造编码序列的方法实施例一的示意图;
图3是本申请提供的构造编码序列的方法实施例二的示意图;
图4是本申请提供的构造编码序列的方法实施例二的又一示意图;
图5是本申请提供的构造编码序列的方法实施例三的示意图;
图6是本申请提供的构造编码序列的方法实施例三的又一示意图;
图7是本申请提供的构造编码序列的方法实施例四的示意图;
图8是本申请提供的构造编码序列的方法实施例五的又一示意图;
图9是本申请提供的构造编码序列的装置示意图。
具体实施方式
下面将描述本申请所提供的实施例。
下一代通信网络中,最典型的三个通信场景包括eMBB,mMTC和URLLC,这些通信场景的需求将对现有LTE技术提出新的挑战。作为提高数据传输可靠性,保证通信质量的信道编码是最基本的无线接入技术。如图1所示,首先对信源信息进行信道编码,然后对编码后的信息进行调制,经过编码调制后的信息经过信道传输至接收端,在接收端进行对应的数字解调和解速率匹配,最后通过与信道编码对应的译码技术,获得信息。
本申请提供一种在如图1所示的信道编码过程中,构造可靠度序列并据此构造编码序列的技术方案。
在本申请实施例中,以编码序列为极化(polar)为例进行说明。
构造Polar码时,对给定的长度
Figure PCTCN2018080379-appb-000013
的母码序列,可以通过密度进化、容量转移、经验公式等不同方法计算长度为N max的可靠度序列,对该长度为N max的可靠度序列按照可靠度值由高到低或由低到高的顺序进行排序,得到可靠度排序序列Q。
对给定长度为N max的可靠度排序序列Q,序号i较小的元素Q i对应的子信道的可靠度较低(按从小到大的顺序),或者序号i较小的元素Q i对应的子信道的可靠度较高(按从大到小的顺序)。使用Q序列构造信息长度为K,编码长度为M的Polar码时,读取Q序列步骤为:
1、根据编码码长M及信息长度K info确定用于构造编码序列的可靠度序列的码长N。一种可能的实现方式中,
Figure PCTCN2018080379-appb-000014
M为编码码长,
Figure PCTCN2018080379-appb-000015
为向上取整,从N max长的可靠度排序序列Q中读取长度为N的可靠度排序序列Q;
2、根据速率匹配条件,计算N-M个速率匹配位置;
3、从i=0(或N-1)开始,依次从长度为N可靠度排序序列Q中读取可靠度值较低的元素,若该元素属于速率匹配位置则跳过,直到读取M-K个元素;
冻结位置集合为步骤2和3得到的位置集合的并集,信息比特序号集合(大小为K)为冻结位置集合的补集;
可以理解的是,上述可靠度排序序列Q序列根据可靠度序列进行排序得到,该过程可以离线完成。
本申请实施例提供的一种构造编码序列的方法中,如图2所示,首先存储基本序列对应的可靠度序列以及存储可靠度参考序列,所述基本序列对应的可靠度序列的长度小于等于母码序列对应的可靠度序列的长度;而所述可靠度参考序列包括所述母码序列对应的可靠度序列中除所述基本序列对应的可靠度序列之外至少一个元素;
然后,利用所述基本序列对应的可靠度序列以及所述可靠度参考序列构造编码序列。
母码序列对应的可靠度序列用
Figure PCTCN2018080379-appb-000016
来表示,基本序列对应的可靠度序列用
Figure PCTCN2018080379-appb-000017
(i) dec@(B n-1B n-2...B 0) bin,其中(i) dec表示为i为十进制数,
Figure PCTCN2018080379-appb-000018
基本序列对应的可靠度序列的长度N s小于母码序列对应的可靠度序列的长度N max,而且可靠度参考序列保存几个能表征所述母码序列对应的可靠度序列的元素,其可以用
Figure PCTCN2018080379-appb-000019
也可以用
Figure PCTCN2018080379-appb-000020
来表示,可靠度参考序列的长度仅为l max-l s。因此在存储的时候,只需要存储仅为N s+(l max-l s)个值,该值远远小于N max的值,因此大大减小了存储开销。在读取的过程中,通过对该参考序列进行扩展或者多次读取,获得可靠度高的子信道集合;扩展或多次读取的方式与可靠度序列的类型相关。
具体的,若存储的基本序列对应的可靠度序列长度为
Figure PCTCN2018080379-appb-000021
则根据PW序列的计算公式
Figure PCTCN2018080379-appb-000022
其中,(i) dec@(B n-1B n-2...B 0) bin,再存储
Figure PCTCN2018080379-appb-000023
等 可靠度参考值组成的序列
Figure PCTCN2018080379-appb-000024
即能够完整表示出长度为N max的母码序列对应的可靠度序列。
基于此,在构造编码序列,例如polar码序列的时候,根据需要构造的polar码的长度,读取所述存储的长度为
Figure PCTCN2018080379-appb-000025
的基本序列对应的可靠度序列,并根据可靠度参考序列中的元素的值,对长度为
Figure PCTCN2018080379-appb-000026
的基本序列对应的可靠度序列进行扩展或者进行多次读取,选择K info+K check个除打孔比特外可靠度最高的信息比特序号集合
Figure PCTCN2018080379-appb-000027
其中,K info为信息比特数量,K check为校验比特数量,校验比特包括但不限于CRC比特和动态校验比特,K check≥0。然后将对应的信息序列和动态校验比特序列(如果有)映射到这些序号;剩余的为静态冻结比特序号集合,其值设置为收发两端约定的固定值。
后续的实施例的举例中,以首先获得信息比特序号集合为例进行说明,先获得冻结比特序号集合,然后再取其补集获得信息比特序列结合原理相同,不再赘述。
以下将分实施例一至实施例四,描述本申请提供的构造编码序列的方法。
实施例一
本实施例一将描述基本序列对应的可靠度序列和可靠度参考序列的存储过程。
首先对于长度为
Figure PCTCN2018080379-appb-000028
的母码序列对应的可靠度序列利用PW公式进行变形为:
Figure PCTCN2018080379-appb-000029
据此,基本序列对应的可靠度序列为:
Figure PCTCN2018080379-appb-000030
(i) dec@(B n-1B n-2...B 0) bin,(i) dec表示为i为十进制数,(B n-1B n-2...B 0) bin表示二进制数,β为指数的基数。所述基本序列对应的可靠度序列的长度为
Figure PCTCN2018080379-appb-000031
其中,0≤l s<l max
所述可靠度参考序列为
Figure PCTCN2018080379-appb-000032
所述可靠度参考序列的长度为l max-l s
根据基本序列对应的可靠度序列
Figure PCTCN2018080379-appb-000033
以及可靠度参考序列
Figure PCTCN2018080379-appb-000034
即能够完整表示长度为N max的母码序列对应的可靠度序列。
根据上述公式,对不同的长度N max的母码序列的可靠度序列,例如当l max∈[8,9,10,11,12],所述母码长度为
Figure PCTCN2018080379-appb-000035
l s∈[0,1,2,3,4,5,6,7,8,9,10,11],所述基本序列对应的可靠度序列的长度为
Figure PCTCN2018080379-appb-000036
这些情况仅为举例,本申请针对的长度的母码序列对应的可靠度序列,以及基本序列对应的可靠度序列的长度取值范围不仅限于此,其均可采用本申请实施例提供的方法进行存储,下面将分别以长度为N max=512,1024,2048的母码序列为例进行说明。
一、对于长度为
Figure PCTCN2018080379-appb-000037
的母码序列对应的长可靠度序列,设置β=2 0.25,按照现有技术的存储方式,将存储512个可靠度序列的元素值按照13bit进行量化,如表1所示:
表1
0 413 491 903 583 996 1074 1487
694 1106 1184 1597 1277 1690 1768 2180
825 1238 1316 1728 1408 1821 1899 2312
1519 1931 2009 2422 2102 2515 2593 3005
981 1394 1472 1884 1565 1977 2055 2468
1675 2087 2166 2578 2258 2671 2749 3161
1806 2219 2297 2709 2390 2802 2880 3293
2500 2913 2991 3403 3083 3496 3574 3987
1167 1579 1657 2070 1750 2163 2241 2653
1861 2273 2351 2764 2444 2857 2935 3347
1992 2404 2482 2895 2575 2988 3066 3478
2686 3098 3176 3589 3269 3682 3760 4172
2148 2560 2639 3051 2731 3144 3222 3634
2842 3254 3332 3745 3425 3838 3916 4328
2973 3386 3464 3876 3556 3969 4047 4460
3667 4079 4157 4570 4250 4663 4741 5153
1388 1800 1878 2291 1971 2384 2462 2874
2081 2494 2572 2984 2665 3077 3155 3568
2213 2625 2703 3116 2796 3209 3287 3699
2906 3319 3397 3810 3490 3902 3980 4393
2369 2781 2859 3272 2952 3365 3443 3855
3063 3475 3553 3966 3646 4058 4137 4549
3194 3606 3684 4097 3777 4190 4268 4680
3888 4300 4378 4791 4471 4884 4962 5374
2554 2967 3045 3457 3138 3550 3628 4041
3248 3661 3739 4151 3832 4244 4322 4735
3379 3792 3870 4283 3963 4375 4453 4866
4073 4486 4564 4976 4657 5069 5147 5560
3536 3948 4026 4439 4119 4531 4610 5022
4229 4642 4720 5132 4813 5225 5303 5716
4361 4773 4851 5264 4944 5357 5435 5847
5054 5467 5545 5957 5638 6050 6128 6541
1650 2063 2141 2553 2234 2646 2724 3137
2344 2756 2834 3247 2927 3340 3418 3830
2475 2888 2966 3378 3059 3471 3549 3962
3169 3581 3660 4072 3752 4165 4243 4655
2631 3044 3122 3534 3215 3627 3705 4118
3325 3738 3816 4228 3908 4321 4399 4812
3456 3869 3947 4359 4040 4452 4530 4943
4150 4563 4641 5053 4734 5146 5224 5637
2817 3229 3307 3720 3400 3813 3891 4303
3511 3923 4001 4414 4094 4507 4585 4997
3642 4054 4133 4545 4225 4638 4716 5128
4336 4748 4826 5239 4919 5332 5410 5822
3798 4211 4289 4701 4381 4794 4872 5285
4492 4904 4982 5395 5075 5488 5566 5978
4623 5036 5114 5526 5207 5619 5697 6110
5317 5729 5807 6220 5900 6313 6391 6803
3038 3450 3528 3941 3621 4034 4112 4524
3731 4144 4222 4635 4315 4727 4805 5218
3863 4275 4353 4766 4446 4859 4937 5349
4557 4969 5047 5460 5140 5552 5631 6043
4019 4431 4509 4922 4602 5015 5093 5505
4713 5125 5203 5616 5296 5709 5787 6199
4844 5256 5334 5747 5427 5840 5918 6330
5538 5950 6028 6441 6121 6534 6612 7024
4204 4617 4695 5108 4788 5200 5278 5691
4898 5311 5389 5801 5482 5894 5972 6385
5030 5442 5520 5933 5613 6025 6104 6516
5723 6136 6214 6626 6307 6719 6797 7210
5186 5598 5676 6089 5769 6182 6260 6672
5879 6292 6370 6783 6463 6875 6953 7366
6011 6423 6501 6914 6594 7007 7085 7497
6704 7117 7195 7608 7288 7700 7778 8191
应用本申请提供将长度为512的可靠度序列变换为基本序列对应的可靠度序列加可靠度参考序列的实现方式,可以有如下几种:
(1)设置l s=3,N s=8,PW i,0≤i<8,由上述公式可以得到基本序列对应的可靠度序列,并且对其中的元素的值按照13bit进行量化后,得到的基本序列对应的可靠度量化序列如表2所示:
表2
0 1 2 3 4 5 6 7
0 413 491 903 583 996 1074 1487
由上述公式得到的量化后的可靠度参考序列如表3所示:
表3
8 16 32 64 128 256
694 825 981 1167 1388 1650
由上述表2和表3可知,存储量化后的基本序列对应的可靠度序列或者可靠度量化序列时只需要存储
Figure PCTCN2018080379-appb-000038
个值,存储量化后的可靠度参考序列或可靠度参考量化序列需要存储l max-l s=9-3=6个值,总共只需要存储8+6=14个值,因此,相比原来需要存储512个值而言(表1),能够节约(512-14)/512=97.3%的存储空间,大大减小了存储开销,提高了存储效率。
(2)设置l s=4,N s=16,PW i,0≤i<16,由上述公式可以得到基本序列对应的可靠度序列,并且对其中的元素的值按照13bit进行量化后,得到的基本序列对应的可靠度量化序列如表4所示:
表4
0 1 2 3 4 5 6 7
0 413 491 903 583 996 1074 1487
8 9 10 11 12 13 14 15
694 1106 1184 1597 1277 1690 1768 2180
由上述公式得到的量化后的可靠度参考序列如表5所示:
表5
16 32 64 128 256
825 981 1167 1388 1650
由上述表4和表5可知,存储量化后的基本序列对应的可靠度序列或者可靠度量化序列时只需要存储
Figure PCTCN2018080379-appb-000039
个值,存储量化后的可靠度参考序列或可靠度参考量化序列需要存储l max-l s=9-4=5个值,总共只需要存储16+5=21个值,因此,相比原来需要存储512个值而言(表1),能够节约(512-21)/512=95%的存储空间,大大减小了存储开销,提高了存储效率。
(3)设置l s=5,N s=32,PW i,0≤i<32,由上述公式可以得到基本序列对应的可靠度序列,并且对其中的元素的值按照13bit进行量化后,得到的基本序列对应的可靠度量化序列如表6所示:
表6
0 1 2 3 4 5 6 7
0 413 491 903 583 996 1074 1487
8 9 10 11 12 13 14 15
694 1106 1184 1597 1277 1690 1768 2180
16 17 18 19 20 21 22 23
825 1238 1316 1728 1408 1821 1899 2312
24 25 26 27 28 29 30 31
1519 1931 2009 2422 2102 2515 2593 3005
由上述公式得到的量化后的可靠度参考序列如表7所示:
表7
32 64 128 256
981 1167 1388 1650
由上述表6和表7可知,存储基本序列对应的可靠度序列或者可靠度量化序列时只需要存储
Figure PCTCN2018080379-appb-000040
个值,存储量化后的可靠度参考序列或可靠度参考量化序列需要存储l max-l s=9-5=4个值,总共只需要存储32+4=36个值,因此,相比原可靠度需要存储512个值而言(表1),能够节约(512-36)/512=92.9%的存储空间,大大减小了存储开销,提高了存储效率。
(4)设置l s=6,N s=64,PW i,0≤i<64,由上述公式可以得到可靠度序列,并且对其中的值按照13bit进行量化后,得到的可靠度序列如表8所示:
表8
0 1 2 3 4 5 6 7
0 413 491 903 583 996 1074 1487
8 9 10 11 12 13 14 15
694 1106 1184 1597 1277 1690 1768 2180
16 17 18 19 20 21 22 23
825 1238 1316 1728 1408 1821 1899 2312
24 25 26 27 28 29 30 31
1519 1931 2009 2422 2102 2515 2593 3005
32 33 34 35 36 37 38 39
981 1394 1472 1884 1565 1977 2055 2468
40 41 42 43 44 45 46 47
1675 2087 2166 2578 2258 2671 2749 3161
48 49 50 51 52 53 54 55
1806 2219 2297 2709 2390 2802 2880 3293
56 57 58 59 60 61 62 63
2500 2913 2991 3403 3083 3496 3574 3987
由上述公式得到的量化后的可靠度参考序列如表9所示:
表9
64 128 256
1167 1388 1650
由上述表7和表8可知,存储量化后的基本序列对应的可靠度序列时只需要存储
Figure PCTCN2018080379-appb-000041
个值,存储量化后的可靠度参考序列值需要存储l max-l s=9-6=3个值,总共只需要存储64+3=67个值,因此,相比原来需要存储512个值而言(表1),能够节约(512-67)/512=86.9%的存储空间,大大减小了存储开销,提高了存储效率。
(5)设置l s=7,N s=128,PW i,0≤i<128,由上述公式可以得到基本序列对应的可靠度序列,并且对其中的值按照13bit进行量化后,得到的量化后的基本序列对应的可靠度序列如表10所示:
表10
0 1 2 3 4 5 6 7
0 413 491 903 583 996 1074 1487
8 9 10 11 12 13 14 15
694 1106 1184 1597 1277 1690 1768 2180
16 17 18 19 20 21 22 23
825 1238 1316 1728 1408 1821 1899 2312
24 25 26 27 28 29 30 31
1519 1931 2009 2422 2102 2515 2593 3005
32 33 34 35 36 37 38 39
981 1394 1472 1884 1565 1977 2055 2468
40 41 42 43 44 45 46 47
1675 2087 2166 2578 2258 2671 2749 3161
48 49 50 51 52 53 54 55
1806 2219 2297 2709 2390 2802 2880 3293
56 57 58 59 60 61 62 63
2500 2913 2991 3403 3083 3496 3574 3987
64 65 66 67 68 69 70 71
1167 1579 1657 2070 1750 2163 2241 2653
72 73 74 75 76 77 78 79
1861 2273 2351 2764 2444 2857 2935 3347
80 81 82 83 84 85 86 87
1992 2404 2482 2895 2575 2988 3066 3478
88 89 90 91 92 93 94 95
2686 3098 3176 3589 3269 3682 3760 4172
96 97 98 99 100 101 102 103
2148 2560 2639 3051 2731 3144 3222 3634
104 105 106 107 108 109 110 111
2842 3254 3332 3745 3425 3838 3916 4328
112 113 114 115 116 117 118 119
2973 3386 3464 3876 3556 3969 4047 4460
120 121 122 123 124 125 126 127
3667 4079 4157 4570 4250 4663 4741 5153
由上述公式得到的量化后的可靠度参考序列如表11所示:
表11
128 256
1388 1650
由上述表10和表11可知,存储可靠度序列时只需要存储
Figure PCTCN2018080379-appb-000042
个值,存储可靠度参考序列值需要存储l max-l s=9-7=2个值,总共只需要存储128+2=130个值,因此,相比原可靠度需要存储512个值而言(表1),能够节约(512-130)/512=74.6%的存储空间,大大减小了存储开销,提高了存储效率。
(5)设置l s=8,N s=256,PW i,0≤i<256,由上述公式可以得到可靠度序列,并且对其中的值按照13bit进行量化后,得到的可靠度序列如表12所示:
表12
0 1 2 3 4 5 6 7
0 413 491 903 583 996 1074 1487
8 9 10 11 12 13 14 15
694 1106 1184 1597 1277 1690 1768 2180
16 17 18 19 20 21 22 23
825 1238 1316 1728 1408 1821 1899 2312
24 25 26 27 28 29 30 31
1519 1931 2009 2422 2102 2515 2593 3005
32 33 34 35 36 37 38 39
981 1394 1472 1884 1565 1977 2055 2468
40 41 42 43 44 45 46 47
1675 2087 2166 2578 2258 2671 2749 3161
48 49 50 51 52 53 54 55
1806 2219 2297 2709 2390 2802 2880 3293
56 57 58 59 60 61 62 63
2500 2913 2991 3403 3083 3496 3574 3987
64 65 66 67 68 69 70 71
1167 1579 1657 2070 1750 2163 2241 2653
72 73 74 75 76 77 78 79
1861 2273 2351 2764 2444 2857 2935 3347
80 81 82 83 84 85 86 87
1992 2404 2482 2895 2575 2988 3066 3478
88 89 90 91 92 93 94 95
2686 3098 3176 3589 3269 3682 3760 4172
96 97 98 99 100 101 102 103
2148 2560 2639 3051 2731 3144 3222 3634
104 105 106 107 108 109 110 111
2842 3254 3332 3745 3425 3838 3916 4328
112 113 114 115 116 117 118 119
2973 3386 3464 3876 3556 3969 4047 4460
120 121 122 123 124 125 126 127
3667 4079 4157 4570 4250 4663 4741 5153
128 129 130 131 132 133 134 135
1388 1800 1878 2291 1971 2384 2462 2874
136 137 138 139 140 141 142 143
2081 2494 2572 2984 2665 3077 3155 3568
144 145 146 147 148 149 150 151
2213 2625 2703 3116 2796 3209 3287 3699
152 153 154 155 156 157 158 159
2906 3319 3397 3810 3490 3902 3980 4393
160 161 162 163 164 165 166 167
2369 2781 2859 3272 2952 3365 3443 3855
168 169 170 171 172 173 174 175
3063 3475 3553 3966 3646 4058 4137 4549
176 177 178 179 180 181 182 183
3194 3606 3684 4097 3777 4190 4268 4680
184 185 186 187 188 189 190 191
3888 4300 4378 4791 4471 4884 4962 5374
192 193 194 195 196 197 198 199
2554 2967 3045 3457 3138 3550 3628 4041
200 201 202 203 204 205 206 207
3248 3661 3739 4151 3832 4244 4322 4735
208 209 210 211 212 213 214 215
3379 3792 3870 4283 3963 4375 4453 4866
216 217 218 219 220 221 222 223
4073 4486 4564 4976 4657 5069 5147 5560
224 225 226 227 228 229 230 231
3536 3948 4026 4439 4119 4531 4610 5022
232 233 234 235 236 237 238 239
4229 4642 4720 5132 4813 5225 5303 5716
240 241 242 243 244 245 246 247
4361 4773 4851 5264 4944 5357 5435 5847
248 249 250 251 252 253 254 255
5054 5467 5545 5957 5638 6050 6128 6541
由上述公式得到的可靠度参考序列如表13所示:
表13
256
1650
由上述表12和表13可知,存储可靠度序列时只需要存储
Figure PCTCN2018080379-appb-000043
个值,存储可靠度参考序列值需要存储l max-l s=9-8=1个值,总共只需要存储256+1=257个值,因此,相比原可靠度需要存储512个值而言(表1),能够节约(512-257)/512=49.8%存储空间,大大减小了存储开销,提高了存储效率。
二、对于最大母码长度
Figure PCTCN2018080379-appb-000044
的最大母码长可靠度序列,设置β=2 0.25,按照现有技术的存储方式,对序列值进行14bit量化,将存储1024个值,如表14所示:
表14
0 666 792 1457 941 1607 1733 2399
1119 1785 1911 2577 2061 2726 2852 3518
1331 1997 2123 2788 2273 2938 3064 3730
2451 3116 3242 3908 3392 4058 4184 4849
1583 2249 2375 3040 2525 3190 3316 3982
2703 3368 3494 4160 3644 4310 4436 5101
2914 3580 3706 4372 3856 4521 4647 5313
4034 4700 4825 5491 4975 5641 5767 6432
1883 2548 2674 3340 2824 3490 3616 4281
3002 3668 3794 4459 3944 4609 4735 5401
3214 3880 4006 4671 4155 4821 4947 5613
4333 4999 5125 5791 5275 5940 6066 6732
3466 4132 4257 4923 4407 5073 5199 5864
4585 5251 5377 6043 5527 6192 6318 6984
4797 5463 5589 6254 5739 6404 6530 7196
5917 6582 6708 7374 6858 7524 7650 8315
2239 2905 3031 3696 3180 3846 3972 4638
3358 4024 4150 4816 4300 4965 5091 5757
3570 4236 4362 5027 4512 5177 5303 5969
4690 5355 5481 6147 5631 6297 6423 7088
3822 4488 4614 5279 4763 5429 5555 6221
4942 5607 5733 6399 5883 6549 6674 7340
5153 5819 5945 6611 6095 6760 6886 7552
6273 6938 7064 7730 7214 7880 8006 8671
4122 4787 4913 5579 5063 5729 5855 6520
5241 5907 6033 6698 6182 6848 6974 7640
5453 6119 6244 6910 6394 7060 7186 7851
6572 7238 7364 8030 7514 8179 8305 8971
5705 6370 6496 7162 6646 7312 7438 8103
6824 7490 7616 8281 7766 8431 8557 9223
7036 7702 7828 8493 7977 8643 8769 9435
8156 8821 8947 9613 9097 9763 9888 10554
2663 3328 3454 4120 3604 4270 4395 5061
3782 4448 4574 5239 4723 5389 5515 6181
3994 4659 4785 5451 4935 5601 5727 6392
5113 5779 5905 6571 6055 6720 6846 7512
4246 4911 5037 5703 5187 5853 5979 6644
5365 6031 6157 6822 6307 6972 7098 7764
5577 6243 6369 7034 6518 7184 7310 7976
6696 7362 7488 8154 7638 8303 8429 9095
4545 5211 5337 6002 5487 6152 6278 6944
5665 6330 6456 7122 6606 7272 7398 8063
5877 6542 6668 7334 6818 7484 7609 8275
6996 7662 7788 8453 7937 8603 8729 9395
6128 6794 6920 7586 7070 7735 7861 8527
7248 7914 8039 8705 8189 8855 8981 9646
7460 8125 8251 8917 8401 9067 9193 9858
8579 9245 9371 10036 9521 10186 10312 10978
4901 5567 5693 6359 5843 6508 6634 7300
6021 6687 6813 7478 6962 7628 7754 8420
6233 6898 7024 7690 7174 7840 7966 8631
7352 8018 8144 8809 8294 8959 9085 9751
6485 7150 7276 7942 7426 8092 8218 8883
7604 8270 8396 9061 8545 9211 9337 10003
7816 8482 8608 9273 8757 9423 9549 10214
8935 9601 9727 10393 9877 10542 10668 11334
6784 7450 7576 8241 7726 8391 8517 9183
7904 8569 8695 9361 8845 9511 9637 10302
8115 8781 8907 9573 9057 9722 9848 10514
9235 9901 10027 10692 10176 10842 10968 11634
8367 9033 9159 9825 9309 9974 10100 10766
9487 10152 10278 10944 10428 11094 11220 11885
9699 10364 10490 11156 10640 11306 11432 12097
10818 11484 11610 12275 11759 12425 12551 13217
3166 3832 3958 4624 4108 4773 4899 5565
4286 4951 5077 5743 5227 5893 6019 6684
4498 5163 5289 5955 5439 6105 6231 6896
5617 6283 6409 7074 6558 7224 7350 8016
4749 5415 5541 6207 5691 6356 6482 7148
5869 6535 6661 7326 6810 7476 7602 8268
6081 6746 6872 7538 7022 7688 7814 8479
7200 7866 7992 8657 8142 8807 8933 9599
5049 5715 5841 6506 5990 6656 6782 7448
6169 6834 6960 7626 7110 7775 7901 8567
6380 7046 7172 7838 7322 7987 8113 8779
7500 8165 8291 8957 8441 9107 9233 9898
6632 7298 7424 8089 7574 8239 8365 9031
7752 8417 8543 9209 8693 9359 9485 10150
7963 8629 8755 9421 8905 9570 9696 10362
9083 9749 9875 10540 10024 10690 10816 11482
5405 6071 6197 6862 6347 7012 7138 7804
6525 7190 7316 7982 7466 8132 8258 8923
6737 7402 7528 8194 7678 8344 8469 9135
7856 8522 8648 9313 8797 9463 9589 10255
6988 7654 7780 8446 7930 8595 8721 9387
8108 8774 8899 9565 9049 9715 9841 10506
8320 8985 9111 9777 9261 9927 10053 10718
9439 10105 10231 10896 10381 11046 11172 11838
7288 7954 8080 8745 8229 8895 9021 9687
8407 9073 9199 9865 9349 10014 10140 10806
8619 9285 9411 10076 9561 10226 10352 11018
9739 10404 10530 11196 10680 11346 11472 12137
8871 9537 9663 10328 9812 10478 10604 11270
9991 10656 10782 11448 10932 11598 11724 12389
10202 10868 10994 11660 11144 11809 11935 12601
11322 11988 12113 12779 12263 12929 13055 13720
5829 6495 6620 7286 6770 7436 7562 8227
6948 7614 7740 8406 7890 8555 8681 9347
7160 7826 7952 8617 8102 8767 8893 9559
8280 8945 9071 9737 9221 9887 10013 10678
7412 8078 8204 8869 8353 9019 9145 9811
8532 9197 9323 9989 9473 10139 10264 10930
8743 9409 9535 10201 9685 10350 10476 11142
9863 10528 10654 11320 10804 11470 11596 12261
7712 8377 8503 9169 8653 9319 9445 10110
8831 9497 9623 10288 9772 10438 10564 11230
9043 9709 9834 10500 9984 10650 10776 11441
10162 10828 10954 11620 11104 11769 11895 12561
9295 9960 10086 10752 10236 10902 11028 11693
10414 11080 11206 11871 11356 12021 12147 12813
10626 11292 11418 12083 11567 12233 12359 13025
11745 12411 12537 13203 12687 13352 13478 14144
8068 8733 8859 9525 9009 9675 9801 10466
9187 9853 9979 10644 10129 10794 10920 11586
9399 10065 10191 10856 10340 11006 11132 11798
10519 11184 11310 11976 11460 12126 12251 12917
9651 10317 10443 11108 10592 11258 11384 12050
10770 11436 11562 12228 11712 12377 12503 13169
10982 11648 11774 12439 11924 12589 12715 13381
12102 12767 12893 13559 13043 13709 13835 14500
9951 10616 10742 11408 10892 11558 11683 12349
11070 11736 11862 12527 12011 12677 12803 13469
11282 11947 12073 12739 12223 12889 13015 13680
12401 13067 13193 13858 13343 14008 14134 14800
11534 12199 12325 12991 12475 13141 13267 13932
12653 13319 13445 14110 13595 14260 14386 15052
12865 13531 13657 14322 13806 14472 14598 15264
13984 14650 14776 15442 14926 15591 15717 16383
应用本申请提供将长度为1024的母码序列对应的可靠度序列变换为基本序列对应的可靠度序列加可靠度参考序列的实现方式,可以有如下几种:
(1)设置l s=3,N s=8,PW i,0≤i<8,由上述公式可以得到基本序列对应的可靠度序列,并且对其中的值按照14bit进行量化后,得到的量化后的基本序列对应的可靠度序列如表15所示:
表15
0 1 2 3 4 5 6 7
0 666 792 1457 941 1607 1733 2399
由上述公式得到的量化后的可靠度参考序列如表16所示:
表16
8 16 32 64 128 256 512
1119 1331 1583 1883 2239 2663 3166
由上述表15和表16可知,存储量化后的基本序列对应的可靠度序列时只需要存储
Figure PCTCN2018080379-appb-000045
个值,存储量化后的可靠度参考序列值需要存储l max-l s=10-3=7个值,总共只需要存储8+7=15个值,因此,相比原来需要存储1024个值而言(表14),能够节约(1024-15)/1024=98.5%的存储空间,大大减小了存储开销,提高了存储效率。
(2)设置l s=4,N s=16,PW i,0≤i<16,由上述公式可以得到基本序列对应的可靠度序列,如表17所示:
表17
0 1 2 3 4 5 6 7
0 1 1.189207 2.189207 1.414214 2.414214 2.603421 3.603421
8 9 10 11 12 13 14 15
1.681793 2.681793 2.871 3.871 3.096006 4.096006 4.285214 5.285214
由上述公式得到的可靠度参考序列如表18所示:
表18
16 32 64 128 256 512
2 2.378414 2.828427 3.363586 4 4.756828
可靠度序列也可以是原可靠度序列PW i的有限精度量化值,只要量化后的可靠度序列仍满足与原可靠度序列相同的相对大小关系。
如可对表17和表18进行14比特量化
Figure PCTCN2018080379-appb-000046
其中PW i为量化前的PW序列,
Figure PCTCN2018080379-appb-000047
为量化后的PW序列,max{PW}为量化前PW序列的最大值,
Figure PCTCN2018080379-appb-000048
为向上取整函数,量化精度为14比特。量化后得到表19和表20。量化精度与母码序列的长度N max成正相关,对越大的N max,通常需要更大的量化精度,来确保量化后的母码序列对应的可靠度序列仍满足与原可靠度序列相同的相对大小关系。这里仅为举例,其他长度的母码序列的可靠度序列的量化方式原理相同,不再赘述。
表19
0 1 2 3 4 5 6 7
0 666 792 1457 941 1607 1733 2399
8 9 10 11 12 13 14 15
1119 1785 1911 2577 2061 2726 2852 3518
表20
16 32 64 128 256 512
1331 1583 1883 2239 2663 3166
由上述表19和表20可知,存储量化后的基本序列对应的可靠度序列时只需要存储
Figure PCTCN2018080379-appb-000049
个值,存储量化后的可靠度参考序列值需要存储l max-l s=10-4=6个值,总共只需要存储16+6=22个值,因此,相比原来需要存储1024个值而言(表14),能够节约(1024-22)/1024=97.8%的存储空间,大大减小了存储开销,提高了存储效率。
(3)设置l s=5,N s=32,PW i,0≤i<32,由上述公式可以得到基本序列对应的可靠度序列,并且对其中的元素的值按照14bit进行量化后,得到的量化后的基本序列对应的可靠度序列如表21所示:
表21
0 1 2 3 4 5 6 7
0 666 792 1457 941 1607 1733 2399
8 9 10 11 12 13 14 15
1119 1785 1911 2577 2061 2726 2852 3518
16 17 18 19 20 21 22 23
1331 1997 2123 2788 2273 2938 3064 3730
24 25 26 27 28 29 30 31
2451 3116 3242 3908 3392 4058 4184 4849
由上述公式得到的量化后的可靠度参考序列如表22所示:
表22
32 64 128 256 512
1583 1883 2239 2663 3166
由上述表21和表22可知,存储量化后的基本序列对应的可靠度序列时只需要存储
Figure PCTCN2018080379-appb-000050
个值,存储量化后的可靠度参考序列值需要存储l max-l s=10-5=5个值,总共只需要存储32+5=37个值,因此,相比原来需要存储1024个值而言(表14),能够节约(1024-37)/1024=96.4%的存储空间,大大减小了存储开销,提高了存储效率。
(4)设置l s=6,N s=64,PW i,0≤i<64,由上述公式可以得到基本序列对应的可靠度序列,并且对其中的值按照14bit进行量化后,得到的量化后的基本序列对应的可靠度 序列如表23所示:
表23
0 1 2 3 4 5 6 7
0 666 792 1457 941 1607 1733 2399
8 9 10 11 12 13 14 15
1119 1785 1911 2577 2061 2726 2852 3518
16 17 18 19 20 21 22 23
1331 1997 2123 2788 2273 2938 3064 3730
24 25 26 27 28 29 30 31
2451 3116 3242 3908 3392 4058 4184 4849
32 33 34 35 36 37 38 39
1583 2249 2375 3040 2525 3190 3316 3982
40 41 42 43 44 45 46 47
2703 3368 3494 4160 3644 4310 4436 5101
48 49 50 51 52 53 54 55
2914 3580 3706 4372 3856 4521 4647 5313
56 57 58 59 60 61 62 63
4034 4700 4825 5491 4975 5641 5767 6432
由上述公式得到的量化后的可靠度参考序列如表24所示:
表24
64 128 256 512
1883 2239 2663 3166
由上述表23和表24可知,存储量化后的基本序列对应的可靠度序列时只需要存储
Figure PCTCN2018080379-appb-000051
个值,存储量化后的可靠度参考序列值需要存储l max-l s=10-6=4个值,总共只需要存储64+4=68个值,因此,相比原来需要存储1024个值而言(表14),能够节约(1024-68)/1024=93.3%的存储空间,大大减小了存储开销,提高了存储效率。
(5)设置l s=7,N s=128,PW i,0≤i<128,由上述公式可以得到基本序列对应的可靠度序列,并且对其中的值按照14bit进行量化后,得到量化后的基本序列对应的可靠度序列如表25所示:
表25
0 1 2 3 4 5 6 7
0 666 792 1457 941 1607 1733 2399
8 9 10 11 12 13 14 15
1119 1785 1911 2577 2061 2726 2852 3518
16 17 18 19 20 21 22 23
1331 1997 2123 2788 2273 2938 3064 3730
24 25 26 27 28 29 30 31
2451 3116 3242 3908 3392 4058 4184 4849
32 33 34 35 36 37 38 39
1583 2249 2375 3040 2525 3190 3316 3982
40 41 42 43 44 45 46 47
2703 3368 3494 4160 3644 4310 4436 5101
48 49 50 51 52 53 54 55
2914 3580 3706 4372 3856 4521 4647 5313
56 57 58 59 60 61 62 63
4034 4700 4825 5491 4975 5641 5767 6432
64 65 66 67 68 69 70 71
1883 2548 2674 3340 2824 3490 3616 4281
72 73 74 75 76 77 78 79
3002 3668 3794 4459 3944 4609 4735 5401
80 81 82 83 84 85 86 87
3214 3880 4006 4671 4155 4821 4947 5613
88 89 90 91 92 93 94 95
4333 4999 5125 5791 5275 5940 6066 6732
96 97 98 99 100 101 102 103
3466 4132 4257 4923 4407 5073 5199 5864
104 105 106 107 108 109 110 111
4585 5251 5377 6043 5527 6192 6318 6984
112 113 114 115 116 117 118 119
4797 5463 5589 6254 5739 6404 6530 7196
120 121 122 123 124 125 126 127
5917 6582 6708 7374 6858 7524 7650 8315
由上述公式得到量化后的可靠度参考序列如表26所示:
表26
128 256 512
2239 2663 3166
由上述表25和表26可知,存储量化后的基本序列对应的可靠度序列时只需要存储
Figure PCTCN2018080379-appb-000052
个值,存储量化后的可靠度参考序列值需要存储l max-l s=10-7=3个值,总 共只需要存储128+3=131个值,因此,相比原来需要存储1024个值而言(表14),能够节约(1024-131)/1024=87.2%的存储空间,大大减小了存储开销,提高了存储效率。
(6)设置l s=8,N s=256,PW i,0≤i<256,由上述公式可以得到基本序列对应的可靠度序列,并且对其中的值按照14bit进行量化后,得到量化后的基本序列对应的可靠度序列如表27所示:
表27
0 1 2 3 4 5 6 7
0 666 792 1457 941 1607 1733 2399
8 9 10 11 12 13 14 15
1119 1785 1911 2577 2061 2726 2852 3518
16 17 18 19 20 21 22 23
1331 1997 2123 2788 2273 2938 3064 3730
24 25 26 27 28 29 30 31
2451 3116 3242 3908 3392 4058 4184 4849
32 33 34 35 36 37 38 39
1583 2249 2375 3040 2525 3190 3316 3982
40 41 42 43 44 45 46 47
2703 3368 3494 4160 3644 4310 4436 5101
48 49 50 51 52 53 54 55
2914 3580 3706 4372 3856 4521 4647 5313
56 57 58 59 60 61 62 63
4034 4700 4825 5491 4975 5641 5767 6432
64 65 66 67 68 69 70 71
1883 2548 2674 3340 2824 3490 3616 4281
72 73 74 75 76 77 78 79
3002 3668 3794 4459 3944 4609 4735 5401
80 81 82 83 84 85 86 87
3214 3880 4006 4671 4155 4821 4947 5613
88 89 90 91 92 93 94 95
4333 4999 5125 5791 5275 5940 6066 6732
96 97 98 99 100 101 102 103
3466 4132 4257 4923 4407 5073 5199 5864
104 105 106 107 108 109 110 111
4585 5251 5377 6043 5527 6192 6318 6984
112 113 114 115 116 117 118 119
4797 5463 5589 6254 5739 6404 6530 7196
120 121 122 123 124 125 126 127
5917 6582 6708 7374 6858 7524 7650 8315
128 129 130 131 132 133 134 135
2239 2905 3031 3696 3180 3846 3972 4638
136 137 138 139 140 141 142 143
3358 4024 4150 4816 4300 4965 5091 5757
144 145 146 147 148 149 150 151
3570 4236 4362 5027 4512 5177 5303 5969
152 153 154 155 156 157 158 159
4690 5355 5481 6147 5631 6297 6423 7088
160 161 162 163 164 165 166 167
3822 4488 4614 5279 4763 5429 5555 6221
168 169 170 171 172 173 174 175
4942 5607 5733 6399 5883 6549 6674 7340
176 177 178 179 180 181 182 183
5153 5819 5945 6611 6095 6760 6886 7552
184 185 186 187 188 189 190 191
6273 6938 7064 7730 7214 7880 8006 8671
192 193 194 195 196 197 198 199
4122 4787 4913 5579 5063 5729 5855 6520
200 201 202 203 204 205 206 207
5241 5907 6033 6698 6182 6848 6974 7640
208 209 210 211 212 2013 214 215
5453 6119 6244 6910 6394 7060 7186 7851
216 217 218 219 220 221 222 223
6572 7238 7364 8030 7514 8179 8305 8971
224 225 226 227 228 229 230 231
5705 6370 6496 7162 6646 7312 7438 8103
232 233 234 235 236 237 238 239
6824 7490 7616 8281 7766 8431 8557 9223
240 241 242 243 244 245 246 247
7036 7702 7828 8493 7977 8643 8769 9435
248 249 250 251 252 253 254 255
8156 8821 8947 9613 9097 9763 9888 10554
由上述公式得到量化后的可靠度参考序列如表28所示:
表28
256 512
2663 3166
由上述表27和表28可知,存储量化后的基本序列对应的可靠度序列时只需要存储
Figure PCTCN2018080379-appb-000053
个值,存储量化后的可靠度参考序列值需要存储l max-l s=10-8=2个值,总共只需要存储256+2=258个值,因此,相比原可靠度需要存储1024个值而言(表14),能够节约(1024-258)/1024=74.8%的存储空间,大大减小了存储开销,提高了存储效率。
(7)设置l s=9,N s=512,PW i,0≤i<512,由上述公式可以得到基本序列对应的可靠度序列,并且对其中的值按照14bit进行量化后,得到量化后的基本序列对应的可靠度序列如表29所示:
表29
Figure PCTCN2018080379-appb-000054
Figure PCTCN2018080379-appb-000055
Figure PCTCN2018080379-appb-000056
Figure PCTCN2018080379-appb-000057
由上述公式得到量化后的可靠度参考序列如表30所示:
表30
512
3166
由上述表29和表30可知,存储量化后的基本序列对应的可靠度序列时只需要存储
Figure PCTCN2018080379-appb-000058
个值,存储量化后的可靠度参考序列值需要存储l max-l s=10-9=1个值,总共只需要存储512+1=513个值,因此,相比原来需要存储1024个值而言(表14),能够节约(1024-513)/1024=49.9%的存储空间,大大减小了存储开销,提高了存储效率。
三、对于长度
Figure PCTCN2018080379-appb-000059
的母码序列对应的可靠度序列,设置β=2 0.25,并进行14bit量化,按照现有技术的存储方将存储2048个值,如表31所示:
表31
0 541 644 1185 765 1307 1409 1950
910 1451 1554 2095 1676 2217 2319 2861
1082 1624 1726 2267 1848 2389 2492 3033
1993 2534 2636 3178 2758 3299 3402 3943
1287 1829 1931 2472 2053 2594 2696 3238
2198 2739 2841 3382 2963 3504 3607 4148
2370 2911 3013 3555 3135 3676 3779 4320
3280 3821 3924 4465 4045 4587 4689 5230
1531 2072 2175 2716 2296 2838 2940 3481
2441 2982 3085 3626 3207 3748 3850 4391
2613 3155 3257 3798 3379 3920 4022 4564
3524 4065 4167 4708 4289 4830 4933 5474
2818 3359 3462 4003 3584 4125 4227 4768
3728 4270 4372 4913 4494 5035 5137 5679
3901 4442 4544 5086 4666 5207 5310 5851
4811 5352 5455 5996 5576 6118 6220 6761
1821 2362 2464 3005 2586 3127 3230 3771
2731 3272 3374 3916 3496 4037 4140 4681
2903 3444 3547 4088 3668 4210 4312 4853
3813 4354 4457 4998 4579 5120 5222 5764
3108 3649 3751 4293 3873 4414 4517 5058
4018 4559 4662 5203 4783 5325 5427 5968
4190 4732 4834 5375 4956 5497 5599 6141
5101 5642 5744 6285 5866 6407 6510 7051
3351 3893 3995 4536 4117 4658 4760 5302
4262 4803 4905 5447 5027 5568 5671 6212
4434 4975 5078 5619 5199 5741 5843 6384
5344 5885 5988 6529 6110 6651 6753 7294
4639 5180 5282 5824 5404 5945 6048 6589
5549 6090 6193 6734 6314 6856 6958 7499
5721 6262 6365 6906 6487 7028 7130 7671
6631 7173 7275 7816 7397 7938 8040 8582
2165 2706 2809 3350 2930 3472 3574 4115
3075 3616 3719 4260 3841 4382 4484 5026
3247 3789 3891 4432 4013 4554 4657 5198
4158 4699 4801 5343 4923 5464 5567 6108
3452 3994 4096 4637 4218 4759 4861 5403
4363 4904 5006 5547 5128 5669 5772 6313
4535 5076 5178 5720 5300 5841 5944 6485
5445 5986 6089 6630 6210 6752 6854 7395
3696 4237 4339 4881 4461 5002 5105 5646
4606 5147 5250 5791 5372 5913 6015 6556
4778 5320 5422 5963 5544 6085 6187 6729
5689 6230 6332 6873 6454 6995 7098 7639
4983 5524 5627 6168 5749 6290 6392 6933
5893 6435 6537 7078 6659 7200 7302 7844
6066 6607 6709 7250 6831 7372 7475 8016
6976 7517 7620 8161 7741 8283 8385 8926
3985 4527 4629 5170 4751 5292 5395 5936
4896 5437 5539 6081 5661 6202 6305 6846
5068 5609 5712 6253 5833 6375 6477 7018
5978 6519 6622 7163 6744 7285 7387 7929
5273 5814 5916 6458 6038 6579 6682 7223
6183 6724 6827 7368 6948 7490 7592 8133
6355 6896 6999 7540 7121 7662 7764 8306
7266 7807 7909 8450 8031 8572 8675 9216
5516 6058 6160 6701 6282 6823 6925 7467
6427 6968 7070 7611 7192 7733 7836 8377
6599 7140 7242 7784 7364 7905 8008 8549
7509 8050 8153 8694 8275 8816 8918 9459
6804 7345 7447 7989 7569 8110 8213 8754
7714 8255 8358 8899 8479 9021 9123 9664
7886 8427 8530 9071 8652 9193 9295 9836
8796 9338 9440 9981 9562 10103 10205 10747
2575 3116 3218 3759 3340 3881 3984 4525
3485 4026 4128 4670 4250 4792 4894 5435
3657 4198 4301 4842 4423 4964 5066 5607
4567 5109 5211 5752 5333 5874 5976 6518
3862 4403 4506 5047 4627 5169 5271 5812
4772 5313 5416 5957 5538 6079 6181 6722
4944 5486 5588 6129 5710 6251 6353 6895
5855 6396 6498 7040 6620 7161 7264 7805
4105 4647 4749 5290 4871 5412 5515 6056
5016 5557 5659 6201 5781 6322 6425 6966
5188 5729 5832 6373 5953 6495 6597 7138
6098 6639 6742 7283 6864 7405 7507 8049
5393 5934 6036 6578 6158 6699 6802 7343
6303 6844 6947 7488 7068 7610 7712 8253
6475 7016 7119 7660 7241 7782 7884 8426
7385 7927 8029 8570 8151 8692 8795 9336
4395 4936 5039 5580 5161 5702 5804 6345
5305 5847 5949 6490 6071 6612 6714 7256
5478 6019 6121 6662 6243 6784 6887 7428
6388 6929 7031 7573 7153 7695 7797 8338
5682 6224 6326 6867 6448 6989 7091 7633
6593 7134 7236 7778 7358 7899 8002 8543
6765 7306 7409 7950 7530 8072 8174 8715
7675 8216 8319 8860 8441 8982 9084 9625
5926 6467 6570 7111 6691 7233 7335 7876
6836 7377 7480 8021 7602 8143 8245 8787
7008 7550 7652 8193 7774 8315 8418 8959
7919 8460 8562 9104 8684 9225 9328 9869
7213 7754 7857 8398 7979 8520 8622 9164
8124 8665 8767 9308 8889 9430 9533 10074
8296 8837 8939 9481 9061 9602 9705 10246
9206 9747 9850 10391 9971 10513 10615 11156
4740 5281 5383 5924 5505 6046 6149 6690
5650 6191 6293 6835 6415 6956 7059 7600
5822 6363 6466 7007 6587 7129 7231 7772
6732 7274 7376 7917 7498 8039 8141 8683
6027 6568 6670 7212 6792 7334 7436 7977
6937 7478 7581 8122 7703 8244 8346 8887
7109 7651 7753 8294 7875 8416 8518 9060
8020 8561 8663 9204 8785 9326 9429 9970
6270 6812 6914 7455 7036 7577 7679 8221
7181 7722 7824 8366 7946 8487 8590 9131
7353 7894 7997 8538 8118 8660 8762 9303
8263 8804 8907 9448 9029 9570 9672 10213
7558 8099 8201 8743 8323 8864 8967 9508
8468 9009 9112 9653 9233 9775 9877 10418
8640 9181 9284 9825 9406 9947 10049 10591
9550 10092 10194 10735 10316 10857 10960 11501
6560 7101 7204 7745 7325 7867 7969 8510
7470 8012 8114 8655 8236 8777 8879 9421
7643 8184 8286 8827 8408 8949 9052 9593
8553 9094 9196 9738 9318 9859 9962 10503
7847 8389 8491 9032 8613 9154 9256 9798
8758 9299 9401 9943 9523 10064 10167 10708
8930 9471 9573 10115 9695 10237 10339 10880
9840 10381 10484 11025 10606 11147 11249 11790
8091 8632 8735 9276 8856 9398 9500 10041
9001 9542 9645 10186 9767 10308 10410 10952
9173 9715 9817 10358 9939 10480 10582 11124
10084 10625 10727 11269 10849 11390 11493 12034
9378 9919 10022 10563 10144 10685 10787 11329
10288 10830 10932 11473 11054 11595 11698 12239
10461 11002 11104 11646 11226 11767 11870 12411
11371 11912 12015 12556 12136 12678 12780 13321
3062 3603 3705 4247 3827 4368 4471 5012
3972 4513 4616 5157 4737 5279 5381 5922
4144 4685 4788 5329 4910 5451 5553 6095
5054 5596 5698 6239 5820 6361 6464 7005
4349 4890 4993 5534 5114 5656 5758 6299
5259 5801 5903 6444 6025 6566 6668 7210
5431 5973 6075 6616 6197 6738 6841 7382
6342 6883 6985 7527 7107 7648 7751 8292
4593 5134 5236 5777 5358 5899 6002 6543
5503 6044 6146 6688 6268 6810 6912 7453
5675 6216 6319 6860 6440 6982 7084 7625
6585 7127 7229 7770 7351 7892 7994 8536
5880 6421 6524 7065 6645 7187 7289 7830
6790 7331 7434 7975 7556 8097 8199 8740
6962 7504 7606 8147 7728 8269 8371 8913
7873 8414 8516 9058 8638 9179 9282 9823
4882 5423 5526 6067 5648 6189 6291 6833
5792 6334 6436 6977 6558 7099 7202 7743
5965 6506 6608 7150 6730 7271 7374 7915
6875 7416 7519 8060 7640 8182 8284 8825
6170 6711 6813 7354 6935 7476 7579 8120
7080 7621 7723 8265 7845 8386 8489 9030
7252 7793 7896 8437 8017 8559 8661 9202
8162 8704 8806 9347 8928 9469 9571 10113
6413 6954 7057 7598 7179 7720 7822 8363
7323 7865 7967 8508 8089 8630 8732 9274
7496 8037 8139 8680 8261 8802 8905 9446
8406 8947 9049 9591 9171 9713 9815 10356
7700 8242 8344 8885 8466 9007 9109 9651
8611 9152 9254 9796 9376 9917 10020 10561
8783 9324 9427 9968 9548 10090 10192 10733
9693 10234 10337 10878 10459 11000 11102 11643
5227 5768 5870 6412 5992 6533 6636 7177
6137 6678 6781 7322 6902 7444 7546 8087
6309 6850 6953 7494 7075 7616 7718 8259
7219 7761 7863 8404 7985 8526 8629 9170
6514 7055 7158 7699 7279 7821 7923 8464
7424 7965 8068 8609 8190 8731 8833 9375
7596 8138 8240 8781 8362 8903 9006 9547
8507 9048 9150 9692 9272 9813 9916 10457
6758 7299 7401 7942 7523 8064 8167 8708
7668 8209 8311 8853 8433 8974 9077 9618
7840 8381 8484 9025 8605 9147 9249 9790
8750 9292 9394 9935 9516 10057 10159 10701
8045 8586 8688 9230 8810 9352 9454 9995
8955 9496 9599 10140 9721 10262 10364 10905
9127 9669 9771 10312 9893 10434 10536 11078
10038 10579 10681 11222 10803 11344 11447 11988
7047 7588 7691 8232 7813 8354 8456 8998
7957 8499 8601 9142 8723 9264 9367 9908
8130 8671 8773 9315 8895 9436 9539 10080
9040 9581 9684 10225 9805 10347 10449 10990
8334 8876 8978 9519 9100 9641 9744 10285
9245 9786 9888 10430 10010 10551 10654 11195
9417 9958 10061 10602 10182 10724 10826 11367
10327 10868 10971 11512 11093 11634 11736 12278
8578 9119 9222 9763 9343 9885 9987 10528
9488 10030 10132 10673 10254 10795 10897 11439
9661 10202 10304 10845 10426 10967 11070 11611
10571 11112 11214 11756 11336 11877 11980 12521
9865 10407 10509 11050 10631 11172 11274 11816
10776 11317 11419 11960 11541 12082 12185 12726
10948 11489 11591 12133 11713 12255 12357 12898
11858 12399 12502 13043 12624 13165 13267 13808
5636 6178 6280 6821 6402 6943 7045 7587
6547 7088 7190 7731 7312 7853 7956 8497
6719 7260 7362 7904 7484 8025 8128 8669
7629 8170 8273 8814 8394 8936 9038 9579
6924 7465 7567 8108 7689 8230 8333 8874
7834 8375 8478 9019 8599 9141 9243 9784
8006 8547 8650 9191 8772 9313 9415 9956
8916 9458 9560 10101 9682 10223 10325 10867
7167 7708 7811 8352 7933 8474 8576 9117
8077 8619 8721 9262 8843 9384 9487 10028
8250 8791 8893 9435 9015 9556 9659 10200
9160 9701 9804 10345 9925 10467 10569 11110
8454 8996 9098 9639 9220 9761 9864 10405
9365 9906 10008 10550 10130 10671 10774 11315
9537 10078 10181 10722 10302 10844 10946 11487
10447 10988 11091 11632 11213 11754 11856 12398
7457 7998 8100 8642 8222 8763 8866 9407
8367 8908 9011 9552 9133 9674 9776 10317
8539 9081 9183 9724 9305 9846 9948 10490
9450 9991 10093 10634 10215 10756 10859 11400
8744 9285 9388 9929 9510 10051 10153 10694
9654 10196 10298 10839 10420 10961 11063 11605
9827 10368 10470 11011 10592 11133 11236 11777
10737 11278 11381 11922 11502 12044 12146 12687
8988 9529 9631 10173 9753 10294 10397 10938
9898 10439 10542 11083 10663 11205 11307 11848
10070 10611 10714 11255 10836 11377 11479 12020
10980 11522 11624 12165 11746 12287 12389 12931
10275 10816 10919 11460 11040 11582 11684 12225
11185 11726 11829 12370 11951 12492 12594 13136
11357 11899 12001 12542 12123 12664 12767 13308
12268 12809 12911 13453 13033 13574 13677 14218
7801 8343 8445 8986 8567 9108 9210 9752
8712 9253 9355 9896 9477 10018 10121 10662
8884 9425 9527 10069 9649 10190 10293 10834
9794 10335 10438 10979 10559 11101 11203 11744
9089 9630 9732 10273 9854 10395 10498 11039
9999 10540 10642 11184 10764 11305 11408 11949
10171 10712 10815 11356 10936 11478 11580 12121
11081 11623 11725 12266 11847 12388 12490 13032
9332 9873 9976 10517 10098 10639 10741 11282
10242 10784 10886 11427 11008 11549 11651 12193
10415 10956 11058 11600 11180 11721 11824 12365
11325 11866 11969 12510 12090 12632 12734 13275
10619 11161 11263 11804 11385 11926 12029 12570
11530 12071 12173 12715 12295 12836 12939 13480
11702 12243 12346 12887 12467 13009 13111 13652
12612 13153 13256 13797 13378 13919 14021 14562
9622 10163 10265 10807 10387 10928 11031 11572
10532 11073 11176 11717 11297 11839 11941 12482
10704 11246 11348 11889 11470 12011 12113 12655
11615 12156 12258 12799 12380 12921 13024 13565
10909 11450 11553 12094 11675 12216 12318 12859
11819 12361 12463 13004 12585 13126 13228 13770
11992 12533 12635 13176 12757 13298 13401 13942
12902 13443 13545 14087 13667 14208 14311 14852
11153 11694 11796 12338 11918 12459 12562 13103
12063 12604 12707 13248 12828 13370 13472 14013
12235 12776 12879 13420 13001 13542 13644 14185
13145 13687 13789 14330 13911 14452 14554 15096
12440 12981 13084 13625 13205 13747 13849 14390
13350 13891 13994 14535 14116 14657 14759 15301
13522 14064 14166 14707 14288 14829 14932 15473
14433 14974 15076 15618 15198 15739 15842 16383
应用本申请提供将长度为2048的最大母码长可靠度序列变换为可靠度序列加可靠度参考序列的实现方式,可以有如下几种:
(1)设置l s=3,N s=8,PW i,0≤i<8,由上述公式可以得到基本序列对应的可靠度序列,并且对其中的值按照14bit进行量化后,得到量化后的基本序列对应的可靠度序列如表32所示:
表32
0 1 2 3 4 5 6 7
0 541 644 1185 765 1307 1409 1950
由上述公式得到量化后的可靠度参考序列如表33所示:
表33
8 16 32 64 128 256 512 1024
910 1082 1287 1531 1821 2165 2575 3062
由上述表32和表33可知,存储量化后的基本序列对应的可靠度序列时只需要存储
Figure PCTCN2018080379-appb-000060
个值,存储量化后的可靠度参考序列值需要存储l max-l s=11-3=8个值,总共 只需要存储8+8=16个值,因此,相比原来需要存储2048个值而言(表31),能够节约(2048-16)/2048=99.2%的存储空间,大大减小了存储开销,提高了存储效率。
(2)设置l s=4,N s=16,PW i,0≤i<16,由上述公式可以得到基本序列对应的可靠度序列,并且对其中的值按照14bit进行量化后,得到量化后的基本序列对应的可靠度序列如表34所示:
表34
0 1 2 3 4 5 6 7
0 541 644 1185 765 1307 1409 1950
8 9 10 11 12 13 14 15
910 1451 1554 2095 1676 2217 2319 2861
由上述公式得到量化后的可靠度参考序列如表35所示:
表35
16 32 64 128 256 512 1024
1082 1287 1531 1821 2165 2575 3062
由上述表34和表35可知,存储量化后的基本序列对应的可靠度序列时只需要存储
Figure PCTCN2018080379-appb-000061
个值,存储量化后的可靠度参考序列值需要存储l max-l s=11-4=7个值,总共只需要存储16+7=23个值,因此,相比原来需要存储2048个值而言(表31),能够节约(2048-23)/2048=98.9%的存储空间,大大减小了存储开销,提高了存储效率。
(3)设置l s=5,N s=32,PW i,0≤i<32,由上述公式可以得到的基本序列对应的可靠度序列,并且对其中的值按照14bit进行量化后,得到量化后的基本序列对应的可靠度序列如表36所示:
表36
0 1 2 3 4 5 6 7
0 541 644 1185 765 1307 1409 1950
8 9 10 11 12 13 14 15
910 1451 1554 2095 1676 2217 2319 2861
16 17 18 19 20 21 22 23
1082 1624 1726 2267 1848 2389 2492 3033
24 25 26 27 28 29 30 31
1993 2534 2636 3178 2758 3299 3402 3943
由上述公式得到量化后的可靠度参考序列如表37所示:
表37
32 64 128 256 512 1024
1287 1531 1821 2165 2575 3062
由上述表36和表37可知,存储量化后的基本序列对应的可靠度序列时只需要存储
Figure PCTCN2018080379-appb-000062
个值,存储量化后的可靠度参考序列值需要存储l max-l s=11-5=6个值,总共只需要存储32+6=38个值,因此,相比原来需要存储2048个值而言(表31),能够节约(2048-38)/2048=98.1%的存储空间,大大减小了存储开销,提高了存储效率。
(4)设置l s=6,N s=64,PW i,0≤i<64,由上述公式可以得到基本序列对应的可靠度序列,并且对其中的值按照14bit进行量化后,得到量化后的基本序列对应的可靠度序列如表38所示:
表38
0 1 2 3 4 5 6 7
0 541 644 1185 765 1307 1409 1950
8 9 10 11 12 13 14 15
910 1451 1554 2095 1676 2217 2319 2861
16 17 18 19 20 21 22 23
1082 1624 1726 2267 1848 2389 2492 3033
24 25 26 27 28 29 30 31
1993 2534 2636 3178 2758 3299 3402 3943
32 33 34 35 36 37 38 39
1287 1829 1931 2472 2053 2594 2696 3238
40 41 42 43 44 45 46 47
2198 2739 2841 3382 2963 3504 3607 4148
48 49 50 51 52 53 54 55
2370 2911 3013 3555 3135 3676 3779 4320
56 57 58 59 60 61 62 63
3280 3821 3924 4465 4045 4587 4689 5230
由上述公式得到量化后的可靠度参考序列如表39所示:
表39
64 128 256 512 1024
1531 1821 2165 2575 3062
由上述表38和表39可知,存储量化后的基本序列对应的可靠度序列时只需要存储
Figure PCTCN2018080379-appb-000063
个值,存储量化后的可靠度参考序列值需要存储l max-l s=11-6=5个值,总共只需要存储64+5=69个值,因此,相比原来需要存储2048个值而言(表31),能够节约 (2048-69)/=96.6%的存储空间,大大减小了存储开销,提高了存储效率。
(5)设置l s=7,N s=128,PW i,0≤i<128,由上述公式可以得到基本序列对应的可靠度序列,并且对其中的值按照14bit进行量化后,得到量化后的基本序列对应的可靠度序列如表40所示:
表40
0 1 2 3 4 5 6 7
0 541 644 1185 765 1307 1409 1950
8 9 10 11 12 13 14 15
910 1451 1554 2095 1676 2217 2319 2861
16 17 18 19 20 21 22 23
1082 1624 1726 2267 1848 2389 2492 3033
24 25 26 27 28 29 30 31
1993 2534 2636 3178 2758 3299 3402 3943
32 33 34 35 36 37 38 39
1287 1829 1931 2472 2053 2594 2696 3238
40 41 42 43 44 45 46 47
2198 2739 2841 3382 2963 3504 3607 4148
48 49 50 51 52 53 54 55
2370 2911 3013 3555 3135 3676 3779 4320
56 57 58 59 60 61 62 63
3280 3821 3924 4465 4045 4587 4689 5230
64 65 66 67 68 69 70 71
1531 2072 2175 2716 2296 2838 2940 3481
72 73 74 75 76 77 78 79
2441 2982 3085 3626 3207 3748 3850 4391
80 81 82 83 84 85 86 87
2613 3155 3257 3798 3379 3920 4022 4564
88 89 90 91 92 93 94 95
3524 4065 4167 4708 4289 4830 4933 5474
96 97 98 99 100 101 102 103
2818 3359 3462 4003 3584 4125 4227 4768
104 105 106 107 108 109 110 111
3728 4270 4372 4913 4494 5035 5137 5679
112 113 114 115 116 117 118 119
3901 4442 4544 5086 4666 5207 5310 5851
120 121 122 123 124 125 126 127
4811 5352 5455 5996 5576 6118 6220 6761
由上述公式得到量化后的可靠度参考序列如表41所示:
表41
128 256 512 1024
1821 2165 2575 3062
由上述表40和表41可知,存储量化后的基本序列对应的可靠度序列时只需要存储
Figure PCTCN2018080379-appb-000064
个值,存储量化后的可靠度参考序列值需要存储l max-l s=11-7=4个值,总共只需要存储128+4=132个值,因此,相比原来需要存储2048个值而言(表31),能够节约(2048-132)/2048=93.5%的存储空间,大大减小了存储开销,提高了存储效率。
(6)设置l s=8,N s=256,PW i,0≤i<256,由上述公式可以得到基本序列对应的可靠度序列,并且对其中的值按照14bit进行量化后,得到量化后的基本序列对应的可靠度序列如表42所示:
表42
Figure PCTCN2018080379-appb-000065
Figure PCTCN2018080379-appb-000066
由上述公式得到量化后的可靠度参考序列如表43所示:
表43
256 512 1024
2165 2575 3062
由上述表42和表43可知,存储量化后的基本序列对应的可靠度序列时只需要存储
Figure PCTCN2018080379-appb-000067
个值,存储量化后的可靠度参考序列值需要存储l max-l s=11-8=3个值,总共只需要存储256+3=259个值,因此,相比原来需要存储2048个值而言(表31),能够节约(2048-258)/2048=87.4%的存储空间,大大减小了存储开销,提高了存储效率。
(7)设置l s=9,N s=512,PW i,0≤i<512,由上述公式可以得到基本序列对应的可靠度序列,并且对其中的值按照14bit进行量化后,得到量化后的基本序列对应的可靠度序列如表44所示:
表44
Figure PCTCN2018080379-appb-000068
Figure PCTCN2018080379-appb-000069
Figure PCTCN2018080379-appb-000070
Figure PCTCN2018080379-appb-000071
由上述公式得到量化后的可靠度参考序列如表45所示:
表45
512 1024
2575 3062
由上述表44和表45可知,存储量化后的基本序列对应的可靠度序列时只需要存储
Figure PCTCN2018080379-appb-000072
个值,存储量化后的可靠度参考序列值需要存储l max-l s=11-9=2个值,总共只需要存储512+2=514个值,因此,相比原来需要存储2048个值而言(表31),能够节约(2048-514)/2048=74.9%的存储空间,大大减小了存储开销,提高了存储效率。
(8)设置l s=10,N s=1024,PW i,0≤i<1024,由上述公式可以得到基本序列对应的可靠度序列,并且对其中的值按照14bit进行量化后,得到量化后的基本序列对应的可靠度序列如表46所示:
表46
Figure PCTCN2018080379-appb-000073
Figure PCTCN2018080379-appb-000074
Figure PCTCN2018080379-appb-000075
Figure PCTCN2018080379-appb-000076
Figure PCTCN2018080379-appb-000077
Figure PCTCN2018080379-appb-000078
Figure PCTCN2018080379-appb-000079
由上述公式得到量化后的可靠度参考序列如表47所示:
表47
1024
3062
由上述表46和表47可知,存储量化后的基本序列对应的可靠度序列时只需要存储
Figure PCTCN2018080379-appb-000080
个值,存储量化后的可靠度参考序列值需要存储l max-l s=11-10=1个值,总共只需要存储1024+1=1025个值,因此,相比原来需要存储2048个值而言(表31),能够节约(2048-1025)/2048=49.9%的存储空间,大大减小了存储开销,提高了存储效率。
需要说明的是,通过设置β的取值,可以获得不同的基本序列对应的可靠度序列,上述实施例中是以β=2 0.25为例,在别的实现方式中,还可以取值β=2 0.5,β=2 0.75等等。
另外,根据不同的需求,还可以选择不同的l s,其取值范围为0≤l s<l max;与l s对应基本序列对应的可靠度序列和可靠度参考序列的长度分别是
Figure PCTCN2018080379-appb-000081
和l max-l s
对不同的长度为N max的母码序列对应的可靠度序列,如
Figure PCTCN2018080379-appb-000082
均可采用本申请实施例提供的方法进行存储。
基于前述的实施例一,对于长度为
Figure PCTCN2018080379-appb-000083
的母码序列对应的可靠度序列,利用PW公式对其进行变形计算得到的长度为
Figure PCTCN2018080379-appb-000084
的基本序列对应的可靠度序列,本实施例提供 相应的读取方式。下面将分实施例二~实施例四分别描述。
实施例二
在构造编码序列,例如Polar码时,编码码长为M、信息长度K info,读取前述实施例一提供的基本序列对应的可靠度序列N s构造Polar码时,主要有两种情形:
(1)在N≤N s时,从所述基本序列对应的可靠度序列中获取N个元素,所述N个元素的值大于所述N s个元素中N s-N个元素的值;所述N个元素在基本序列中对应的比特位置构成了编码序列;
(2)在N>N s时,根据所述可靠度参考序列中的元素,对所述基本序列对应的可靠度序列进行扩展,组成长度为N的可靠度序列,所述长度为N的可靠度序列在母码序列中对应的比特位置构成了编码序列;
其中,根据编码码长M及信息长度K info确定可靠度序列的码长N。一种可能的实现方式中,
Figure PCTCN2018080379-appb-000085
M为编码码长,
Figure PCTCN2018080379-appb-000086
为向上取整。
本实施例对可靠度序列进行读取的示意图如图3所示,其流程如图4所示,步骤如下:
步骤100,判断N与N s的大小;在N≤N s时,转入步骤101;在N>N s,转入步骤102;
步骤101,在N≤N s时,读取长度为N s的所述基本序列对应的可靠度序列的前N个元素,组成长度为N的可靠度序列,其中,所述N个元素的值大于所述N s个元素中N s-N个元素的值;所述N个元素在基本序列中对应的比特位置构成了编码序列;
在N=N s时,基本序列对应的可靠度序列的前N个元素即长度为N的可靠度序列的全部元素。
步骤102,在N>N s,用可靠度参考序列
Figure PCTCN2018080379-appb-000087
中的元素,对所述长度为N s的基本序列对应的可靠度序列
Figure PCTCN2018080379-appb-000088
进行扩展。
具体的,每一次扩展时,将
Figure PCTCN2018080379-appb-000089
扩展为
Figure PCTCN2018080379-appb-000090
其中,
Figure PCTCN2018080379-appb-000091
重复上述步骤,直到扩展后的可靠度序列长度为N;
步骤103,记录可靠度排序序列Q;所述可靠度排序序列Q是按照可靠度大小,对所述长度为N的可靠度序列的元素进行顺序排序后得到的;
步骤104,根据速率匹配条件,按从后到前(或从前到后)的次序,依次读取可靠度排序序列Q中的元素;
步骤105,若读取的元素对应的序号满足速率匹配条件,则跳过该元素。
否则,在步骤106,将该元素的序号加入信息比特序号集合
Figure PCTCN2018080379-appb-000092
循环步骤105和步骤106,直到读取的序号集合大小为K;
此时的信息比特序号集合
Figure PCTCN2018080379-appb-000093
即最可靠序号集合,其补集
Figure PCTCN2018080379-appb-000094
(相对于集合{0,1,…,N-1})为冻结比特序号集合。
实施本实施例二读取可靠度排序序列构造极化码的方法,存储开销小,且能灵活适配不同的速率匹配方式。
实施例三:
本实施例三在根据前述实施例一提供的基本序列对应的可靠度序列N s构造Polar码时,预先对系统中可能出现的每个Polar码的编码码长M、信息长度K和速率匹配方式,存储阈值PW th。该阈值可以以阈值表的形式进行存储。该阈值表示,子信道的可靠度大于等于(或大于)该阈值、且子信道的序号不满足速率匹配条件的子信道序号集合大小为K,K=K info+K check,K info为信息长度的值,K check则CRC比特和/或动态校验比特长度的值。
具体的,见示意图4和流程图5,本实施例三的步骤200~步骤202与上述实施例一的中的步骤100~步骤102相同,即当N≤N s时,读取长度为N s的所述基本序列对应的可靠度序列的N个元素,组成长度为N的可靠度序列;所述N个元素的值大于所述N s个元素中N s-N个元素的值;所述N个元素在基本序列中对应的比特位置构成了编码序列;
当N>N s时,用可靠度参考序列
Figure PCTCN2018080379-appb-000095
中的元素,对所述长度为N s的基本序列对应的可靠度序列
Figure PCTCN2018080379-appb-000096
进行扩展,直到扩展后的可靠度序列的长度为N。该长度为N的可靠度序列是用于构造编码序列的依据,其N个元素在基本序列中对应的比特位置构成了编码序列。
在步骤203,查找需要构建的Polar码的阈值;
然后,根据速率匹配和长度为N的可靠度序列,对长度为N可靠度序列的每个元素PW i和序号同时与阈值PW th进行比较。
具体的,在步骤204,判断长度为N可靠度序列的PW i的值是否大于等于(或大于)该阈值PW th
在步骤205,判断该PW i对应的序号i是否满足速率匹配条件;
步骤206,将所有满足步骤204且不满足步骤205的元素加入信息比特序号集合
Figure PCTCN2018080379-appb-000097
循环步骤205~步骤206,直到读取的序号集合大小为K;
此时的信息比特序号集合
Figure PCTCN2018080379-appb-000098
即最可靠序号集合,其补集
Figure PCTCN2018080379-appb-000099
(相对于集合{0,1,…,N-1})为冻结比特序号集合。
实施本实施例三读取基本序列对应的可靠度序列,扩展后的N个可靠度值可同时与阈值比较,比较过程支持并行处理,处理效率高,从而提高了构造极化码的效率。
实施例四:
本实施例四在根据前述实施例一提供的基本序列对应的可靠度序列N s构造Polar码时,预先对系统中可能出现的每个Polar码的编码码长M、信息长度K和速率匹配方式,存储阈值PW th。该阈值可以以阈值表的形式进行存储。该阈值表示,子信道的 可靠度大于等于(或大于)该阈值、且子信道的序号不满足速率匹配条件的子信道序号集合大小为K。
具体的,见可靠性序列进行读取的示意图6和流程图7,本实施例四的方法步骤如下:
步骤300,判断N与N s的大小;在N≤N s时,转入步骤301;在N>N s,转入步骤302;
步骤301,在N≤N s时,从所述基本序列对应的可靠度序列中获取N个元素,所述N个元素的值大于所述N s个元素中N s-N个元素的值;所述N个元素在基本序列中对应的比特位置构成了编码序列;其中,在N=N s时,可靠度序列的前N个元素即可靠度序列的全部元素。
步骤302,分N seg次从所述基本序列对应的可靠度序列中获取N个元素,所述N个元素在母码序列中对应的比特位置构成了编码序列,所述N seg=N/N s
步骤303,查找待构造的Polar码的阈值PW th
步骤304,第x次读取信息比特序号集合时(x的二进制表示为
Figure PCTCN2018080379-appb-000100
Figure PCTCN2018080379-appb-000101
计算
Figure PCTCN2018080379-appb-000102
从可靠度参考序列中读取。
然后,根据速率匹配条件和长度为N s的可靠度序列,对基本序列对应的可靠度序列的每个元素PW i和序号同时与阈值PW th,x-1进行比较。
具体的,在步骤305,判断基本序列对应的可靠度序列的PW i的值是否大于等于(或大于)该阈值PW th,x-1;需要说明的是,当第x+1读取时,根据速率匹配条件和长度为N s的可靠度序列,对基本序列对应的可靠度序列的每个元素PW i和序号同时与阈值PW th,x进行比较(如图6所示)。
在步骤306,判断该PW i的序号i对应的扩展序号i+(x-1)gN s是否满足速率匹配条件;
步骤307,将所有满足步骤305且不满足步骤306的元素的序号i+(x-1)gN s加入信息比特序号集合
Figure PCTCN2018080379-appb-000103
循环步骤305~步骤307,直到读取的序号集合大小为K;
此时的信息比特序号集合
Figure PCTCN2018080379-appb-000104
即最可靠序号集合,其补集
Figure PCTCN2018080379-appb-000105
(相对于集合{0,1,…,N-1})为冻结比特序号集合。
在另一种实现过程中,可以先读取冻结比特序号集合
Figure PCTCN2018080379-appb-000106
然后取补集得到信息比特序号集合
Figure PCTCN2018080379-appb-000107
实施例本实施例四提供的读取可靠度排序序列构造极化码的方法,无需对存储的短可靠性序列进行扩展,支持对短可靠性序列的分段并行读取(每一段可同时与阈值比较),因此,读取延迟较小,从而提高了构造极化码的效率。
采用本申请实施例提供的构造极化码的方法,对最大母码长度为N max的最大母码长可靠度序列做一些变换,将最大母码长可靠度序列用可靠度序列和可靠度参考序列来表征。然后基于存储的可靠度序列和可靠度参考序列,构造极化码。其中,所述可靠度序列为最大母码长可靠度序列的子集,所述可靠度参考序列中的元素表示所述可靠度序列与所述最大母码长可靠度序列的偏移量,在存储的时候只存储所述可靠度序列和可靠度参考序列,由于可靠度序列的长度加上所述可靠度参考序列的长度,远远小于所述原可靠性序列的长度,因此能够节省存储开销,并且还能完成的表征最大母码长可靠度序列的特性。
上述本申请提供的实施例中,分别从存储可靠度序列以及读取可靠度序列并获得信息比特序号集合的角度对本申请实施例提供的构造极化码的各方案进行了介绍。可以理解的是,上述方法可以在各个网元中实现。各个网元,例如终端、基站,控制节点等为了实现上述功能,其包含了执行各个功能相应的硬件结构和/或软件模块。本领域技术人员应该很容易意识到,结合本文中所公开的实施例描述的各示例的单元及算法步骤,本申请能够以硬件或硬件和计算机软件的结合形式来实现。某个功能究竟以硬件还是计算机软件驱动硬件的方式来执行,取决于技术方案的特定应用和设计约束条件。专业技术人员可以对每个特定的应用来使用不同方法来实现所描述的功能,但是这种实现不应认为超出本申请的范围。
如图9所示,本申请提供的构造极化码的装置在具体实现中,包括:
存储器403,其存储基本序列对应的可靠度序列,所述基本序列对应的可靠度序列的长度小于等于母码序列对应的可靠度序列的长度;所述母码序列对应的可靠度序列的长度为
Figure PCTCN2018080379-appb-000108
所述基本序列对应的可靠度序列的长度为
Figure PCTCN2018080379-appb-000109
其中,0≤l s<l max;所述存储器403还用于存储可靠度参考序列,所述可靠度参考序列包括所述母码序列对应的可靠度序列中除所述基本序列对应的可靠度序列之外至少一个元素;所述可靠度参考序列的长度为l max-l s
所述基本序列对应的可靠度序列以及所述可靠度参考序列用于构造编码序列,例如极化码序列;
控制器/处理器402,用于利用所述存储器403存储的可靠度序列以及所述可靠度参考序列构造编码序列,例如极化码序列。
在具体的实现中,所述基本序列对应的可靠度序列为
Figure PCTCN2018080379-appb-000110
其中,
Figure PCTCN2018080379-appb-000111
(i) dec@(B n-1B n-2...B 0) bin。所述可靠度参考序列为
Figure PCTCN2018080379-appb-000112
当l max∈[7,8,9,10,11,12]时,所述母码序列对应的可靠度序列的长度的取值范围为
Figure PCTCN2018080379-appb-000113
所述l s∈[1,2,3,4,5,6],所述基本序列对应的可靠度序列的长度的取值范围为
Figure PCTCN2018080379-appb-000114
关于不同的长度
Figure PCTCN2018080379-appb-000115
的母码序列,其对应的可靠度序列以及可靠度参考序列的生成方式可以参见前面方法实施例一中的描述,在此不再赘述。
另外,所述控制器/处理器402,还用于对所述基本序列对应的可靠度序列进行量化后得到所述可靠度量化序列,且用于对所述可靠度参考序列进行量化后得到所述可靠度量化参考序列;
则所述存储器401还用于存储可靠度量化序列和可靠度量化参考序列。
上述控制器/处理器402的功能可以通过电路实现也可以通过通用硬件执行软件代码实现,当采用后者时,所述存储器403还用于存储可被控制器/处理器402执行的程序代码。当控制器/处理器402运行存储器403存储的程序代码时就执行前述功能。
一种实现方式中,控制器/处理器402用于在N≤N s时,从所述基本序列对应的可靠度序列中获取N个元素,所述N个元素的值大于所述N s个元素中N s-N个元素的值;所述N个元素在基本序列中对应的比特位置构成了编码序列;
所述控制器/处理器402还用于根据所述可靠度参考序列中的元素,对所述基本序列对应的可靠度序列进行扩展,组成长度为N的可靠度序列,所述长度为N的可靠度序列在母码序列中对应的比特位置构成了编码序列;其中,所述长度为N的可靠度序列是所述处理器用可靠度参考序列
Figure PCTCN2018080379-appb-000116
中的元素对长度为Ns的基本序列对应的可靠度序列
Figure PCTCN2018080379-appb-000117
进行扩展得到的。
此外,所述存储器403还用于记录可靠度排序序列Q;所述可靠度排序序列Q是所述控制器/处理器402按照可靠度大小,对所述长度为N的可靠度序列的元素进行顺序排序后得到的。所述控制器/处理器402还用于获得信息比特序号集合A;所述信息比特序号集合A中的元素个数等于阈值K;所述信息比特序号集合A中的元素为所述可靠度排序序列Q中,序号不满足速率匹配条件的元素。
在另一种实现方式中,所述控制器/处理器402还用于获得信息比特序号集合A;所述信息比特序号集合A中的元素个数等于阈值K;所述信息比特序号集合A中的元素为所述长度为N的可靠度序列中,值大于等于极化码的阈值PW th,且序号不满足速率匹配条件的元素。
在另一种实现方式中,所述控制器/处理器402,还用于在N≤N s时,从所述基本序列对应的可靠度序列中获取N个元素,所述N个元素的值大于所述N s个元素中N s-N个元素的值;所述N个元素在基本序列中对应的比特位置构成了编码序列。
在N>N s时,所述控制器/处理器402还用于分N seg次从所述基本序列对应的可靠度序列中获取N个元素,所述N个元素在母码序列中对应的比特位置构成了编码序列,所述N seg=N/N s
所述N个元素中有K个元素在母码序列中对应的比特位置用于传输信息比特;
所述K个元素为所述长度为N的可靠度序列中,值大于等于极化码的阈值PW th,且序号不满足速率匹配条件的元素;所述处理器取所述传输信息比特的K个元素的补集,得到N-K个传输冻结比特的元素;
或者所述N个元素中除所述K个元素之外的N-K个元素在母码序列中对应的比特位置用于传输冻结比特,所述用于传输冻结比特的N-K个元素为所述长度为N的可靠度序列中,值小于编码序列的阈值PW th,或序号满足速率匹配的元素;所控制器/处理器402取所述N-K个传输冻结比特的元素的补集,得到传输信息比特的K个元素;所述传输信息比特的K个元素与N-K个传输冻结比特的元素构成编码码长的N个元素。
所述控制器/处理器402在N seg次读取的第x次读取时,读取长度为N s的所述基本序列对应的可靠度序列的N s个元素,根据编码序列的阈值PW th计算阈值PW th,x-1,并且根据所述N s个元素的序号i,计算序号i+(x-1)gN s,取N s个元素中可靠度大于等于阈值PW th,x-1,且i+(x-1)gN s不满足速率匹配条件的元素,将该元素的序号i+(x-1)gN s加入传输信息比特的信息比特序号集合A;所述信息比特序号集合A中的元素个数等于阈值K;
所述控制器/处理器402取所述信息比特序号集合A的补集,得到传输冻结息比特的N-K个元素;所述信息比特序号集合A中传输信息比特的K个元素与N-K个传输冻结比特的元素构成编码码长的N个元素;或者
所述分N seg次从所述基本序列对应的可靠度序列中获取N个元素,包括:
所述控制器/处理器402在N seg次读取的第x次读取时,读取长度为N s的所述可靠度序列的N s个元素,并根据极化码的阈值PW th计算阈值PW th,x-1
所述控制器/处理器402根据所述N s个元素的序号i,计算序号i+(x-1)gN s,取N s个元素中可靠度小于阈值PW th,x-1或序号i+(x-1)gN s满足速率匹配条件的元素,将该元素的序号i+(x-1)gN s加入传输冻结息比特的冻结比特序号集合A c
所述控制器/处理器402取所述冻结比特序号集合A c的补集,得到传输信息比特的K个元素组成信息比特序号集合A;所述信息比特序号集合A中的元素个数等于阈值K;
所述信息比特序号集合A中传输信息比特的K个元素与N-K个传输冻结比特的元素构成编码码长的N个元素。
具体的处理步骤可以参见方法实施例二至实施例四,在此不再赘述。
进一步地,所述构造极化码的装置还可以包括编码器4051、调制器4052、解调器4054和解码器4053。编码器4051用于获取网络侧设备将要发给终端或者终端即将发给网络侧设备的数据/信令,并对该数据/信令进行编码。调制器4052对编码器4051编码后的数据/信令进行调制后传递给收发器401,由收发器401发送给终端或者其他网络侧设 备。
解调器4054用于获取终端或者其他网络侧设备发送的数据/信令,并进行解调。解码器4053用于对解调器4054解调后的数据/信令进行解码。
上述编码器4051、调制器4052、解调器4054和解码器4053可以由合成的调制解调处理器405来实现。这些单元根据无线接入网采用的无线接入技术(例如,LTE及其他演进系统的接入技术)来进行处理。
所述网络侧设备还可以包括通信接口404,用于支持该构造极化码的装置与其他网络实体之间进行通信。可以理解的是,图8仅仅示出了构造极化码的装置的简化设计。在实际应用中,上述收发器401可以包括发射器和接收器,该装置可以包含任意数量的收发器,处理器,控制器/处理器,存储器,和/或通信接口等。
上述装置在具体实现中,可以是终端或者网络侧设备。网络侧设备又可以是基站或者控制节点。
本申请上述基站,终端、或控制节点的控制器/处理器可以是中央处理器(CPU),通用处理器、数字信号处理器(DSP)、专用集成电路(ASIC),现场可编程门阵列(FPGA)或者其他可编程逻辑器件、晶体管逻辑器件,硬件部件或者其任意组合。其可以实现或执行结合本申请公开内容所描述的各种示例性的逻辑方框,模块和电路。所述处理器也可以是实现计算功能的组合,例如包含一个或多个微处理器组合,DSP和微处理器的组合等等。
结合本申请公开内容所描述的方法或者算法的步骤可以硬件的方式来实现,也可以是由处理器执行软件指令(例如,程序代码)的方式来实现。软件指令可以由相应的软件模块组成,软件模块可以被存放于RAM存储器、闪存、ROM存储器、EPROM存储器、EEPROM存储器、寄存器、硬盘、移动硬盘、CD-ROM或者本领域熟知的任何其它形式的存储介质中。一种示例性的存储介质耦合至处理器,从而使处理器能够从该存储介质读取信息,且可向该存储介质写入信息。当然,存储介质也可以是处理器的组成部分。处理器和存储介质可以位于ASIC中。另外,该ASIC可以位于终端中。当然,处理器和存储介质也可以作为分立组件存在于终端中。
本领域技术人员应该可以意识到,在上述一个或多个示例中,本申请所描述的功能可以用硬件、软件、固件或它们的任意组合来实现。当使用软件实现时,可以将这些功能存储在计算机可读介质中或者作为计算机可读介质上的一个或多个指令或代码进行传输。计算机可读介质包括计算机存储介质和通信介质,其中通信介质包括便于从一个地方向另一个地方传送计算机程序的任何介质。存储介质可以是通用或专用计算机能够存取的任何可用介质。
以上所述的具体实施方式,对本申请的目的、技术方案和有益效果进行了进一步详细说明,所应理解的是,以上所述仅为本申请的具体实施方式而已,并不用于限定本申请的保护范围,凡在本申请的技术方案的基础之上,所做的任何修改、等同替换、改进等,均应包括在本申请的保护范围之内。

Claims (35)

  1. 一种构造编码序列的方法,其特征在于,所述方法由终端或者网络设备执行,所述方法包括:
    存储基本序列对应的可靠度序列,所述基本序列对应的可靠度序列的长度小于等于母码序列对应的可靠度序列的长度;
    存储可靠度参考序列,所述可靠度参考序列包括所述母码序列对应的可靠度序列中除所述基本序列对应的可靠度序列之外至少一个元素;
    利用所述基本序列对应的可靠度序列以及所述可靠度参考序列中的元素构造编码序列。
  2. 如权利要求1所述的构造编码序列的方法,其特征在于,所述母码序列对应的可靠度序列的长度为
    Figure PCTCN2018080379-appb-100001
    所述基本序列对应的可靠度序列的长度为
    Figure PCTCN2018080379-appb-100002
    其中,0≤l s<l max
  3. 如权利要求2所述的构造编码序列的方法,其特征在于,所述基本序列对应的可靠度序列中的第i个元素为:
    Figure PCTCN2018080379-appb-100003
    其中,
    Figure PCTCN2018080379-appb-100004
    (i) dec@(B n-1B n-2...B 0) bin,(i) dec表示为i为十进制数,(B n-1B n-2...B 0) bin表示二进制数,β为指数的基数。
  4. 如权利要求3所述的构造编码序列的方法,其特征在于,所述可靠度参考序列的长度为l max-l s,所述可靠度参考序列为
    Figure PCTCN2018080379-appb-100005
    β为指数的基数。
  5. 如权利要求2所述的构造编码序列的方法,其特征在于,所述l max∈[8,9,10,11,12],所述母码序列对应的可靠度序列的长度为
    Figure PCTCN2018080379-appb-100006
    所述l s∈[0,1,2,3,4,5,6,7,8,9,10,11],所述基本序列对应的可靠度序列的长度为
    Figure PCTCN2018080379-appb-100007
  6. 如权利要求2所述的一种构造编码序列的方法,其特征在于,利用所述基本序列对应的可靠度序列以及所述可靠度参考序列构造长度为N、编码长度为M、信息长度为K info的编码序列,包括:
    在N≤N s时,从所述基本序列对应的可靠度序列中获取N个元素,所述N个元素的值大于所述N s个元素中N s-N个元素的值;所述N个元素在基本序列中对应的比特位置构成了编码序列;
    在N>N s时,根据所述可靠度参考序列中的元素,对所述基本序列对应的可靠度序列进行扩展,组成长度为N的可靠度序列,所述长度为N的可靠度序列在母码序列中对应的比特位置构成了编码序列。
  7. 如权利要求6所述的构造编码序列的方法,其特征在于,所述长度为N的可靠度序列是用可靠度参考序列
    Figure PCTCN2018080379-appb-100008
    中的元素对长度为N s的基本序列对应的可靠度序列中的元素
    Figure PCTCN2018080379-appb-100009
    进行扩展得到 的,β为指数的基数。
  8. 如权利要求7所述的构造编码序列的方法,其特征在于,所述方法还包括:
    记录可靠度排序序列Q;所述可靠度排序序列Q是按照可靠度大小,对所述长度为N的可靠度序列中的元素进行顺序排序后得到的。
  9. 如权利要求8所述的构造编码序列的方法,其特征在于,所述方法还包括:
    获得信息比特序号集合A;所述信息比特序号集合A中的元素个数等于阈值K;所述信息比特序号集合A中的元素为所述可靠度排序序列Q中,序号不满足速率匹配条件的最可靠的K个元素。
  10. 如权利要求8所述的构造编码序列的方法,其特征在于,所述方法还包括:
    获得信息比特序号集合A;所述信息比特序号集合A中的元素个数等于阈值K;
    所述信息比特序号集合A为冻结比特序号集合A c的补集,所述冻结比特序号集合A c中的元素为所述可靠度排序序列Q中,序号满足速率匹配条件或可靠度最低的(N-K)个元素。
  11. 如权利要求7所述的构造编码序列的方法,其特征在于,所述方法还包括:
    获得信息比特序号集合A;所述信息比特序号集合A中的元素个数等于阈值K;
    所述信息比特序号集合A中的元素为所述长度为N的可靠度序列中,值大于等于极化码的阈值PW th,且序号不满足速率匹配条件的元素。
  12. 如权利要求7所述的构造编码序列的方法,其特征在于,所述方法还包括:
    获得信息比特序号集合A;所述信息比特序号集合A中的元素个数等于阈值K;
    所述信息比特序号集合A为冻结比特序号集合A c的补集,所述冻结比特序号集合A c中的元素为所述长度为N的可靠度序列中,值小于极化码的阈值PW th,或序号满足速率匹配的元素集合的补集。
  13. 如权利要求2所述的构造编码序列的方法,其特征在于,所述利用所述基本以及所述可靠度参考序列构造编码序列,包括:
    在N≤N s时,从所述基本序列对应的可靠度序列中获取N个元素,所述N个元素的值大于所述N s个元素中N s-N个元素的值;所述N个元素在基本序列中对应的比特位置构成了编码序列;
    在N>N s时,分N seg次从所述基本序列对应的可靠度序列中获取N个元素,所述N个元素在母码序列中对应的比特位置构成了编码序列,所述N seg=N/N s
  14. 如权利要求13所述的构造编码序列的方法,所述N个元素中有K个元素在母码序列中对应的比特位置用于传输信息比特;
    所述K个元素为所述长度为N的可靠度序列中,值大于等于极化码的阈值PW th,且序号不满足速率匹配条件的元素;
    取所述传输信息比特的K个元素的补集,得到N-K个传输冻结比特的元素;
    所述传输信息比特的K个元素与N-K个传输冻结比特的元素构成编码码长的N个元素。
  15. 如权利要求13所述的构造编码序列的方法,其特征在于,所述N个元素中除所述K个元素之外的N-K个元素在母码序列中对应的比特位置用于传输冻结比特,所述用于传输冻结比特的N-K个元素为所述长度为N的可靠度序列中,值小于编码序列的阈值PW th,或序号满足速率匹配的元素;
    取所述N-K个传输冻结比特的元素的补集,得到传输信息比特的K个元素;
    所述传输信息比特的K个元素与N-K个传输冻结比特的元素构成编码码长的N个元素。
  16. 如权利要求13所述的构造编码序列的方法,其特征在于,所述分N seg次从所述基本序列对应的可靠度序列中获取N个元素,包括:
    在N seg次读取的第x次读取时,读取长度为N s的所述基本序列对应的可靠度序列的N s个元素,根据编码序列的阈值PW th计算阈值PW th,x-1,并且根据所述N s个元素的序号i,计算序号i+(x-1)gN s,取N s个元素中可靠度大于等于阈值PW th,x-1,且i+(x-1)gN s不满足速率匹配条件的元素,将该元素的序号i+(x-1)gN s加入传输信息比特的信息比特序号集合A;所述信息比特序号集合A中的元素个数等于阈值K;
    取所述信息比特序号集合A的补集,得到传输冻结息比特的N-K个元素;
    所述信息比特序号集合A中传输信息比特的K个元素与N-K个传输冻结比特的元素构成编码码长的N个元素。
  17. 如权利要求13所述的构造编码序列的方法,其特征在于,所述分N seg次从所述基本序列对应的可靠度序列中获取N个元素,包括:
    在N seg次读取的第x次读取时,读取长度为N s的所述可靠度序列的N s个元素,并根据极化码的阈值PW th计算阈值PW th,x-1
    根据所述N s个元素的序号i,计算序号i+(x-1)gN s,取N s个元素中可靠度小于阈值PW th,x-1或序号i+(x-1)gN s满足速率匹配条件的元素,将该元素的序号i+(x-1)gN s加入传输冻结息比特的冻结比特序号集合A c
    取所述冻结比特序号集合A c的补集,得到传输信息比特的K个元素组成信息比特序号集合A;所述信息比特序号集合A中的元素个数等于阈值K;
    所述信息比特序号集合A中传输信息比特的K个元素与N-K个传输冻结比特的元素构成编码码长的N个元素。
  18. 一种构造编码序列的装置,其特征在于,包括:
    存储器,用于存储基本序列对应的可靠度序列,所述基本序列对应的可靠度序列的长度小于等于母码序列对应的可靠度序列的长度;
    所述存储器还用于存储可靠度参考序列,所述可靠度参考序列包括所述母码序列对应的可靠度序列中除所述基本序列对应的可靠度序列之外至少一个元素;
    处理器,用于利用所述存储器存储的基本序列对应的可靠度序列以及所述可靠度参考序列构造编码序列。
  19. 如权利要求18所述的构造编码序列的装置,其特征在于,所述母码序列对应的可靠度序列的长度为
    Figure PCTCN2018080379-appb-100010
    所述基本序列对应的可靠度序列的长度为
    Figure PCTCN2018080379-appb-100011
    其中,0≤l s<l max
  20. 如权利要求19所述的构造编码序列的装置,其特征在于,所述基本序列对应的可靠度序列中第i个元素为:
    Figure PCTCN2018080379-appb-100012
    其中(i) dec表示为i为十进制数,(B n-1B n-2...B 0) bin表示二进制数,β为指数的基数。
  21. 如权利要求20所述的构造编码序列的装置,其特征在于,所述可靠度参考序列的长度为l max-l s,所述可靠度参考序列为
    Figure PCTCN2018080379-appb-100013
    β为指数的基数。
  22. 如权利要求19所述的构造编码序列的装置,其特征在于,所述l max∈[8,9,10,11,12],所述母码序列对应的可靠度序列的长度为
    Figure PCTCN2018080379-appb-100014
    所述l s∈[0,1,2,3,4,5,6,7,8,9,10,1,1]所述可靠度序列的长度为
    Figure PCTCN2018080379-appb-100015
  23. 如权利要求19所述的构造编码序列的装置,其特征在于,所述处理器,还用于利用所述基本序列对应的可靠度序列以及所述可靠度参考序列构造母码长度为N、编码长度为M、信息长度为K inf o的编码序列,包括:
    在N≤N s时,从所述基本序列对应的可靠度序列中获取N个元素,所述N个元素的值大于所述N s个元素中N s-N个元素的值;所述N元素在基本序列中对应的比特位置构成了编码序列;
    在N>N s时,根据所述可靠度参考序列中的元素,对所述基本序列对应的可靠度序列进行扩展,组成长度为N的可靠度序列,所述长度为N的可靠度序列在母码序列中对应的比特位置构成了编码序列。
  24. 如权利要求23所述的构造编码序列的装置,其特征在于,
    长度为N的可靠度序列是用可靠度参考序列
    Figure PCTCN2018080379-appb-100016
    中的元素对长度为N s的基本序列对应的可靠度序列中的元素值
    Figure PCTCN2018080379-appb-100017
    进行扩展得到的,β为指数的基数。
  25. 如权利要求24所述的构造编码序列的装置,其特征在于,所述存储器还用于记录可靠度排序序列Q;所述可靠度排序序列Q是所述处理器按照可靠度大小,对所述长度为N的可靠度序列中的元素进行顺序排序后得到的。
  26. 如权利要求25所述的构造编码序列的装置,其特征在于,所述处理器还用于获得信息比特序号集合A;所述信息比特序号集合A中的元素个数等于阈值K;所述信息比特序号集合A中的元素为所述可靠度排序序列Q中,序号不满足速率匹配条件的最可靠的K个元素。
  27. 如权利要求25所述的构造编码序列的装置,其特征在于,所述处理器还用于获得信息比特序号集合A;所述信息比特序号集合A中的元素个数等于阈值K;
    所述信息比特序号集合A为冻结比特序号集合A c的补集,所述冻结比特序号集合A c中的元素为所述可靠度排序序列Q中,序号满足速率匹配条件或可靠度最低的 (N-K)个元素。
  28. 如权利要求25所述的构造编码序列的装置,其特征在于,所述处理器还用于获得信息比特序号集合A;所述信息比特序号集合A中的元素个数等于阈值K;
    所述信息比特序号集合A中的元素为所述长度为N的可靠度序列中,值大于等于极化码的阈值PW th,且序号不满足速率匹配条件的元素。
  29. 如权利要求25所述的构造编码序列的装置,其特征在于,所述处理器还用于获得信息比特序号集合A;所述信息比特序号集合A中的元素个数等于阈值K;
    所述信息比特序号集合A为冻结比特序号集合A c的补集,所述冻结比特序号集合A c中的元素为所述长度为N的可靠度序列中,值小于极化码的阈值PW th,或序号满足速率匹配条件的元素集合的补集。
  30. 如权利要求19所述的构造编码序列的装置,其特征在于,所述装置还包括:
    处理器,从所述基本序列对应的可靠度序列中获取N个元素,,所述N个元素的值大于所述N s个元素中N s-N个元素的值;所述N个元素在基本序列中对应的比特位置构成了编码序列;
    在N>N s时,分N seg次从所述基本序列对应的可靠度序列中获取N个元素,所述N个元素在母码序列中对应的比特位置构成了编码序列,所述N seg=N/N s
  31. 如权利要求30所述的构造编码码长的装置,其特征在于,所述处理器获取的所述N个元素中有K个元素在母码序列中对应的比特位置用于传输信息比特;
    所述K个元素为所述长度为N的可靠度序列中,值大于等于极化码的阈值PW th,且序号不满足速率匹配条件的元素;
    所述处理器取所述传输信息比特的K个元素的补集,得到N-K个传输冻结比特的元素;
    所述传输信息比特的K个元素与N-K个传输冻结比特的元素构成编码码长的N个元素。
  32. 如权利要求30所述的构造编码序列的装置,其特征在于,所述处理器获取的所述N个元素中除所述K个元素之外的N-K个元素在母码序列中对应的比特位置用于传输冻结比特,所述用于传输冻结比特的N-K个元素为所述长度为N的可靠度序列中,值小于编码序列的阈值PW th,或序号满足速率匹配的元素;
    所述处理器取所述N-K个传输冻结比特的元素的补集,得到传输信息比特的K个元素;
    所述传输信息比特的K个元素与N-K个传输冻结比特的元素构成编码码长的N个元素。
  33. 如权利要求30所述的构造编码序列的装置,其特征在于,所述处理器分N seg次从所述基本序列对应的可靠度序列中获取N个元素;包括:
    在N seg次读取信息特比序号集合的第x次读取时,读取长度为N s的所述基本序列对应的可靠度序列的N s个元素,根据编码序列的阈值PW th计算阈值PW th,x-1,并且根据所述N s个元素的序号i,计算序号i+(x-1)gN s,取N s个元素中可靠度大于等于阈值 PW th,x-1且i+(x-1)gN s不满足速率匹配条件的元素,将该元素的序号i+(x-1)gN s加入传输信息比特的信息比特序号集合A;所述信息比特序号集合A中的元素个数等于阈值K;
    所述处理器取所述信息比特序号集合A的补集,得到传输冻结息比特的N-K个元素;
    所述信息比特序号集合A中传输信息比特的K个元素与N-K个传输冻结比特的元素构成编码码长的N个元素。
  34. 如权利要求30所述的构造编码序列的装置,其特征在于,所述处理器分N seg次从所述基本序列对应的可靠度序列中获取N个元素,包括:
    在N seg次读取的第x次读取时,读取长度为N s的所述可靠度序列的N s个元素,并根据极化码的阈值PW th计算阈值PW th,x-1
    根据所述N s个元素的序号i,计算序号i+(x-1)gN s,取N s个元素中可靠度小于阈值PW th,x-1或i+(x-1)gN s满足速率匹配条件的元素,将该元素的序号i+(x-1)gN s加入传输冻结息比特的冻结比特序号集合A c
    所述处理器取所述冻结比特序号集合A c的补集,得到传输信息比特的信息比特序号集合A;所述信息比特序号集合A中的元素个数等于阈值K;
    所述信息比特序号集合A中传输信息比特的K个元素与N-K个传输冻结比特的元素构成编码码长的N个元素。
  35. 如权利要求18至34中任一项所述的构造极化码的装置,其特征在于,所述装置为终端或网络侧设备。
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