WO2018157718A1 - 应用静电载具测试半导体制品的机构 - Google Patents

应用静电载具测试半导体制品的机构 Download PDF

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Publication number
WO2018157718A1
WO2018157718A1 PCT/CN2018/075792 CN2018075792W WO2018157718A1 WO 2018157718 A1 WO2018157718 A1 WO 2018157718A1 CN 2018075792 W CN2018075792 W CN 2018075792W WO 2018157718 A1 WO2018157718 A1 WO 2018157718A1
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WIPO (PCT)
Prior art keywords
carrier
electrostatic
semiconductor
circuit
semiconductor article
Prior art date
Application number
PCT/CN2018/075792
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English (en)
French (fr)
Inventor
叶秀慧
Original Assignee
叶秀慧
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by 叶秀慧 filed Critical 叶秀慧
Priority to US16/086,612 priority Critical patent/US10832932B2/en
Publication of WO2018157718A1 publication Critical patent/WO2018157718A1/zh

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Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851—Testing of integrated circuits [IC]
    • G01R31/2855—Environmental, reliability or burn-in testing
    • G01R31/286—External aspects, e.g. related to chambers, contacting devices or handlers
    • G01R31/2865—Holding devices, e.g. chucks; Handlers or transport devices
    • G01R31/2867—Handlers or transport devices, e.g. loaders, carriers, trays
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6831—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using electrostatic chucks
    • H01L21/6833—Details of electrostatic chucks
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/26—Testing of individual semiconductor devices
    • G01R31/2601—Apparatus or methods therefor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67242—Apparatus for monitoring, sorting or marking
    • H01L21/67288—Monitoring of warpage, curvature, damage, defects or the like
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6831—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using electrostatic chucks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/687—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
    • H01L21/68707—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a robot blade, or gripped by a gripper for conveyance
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/687—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
    • H01L21/68714—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
    • H01L21/68764—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support characterised by a movable susceptor, stage or support, others than those only rotating on their own vertical axis, e.g. susceptors on a rotating caroussel

Definitions

  • the present invention relates to the field of mechanisms for testing semiconductor articles, and more particularly to a mechanism for testing semiconductor articles using electrostatic carriers.
  • the thickness of the mobile phone is required to be thinner and thinner, and all the chips in the opposite direction.
  • the thickness must also be relatively reduced.
  • a considerable number of chips, such as memory chips must be stacked in a very thin thickness. Therefore, the thickness of the chip fabricated by the semiconductor process as a whole is also compressed to an extremely thin extent. In the semiconductor process, the chip must be subjected to various tests.
  • the chip In the traditional test process, the chip must be placed on the carrier, then the carrier is moved to the test fixture where the test is required, and the chip is removed from the carrier and placed by hand or mechanical arm. Test the corresponding test probe on the tool, then apply the test probe to test the chip and collect the required data.
  • a semiconductor article such as a chip or a chipset tray (tmy) has a plurality of grooves formed on a disk body, and the chip is placed in the groove, and the chip is not fixed in the groove.
  • a drawback of this prior art is that the chip may collide with the groove wall of the groove to cause damage, and if it is serious, the mounted semiconductor component may be damaged to be usable.
  • the semiconductor components that can be mounted are also limited by the size of the grooves, so different trays must correspond to different semiconductor parts. Manufacturers must have a variety of different sizes of trays. And because the part is not fixed, the operation may not be possible, and the situation may be dumped. The damaged parts are damaged.
  • the present invention contemplates a novel mechanism for testing semiconductor articles using electrostatic carriers to address the above-discussed deficiencies of the prior art.
  • an object of the present invention is to solve the above problems in the prior art.
  • a mechanism for testing a semiconductor article using an electrostatic carrier is proposed, and a carrier plate equipped with an electrostatic circuit is applied. It will cause damage during the carrying process and achieve the purpose of protecting the semiconductor products carried by the carrier.
  • the present invention does not require the semiconductor article to be removed from the carrier during testing, and the probe mechanism is directly applied to the semiconductor article for testing, and the semiconductor article is not placed on the carrier when the test is completed.
  • a reverse voltage is applied to the carrier to achieve the purpose of eliminating static electricity. The semiconductor article can thus be removed from the carrier. Therefore, the damage rate of semiconductor products can be minimized throughout the process.
  • the semiconductor article is electrostatically adsorbed, so that it is not affected by the size of the semiconductor article, and various semiconductor products of different sizes can be disposed in the tray formed by the carrier. Therefore, a single type of tray can be installed with various sizes of semiconductor products. Moreover, since the electrostatic attraction is applied, the mounted semiconductor article does not collide or fall, so the entire transportation process is simplified and accelerated.
  • the present invention provides a mechanism for testing a semiconductor article using an electrostatic carrier, and a mechanism for directly testing an electrostatic carrier carrying a semiconductor article, the application of the electrostatic carrier to test a semiconductor article
  • the mechanism comprises: a mobile carrier board carrying a plurality of semiconductor products thereon; the mobile carrier board being carried to a test position for positioning, the mobile carrier board being configured with at least one electrostatic circuit for generating static electricity, Applying static electricity to the mobile carrier to adsorb the carried semiconductor article; a mobile test probe set comprising: a probe mechanism, the probe mechanism comprising a probe or a plurality of probes; a robot arm, Connecting the probe mechanism to drive the probe mechanism to a desired test point, and connecting the probe to a circuit contact on the semiconductor article for testing action; a control mechanism connecting the robot arm, including a control circuit for controlling the robot arm Moving, further comprising a test circuit, wherein the test circuit collects the required data through the probe; a computer connected to the control mechanism for collecting
  • Each of the electrostatic circuit includes a pair of sensing electrodes, the sensing electrode pair includes two sensing electrode ends, and the two sensing electrode ends respectively extend downward from opposite ends of the corresponding electrostatic circuit, and the sensing electrode ends penetrate the The mobile carrier is exposed from below the mobile carrier.
  • the probe mechanism when the probe mechanism includes a plurality of probes, different sets of structures are formed, each group corresponding to a semiconductor article to be tested, so that the plurality of semiconductor products can be tested at one time by using the probe mechanism.
  • the two sensing electrode ends of the sensing electrode pair of each electrostatic circuit are used to connect the positive and negative electrodes of an external voltage source, and the voltage source senses the two sensing electrode ends of the corresponding sensing electrode pair.
  • the semiconductor inside the corresponding electrostatic circuit is induced to generate static electricity on the surface of the mobile carrier, and the semiconductor article is adsorbed on the mobile carrier by the attraction force of static electricity.
  • a hole is reserved in the mobile carrier, and a conductive material is filled in the hole, wherein the conductive material is formed in a double manner, and a lower portion thereof is exposed on a lower surface of the movable carrier.
  • the mobile carrier is plated with a film material sequentially composed of copper, nickel, and gold, wherein copper is located at one end of the film material in contact with the movable carrier, and then applied by photolithography.
  • the undesired material is etched away, and the remaining raw material forms the electrostatic circuit; wherein the electrostatic circuit must correspond to the pair of sensing electrodes that have been formed as described above.
  • the test procedure is to place the semiconductor product to be tested on the mobile carrier, and then use the carrier tool to transfer the mobile carrier to the measured position, and then the control mechanism controls the robot And causing the probe mechanism to contact the semiconductor product to be tested, and testing the semiconductor product to be tested according to the planned stroke of the test circuit; then the control mechanism drives the robot arm to the next Testing the semiconductor article to be tested, in which the planned semiconductor article is tested; after the test is completed, the robot arm is carried away from the mobile carrier; and the mobile carrier and the semiconductor article are Move to the next stage.
  • the mobile carrier forms a tray of semiconductor articles for use in shipping and testing processes.
  • FIG. 1 is a schematic view of component assembly of the present invention.
  • FIG. 2 is a block diagram showing the architecture of a mobile test probe set of the present invention.
  • FIG 3 is an exploded perspective view of the mobile carrier board and the carried chip of the present invention.
  • FIG. 4 is a schematic view of the probe mechanism of the present invention including a probe.
  • FIG. 5 is a schematic illustration of a probe mechanism of the present invention including a plurality of probes.
  • FIG. 6 is a flow chart of a test procedure of the present invention.
  • FIG. 7 is a schematic cross-sectional view taken along line A-A of FIG. 3.
  • FIG. 8 is a schematic cross-sectional view showing an external voltage source connected to two inductive terminals of the sensing electrode pair of the present invention.
  • FIG. 9 is a schematic cross-sectional view showing the external voltage source being reversed to the two inductive terminals of the sensing electrode pair of the present invention.
  • FIG. 10 is a schematic cross-sectional view showing a process of an electrostatic circuit of the present invention.
  • FIG. 11 is a schematic cross-sectional view of FIG. 10 after etching.
  • FIG. 1 to FIG. 11 is a mechanism for testing a semiconductor article using an electrostatic carrier according to the present invention, and a mechanism for directly testing a static carrier carrying a semiconductor article, wherein the semiconductor article can be A chip or chipset, such as a MOSFET chip, an RF chip or a power chip, and the like.
  • the semiconductor article can be A chip or chipset, such as a MOSFET chip, an RF chip or a power chip, and the like.
  • the chip 10' is taken as an illustration.
  • the mechanism for applying an electrostatic carrier test semiconductor article of the present invention includes the following components:
  • a mobile carrier 20 for carrying a plurality of chips 10' located above (as shown in FIG.
  • the mobile carrier 20 forms a tray of semiconductor articles for use in shipping and testing processes.
  • each of the electrostatic circuit 30 includes a sensing electrode pair 37
  • the sensing electrode pair 37 includes two sensing electrode ends 35 respectively extending downward from opposite ends of the corresponding electrostatic circuit 30 , and each sensing electrode end 35 runs through
  • the mobile carrier 20 is exposed from below the mobile carrier 20.
  • the two sensing electrode ends 35 of the sensing electrode pair 37 of each electrostatic circuit 30 are used to connect the positive and negative electrodes of the external voltage source 40 (as shown in FIG. 8), and the voltage source 40 senses the corresponding sensing electrode pair 37.
  • the two sensing electrode terminals 35 cause the circuitry inside the corresponding electrostatic circuit 30 to be induced to generate static electricity on the surface of the mobile carrier 20.
  • the chip 10' can be attracted to the mobile carrier 20 by the attraction of static electricity. When the mobile carrier 20 moves, the chip 10' also moves.
  • a mobile test probe set 60 includes:
  • a probe mechanism 61 comprising a probe 611 (shown in FIG. 4) or a plurality of probes 611 (shown in FIG. 5).
  • the probe mechanism 61 includes a plurality of probes 611A, which can form different sets of structures, each of which corresponds to a chip to be tested. Therefore, the probe mechanism 61 can be used to test a plurality of chips at a time.
  • a robot arm 62 coupled to the probe mechanism 61, can drive the probe mechanism 61 to a desired test point and cause the probe 611 to be coupled to a circuit contact on the chip 10' for testing.
  • a control mechanism 63 connected to the robot arm 62, includes a control circuit 631 for controlling the movement of the robot arm 62, and a test circuit 632, the test circuit 632 is collected by the probe 611. The data needed.
  • a computer 64 connected to the control mechanism 63, can collect test data of the test circuit 632. The user can determine the test item and mode of the test circuit 632 and the travel of the robot arm 62 through the computer 64.
  • the mobile carrier 20 carries a plurality of chips 10'.
  • Carrying the mobile carrier 20 to the test position Positioning is then performed to drive the mobile test probe set 60 such that the probe mechanism 61 can access the plurality of chips 10' and test the plurality of chips 10' and collect the required data.
  • the test program is to place the chip 10' to be tested on the mobile carrier 20 (step 800), and then apply the carrier tool (not shown) to move the mobile device.
  • the carrier board 20 is transferred to the tested position (step 81 0), and then the control mechanism 63 controls the robot arm 62 such that the probe mechanism 61 contacts the chip 10' to be tested, and according to the planned stroke of the test circuit 632.
  • the chip 10' to be tested is tested (step 82 0); then the control mechanism 63 drives the robot arm 62 to the next chip 10' to be tested for testing, and in this way, the planned chip 10' is to be tested.
  • the test is performed (step 830); after the test is completed, the robot arm 62 is carried away from the mobile carrier 20, and the mobile carrier 20 and the chip 10' are moved to the next stage (step 840).
  • the chip 10' When the chip 10' is to be detached from the mobile carrier 20, a voltage source 50 connected from the outside is used, and the electrostatic circuit 30 exposed from the positive and negative electrodes and the mobile carrier 20 is used.
  • the two sensing electrode terminals 35 of the sensing electrode pair 37 are reversely connected, so that the static electricity inside the electrostatic circuit 30 of the mobile carrier 20 disappears (as shown in FIG. 9), so the mobile carrier 20 is The chip 10' is no longer adsorbed, and the chip 10' is detached from the mobile carrier 20, and the purpose of transportation can be achieved.
  • a hole 21 is reserved on the movable carrier 20, and a conductive material 25 such as a copper material is filled in the hole 21, wherein the conductive The material 25 is formed in a double manner, and is exposed below the lower surface of the movable carrier 20 as the two sensing electrode terminals 35 of the sensing electrode pair 37 of the electrostatic circuit 30.
  • the mobile carrier 20 is then plated with a film material 300 formed by sequentially combining copper 31, nickel 32, and gold 33, wherein the copper 31 is located in the film material 300.
  • One end of the movable carrier 20 is then etched away by applying a photolithographic etching process, and the remaining material forms the electrostatic circuit 30 (as shown in FIG. 11).
  • the electrostatic circuit 30 must correspond to the pair of sensing electrodes 37 that have been formed as described above. Therefore, connecting the two sensing electrode terminals 35 of the sensing electrode pair 37 to the external positive and negative electrodes of the voltage source 40 causes the electrostatic circuit 30 to generate an electrostatic effect.
  • the present invention applies a carrier plate equipped with an electrostatic circuit, which does not cause damage during the carrying process, and achieves the purpose of protecting the semiconductor article carried by the carrier.
  • the present invention does not require the semiconductor article to be removed from the carrier during the test, and the probe mechanism is directly applied to the semiconductor article for testing, and the semiconductor article is not placed on the carrier when the test is completed. If the semiconductor article is to be removed, a reverse voltage is applied to the carrier to achieve the purpose of eliminating static electricity. The semiconductor article can thus be removed from the carrier. Therefore, the damage rate of semiconductor products can be minimized throughout the process.
  • the semiconductor article is electrostatically adsorbed, so that it is not affected by the size of the semiconductor article, and various semiconductor products of different sizes can be disposed in the tray formed by the carrier. Therefore, one type of tray can be installed with various sizes of semiconductor products. Moreover, since the electrostatic attraction is applied, the mounted semiconductor article does not collide or fall, so the entire transportation process is simplified and accelerated.

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  • Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Power Engineering (AREA)
  • Robotics (AREA)
  • Environmental & Geological Engineering (AREA)
  • General Engineering & Computer Science (AREA)
  • Testing Of Individual Semiconductor Devices (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)

Abstract

一种应用静电载具测试半导体制品的机构，为应用一承载半导体制品的静电载具，直接进行测试的机构，该机构包括：一移动式载板（20），配置至少一静电电路（30），以应用静电而使得移动式载板（20）吸附所承载的半导体制品；一移动式测试探针组（60），包括：一探针机构（61），包括一个探针（611）或多个探针（611）；一机械手臂（62），用以驱动探针机构（61）到所需要的测试点，并使得探针（611）与半导体制品上的电路接点相连接以进行测试动作；一控制机构（63），连接机械手臂（62），控制机构（63）包括控制电路（631）用于控制机械手臂（62）的移动，及测试电路（632），测试电路（632）通过探针（611）采集所需要的数据；一计算机（64），连接控制机构（63），用以采集测试电路（632）的测试数据。

Description

发明名称：应用静电载具测试半导体制品的机构 技术领域
[0001] 本发明涉及用于测试半导体制品的机构的领域， 尤其涉及一种应用静电载具测 试半导体制品的机构。
背景技术
[0002] 目前由于要求电子技术趋向于轻薄短小， 而且也要求电子芯片的功能越来越强 大， 内存的储存量越来越高， 比如要求手机的厚度越来越薄， 相对地里面所有 的芯片厚度也必须相对的减小。 尤其必须在极薄的厚度内堆集相当多片的芯片 如内存芯片。 所以整体上半导体工艺所制成的芯片的厚度也被压缩到极薄的程 度。 而在半导体工艺中必须将芯片施予各种不同的测试。 在传统的测试过程中 ， 必须先将芯片置于载具上， 然后将该载具移动到所需进行测试的测试制具处 ， 再以人工或机械手臂将芯片从载具搬离并置于测试制具上的对应测试探针处 ， 然后应用该测试探针对芯片进行测试， 并采集所需要的数据。
技术问题
[0003] 在上述现有技术中的测试方式， 由于需将芯片从载具移动到测试制具上， 在搬 移的过程中容易使得芯片产生折损或破坏。 并且将芯片从载具移动到测试制具 的过程也耗费了多余的吋间， 若以人工方式搬移吋， 则需耗费更多吋间并且也 更容易因失误而使得芯片产生折损或破坏， 并且也提高了人工成本。 因此不但 降低了整体的工艺效率， 也不利于成本上的需求。
[0004] 在现有技术中， 半导体制品如芯片或芯片组的托盘 (tmy)由一盘体上形成众多个 凹槽， 而将芯片放置在凹槽内， 芯片在凹槽内并没有固定。 此现有技术的缺陷 为芯片有可能碰撞到凹槽的槽壁会产生损毁， 严重的话将使得所安装的半导体 零件受损以致不能使用。 并且所能安装的半导体零件也受到凹槽尺寸的限制， 因此必须不同的托盘对应到不同的半导体零件。 制造商必须具备多种不同尺寸 的托盘。 并且因为没有固定该零件， 所以操作不顺有可能产生倾倒的情况， 以 致使得所安装的零件受损。
[0005] 因此有必要设计一种方式可以减少移动芯片的次数， 而对芯片提供保护， 并且 可以以自动化的方式对芯片进行测试作业， 而不会损毁芯片。
[0006] 故本发明希望提出一种崭新的应用静电载具测试半导体制品的机构， 以解决上 述现有技术上的缺陷。
问题的解决方案
技术解决方案
[0007] 所以本发明的目的， 在于解决上述现有技术上的问题， 本发明中提出一种应用 静电载具测试半导体制品的机构， 应用配置有静电电路的载板， 在载送吋， 不 会在载送过程中造成损毁， 而达到保护该载板所承载的半导体制品的目的。 本 发明在测试过程中不必将半导体制品从载板移出， 直接应用探针机构接近半导 体制品以进行测试， 当测试完成吋也没有将半导体制品移置于该载板上的动作 。 如欲卸下该半导体制品， 将反向的电压施加到该载板， 而达到消除静电的目 的。 因此即可将半导体制品从该载板上取出。 所以在整个过程半导体制品的损 毁率可以降到最低。 本发明中以静电吸附半导体制品， 所以不会受到半导体制 品尺寸的影响， 各种不同尺寸的半导体制品均可配置在载板所形成的托盘中。 所以一款式的托盘即可安装各种不同尺寸的半导体制品。 并且， 因为应用静电 吸附， 所以所安装的半导体制品不会有碰撞或倾倒的情况， 所以简化且加速整 个运送过程。
[0008] 为达到上述目的， 本发明中提出一种应用静电载具测试半导体制品的机构， 为 应用一承载半导体制品的静电载具， 直接进行测试的机构， 该应用静电载具测 试半导体制品的机构包括： 一移动式载板， 其上承载多个半导体制品； 将该移 动式载板载送到测试位置进行定位， 该移动式载板配置至少一静电电路， 该静 电电路用于产生静电， 以应用静电而使得该移动式载板吸附所承载的半导体制 品； 一移动式测试探针组， 包括： 一探针机构， 该探针机构包括一个探针或多 个探针； 一机械手臂， 连接该探针机构， 用以驱动该探针机构到所需要的测试 点， 并使得该探针与该半导体制品上的电路接点相连接以进行测试动作； 一控 制机构， 连接该机械手臂， 包括控制电路， 该控制电路用于控制该机械手臂的 移动， 还包括测试电路， 该测试电路通过该探针采集所需要的数据； 一计算机 ， 连接该控制机构， 用以采集该测试电路的测试数据； 该计算机可接收用户的 输入以决定该测试电路的测试项目及方式以及该机械手臂的移动行程。
[0009] 其中， 各静电电路包括一感应电极对， 该感应电极对包括两个感应电极端， 该 两个感应电极端分别由对应的静电电路的两端向下延伸， 各感应电极端贯穿该 移动式载板， 而由该移动式载板下方露出。
[0010] 其中， 当该探针机构包括多个探针吋， 形成不同的成组结构， 各组分别对应一 将测试的半导体制品， 以利用此探针机构能够一次对多个半导体制品进行测试
[0011] 其中， 各静电电路的该感应电极对的该两个感应电极端用于连接外部的电压源 的正极及负极， 该电压源将感应对应的感应电极对的该两个感应电极端， 以使 得对应的静电电路内部的电路被感应而在该移动式载板的表面产生静电， 通过 静电的吸引力， 以将该半导体制品吸附在该移动式载板上。
[0012] 其中， 当欲使得该半导体制品脱离该移动式载板吋， 以使用从外部连接的一电 压源， 并以其正极及负极与该移动式载板下露的该静电电路的感应电极对的该 两个感应电极端进行反接， 以使得该移动式载板的该静电电路内部的静电消失 ， 该移动式载板即不再吸附该半导体制品。
[0013] 其中， 先在该移动式载板预留孔洞， 并在该孔洞填入导电材料， 其中该导电材 料以成双的方式形成， 且其下方露出于该移动式载板的下表面， 以作为该静电 电路的该感应电极对的该两个感应电极端；
[0014] 然后在该移动式载板上镀上一层由铜、 镍、 金依序组合而成的薄膜材料， 其中 铜位于该薄膜材料与该移动式载板接触的一端， 然后应用照相蚀刻的方式， 将 不需要的材料蚀刻掉， 而留下的原材料即形成该静电电路； 其中该静电电路必 须对应到上述已形成的该感应电极对。
[0015] 其中， 测试的程序为将所欲测试的半导体制品置于该移动式载板上， 然后应用 载送工具将该移动式载板移送到受测位置， 然后该控制机构控制该机械手臂而 使得该探针机构接触所欲测试的半导体制品， 并依据该测试电路所规划的行程 对所欲测试的半导体制品进行测试； 然后该控制机构再驱动该机械手臂到下一 个欲测试的半导体制品处进行测试， 依此方式将规划测试的半导体制品进行测 试； 待测试完成后将该机械手臂携离该移动式载板处； 并将该移动式载板及该 半导体制品移送到下一阶段。
[0016] 其中， 该移动式载板形成半导体制品的托盘， 以作为运送及测试过程之用。
发明的有益效果
对附图的简要说明
附图说明
[0017] 图 1为本发明的组件组合示意图。
[0018] 图 2为本发明的移动式测试探针组的架构方块图。
[0019] 图 3为本发明的移动式载板及所承载的芯片的分解示意图。
[0020] 图 4为本发明的探针机构包括一个探针的示意图。
[0021] 图 5为本发明的探针机构包括多个探针的示意图。
[0022] 图 6为本发明的测试程序的流程图。
[0023] 图 7为图 3中 A-A方向的截面示意图。
[0024] 图 8的截面示意图显示外部的一电压源连接本发明的感应电极对的两个感应电 极端。
[0025] 图 9的截面示意图显示外部的一电压源反接本发明的感应电极对的两个感应电 极端。
[0026] 图 10为本发明的静电电路工艺的截面示意图。
[0027] 图 11为图 10经蚀刻后的截面示意图。
实施该发明的最佳实施例
本发明的最佳实施方式
[0028] 现就本发明的结构组成， 及所能产生的功效与优点， 配合附图， 列举本发明的 一较佳实施例详细说明如下。
[0029] 请参考图 1至图 11所示， 为本发明的应用静电载具测试半导体制品的机构， 为 应用一承载半导体制品的静电载具， 直接进行测试的机构， 其中该半导体制品 可以为芯片或芯片组， 该芯片如 MOSFET芯片、 RF芯片或功率芯片等等。 在下 文中以芯片 10'作为说明。
[0030] 本发明的应用静电载具测试半导体制品的机构包括下列组件：
[0031] 一移动式载板 20， 用于承载位于其上方的多个芯片 10' (如图 1的组合示意图及图
3的分解图所示)的半导体制品。 该移动式载板 20形成半导体制品的托盘， 以作为 运送及测试过程之用。
[0032] 其中， 该移动式载板 20上配置至少一静电电路 30， 该静电电路 30用于产生静电 。 如图 7所示， 其中各静电电路 30包括一感应电极对 37， 该感应电极对 37包括两 个感应电极端 35分别由对应的静电电路 30的两端向下延伸， 各感应电极端 35贯 穿该移动式载板 20， 而由该移动式载板 20下方露出。 各静电电路 30的该感应电 极对 37的该两个感应电极端 35用于连接外部的电压源 40的正极及负极 (如图 8所示 )， 该电压源 40将感应对应的感应电极对 37的该两个感应电极端 35， 而使得对应 的静电电路 30内部的电路被感应而在该移动式载板 20的表面产生静电。 通过静 电的吸引力， 可以将该芯片 10'吸附在该移动式载板 20上。 当该移动式载板 20移 动吋， 该芯片 10'也跟着移动。
[0033] 一移动式测试探针组 60， 如图 1及图 2所示， 包括：
[0034] 一探针机构 61， 该探针机构 61包括一个探针 611(如图 4所示)或多个探针 611(如 图 5所示)。 该探针机构 61包括多个探针 611吋， 可以形成不同的成组结构， 各组 分别对应一将测试的芯片。 因此利用此探针机构 61可以一次对多个芯片进行测 试。
[0035] 一机械手臂 62， 连接该探针机构 61， 可以驱动该探针机构 61到所需要的测试点 ， 并使得该探针 611与芯片 10'上的电路接点相连接以进行测试动作。
[0036] 一控制机构 63， 连接该机械手臂 62， 包括控制电路 631， 该控制电路 631用于控 制该机械手臂 62的移动， 还包括测试电路 632， 该测试电路 632通过该探针 611采 集所需要的数据。
[0037] 一计算机 64， 连接该控制机构 63， 可以采集该测试电路 632的测试数据。 用户 可以通过该计算机 64决定该测试电路 632的测试项目及方式以及该机械手臂 62的 移动行程。
[0038] 其中该移动式载板 20上承载多个芯片 10'。 将该移动式载板 20载送到测试位置 进行定位， 然后驱动该移动式测试探针组 60， 使得该探针机构 61可以接近该多 个芯片 10'而对该多个芯片 10'进行测试， 并采集所需要的数据。
[0039] 如图 6所示， 其测试的程序为将所欲测试的芯片 10'置于该移动式载板 20上 (步骤 800)， 然后应用载送工具 (图中未显示)将该移动式载板 20移送到受测位置 (步骤 81 0)， 然后控制机构 63控制该机械手臂 62而使得该探针机构 61接触所欲测试的芯片 10'， 并依据该测试电路 632所规划的行程对所欲测试的芯片 10'进行测试 (步骤 82 0)； 然后该控制机构 63再驱动该机械手臂 62到下一个欲测试的芯片 10'处进行测 试， 依此方式将规划测试的芯片 10'进行测试 (步骤 830); 待测试完成后将该机械 手臂 62携离该移动式载板 20处， 并将该移动式载板 20及该芯片 10'移送到下一阶 段 (步骤 840)。
[0040] 当欲使得该芯片 10'脱离该移动式载板 20吋， 则使用从外部连接的一电压源 50 ， 并以其正极及负极与该移动式载板 20下露的该静电电路 30的感应电极对 37的 该两个感应电极端 35进行反接， 而使得该移动式载板 20的该静电电路 30内部的 静电消失 (如图 9所示)， 所以该移动式载板 20即不再吸附该芯片 10'， 而使得该芯 片 10'脱离该移动式载板 20， 而可达成运送的目的。
[0041] 如图 10所示， 其中该静电电路 30可以应用蚀刻工艺， 先在该移动式载板 20上预 留孔洞 21， 并在该孔洞 21填入导电材料 25如铜材料， 其中该导电材料 25以成双 的方式形成， 且其下方露出于该移动式载板 20的下表面， 以作为该静电电路 30 的该感应电极对 37的该两个感应电极端 35。
[0042] 如图 10所示， 然后在该移动式载板 20上镀上一层由铜 31、 镍 32、 金 33依序组合 而成的薄膜材料 300， 其中铜 31位于该薄膜材料 300与该移动式载板 20接触的一 端， 然后应用照相蚀刻的方式， 将不需要的材料蚀刻掉， 而留下的原材料即形 成该静电电路 30(如图 11所示)。 其中该静电电路 30必须对应到上述已形成的该感 应电极对 37。 因此将该感应电极对 37的该两个感应电极端 35连接外部的该电压 源 40的正负极吋， 即可使得该静电电路 30产生静电效应。
[0043] 因为半导体技术陆趋成熟， 所以其厚度越来越薄。 而半导体制品在工艺后必须 经过不同的测试过程， 因此必须将半导体制品载送到不同的测试工具上。 由于 半导体制品相当的薄， 所以在载送过程中相当容易损毁。 因此造成相当大的损 失。 所以本发明应用配置有静电电路的载板， 在载送吋， 不会在载送过程中造 成损毁， 而达到保护该载板所承载的半导体制品的目的。 本发明在测试过程中 不必将半导体制品从载板移出， 直接应用探针机构近接半导体制品以进行测试 ， 当测试完成吋也没有将半导体制品移置于该载板上的动作。 如欲卸下该半导 体制品， 将反向的电压施加到该载板， 而达到消除静电的目的。 因此即可将半 导体制品从该载板上取出。 所以在整个过程半导体制品的损毁率可以降到最低
[0044] 本发明中以静电吸附半导体制品， 所以不会受到半导体制品尺寸的影响， 各种 不同尺寸的半导体制品均可配置在载板所形成的托盘中。 所以一款式的托盘即 可安装各种不同尺寸的半导体制品。 并且， 因为应用静电吸附， 所以所安装的 半导体制品不会有碰撞或倾倒的情况， 所以简化且加速整个运送过程。
[0045] 上述详细说明是针对本发明的一可行实施例的具体说明， 但该实施例并非用以 限制本发明的保护范围， 凡未脱离本发明技艺精神所为的等效实施或变更， 均 应包含于本发明的保护范围中。

Claims

权利要求书
[权利要求 1] 一种应用静电载具测试半导体制品的机构， 其特征在于， 所述机构为 应用一承载半导体制品的静电载具直接进行测试的机构， 该应用静电 载具测试半导体制品的机构包括：
一移动式载板， 其上承载多个半导体制品， 并能够将所述多个半导体 制品载送到测试位置进行定位， 该移动式载板配置至少一静电电路， 该静电电路用于产生静电， 以应用静电而使得该移动式载板吸附所承 载的半导体制品；
一移动式测试探针组， 包括：
一探针机构， 该探针机构包括一个探针或多个探针；
一机械手臂， 连接该探针机构， 用以驱动该探针机构到所需要的测试 点， 并使得该探针与该半导体制品的电路接点相连接以进行测试动作 一控制机构， 连接该机械手臂， 包括控制电路， 该控制电路用于控制 该机械手臂的移动， 还包括测试电路， 该测试电路通过该探针采集所 需要的数据；
一计算机， 连接该控制机构， 用以采集该测试电路的测试数据； 该计 算机能够接收用户的输入以决定该测试电路的测试项目及方式以及该 机械手臂的移动行程。
[权利要求 2] 如权利要求 1所述的应用静电载具测试半导体制品的机构， 其特征在 于， 各静电电路包括一感应电极对， 该感应电极对包括两个感应电极 端， 该两个感应电极端分别由对应的静电电路的两端向下延伸， 各感 应电极端贯穿该移动式载板， 而由该移动式载板下方露出。
[权利要求 3] 如权利要求 1所述的应用静电载具测试半导体制品的机构， 其特征在 于， 当该探针机构包括多个探针吋， 形成不同的成组结构， 各组分别 对应一将测试的半导体制品， 以利用此探针机构能够一次对多个半导 体制品进行测试。
[权利要求 4] 如权利要求 2所述的应用静电载具测试半导体制品的机构， 其特征在 于， 各静电电路的该感应电极对的该两个感应电极端用于连接外部的 电压源的正极及负极， 该电压源将感应对应的感应电极对的该两个感 应电极端， 以使得对应的静电电路内部的电路被感应而在该移动式载 板的表面产生静电， 通过静电的吸引力， 以将该半导体制品吸附在该 移动式载板上。
[权利要求 5] 如权利要求 2所述的应用静电载具测试半导体制品的机构， 其特征在 于， 当欲使得该半导体制品脱离该移动式载板吋， 则使用从外部连接 的一电压源， 并以其正极及负极与该移动式载板下露的该静电电路的 感应电极对的该两个感应电极端进行反接， 以使得该移动式载板的该 静电电路内部的静电消失， 该移动式载板即不再吸附该半导体制品。
[权利要求 6] 如权利要求 2所述的应用静电载具测试半导体制品的机构， 其特征在 于， 先在该移动式载板预留孔洞， 并在该孔洞填入导电材料， 其中该 导电材料以成双的方式形成， 且其下方露出于该移动式载板的下表面 ， 以作为该静电电路的该感应电极对的该两个感应电极端； 然后在该移动式载板上镀上一层由铜、 镍、 金依序组合而成的薄膜材 料， 其中铜位在该薄膜材料与该移动式载板接触的一端， 然后应用照 相蚀刻的方式， 将不需要的材料蚀刻掉， 而留下的原材料即形成该静 电电路； 其中该静电电路必须对应到上述已形成的该感应电极对。
[权利要求 7] 如权利要求 1所述的应用静电载具测试半导体制品的机构， 其特征在 于， 测试的程序为将所欲测试的半导体制品置于该移动式载板上， 然 后应用载送工具将该移动式载板移送到受测位置， 然后该控制机构控 制该机械手臂而使得该探针机构接触所欲测试的半导体制品， 并依据 该测试电路所规划的行程对所欲测试的半导体制品进行测试； 然后该 控制机构再驱动该机械手臂到下一个欲测试的半导体制品处进行测试 ， 依此方式将规划测试的半导体制品进行测试； 待测试完成后将该机 械手臂携离该移动式载板处； 并将该移动式载板及该半导体制品移送 到下一阶段。
[权利要求 8] 如权利要求 1所述的应用静电载具测试半导体制品的机构， 其特征在 于， 该移动式载板形成半导体制品的托盘， 以作为运送及测试过程之 用
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