WO2018126718A1 - 一种显示面板的驱动方法、驱动电路和显示装置 - Google Patents

一种显示面板的驱动方法、驱动电路和显示装置 Download PDF

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Publication number
WO2018126718A1
WO2018126718A1 PCT/CN2017/099499 CN2017099499W WO2018126718A1 WO 2018126718 A1 WO2018126718 A1 WO 2018126718A1 CN 2017099499 W CN2017099499 W CN 2017099499W WO 2018126718 A1 WO2018126718 A1 WO 2018126718A1
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Prior art keywords
gate line
width
adjusted
row
blank data
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PCT/CN2017/099499
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English (en)
French (fr)
Inventor
周留刚
汪建明
栗首
李涛
施园
Original Assignee
京东方科技集团股份有限公司
北京京东方显示技术有限公司
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Application filed by 京东方科技集团股份有限公司, 北京京东方显示技术有限公司 filed Critical 京东方科技集团股份有限公司
Priority to US15/776,086 priority Critical patent/US11087705B2/en
Publication of WO2018126718A1 publication Critical patent/WO2018126718A1/zh

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3648—Control of matrices with row and column drivers using an active matrix
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3674—Details of drivers for scan electrodes
    • G09G3/3677—Details of drivers for scan electrodes suitable for active matrices only
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0202—Addressing of scan or signal lines
    • G09G2310/0213—Addressing of scan or signal lines controlling the sequence of the scanning lines with respect to the patterns to be displayed, e.g. to save power
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0243—Details of the generation of driving signals
    • G09G2310/0251—Precharge or discharge of pixel before applying new pixel voltage
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/08—Details of timing specific for flat panels, other than clock recovery
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance

Definitions

  • the present disclosure relates to the field of display technologies, and in particular, to a driving method, a driving circuit, and a display device for a display panel.
  • the liquid crystal display device includes a timing controller (TCON), a source driver (Source Driver), a gate driver (Gate Driver), a display panel, and the like.
  • the timing controller is configured to output a clock signal CPV, an enable signal OE, and a frame trigger signal STV to the gate driver.
  • the gate driver charges the pixel row, that is, the sustain time of the scan signal outputted by the gate driver to each gate line is equal to the turn-on time width of the corresponding enable signal OE.
  • the turn-on time width of the enable signal received by the gate driver is the same, that is, the charging time for each pixel row is the same, which causes the following problem: a pixel row closer to the source driver The charging rate is higher, the charging rate of the pixel row farther from the source driver is lower, and the charging rate of the entire surface of the display panel is inconsistent, resulting in poor display of the screen.
  • the present disclosure provides a driving method, a driving circuit, and a display device for a display panel, which are used to solve the problem that the entire surface charging rate of the display panel is inconsistent, resulting in poor display.
  • the present disclosure provides a driving method of a display panel, comprising: the display panel includes Y gate lines, and dividing the Y gate lines into a plurality of gate line groups according to a scanning order of the gate lines, wherein At least one gate line is included in each gate line group; the driving method includes:
  • Adjusting the original charging duration of the scan signal corresponding to the ith gate line to an adjustment charging duration The adjustment charging durations of the gate lines in each of the gate line groups are equal, and the adjustment charging time corresponding to the gate line group is gradually increased from a direction close to the source driver to a direction away from the source driver;
  • the scan signal corresponding to the i-th gate line is output to the i-th gate line based on the adjusted charging duration corresponding to the ith gate line.
  • the sum of the adjusted charging durations of the respective gate lines is the same as the sum of the original charging durations of the respective gate lines.
  • the method before the step of adjusting the original charging duration of the scan signal corresponding to the ith gate line to an adjustment charging duration, the method further includes:
  • the adjustment charging duration corresponding to each gate line is stored in advance.
  • the preset charging time corresponding to the ith gate line stored in advance is obtained by:
  • the adjusted charging duration corresponding to the gate line of the i-th row is determined according to the width of the adjusted H-Blank data corresponding to the gate line of the i-th row.
  • the step of determining the width of the H-Blank data in the video data corresponding to the ith row gate line to be adjusted, and obtaining the width of the adjusted H-Blank data corresponding to the ith row gate line includes:
  • the step of determining the width of the H-Blank data in the video data corresponding to the ith row gate line to be adjusted, and obtaining the width of the adjusted H-Blank data corresponding to the ith row gate line includes:
  • the step of determining that the H-Blank data in the video data corresponding to the first row of gate lines requires a reduced width k0 includes:
  • a value less than or equal to the width k is selected as the width k0 of the H-Blank data in the video data corresponding to the first row gate line.
  • the present disclosure also provides a driving circuit for a display panel, wherein the display panel includes Y gate lines, and all the gate lines are divided into a plurality of gate line groups according to a scanning order of the gate lines, wherein each of the gate line groups includes At least one gate line; the driving circuit comprises:
  • a determining module configured to determine an i th gate line to be scanned, 1 ⁇ i ⁇ Y;
  • the adjustment module is configured to adjust an original charging duration of the scan signal corresponding to the ith gate line to an adjusted charging duration, wherein each of the gate lines has an adjustable charging duration corresponding to each gate line, and is close to the source driver The direction of the adjustment charging corresponding to the gate line group is gradually increased in a direction away from the source driver;
  • an output module configured to output a scan signal corresponding to the i-th gate line to the ith gate line based on the adjusted charging duration corresponding to the ith gate line.
  • the driving circuit of the display panel further includes:
  • the storage module is configured to pre-store the adjusted charging duration corresponding to each gate line.
  • the driving circuit of the display panel further includes:
  • the H-Blank data width adjustment module is configured to determine the width of the H-Blank data in the video data corresponding to the i-th row of the gate line, and obtain the width of the adjusted H-Blank data corresponding to the i-th row of the gate line;
  • the third determining module is configured to determine an adjusted charging duration corresponding to the ith row gate line according to the width of the adjusted H-Blank data corresponding to the ith row gate line.
  • the H-Blank data width adjustment module includes:
  • a first determining unit configured to determine a width k0 of the H-Blank data in the video data corresponding to the first row of gate lines to be reduced
  • a second calculating unit configured to calculate a difference ⁇ k between the width of the adjusted H-Blank data corresponding to the ith row gate line and n(1), wherein Y is the total number of all gate lines on the display panel, and m is the total number of the gate line groups;
  • the H-Blank data width adjustment module includes:
  • a second determining unit configured to determine a width k0 of the H-Blank data in the video data corresponding to the first row of gate lines to be reduced
  • a sixth calculating unit configured to calculate a difference ⁇ k between the width of the adjusted H-Blank data corresponding to the ith row gate line and n(1), wherein A is an index, Y is the total number of all gate lines on the display panel, and m is the number of the gate line groups;
  • the storage module stores the adjusted charging duration corresponding to each of the gate lines in a table manner.
  • the present disclosure also provides a display device, including the driving circuit of the above display panel, further comprising:
  • a data receiving module configured to receive video data sent to the timing controller
  • a line buffer for storing the received video data
  • An adjustable formula calculator for calculating the width to be adjusted of the H-Blank data in each line of video data
  • a data control module configured to generate adjusted video data according to the to-be-adjusted width of the H-Blank data in each line of video data calculated by the adjustable formula calculator;
  • timing generation circuit configured to generate a corresponding timing control signal according to the adjusted video data
  • a data output module configured to output video data according to the timing control signal generated by the timing generation module.
  • FIG. 1 is a schematic structural view of a liquid crystal display device in the related art
  • FIG. 2 is a schematic flow chart of a driving method of a display panel according to at least one embodiment of the present disclosure
  • FIG. 3 is a schematic structural diagram of a display device according to at least one embodiment of the present disclosure.
  • FIG. 4 is a schematic flow chart of a driving method of a display panel according to at least one embodiment of the present disclosure
  • FIG. 5 is a schematic diagram of video data before width adjustment of H-Black data according to at least one embodiment of the present disclosure
  • FIG. 6 is a schematic diagram of video data of width adjustment of H-Black data according to at least one embodiment of the present disclosure
  • FIG. 7 is a schematic diagram of video data of width adjustment of H-Black data according to at least one embodiment of the present disclosure.
  • FIG. 8 is a schematic diagram of calculating a width of adjusted H-Blank data corresponding to an i-th row of gate lines by using a linear calculation method according to at least one embodiment of the present disclosure
  • FIG. 9 is a schematic diagram of calculating a width of adjusted H-Blank data corresponding to an i-th row of gate lines by using a nonlinear calculation method according to at least one embodiment of the present disclosure
  • FIG. 10 is a schematic diagram of comparison of a timing control signal and adjusted video data according to at least one embodiment of the present disclosure
  • FIG. 11 is a schematic structural diagram of a driving circuit of a display panel according to at least one embodiment of the present disclosure.
  • the liquid crystal display device includes a timing controller (TCON), a source driver (Source Driver), a gate driver (Gate Driver), a display panel, and the like.
  • TCON timing controller
  • Source Driver Source Driver
  • Gate Driver gate driver
  • the display panel is provided with a longitudinal data line (not shown) and a lateral gate line (not shown), and a pixel array (not shown) located in the pixel area defined by the data line and the gate line.
  • the timing controller is configured to output a clock signal CPV, an enable signal OE, a frame trigger signal STV, and the like to the gate driver to control the gate driver to sequentially charge the corresponding pixel row in the pixel array through the corresponding gate line to source the source
  • the video data output by the polar driver is transmitted to the corresponding pixel to display an image.
  • the gate driver charges the pixel row, that is, the sustain time of the scan signal outputted by the gate driver to each gate line is equal to the turn-on time width of the corresponding enable signal OE. .
  • the turn-on time width of the enable signal received by the gate driver is the same, that is, the charging time for each pixel row is the same, which causes the following problem: the source driver is generally disposed on the display panel Side (please refer to Figure 1), the pixel at the A position of the display panel is closer to the source driver, the RC Delay (RC delay) on the data line is smaller, the pixel charging rate is better, and the screen display is brighter.
  • the pixel at the B position of the panel due to the distance from the source driver, The RC Delay on the data line is large, the pixel charging rate is poor, and the screen display is dark.
  • the charging rate of the pixel row closer to the source driver is higher, the charging rate of the pixel row farther from the source driver is lower, and the charging rate of the entire surface of the display panel is lower. Inconsistent, resulting in poor display.
  • Formula for calculating the charging rate based on the pixel where U is the voltage, t is the charging time, and Vt is the voltage at time t, ie, t is linear with RC.
  • the charging rate of the pixel is changed by adjusting the charging time of the pixel.
  • At least one embodiment of the present disclosure provides a driving method of a display panel, where the display panel includes Y gate lines (Y is a positive integer), and all the gate lines are divided according to the scanning order of the gate lines. And a plurality of gate line groups, wherein each of the gate line groups includes at least one gate line; and the driving method includes:
  • Step S21 determining the i-th gate line to be scanned, 1 ⁇ i ⁇ Y;
  • Step S22 Adjusting the original charging duration of the scan signal corresponding to the ith gate line to an adjustment charging duration, wherein the adjustment charging duration of each gate line in each gate line group is equal, and from being close to the source driver to being far away In the direction of the source driver, the adjustment charging time corresponding to the gate line group is gradually increased;
  • Step S23 Output the scan signal corresponding to the ith gate line to the ith gate line based on the adjusted charging duration corresponding to the ith gate line.
  • the charging time corresponding to each row of gate lines is adjusted such that the charging time of the pixel row near the source driver is shorter, and the charging time of the pixel row away from the source driver is larger, thereby improving charging.
  • the charging rate of the pixel row is insufficient, so that the charging rate of each row of pixels reaches the same or similar, which solves the poor display of the screen due to the difference in charging rate on the display panel, thereby improving the display effect.
  • FIG. 3 is a schematic structural diagram of a display device according to at least one embodiment of the present disclosure.
  • Y strips on a display panel are displayed according to a scanning order of gate lines.
  • the gate line is divided into m gate line groups (gate line group 1, gate line group 2, ... gate line group m), wherein each gate line group includes 12 gate lines (not all shown in the figure), wherein
  • the gate line group 1 is the gate line group closest to the source driver, and the gate line group m is the gate line group farthest from the source driver, and the gate line group corresponds to the direction from the source driver to the source driver.
  • Adjust the charging time to gradually increase.
  • the adjustment charging time corresponding to the gate line group 1 is t1
  • the adjustment charging time corresponding to the gate line group m is tm
  • tm is greater than t1
  • the difference between the two is ⁇ t.
  • the number of gate line groups can be set as needed, and the value range is greater than 1 and less than or equal to Y.
  • the number of gate line groups is equal to Y, that is, each gate line group includes A grid line. It can be understood that the smaller the number of gate line groups, the higher the accuracy of the charging rate adjustment.
  • the number of gate lines in each gate line group is equal.
  • the number of gate lines in each gate line group may also be unequal, and may be set as needed.
  • the sum of the adjusted charging durations of the respective gate lines is the same as the sum of the original charging durations of the respective gate lines.
  • the adjustment charging duration of each of the gate lines of the first to Y/2 rows is smaller than the original charging duration, and the adjustment charging duration of each of the (Y/2)+1 to Y rows of the gate lines is greater than the original The charging duration, wherein the first row of gate lines is the gate line closest to the source driver, and the Yth gate line is the gate line farthest from the source driver, that is, the gate line on the entire display panel is divided into two halves, and the half gate
  • the original charging duration of the line is reduced, and the original charging duration of the other half of the grid line is increased to ensure that the total charging duration of one frame of image is constant.
  • the adjusted charging duration corresponding to each gate line may be pre-stored.
  • the adjustment charging corresponding to the ith gate line is directly queried from the pre-stored content.
  • the length of time can be. Because of the simplest and most practical method of checking the table, the table contents can be arbitrarily set and flexible. Therefore, in at least one embodiment of the present disclosure, a table may be used to store a correspondence relationship between each gate line and its corresponding adjusted charging duration.
  • a direct query is performed from a pre-stored table. The length of the i-gate line can be adjusted to adjust the charging time.
  • FIG. 4 is a schematic flowchart diagram of a driving method of a display panel according to at least one embodiment of the present disclosure.
  • the display panel includes Y gate lines (Y is a positive integer), and all are in accordance with the scanning order of the gate lines.
  • the gate line is divided into a plurality of gate line groups, wherein each of the gate line groups includes at least one gate line; the driving method includes:
  • Step S41 pre-storing the adjusted charging duration corresponding to each gate line, wherein the adjustment charging durations corresponding to the respective gate lines in each gate line group are equal, and from a direction close to the source driver to a direction away from the source driver, The adjustment charging time corresponding to the gate line group is gradually increased;
  • Step S42 determining the i-th gate line to be scanned, 1 ⁇ i ⁇ Y;
  • Step S43 querying the adjusted charging duration corresponding to the i-th gate line from the adjusted charging duration corresponding to each gate line stored in advance;
  • Step S44 adjusting the original charging duration of the scan signal corresponding to the i-th gate line to the adjusted charging duration corresponding to the ith gate line of the query;
  • Step S45 Output the scan signal corresponding to the i-th gate line to the ith gate line based on the adjusted charging duration corresponding to the ith gate line.
  • the adjusted charging duration corresponding to each gate line is stored in advance, and when the display is to be performed, the adjustment charging time corresponding to each gate line may be directly inquired from the pre-stored information, and During the display, the adjustment charging time corresponding to each gate line is calculated in real time, saving time and power consumption.
  • the adjusted charging duration corresponding to the ith gate line stored in advance may be obtained by:
  • Step 1 determining the width of the H-Blank data in the video data corresponding to the gate line of the i-th row, and obtaining the width of the adjusted H-Blank data corresponding to the gate line of the i-th row;
  • Step 2 Determine the adjusted charging duration corresponding to the gate line of the i-th row according to the width of the adjusted H-Blank data corresponding to the gate line of the i-th row.
  • the video data is usually received by the timing controller and transmitted to the source driver, which is transmitted to the pixels through the data line by the source driver.
  • the video data corresponding to the image received by the timing controller may be as shown in FIG. 5, wherein the first line of video data corresponds to the first gate line, ... the Yth line of video data corresponds to the Yth gate line, each line
  • the video data includes X valid data (Data) and H-Blank (horizontal blank area) data, and the unit of the width of the H-Blank data can be expressed in Pixel number, time, CLK (clock) or other form unit.
  • a line of video data includes 3840 valid data and 560 H-Blank data.
  • the H-Blank data can also be understood as the interval between one line of valid data and the next line of valid data.
  • the width of the valid data and the H-Blank data in each line of video data received by the timing controller are fixed.
  • the amount of valid data is X, H-Blank.
  • the width of the data is HB, and the unit is Pixel.
  • the video data corresponding to each frame image has Y rows.
  • the total amount of video data corresponding to each frame image is (X+HB)*Y, and the total amount of H-Blank data is HB*Y.
  • the original charging duration corresponding to each gate line can be adjusted by adjusting the width of the H-Blank data corresponding to each gate line. Specifically, the larger the width of the H-Blank data, the longer the original charging duration corresponding to each gate line, and the smaller the width of the H-Blank data, the shorter the original charging duration corresponding to each gate line.
  • FIG. 6 is a schematic diagram of video data of width adjustment of H-Black data according to at least one embodiment of the present disclosure.
  • the first line of video data (corresponding to the nearest source drive)
  • the width of the corresponding H-Blank data is the smallest n(1)
  • the width of the H-Blank data corresponding to the Y-th line video data (corresponding to a gate line farthest from the source driver) is the smallest n(1) That is, the width of the H-Blank data gradually increases from the direction close to the source driver to the direction away from the source driver.
  • the Y gate lines are divided into Y gate line groups, that is, each gate line group includes one gate line, and the width of each H-Blank data corresponding to each gate line is not the same.
  • FIG. 7 is a schematic diagram of video data of width adjustment of H-Black data according to at least one embodiment of the present disclosure.
  • the H-Blank data corresponding to each two lines of video data is Adjust the width once. That is, the Y gate lines are divided into Y/2 gate line groups, that is, each gate line group includes two gate lines, and the widths of the H-Blank data corresponding to the two gate lines in the same gate line group are the same.
  • the width of the adjusted H-Blank data corresponding to the i-th row gate line may be determined by the following two methods.
  • the first method calculating the width n(i) of the adjusted H-Blank data corresponding to the gate line of the i-th row by a linear calculation method.
  • the linear calculation method includes:
  • ⁇ k The principle of the calculation formula of ⁇ k is: Y/2 lines, the width of H-blank is adjusted once every m lines, and the total number of adjustments is The width of the maximum adjustment is k0, and the width of each adjustment is: Multiply the width of the i-th row adjustment
  • the reduced width k0 of the H-Blank data in the video data corresponding to the first row of gate lines can be determined in the following two ways:
  • a value less than or equal to the width k is selected as the width k0 of the H-Blank data in the video data corresponding to the first row gate line.
  • K0 is less than or equal to k to ensure that the Line Buffer does not overflow.
  • Each line of valid data sent by TCON needs to include header data, tail data, etc., which need to occupy a certain width, considering the versatility, k ⁇ HB
  • the calculation principle is: the sum of the variation of the width of the accumulated H-Blank data is smaller than the total amount of the Line Buffer; the left side of the formula ((NL-1)*X) is the sum of the valid data that the Line Buffer can store; Is the Y/2 line, the amount of change in the width of the accumulated H-Blank data.
  • the Y/2 line is used to reduce the width of the H-blank data, and the remaining Y/2 lines are used.
  • half of the lines are used to reduce the time, and half of the lines are used to save the time.
  • the width of the H-blank data corresponding to the gate lines of the first to Y/2 rows is decreased, and the H-corresponding to the (Y/2)+1 to Y row gate lines.
  • the width of the blank data is increased.
  • the second method calculating the width n(i) of the H-Blank data corresponding to the i-th gate line by using a nonlinear calculation method
  • the nonlinear calculation method includes:
  • the A value is debugged according to the actual display effect.
  • the reduced width k0 of the H-Blank data in the video data corresponding to the first row of gate lines can be determined by the following two methods:
  • the charging time duration corresponding to each gate line is calculated in advance and stored, and when the display is performed, the adjustment charging time corresponding to the gate line currently required to be scanned may be directly queried, of course, In at least one embodiment of the disclosure, the adjustment charging time corresponding to the gate line that needs to be scanned may also be calculated in real time, and the calculation method may adopt the calculation method described in at least one embodiment of the present disclosure, and the description is not repeated herein.
  • the corresponding one when the scan signal corresponding to the i-th gate line is output to the i-th gate line based on the adjusted charging duration corresponding to the ith gate line, the corresponding one may be corresponding to the ith gate line.
  • the charging time is adjusted to generate a new timing control signal corresponding to the ith row, and the video data is output according to the new timing control signal.
  • FIG. 10 is a schematic diagram of comparison of timing control signals and adjusted video data according to at least one embodiment of the present disclosure.
  • STV is a frame trigger signal
  • CPV is a clock signal
  • TP is a data source line.
  • the latch signal, POL is the polarity flip signal
  • OE1 and OE2 are the enable signals.
  • the width of the H-Blank data in each line of video data is different, resulting in the total length of each line of video data being different.
  • each timing control signal matched with the video data is output at an unfixed frequency.
  • At least one embodiment of the present disclosure further provides a driving circuit for a display panel, where the display panel includes Y gate lines, and divides all the gate lines into a plurality of gate lines according to a scanning order of the gate lines. a group, wherein each gate line group includes at least one gate line; the driving circuit includes:
  • a determining module configured to determine an i th gate line to be scanned, 1 ⁇ i ⁇ Y;
  • the adjustment module is configured to adjust an original charging duration of the scan signal corresponding to the ith gate line to an adjusted charging duration, wherein each of the gate lines has an adjustable charging duration corresponding to each gate line, and is close to the source driver The direction of the adjustment charging corresponding to the gate line group is gradually increased in a direction away from the source driver;
  • an output module configured to output a scan signal corresponding to the i-th gate line to the ith gate line based on the adjusted charging duration corresponding to the ith gate line.
  • the adjusted charging duration corresponding to each gate line may be pre-stored.
  • the adjustment charging corresponding to the ith gate line is directly queried from the pre-stored content.
  • the length of time can be. Since the table is the simplest and most practical method in actual use, the table content can be arbitrarily set and flexible; therefore, in at least one embodiment of the present disclosure, a table can be used to store each gate line and its corresponding Adjusting the correspondence relationship of the charging duration, when it is necessary to scan the ith gate line, directly query the adjustment charging duration corresponding to the ith gate line from the pre-stored table.
  • the driving circuit of the display panel further includes:
  • the storage module is configured to pre-store the adjusted charging duration corresponding to each gate line.
  • the storage module stores the adjusted charging duration corresponding to each gate line in a table manner.
  • the adjustment charging duration corresponding to each gate line stored in the storage module can be calculated by adjusting the width of the H-Blank data.
  • the calculation method refer to the description in the specific driving method, and the description will not be repeated again.
  • the driving circuit of the display panel further includes:
  • the H-Blank data width adjustment module is configured to determine the width of the H-Blank data in the video data corresponding to the i-th row of the gate line, and obtain the width of the adjusted H-Blank data corresponding to the i-th row of the gate line;
  • the third determining module is configured to determine an adjusted charging duration corresponding to the ith row gate line according to the width of the adjusted H-Blank data corresponding to the ith row gate line.
  • the width of the adjusted H-Blank data corresponding to the i-th row gate line can be calculated in real time, and the adjusted charging duration corresponding to the i-th row gate line is determined.
  • the H-Blank data width adjustment module may calculate the width of the adjusted H-Blank data corresponding to the ith row gate line by using a linear calculation method.
  • the H-Blank data width adjustment module includes:
  • a first determining unit configured to determine a width k0 of the H-Blank data in the video data corresponding to the first row of gate lines to be reduced
  • a second calculating unit configured to calculate a difference ⁇ k between the width of the adjusted H-Blank data corresponding to the ith row gate line and n(1), wherein Y is the total number of all gate lines on the display panel, and m is the total number of the gate line groups;
  • the H-Blank data width adjustment module may further calculate a width of the adjusted H-Blank data corresponding to the ith row gate line by using a non-linear calculation method.
  • the H-Blank data width adjustment module includes:
  • a second determining unit configured to determine a width k0 of the H-Blank data in the video data corresponding to the first row of gate lines to be reduced
  • a sixth calculating unit configured to calculate a difference ⁇ k between the width of the adjusted H-Blank data corresponding to the ith row gate line and n(1), wherein A is an index, Y is the total number of all gate lines on the display panel, and m is the number of the gate line groups;
  • FIG. 11 is a schematic structural diagram of a driving circuit of a display panel according to at least one embodiment of the present disclosure.
  • the driving circuit includes: a data receiving module, a line buffer, an adjustable formula calculator, a data control module, and a timing generating circuit.
  • a data output module wherein the data receiving module is configured to receive video data sent to the timing controller, and the Line Buffer is configured to store the received video data, the number of LineBuffers is greater than or equal to two, and the adjustable formula calculator is used to calculate each The width of the H-Blank data to be adjusted in the line video data, and the data control module is configured to adjust the video data according to the to-be-adjusted width of the H-Blank data in each line of video data calculated by the adjustable formula calculator, that is, the valid data and The corresponding width-adjusted H-Blank data are merged together to generate adjusted video data, and the timing generation module is configured to generate a corresponding timing control signal according to the adjusted video data, and the data output module is configured to generate a module according to the timing.
  • the generated timing control signal outputs video data.
  • the method for calculating the to-be-adjusted width of the H-Blank data in each line of video data can be referred to the calculation method described in at least one embodiment of the present disclosure, and the description is not repeated here.
  • At least one embodiment of the present disclosure further provides a display device including the above-described display panel driving circuit.
  • the display device in at least one embodiment of the present disclosure is a large-sized liquid crystal display device.
  • the charging time corresponding to each row of gate lines is adjusted such that the charging time of the pixel row near the source driver is shorter, and the charging time of the pixel row away from the source driver is larger, thereby improving charging.
  • the charging rate of the pixel row is insufficient, so that the charging rate of each row of pixels reaches the same or similar, which solves the poor display of the screen due to the difference in charging rate on the display panel, thereby improving the display effect.

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Abstract

公开了一种显示面板的驱动方法、驱动电路和显示装置，该显示面板包括Y条栅极线，按照栅极线的扫描顺序，将Y条栅极线划分为多个栅极线组，每一栅极线组中包括至少一条栅极线；该驱动方法包括：确定当前待扫描的第i条栅极线（S21）；将第i条栅极线对应的扫描信号的原始充电时长调整至一调整充电时长，其中，每一栅极线组中各栅极线对应的调整充电时长相等，且从靠近源极驱动器到远离源极驱动器的方向上，栅极线组对应的调整充电时长逐渐增大（S22）；基于第i条栅极线对应的调整充电时长，将第i条栅极线对应的扫描信号输出至第i极条栅极线（S21）。

Description

一种显示面板的驱动方法、驱动电路和显示装置
相关申请的交叉引用
本申请主张在2017年1月4日在中国提交的中国专利申请号No.201710003406.9的优先权，其全部内容通过引用包含于此。
技术领域
本公开涉及显示技术领域，尤其设计一种显示面板的驱动方法、驱动电路和显示装置。
背景技术
相关技术中，液晶显示装置包括时序控制器(TCON)、源极驱动器(Source Driver)、栅极驱动器(Gate Driver)及显示面板等。时序控制器用于向栅极驱动器输出时钟信号CPV、使能信号OE和帧触发信号STV。只有使能信号OE为开启状态时，栅极驱动器才对像素行进行充电，即栅极驱动器向各栅线输出的扫描信号的维持时长等于对应的使能信号OE的开启时间宽度。针对每一像素行，栅极驱动器所接收的使能信号的开启时间宽度是相同的，即对每一像素行的充电时间是相同的，这造成如下问题：距离源极驱动器较近的像素行的充电率较高，距离源极驱动器较远的像素行的充电率较低，显示面板的整面的充电率不一致，从而导致画面显示不良。
发明内容
有鉴于此，本公开提供一种显示面板的驱动方法、驱动电路和显示装置，用于解决相关技术中的显示面板的整面充电率不一致，导致显示画面不良的问题。
为解决上述技术问题，本公开提供一种显示面板的驱动方法，包括：所述显示面板包括Y条栅线，按照栅线的扫描顺序，将Y条栅线划分为多个栅线组，其中每一栅线组中包括至少一条栅线；所述驱动方法包括：
确定当前待扫描的第i条栅线，1≤i≤Y；
将第i条栅线对应的扫描信号的原始充电时长调整至一调整充电时长，其 中，每一栅线组中各栅线对应的调整充电时长相等，且从靠近源极驱动器到远离所述源极驱动器的方向上，所述栅线组对应的调整充电时长逐渐增大；
基于第i条栅线对应的调整充电时长，将第i条栅线对应的扫描信号输出至第i条栅线。
可选的，各栅线对应的调整充电时长的总和与各栅线对应的原始充电时长的总和相同。
可选的，所述将第i条栅线对应的扫描信号的原始充电时长调整至一调整充电时长的步骤之前还包括：
预先存储每一栅线对应的调整充电时长。
可选的，预先存储的第i条栅线对应的调整充电时长通过以下方式得到：
确定第i行栅线对应的视频数据中的H-Blank数据需要调整的宽度，得到第i行栅线对应的调整后的H-Blank数据的宽度；
根据第i行栅线对应的调整后的H-Blank数据的宽度，确定第i行栅线对应的调整充电时长。
可选的，所述确定第i行栅线对应的视频数据中的H-Blank数据需要调整的宽度，得到第i行栅线对应的调整后的H-Blank数据的宽度的步骤包括：
确定第一行栅线对应的视频数据中的H-Blank数据需要减小的宽度k0；
计算第一行栅线对应的调整后的H-Blank数据的宽度n(1)，其中，n(1)＝HB-k0；
计算第i行栅线对应的调整后的H-Blank数据的宽度与n(1)的差值Δk，其中，
Figure PCTCN2017099499-appb-000001
Y为所述显示面板上的所有栅线的总数，m为所述栅线组的总数；
计算第i行栅线对应的调整后的H-Blank数据的宽度n(i)，其中，n(i)＝HB-k0+Δk，HB为所述视频数据中的H-Blank数据的宽度。
可选的，所述确定第i行栅线对应的视频数据中的H-Blank数据需要调整的宽度，得到第i行栅线对应的调整后的H-Blank数据的宽度的步骤包括：
确定第一行栅线对应的视频数据中的H-Blank数据需要减小的宽度k0；
计算第一行栅线对应的调整后的H-Blank数据的宽度n(1)，其中，n(1)＝HB-k0；
计算第i行栅线对应的调整后的H-Blank数据的宽度与n(1)的差值Δk，其中，
Figure PCTCN2017099499-appb-000002
A为指数，Y为所述显示面板上的所有栅线的总数，m为所述栅线组的个数；
计算第i行栅线对应的调整后的H-Blank数据的宽度n(i)，其中，n(i)＝HB-k0+Δk，HB为所述视频数据中的H-Blank数据的宽度。
可选的，所述确定第一行栅线对应的视频数据中的H-Blank数据需要减小的宽度k0的步骤包括：
计算第1行栅线对应的视频数据中的H-Blank数据最大能够减少的宽度k，其中，
Figure PCTCN2017099499-appb-000003
NL为时序控制器中一行Line Buffer能够存储的数据的数量，X为一行视频数据中的有效数据的数量，Y为所述显示面板上的所有栅线的总数，k＜HB，HB为视频数据中的H-Blank数据的宽度；
选取小于或等于宽度k一数值，作为第一行栅线对应的视频数据中的H-Blank数据需要减小的宽度k0。
本公开还提供一种显示面板的驱动电路，所述显示面板包括Y条栅线，按照栅线的扫描顺序，将所有的栅线划分为多个栅线组，其中每一栅线组中包括至少一条栅线；所述驱动电路包括：
确定模块，用于确定当前待扫描的第i条栅线，1≤i≤Y；
调整模块，用于将第i条栅线对应的扫描信号的原始充电时长调整至一调整充电时长，其中，每一栅线组中各栅线对应的调整充电时长相等，且从靠近源极驱动器到远离所述源极驱动器的方向上，所述栅线组对应的调整充电时长逐渐增大；
输出模块，用于基于第i条栅线对应的调整充电时长，将第i条栅线对应的扫描信号输出至第i条栅线。
可选的，所述的显示面板的驱动电路还包括：
存储模块，用于预先存储每一栅线对应的调整充电时长。
可选的，所述的显示面板的驱动电路还包括：
H-Blank数据宽度调整模块，用于确定第i行栅线对应的视频数据中的H-Blank数据需要调整的宽度，得到第i行栅线对应的调整后的H-Blank数据的宽度；
第三确定模块，用于根据第i行栅线对应的调整后的H-Blank数据的宽度，确定第i行栅线对应的调整充电时长。
可选的，所述H-Blank数据宽度调整模块包括：
第一确定单元，用于确定第一行栅线对应的视频数据中的H-Blank数据需要减小的宽度k0；
第一计算单元，用于计算第一行栅线对应的调整后的H-Blank数据的宽度n(1)，其中，n(1)＝HB-k0；
第二计算单元，用于计算第i行栅线对应的调整后的H-Blank数据的宽度与n(1)的差值Δk，其中，
Figure PCTCN2017099499-appb-000004
Y为所述显示面板上的所有栅线的总数，m为所述栅线组的总数；
第四计算单元，用于计算第i行栅线对应的调整后的H-Blank数据的宽度n(i)，其中，n(i)＝HB-k0+Δk，HB为所述视频数据中的H-Blank数据的宽度。
可选的，所述H-Blank数据宽度调整模块包括：
第二确定单元，用于确定第一行栅线对应的视频数据中的H-Blank数据需要减小的宽度k0；
第五计算单元，用于计算第一行栅线对应的调整后的H-Blank数据的宽度n(1)，其中，n(1)＝HB-k0；
第六计算单元，用于计算第i行栅线对应的调整后的H-Blank数据的宽度与n(1)的差值Δk，其中，
Figure PCTCN2017099499-appb-000005
A为指数，Y为所述显示面板上的所有栅线的总数，m为所述栅线组的个数；
第七计算单元，用于计算第i行栅线对应的调整后的H-Blank数据的宽度n(i)，其中，n(i)＝HB-k0+Δk，HB为所述视频数据中的H-Blank数据的宽度。
可选的，所述存储模块采用表格的方式存储所述每一栅线对应的调整充电时长。
本公开还提供一种显示装置，包括上述显示面板的驱动电路，还包括：
数据接收模块，用于接收发送给时序控制器的视频数据；
行缓冲器，用于存储接收到的所述视频数据；
可调公式计算器，计算每行视频数据中的H-Blank数据的待调整宽度；
数据调控模块，用于根据所述可调公式计算器计算的所述每行视频数据中的H-Blank数据的待调整宽度，生成调整后的视频数据；
时序生成电路，用于根据所述调整后的视频数据生成相应的时序控制信号；以及
数据输出模块，用于根据所述时序生成模块生成的所述时序控制信号输出视频数据。
附图说明
图1为相关技术中的液晶显示装置的结构示意图；
图2为本公开的至少一个实施例的显示面板的驱动方法的流程示意图；
图3为本公开的至少一个实施例的显示装置的结构示意图；
图4为本公开的至少一个实施例的显示面板的驱动方法的流程示意图；
图5为本公开的至少一个实施例的H-Black数据的宽度调整前的视频数据的示意图；
图6为本公开的至少一个实施例的H-Black数据的宽度调整后的视频数据的示意图；
图7为本公开的至少一个实施例的H-Black数据的宽度调整后的视频数据的示意图；
图8为本公开的至少一个实施例的采用线性计算方法计算第i行栅线对应的调整后的H-Blank数据的宽度的示意图；
图9为本公开的至少一个实施例的采用非线性计算方法计算第i行栅线对应的调整后的H-Blank数据的宽度的示意图；
图10为本公开的至少一个实施例的时序控制信号与调整后的视频数据的比对示意图；
图11为本公开的至少一个实施例的显示面板的驱动电路的结构示意图。
具体实施方式
为使本公开实施例的目的、技术方案和优点更加清楚，下面将结合本公开实施例的附图，对本公开实施例的技术方案进行清楚、完整地描述。显然，所描述的实施例是本公开的一部分实施例，而不是全部的实施例。基于所描述的本公开的实施例，本领域普通技术人员所获得的所有其他实施例，都属于本公开保护的范围。
除非另作定义，此处使用的技术术语或者科学术语应当为本公开所属领域内具有一般技能的人士所理解的通常意义。本公开专利申请说明书以及权利要求书中使用的“第一”、“第二”以及类似的词语并不表示任何顺序、数量或者重要性，而只是用来区分不同的组成部分。同样，“一个”或者“一”等类似词语也不表示数量限制，而是表示存在至少一个。“连接”或者“相连”等类似的词语并非限定于物理的或者机械的连接，而是可以包括电性的连接，不管是直接的还是间接的。“上”、“下”、“左”、“右”等仅用于表示相对位置关系，当被描述对象的绝对位置改变后，则该相对位置关系也相应地改变。
相关技术中，如图1所示，液晶显示装置包括时序控制器(TCON)、源极驱动器(Source Driver)、栅极驱动器(Gate Driver)及显示面板等。其中，显示面板上设置有纵向的数据线(图未示出)和横向的栅线(图未示出)，以及位于数据线和栅线限定的像素区域中的像素阵列(图未示出)。时序控制器用于向栅极驱动器输出时钟信号CPV、使能信号OE和帧触发信号STV等，以控制栅极驱动器通过对应的栅线依序对像素阵列中对应的像素行进行充电，以将源极驱动器输出的视频数据传输至对应的像素，进而显示图像。
相关技术中，只有使能信号OE为开启状态时，栅极驱动器才对像素行进行充电，即栅极驱动器向各栅线输出的扫描信号的维持时长等于对应的使能信号OE的开启时间宽度。针对每一像素行，栅极驱动器所接收的使能信号的开启时间宽度是相同的，即对每一像素行的充电时间是相同的，这造成如下问题：源极驱动器一般设置于显示面板一侧(请参考图1)，显示面板的A位置处的像素，距离源极驱动器较近，数据线上的RC Delay(RC延迟)较小，像素充电率较好，画面显示较亮，在显示面板的B位置处的像素，由于远离源极驱动器， 数据线上的RC Delay较大，像素充电率较差，画面显示偏暗。
也就是说，相关技术中的显示面板中，距离源极驱动器较近的像素行的充电率较高，距离源极驱动器较远的像素行的充电率较低，显示面板的整面的充电率不一致，从而导致画面显示不良。
根据像素的充电率的计算公式
Figure PCTCN2017099499-appb-000006
得到
Figure PCTCN2017099499-appb-000007
其中，U是电压，t是充电时间，Vt是指在t时刻的电压，即t与RC呈线性关系。因而，本公开的至少一个实施例中，通过调整像素的充电时间，改变像素的充电率。
请参考图2，本公开的至少一个实施例提供一种显示面板的驱动方法，所述显示面板包括Y条栅线(Y为正整数)，按照栅线的扫描顺序，将所有的栅线划分为多个栅线组，其中每一栅线组中包括至少一条栅线；所述驱动方法包括：
步骤S21：确定当前待扫描的第i条栅线，1≤i≤Y；
步骤S22：将第i条栅线对应的扫描信号的原始充电时长调整至一调整充电时长，其中，每一栅线组中各栅线对应的调整充电时长相等，且从靠近源极驱动器到远离所述源极驱动器的方向上，所述栅线组对应的调整充电时长逐渐增大；
步骤S23：基于第i条栅线对应的调整充电时长，将第i条栅线对应的扫描信号输出至第i条栅线。
本公开的至少一个实施例中，调整每行栅线对应的充电时间，使得靠近源极驱动器的像素行的充电时间较短，远离源极驱动器的像素行的充电时间较大，从而提高了充电率不足像素行的充电率，使得每行像素的充电率达到相同或相近，解决了由于显示面板上的充电率差异造成的画面显示不良，提高了显示效果。
请参考图3，图3为本公开的至少一个实施例的显示装置的结构示意图，图3所示的本公开的至少一个实施例中，按照栅线的扫描顺序，将显示面板上的Y条栅线划分为m个栅线组(栅线组1，栅线组2……栅线组m)，其中，每一栅线组包括12条栅线(图中未全部示出)，其中，栅线组1是距离源极驱动器最近的栅线组，栅线组m是距离源极驱动器最远的栅线组，从靠近源极驱动器到远离源极驱动器的方向上，栅线组对应的调整充电时长逐渐增大。从图3中可以看 出，栅线组1对应的调整充电时长为t1，栅线组m对应的调整充电时长为tm，tm大于t1，两者之间差值为Δt。
本公开的至少一个实施例中，栅线组的个数可以根据需要进行设定，取值范围大于1小于或等于Y，当栅线组的个数等于Y时，即每一栅线组包括一条栅线。可以理解的是，栅线组的个数越小，充电率调整的精度越高。
可选的，每一栅线组中的栅线的数量相等。当然，在本公开的至少一个实施例中，每一栅线组中的栅线的数量也可以不等，可以根据需要进行设定。
为保证一帧图像的总充电时长不变，可选的，各栅线对应的调整充电时长的总和与各栅线对应的原始充电时长的总和相同。
进一步可选的，当Y为偶数时，第1～Y/2行各栅线的调整充电时长小于原始充电时长，第(Y/2)+1～Y行各栅线的调整充电时长大于原始充电时长，其中，第1行栅线为距离源极驱动器最近的栅线，第Y条栅线为距离源极驱动器最远的栅线，即将整个显示面板上的栅线分成两半，一半栅线的原始充电时长减小，另一半栅线的原始充电时长增大，以保证一帧图像的总充电时长不变。
本公开的至少一个实施例中，可以预先存储每一栅线对应的调整充电时长，当需要扫描第i条栅线时，从预先存储的内容中，直接查询第i条栅线对应的调整充电时长即可。由于实际使用时，查表是最简单也是最实用的方法，而且表格内容可以任意设定，较为灵活。因而本公开的至少一个实施例中，可以采用一表格存储每一栅线及其对应的调整充电时长的对应关系，当需要扫描第i条栅线时，从预先存储的表格中，直接查询第i条栅线对应的调整充电时长即可。
请参考图4，图4为本公开的至少一个实施例的显示面板的驱动方法的流程示意图，所述显示面板包括Y条栅线(Y为正整数)，按照栅线的扫描顺序，将所有的栅线划分为多个栅线组，其中每一栅线组中包括至少一条栅线；所述驱动方法包括：
步骤S41：预先存储每一栅线对应的调整充电时长，其中，每一栅线组中各栅线对应的调整充电时长相等，且从靠近源极驱动器到远离源极驱动器的方向上，所述栅线组对应的调整充电时长逐渐增大；
步骤S42：确定当前待扫描的第i条栅线，1≤i≤Y；
步骤S43：从预先存储的每一栅线对应的调整充电时长中，查询第i条栅线对应的调整充电时长；
步骤S44：将第i条栅线对应的扫描信号的原始充电时长调整至查询到的第i条栅线对应的调整充电时长；
步骤S45：基于第i条栅线对应的调整充电时长，将第i条栅线对应的扫描信号输出至第i条栅线。
本公开的至少一个实施例中，预先存储每一栅线对应的调整充电时长，待进行显示时，直接从预先存储的信息中，查询每一栅线对应的调整充电时长即可，不需要在显示时实时计算每一栅线对应的调整充电时长，节省了时间和功耗。
本公开的至少一个实施例中，预先存储的第i条栅线对应的调整充电时长可以通过以下方式得到：
步骤一：确定第i行栅线对应的视频数据中的H-Blank数据需要调整的宽度，得到第i行栅线对应的调整后的H-Blank数据的宽度；
步骤二：根据第i行栅线对应的调整后的H-Blank数据的宽度，确定第i行栅线对应的调整充电时长。
下面详细进行说明。
在进行显示时，通常是由时序控制器接收视频数据，并传输给源极驱动器，由源极驱动器通过数据线传输给像素。时序控制器接收到的一帧图像对应的视频数据可以如图5所示，其中，第1行视频数据对应第一条栅线，……第Y行视频数据对应第Y条栅线，每行视频数据包括X个有效数据(Data)和H-Blank(水平空白区域)数据，H-Blank数据的宽度的单位可以采用Pixel数量、时间、CLK(时钟)或其他形式单位表示。例如，一行视频数据中包括有3840个有效数据和560个H-Blank数据。又例如，传输一行视频数据需要7.4us，其中有效数据传输占用约6.5us，H-Blank数据占用约0.9us。因为视频数据在传输时是串行传输，H-Blank数据也可以理解成一行有效数据与下一行有效数据之间的间隔。
从图5中可以看出，时序控制器接收到的每行视频数据中的有效数据和H-Blank数据的宽度都是固定的，每行视频数据中，有效数据的数量为X，H-Blank数据的宽度为HB，单位为Pixel，每一帧图像对应的视频数据共有Y行，每一帧图像对应的视频数据的总量为(X+HB)*Y，H-Blank数据的总量为HB*Y。
时序控制器接收到视频数据之后，会存储至line Buffer(行缓冲器)中。Line Buffer的一行可以存储X个有效数据，假设时序控制器中的Line Buffer 的行数为NL，NL＞＝2，则Line Buffer能够存储的有效数据的总量为NL*X。
本公开的至少一个实施例中，可以通过调整各栅线对应的H-Blank数据的宽度，来调整各栅线对应的原始充电时长。具体的，H-Blank数据的宽度越大，各栅线对应的原始充电时长越长，H-Blank数据的宽度越小，各栅线对应的原始充电时长越短。
请参考图6，图6为本公开的至少一个实施例的H-Black数据的宽度调整后的视频数据的示意图，从图6中可以看出，第1行视频数据(对应距离源极驱动器最近的一条栅线)对应的H-Blank数据的宽度n(1)最小，第Y行视频数据(对应距离源极驱动器最远的一条栅线)对应的H-Blank数据的宽度n(1)最小，即从靠近源极驱动器到远离源极驱动器的方向上，H-Blank数据的宽度逐渐增加。
图6所示的本公开的至少一个实施例中，Y条栅线分成Y个栅线组，即每一栅线组包括一条栅线，每条栅线对应的H-Blank数据的宽度均不相同。
请参考图7，图7为本公开的至少一个实施例的H-Black数据的宽度调整后的视频数据的示意图，从图7中可以看出，每两行视频数据对应的H-Blank数据的宽度进行一次调整。即，Y条栅线分成Y/2个栅线组，即每一栅线组包括两条栅线，位于同一栅线组内的两条栅线对应的H-Blank数据的宽度相同。
本公开的至少一个实施例中，可以通过以下两种方法确定第i行栅线对应的调整后的H-Blank数据的宽度。
第一种方法：采用线性计算方法计算第i行栅线对应的调整后的H-Blank数据的宽度n(i)。
请参考图8，线性计算方法包括：
(1)确定第一行栅线对应的视频数据中的H-Blank数据需要减小的宽度k0；
(2)计算第一行栅线对应的调整后的H-Blank数据的宽度n(1)，其中，n(1)＝HB-k0；
(3)计算第i行栅线对应的调整后的H-Blank数据的宽度与n(1)的差值Δk，其中，
Figure PCTCN2017099499-appb-000008
Y为所述显示面板上的所有栅线的总数，m为所述栅线组的总数；
Δk的计算公式的原理是：Y/2行，每m行H-blank宽度调整一次，总共调整 的次数是
Figure PCTCN2017099499-appb-000009
最大调整的宽度是k0，每次调整的宽度就是：
Figure PCTCN2017099499-appb-000010
第i行调整的宽度乘以
Figure PCTCN2017099499-appb-000011
(4)计算第i行栅线对应的调整后的H-Blank数据的宽度n(i)，其中，n(i)＝HB-k0+Δk，HB为所述视频数据中的H-Blank数据的宽度。
本公开的至少一个实施例中，第一行栅线对应的视频数据中的H-Blank数据需要减小的宽度k0可以通过以下两种方式确定：
1)计算第1行栅线对应的视频数据中的H-Blank数据最大能够减少的宽度k，其中，
Figure PCTCN2017099499-appb-000012
NL为时序控制器中一行Line Buffer能够存储的有效数据的数量，X为一行视频数据中的有效数据的数量，Y为所述显示面板上的所有栅线的总数，k＜HB，HB为视频数据中的H-Blank数据的宽度；
然后，选取小于或等于宽度k一数值，作为第一行栅线对应的视频数据中的H-Blank数据需要减小的宽度k0。
k0小于或等于k，可以确保Line Buffer不会溢出。
TCON送出的每行有效数据，在某些格式下，需要包含头数据、尾数据等，这些需要占用一定的宽度，考虑到通用性，k＜HB
公式
Figure PCTCN2017099499-appb-000013
的计算原理为：累计的H-Blank数据的宽度的变化量的和要小于Line Buffer的总量；公式左边((NL-1)*X)是Line Buffer能存储的有效数据的总和；公式右边
Figure PCTCN2017099499-appb-000014
是Y/2行，累计的H-Blank数据的宽度的变化量，本公开的至少一个实施例中，采用Y/2行用来减少H-blank数据的宽度，剩下的Y/2行用来增加H-blank数据的宽度，即为保证一帧图像的整体充电时间不变，一半的行用来减少时间，一半的行把省下的时间用上。
也就是说，本公开的至少一个实施例中，第1～Y/2行栅线对应的H-blank数据的宽度减小，第(Y/2)+1～Y行栅线对应的H-blank数据的宽度增加。
2)依据实际的显示效果调试，确定k0。
第二种方法：采用非线性计算方法计算第i条栅线对应的H-Blank数据的宽度n(i)
请参考图9，非线性计算方法包括：
(1)确定第一行栅线对应的视频数据中的H-Blank数据需要减小的宽度k0；
(2)计算第一行栅线对应的调整后的H-Blank数据的宽度n(1)，其中，n(1)＝HB-k0；
(3)计算第i行栅线对应的调整后的H-Blank数据的宽度与n(1)的差值Δk，其中，
Figure PCTCN2017099499-appb-000015
A为指数，Y为所述显示面板上的所有栅线的总数，m为所述栅线组的个数；
其中，A值依据实际显示效果调试得到。
公式
Figure PCTCN2017099499-appb-000016
的计算原理是：每m行H-blank数据的宽度变化的量，呈指数形式增加，变化系数是
Figure PCTCN2017099499-appb-000017
乘以k0，最后进行取整数，就是每m行的变化量。
(4)计算第i行栅线对应的调整后的H-Blank数据的宽度n(i)，其中，n(i)＝HB-k0+Δk，HB为所述视频数据中的H-Blank数据的宽度。
同样的，第一行栅线对应的视频数据中的H-Blank数据需要减小的宽度k0可以通过以下两种方式确定：
1)计算第1行栅线对应的视频数据中的H-Blank数据最大能够减少的宽度k，其中，
Figure PCTCN2017099499-appb-000018
NL为时序控制器中一行Line Buffer能够存储的有效数据的数量，X为一行视频数据中的有效数据的数量，Y为所述显示面板上的所有栅线的总数，k＜HB，HB为视频数据中的H-Blank数据的宽度；然后，选取小于或等于宽度k一数值，作为第一行栅线对应的视频数据中的H-Blank数据需要减小的宽度k0。
2)依据实际的显示效果调试，确定k0。
本公开的至少一个实施例中，Line Buffer的数量NL越大，输入的视频数据中的H-Blank数据的宽度HB越大，计算得到的H-Blank数据的宽度可调整范围也就越大。
本公开的至少一个实施例中，是通过预先计算各栅线对应的调整充电时长，并存储起来，在进行显示时，直接查询当前需要扫描的栅线对应的调整充电时长即可，当然在本公开的至少一个实施例中，也可以实时计算当前需要扫描的栅线对应的调整充电时长，计算方法可以采用本公开的至少一个实施例中所述的计算方法，在此不再重复描述。
本公开的至少一个实施例中，在基于第i条栅线对应的调整充电时长，将第i条栅线对应的扫描信号输出至第i条栅线时，具体可以根据第i条栅线对应的调整充电时长，生成对应第i行的新的时序控制信号，根据新的时序控制信号进行视频数据的输出。
请参考图10，图10为本公开的至少一个实施例的时序控制信号与调整后的视频数据的比对示意图，图10中，STV是帧触发信号，CPV是时钟信号，TP是数据源行锁存信号，POL是极性翻转信号，OE1和OE2是使能信号。从图10可以看出，与相关技术不同的是，每一行视频数据中的H-Blank数据的宽度不同，导致每一行视频数据的总长也不相同。为了能够输出总长不同的视频数据，与视频数据匹配的各时序控制信号(TP、CPV、OE1和OE2等)按照不固定频率输出。
基于同一发明构思，本公开的至少一个实施例还提供一种显示面板的驱动电路，所述显示面板包括Y条栅线，按照栅线的扫描顺序，将所有的栅线划分为多个栅线组，其中每一栅线组中包括至少一条栅线；所述驱动电路包括：
确定模块，用于确定当前待扫描的第i条栅线，1≤i≤Y；
调整模块，用于将第i条栅线对应的扫描信号的原始充电时长调整至一调整充电时长，其中，每一栅线组中各栅线对应的调整充电时长相等，且从靠近源极驱动器到远离所述源极驱动器的方向上，所述栅线组对应的调整充电时长逐渐增大；
输出模块，用于基于第i条栅线对应的调整充电时长，将第i条栅线对应的扫描信号输出至第i条栅线。
本公开的至少一个实施例中，可以预先存储每一栅线对应的调整充电时长，当需要扫描第i条栅线时，从预先存储的内容中，直接查询第i条栅线对应的调整充电时长即可。由于实际使用时，查表是最简单也是最实用的方法，而且表格内容可以任意设定，较为灵活；因而本公开的至少一个实施例中，可以采用一表格存储每一栅线及其对应的调整充电时长的对应关系，当需要扫描第i条栅线时，从预先存储的表格中，直接查询第i条栅线对应的调整充电时长即可。
在本公开的至少一个实施例中，所述显示面板的驱动电路还包括：
存储模块，用于预先存储每一栅线对应的调整充电时长。
可选的，所述存储模块采用表格的方式存储每一栅线对应的调整充电时长。
所述存储模块中存储的每一栅线对应的调整充电时长可以通过调整H-Blank数据的宽度，计算得到，计算方法请参见具体驱动方法中的描述，再次不再重复说明。
在本公开的至少一个实施例中，所述显示面板的驱动电路还包括：
H-Blank数据宽度调整模块，用于确定第i行栅线对应的视频数据中的H-Blank数据需要调整的宽度，得到第i行栅线对应的调整后的H-Blank数据的宽度；
第三确定模块，用于根据第i行栅线对应的调整后的H-Blank数据的宽度，确定第i行栅线对应的调整充电时长。
即可以实时计算第i行栅线对应的调整后的H-Blank数据的宽度，确定第i行栅线对应的调整充电时长。
所述H-Blank数据宽度调整模块可以采用线性计算方法计算第i行栅线对应的调整后的H-Blank数据的宽度，此时，所述H-Blank数据宽度调整模块包括：
第一确定单元，用于确定第一行栅线对应的视频数据中的H-Blank数据需要减小的宽度k0；
第一计算单元，用于计算第一行栅线对应的调整后的H-Blank数据的宽度n(1)，其中，n(1)＝HB-k0；
第二计算单元，用于计算第i行栅线对应的调整后的H-Blank数据的宽度与n(1)的差值Δk，其中，
Figure PCTCN2017099499-appb-000019
Y为所述显示面板上的所有栅线的总数，m为所述栅线组的总数；
第四计算单元，用于计算第i行栅线对应的调整后的H-Blank数据的宽度n(i)，其中，n(i)＝HB-k0+Δk，HB为所述视频数据中的H-Blank数据的宽度。
所述H-Blank数据宽度调整模块还可以采用非线性计算方法计算第i行栅线对应的调整后的H-Blank数据的宽度，此时，所述H-Blank数据宽度调整模块包括：
第二确定单元，用于确定第一行栅线对应的视频数据中的H-Blank数据需要减小的宽度k0；
第五计算单元，用于计算第一行栅线对应的调整后的H-Blank数据的宽度n(1)，其中，n(1)＝HB-k0；
第六计算单元，用于计算第i行栅线对应的调整后的H-Blank数据的宽度与n(1)的差值Δk，其中，
Figure PCTCN2017099499-appb-000020
A为指数，Y为所述显示面板上的所有栅线的总数，m为所述栅线组的个数；
第七计算单元，用于计算第i行栅线对应的调整后的H-Blank数据的宽度n(i)，其中，n(i)＝HB-k0+Δk，HB为所述视频数据中的H-Blank数据的宽度。
请参考图11，图11为本公开的至少一个实施例的显示面板的驱动电路的结构示意图，该驱动电路包括：数据接收模块，Line Buffer，可调公式计算器，数据调控模块、时序生成电路和数据输出模块，其中，数据接收模块用于接收发送给时序控制器的视频数据，Line Buffer用于存储接收到视频数据，LineBuffer的个数大于或等于2个，可调公式计算器用于计算每行视频数据中的H-Blank数据的待调整宽度，数据调控模块用于根据可调公式计算器计算的每行视频数据中的H-Blank数据的待调整宽度，调整视频数据，即将有效数据和对应的宽度调整后的H-Blank数据汇合在一起，生成调整后的视频数据，时序生成模块用于根据调整后的视频数据生成相应的时序控制信号，数据输出模块用于根据所述时序生成模块生成的时序控制信号输出视频数据。
其中，可调公式计算器计算每行视频数据中的H-Blank数据的待调整宽度的计算方法可参考本公开的至少一个实施例中所述的计算方法，在此不再重复描述。
基于同一发明构思，本公开的至少一个实施例还提供一种显示装置，包括上述显示面板的驱动电路。
可选的，本公开的至少一个实施例中的显示装置为大尺寸的液晶显示装置。
本公开的至少一个实施例中，调整每行栅线对应的充电时间，使得靠近源极驱动器的像素行的充电时间较短，远离源极驱动器的像素行的充电时间较大，从而提高了充电率不足像素行的充电率，使得每行像素的充电率达到相同或相近，解决了由于显示面板上的充电率差异造成的画面显示不良，提高了显示效果。
以上所述是本公开的一些实施方式，应当指出，对于本技术领域的普通技术人员来说，在不脱离本公开所述原理的前提下，还可以作出若干改进和润饰，这些改进和润饰也应视为本公开的保护范围。

Claims (13)

  1. 一种显示面板的驱动方法，其中，所述显示面板包括Y条栅线，按照栅线的扫描顺序，将Y条栅线划分为多个栅线组，其中每一栅线组中包括至少一条栅线；所述驱动方法包括：
    确定当前待扫描的第i条栅线，1≤i≤Y；
    将第i条栅线对应的扫描信号的原始充电时长调整至调整充电时长，其中，每一栅线组中各栅线对应的调整充电时长相等，且从靠近源极驱动器到远离所述源极驱动器的方向上，所述栅线组对应的调整充电时长逐渐增大；
    基于第i条栅线对应的调整充电时长，将第i条栅线对应的扫描信号输出至第i条栅线。
  2. 根据权利要求1所述的显示面板的驱动方法，其中，各栅线对应的调整充电时长的总和与各栅线对应的原始充电时长的总和相同。
  3. 根据权利要求1所述的显示面板的驱动方法，其中，所述将第i条栅线对应的扫描信号的原始充电时长调整至一调整充电时长的步骤之前还包括：
    预先存储每一栅线对应的调整充电时长。
  4. 根据权利要求3所述的显示面板的驱动方法，其中，预先存储的第i条栅线对应的调整充电时长通过以下方式得到：
    确定第i行栅线对应的视频数据中的H-Blank数据需要调整的宽度，得到第i行栅线对应的调整后的H-Blank数据的宽度；
    根据第i行栅线对应的调整后的H-Blank数据的宽度，确定第i行栅线对应的调整充电时长。
  5. 根据权利要求4所述的显示面板的驱动方法，其中，所述确定第i行栅线对应的视频数据中的H-Blank数据需要调整的宽度，得到第i行栅线对应的调整后的H-Blank数据的宽度的步骤包括：
    确定第一行栅线对应的视频数据中的H-Blank数据需要减小的宽度k0；
    计算第一行栅线对应的调整后的H-Blank数据的宽度n(1)，其中，n(1)＝HB-k0；
    计算第i行栅线对应的调整后的H-Blank数据的宽度与n(1)的差值Δk，其中，
    Figure PCTCN2017099499-appb-100001
    Y为所述显示面板上的所有栅线的总数，m为所述栅线组的总数；
    计算第i行栅线对应的调整后的H-Blank数据的宽度n(i)，其中，n(i)＝HB-k0+Δk，HB为所述视频数据中的H-Blank数据的宽度。
  6. 根据权利要求4所述的显示面板的驱动方法，其中，所述确定第i行栅线对应的视频数据中的H-Blank数据需要调整的宽度，得到第i行栅线对应的调整后的H-Blank数据的宽度的步骤包括：
    确定第一行栅线对应的视频数据中的H-Blank数据需要减小的宽度k0；
    计算第一行栅线对应的调整后的H-Blank数据的宽度n(1)，其中，n(1)＝HB-k0；
    计算第i行栅线对应的调整后的H-Blank数据的宽度与n(1)的差值Δk，其中，
    Figure PCTCN2017099499-appb-100002
    A为指数，Y为所述显示面板上的所有栅线的总数，m为所述栅线组的个数；
    计算第i行栅线对应的调整后的H-Blank数据的宽度n(i)，其中，n(i)＝HB-k0+Δk，HB为所述视频数据中的H-Blank数据的宽度。
  7. 根据权利要求5或6所述的显示面板的驱动方法，其中，所述确定第一行栅线对应的视频数据中的H-Blank数据需要减小的宽度k0的步骤包括：
    计算第1行栅线对应的视频数据中的H-Blank数据最大能够减少的宽度k，其中，
    Figure PCTCN2017099499-appb-100003
    NL为时序控制器中一行Line Buffer能够存储的数据的数量，X为一行视频数据中的有效数据的数量，Y为所述显示面板上的所有栅线的总数，k＜HB，HB为视频数据中的H-Blank数据的宽度；
    选取小于或等于宽度k的数值，作为第一行栅线对应的视频数据中的H-Blank数据需要减小的宽度k0。
  8. 一种显示面板的驱动电路，其中，所述显示面板包括Y条栅线，按照栅线的扫描顺序，将所有的栅线划分为多个栅线组，每一栅线组中包括至少一条栅线；所述驱动电路包括：
    确定模块，用于确定当前待扫描的第i条栅线，1≤i≤Y；
    调整模块，用于将第i条栅线对应的扫描信号的原始充电时长调整至调整充电时长，其中，每一栅线组中各栅线对应的调整充电时长相等，且从靠近源 极驱动器到远离所述源极驱动器的方向上，所述栅线组对应的调整充电时长逐渐增大；
    输出模块，用于基于第i条栅线对应的调整充电时长，将第i条栅线对应的扫描信号输出至第i条栅线。
  9. 根据权利要求8所述的显示面板的驱动电路，还包括：
    存储模块，用于预先存储每一栅线对应的调整充电时长。
  10. 根据权利要求8或9所述的显示面板的驱动电路，还包括：
    H-Blank数据宽度调整模块，用于确定第i行栅线对应的视频数据中的H-Blank数据需要调整的宽度，得到第i行栅线对应的调整后的H-Blank数据的宽度；
    第三确定模块，用于根据第i行栅线对应的调整后的H-Blank数据的宽度，确定第i行栅线对应的调整充电时长。
  11. 根据权利要求10所述的显示面板的驱动电路，其中，所述H-Blank数据宽度调整模块包括：
    第一确定单元，用于确定第一行栅线对应的视频数据中的H-Blank数据需要减小的宽度k0；
    第一计算单元，用于计算第一行栅线对应的调整后的H-Blank数据的宽度n(1)，其中，n(1)＝HB-k0；
    第二计算单元，用于计算第i行栅线对应的调整后的H-Blank数据的宽度与n(1)的差值Δk，其中，
    Figure PCTCN2017099499-appb-100004
    Y为所述显示面板上的所有栅线的总数，m为所述栅线组的总数；
    第四计算单元，用于计算第i行栅线对应的调整后的H-Blank数据的宽度n(i)，其中，n(i)＝HB-k0+Δk，HB为所述视频数据中的H-Blank数据的宽度。
  12. 根据权利要求10所述的显示面板的驱动电路，其中，所述H-Blank数据宽度调整模块包括：
    第二确定单元，用于确定第一行栅线对应的视频数据中的H-Blank数据需要减小的宽度k0；
    第五计算单元，用于计算第一行栅线对应的调整后的H-Blank数据的宽度 n(1)，其中，n(1)＝HB-k0；
    第六计算单元，用于计算第i行栅线对应的调整后的H-Blank数据的宽度与n(1)的差值Δk，其中，
    Figure PCTCN2017099499-appb-100005
    A为指数，Y为所述显示面板上的所有栅线的总数，m为所述栅线组的个数；
    第七计算单元，用于计算第i行栅线对应的调整后的H-Blank数据的宽度n(i)，其中，n(i)＝HB-k0+Δk，HB为所述视频数据中的H-Blank数据的宽度。
  13. 根据权利要求9所述的显示面板的驱动电路，其中，所述存储模块采用表格的方式存储所述每一栅线对应的调整充电时长。14、一种显示装置，包括如权利要求8-13任一项所述的显示面板的驱动电路，还包括：
    数据接收模块，用于接收发送给时序控制器的视频数据；
    行缓冲器，用于存储接收到的所述视频数据；
    可调公式计算器，计算每行视频数据中的H-Blank数据的待调整宽度；
    数据调控模块，用于根据所述可调公式计算器计算的所述每行视频数据中的H-Blank数据的待调整宽度，生成调整后的视频数据；
    时序生成电路，用于根据所述调整后的视频数据生成相应的时序控制信号；以及
    数据输出模块，用于根据所述时序生成模块生成的所述时序控制信号输出视频数据。
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KR20160017375A (ko) * 2014-08-05 2016-02-16 삼성디스플레이 주식회사 게이트 구동부, 이를 포함하는 표시 장치 및 이를 이용하는 표시 패널의 구동 방법
CN104361877A (zh) * 2014-12-09 2015-02-18 京东方科技集团股份有限公司 一种显示面板的驱动方法、其驱动装置及显示装置
CN104361878A (zh) * 2014-12-10 2015-02-18 京东方科技集团股份有限公司 一种显示面板、其驱动方法及显示装置
CN105629539A (zh) * 2016-03-31 2016-06-01 京东方科技集团股份有限公司 一种显示装置的驱动方法、驱动电路及显示装置
CN106875905A (zh) * 2017-01-04 2017-06-20 京东方科技集团股份有限公司 一种显示面板的驱动方法、驱动电路和显示装置

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CN109637407A (zh) * 2019-01-09 2019-04-16 惠科股份有限公司 一种修复显示面板的方法、装置和显示面板的驱动方法

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