WO2018120903A1 - 一种串联电池组单体电池的采样电路、均衡电路及系统 - Google Patents

一种串联电池组单体电池的采样电路、均衡电路及系统 Download PDF

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Publication number
WO2018120903A1
WO2018120903A1 PCT/CN2017/100382 CN2017100382W WO2018120903A1 WO 2018120903 A1 WO2018120903 A1 WO 2018120903A1 CN 2017100382 W CN2017100382 W CN 2017100382W WO 2018120903 A1 WO2018120903 A1 WO 2018120903A1
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Prior art keywords
port
transistor
sampling
photocoupler
controller
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PCT/CN2017/100382
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English (en)
French (fr)
Inventor
潘灯海
吕泽杰
伍元中
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华为技术有限公司
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Priority to EP17887816.1A priority Critical patent/EP3553874B1/en
Publication of WO2018120903A1 publication Critical patent/WO2018120903A1/zh
Priority to US16/455,714 priority patent/US11041911B2/en

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    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/36—Arrangements for testing, measuring or monitoring the electrical condition of accumulators or electric batteries, e.g. capacity or state of charge [SoC]
    • G01R31/382—Arrangements for monitoring battery or accumulator variables, e.g. SoC
    • G01R31/3835—Arrangements for monitoring battery or accumulator variables, e.g. SoC involving only voltage measurements
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/36—Arrangements for testing, measuring or monitoring the electrical condition of accumulators or electric batteries, e.g. capacity or state of charge [SoC]
    • G01R31/3644—Constructional arrangements
    • G01R31/3648—Constructional arrangements comprising digital calculation means, e.g. for performing an algorithm
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/36—Arrangements for testing, measuring or monitoring the electrical condition of accumulators or electric batteries, e.g. capacity or state of charge [SoC]
    • G01R31/396—Acquisition or processing of data for testing or for monitoring individual cells or groups of cells within a battery
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
    • H02J7/0013—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries acting upon several batteries simultaneously or sequentially
    • H02J7/0014—Circuits for equalisation of charge between batteries
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
    • H02J7/0047—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries with monitoring or indicating devices or circuits
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B60—VEHICLES IN GENERAL
    • B60L—PROPULSION OF ELECTRICALLY-PROPELLED VEHICLES; SUPPLYING ELECTRIC POWER FOR AUXILIARY EQUIPMENT OF ELECTRICALLY-PROPELLED VEHICLES; ELECTRODYNAMIC BRAKE SYSTEMS FOR VEHICLES IN GENERAL; MAGNETIC SUSPENSION OR LEVITATION FOR VEHICLES; MONITORING OPERATING VARIABLES OF ELECTRICALLY-PROPELLED VEHICLES; ELECTRIC SAFETY DEVICES FOR ELECTRICALLY-PROPELLED VEHICLES
    • B60L58/00—Methods or circuit arrangements for monitoring or controlling batteries or fuel cells, specially adapted for electric vehicles
    • B60L58/10—Methods or circuit arrangements for monitoring or controlling batteries or fuel cells, specially adapted for electric vehicles for monitoring or controlling batteries
    • B60L58/18—Methods or circuit arrangements for monitoring or controlling batteries or fuel cells, specially adapted for electric vehicles for monitoring or controlling batteries of two or more battery modules
    • B60L58/22—Balancing the charge of battery modules
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01M—PROCESSES OR MEANS, e.g. BATTERIES, FOR THE DIRECT CONVERSION OF CHEMICAL ENERGY INTO ELECTRICAL ENERGY
    • H01M10/00—Secondary cells; Manufacture thereof
    • H01M10/42—Methods or arrangements for servicing or maintenance of secondary cells or secondary half-cells
    • H01M10/48—Accumulators combined with arrangements for measuring, testing or indicating the condition of cells, e.g. the level or density of the electrolyte
    • H01M10/482—Accumulators combined with arrangements for measuring, testing or indicating the condition of cells, e.g. the level or density of the electrolyte for several batteries or cells simultaneously or sequentially
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01M—PROCESSES OR MEANS, e.g. BATTERIES, FOR THE DIRECT CONVERSION OF CHEMICAL ENERGY INTO ELECTRICAL ENERGY
    • H01M10/00—Secondary cells; Manufacture thereof
    • H01M10/42—Methods or arrangements for servicing or maintenance of secondary cells or secondary half-cells
    • H01M10/425—Structural combination with electronic components, e.g. electronic circuits integrated to the outside of the casing
    • H01M2010/4271—Battery management systems including electronic circuits, e.g. control of current or voltage to keep battery in healthy state, cell balancing
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
    • H02J7/0013—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries acting upon several batteries simultaneously or sequentially
    • H02J7/0014—Circuits for equalisation of charge between batteries
    • H02J7/0018—Circuits for equalisation of charge between batteries using separate charge circuits
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
    • H02J7/0013—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries acting upon several batteries simultaneously or sequentially
    • H02J7/0014—Circuits for equalisation of charge between batteries
    • H02J7/0019—Circuits for equalisation of charge between batteries using switched or multiplexed charge circuits
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E60/00—Enabling technologies; Technologies with a potential or indirect contribution to GHG emissions mitigation
    • Y02E60/10—Energy storage using batteries
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02T—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO TRANSPORTATION
    • Y02T10/00—Road transport of goods or passengers
    • Y02T10/60—Other road transportation technologies with climate change mitigation effect
    • Y02T10/70—Energy storage systems for electromobility, e.g. batteries

Definitions

  • Embodiments of the present invention relate to the field of battery technologies, and in particular, to a sampling circuit, an equalization circuit, and a system for a battery cell of a series connected battery.
  • Lithium-ion battery packs are generally composed of multi-cell single-cell lithium-ion batteries in series and parallel. Due to the inconsistency of the characteristics of the single-cell battery, in order to improve the battery performance, extend the service life, and charge and discharge safety management, it is necessary to collect the voltage of the single-cell battery. In the case where there is a difference in the voltage of the single cells, the equalization circuit needs to be activated to perform charge and discharge management for the single cells, so that the voltages of the individual cells in the battery pack tend to be uniform. Lithium-ion battery pack single-cell voltage sampling accuracy is generally required to be within 10mV, while the sampling and equalization circuit requires low leakage current (less than 500uA) to ensure battery storage time.
  • Embodiments of the present invention provide a sampling circuit, an equalization circuit, and a system for a single battery of a series battery pack, which are used to isolate a single battery from a sampling resistor when sampling a single battery, thereby preventing leakage of a single battery. Current situation.
  • a sampling circuit for a battery cell of a series battery pack is provided.
  • the utility model comprises: a controller, an analog-to-digital converter (ADC), a voltage dividing circuit, a battery pack composed of n single cells connected in series, and n isolated sampling switches, wherein the n isolated sampling switches are One end is connected to the first input end of the voltage dividing circuit, and the other ends of the n isolated sampling switches are respectively connected to the positive poles of the n single cells, and the isolated sampling switch and the single battery are one by one
  • a negative electrode of the first single cell of the n single cells is connected to a second input end of the voltage dividing circuit and grounded, and an output end of the voltage dividing circuit and a second input of the ADC End connection, the first input end of the ADC is grounded, the output end of the ADC is connected to the input end of the controller, and the first output group of the controller and the control end of the n isolated sampling switches respectively a connection for controlling opening or closing of the n isolated sampling switches, wherein the controller sequentially controls closing of the n isolated sampling switches, and n
  • the first isolation sampling switch isolates the single cell from the voltage dividing resistor in the voltage dividing circuit, thereby preventing the leakage current of the single battery, and the sampling error in the sampling voltage of the sampling circuit can be calculated in the difference
  • the mutual offsets increase the sampling accuracy of the cell voltage.
  • the voltage dividing circuit includes a first voltage dividing resistor and a second voltage dividing resistor. One end of the first voltage dividing resistor is connected to the n isolated sampling switches, and the other end is connected to a second input end of the ADC, and one end of the second voltage dividing resistor and the n single cells are The negative electrode of the first single cell is connected, and the other end is connected to the second input of the ADC.
  • the anode-to-ground voltage of the single cell can be attenuated by the first voltage dividing resistor and the second voltage dividing resistor in the voltage dividing circuit.
  • the method further includes: an auxiliary driving power supply.
  • Any one of the n isolated sampling switches includes a first transistor, a second transistor, and a photocoupler. a first port of the first transistor is coupled to a first port of the second transistor, a second port of the first transistor is coupled to a first port of the photocoupler, and a third port of the first transistor The port is connected to the anode of its corresponding single cell.
  • a second port of the second transistor is connected to the first port of the photocoupler, and a third port of the second transistor is connected to a first input end of the voltage dividing circuit, the photocoupler a second port is co-located with the controller, a third port of the optocoupler is coupled to a first output group of the controller, and a fourth port of the optocoupler is coupled to an anode of the auxiliary drive power source, A negative electrode of the auxiliary driving power source is connected to a first input end of the voltage dividing circuit.
  • the first transistor and the second crystal in the first isolated sampling switch can isolate the single cell from the voltage dividing resistor in the voltage dividing circuit to prevent leakage current of the single cell, and the sampling of the sampling circuit
  • the sampling error in the voltage can cancel each other out in the differential calculation, which improves the sampling accuracy of the cell voltage.
  • the first transistor and the second transistor are N-type metal oxide semiconductors.
  • any one of the n isolated sampling switches includes a third transistor, a four-transistor, a photocoupler, a first port of the third transistor is connected to a first port of the fourth transistor, and a second port of the third transistor is connected to a fourth port of the photocoupler
  • the third port of the third transistor is connected to the anode of the corresponding single cell
  • the second port of the fourth transistor is connected to the fourth port of the photocoupler
  • the third port of the fourth transistor is a first input end of the voltage dividing circuit is connected
  • a first port of the photocoupler is connected to a negative pole of a corresponding single cell
  • a second port of the photocoupler is shared with the controller
  • the photoelectric A third port of the coupler is coupled to the first output set of the controller.
  • the first transistor and the second crystal in the first isolated sampling switch can isolate the single cell from the voltage dividing resistor in the voltage dividing circuit to prevent leakage current of the single cell, and the sampling of the sampling circuit
  • the sampling error in the voltage can cancel each other out in the differential calculation, which improves the sampling accuracy of the cell voltage.
  • the third transistor and the fourth transistor are P-type metal oxide semiconductors.
  • a sampling circuit for a battery cell of a series battery pack is provided.
  • the utility model comprises: a controller, an ADC with communication isolation, a battery group consisting of n single cells connected in series, n first isolation sampling switches and n second isolation sampling switches.
  • One ends of the n first isolated sampling switches are connected to the first input end of the communication-isolated ADC, and the other ends of the n first isolated sampling switches are respectively connected to the positive ends of the n single cells
  • the first isolated sampling switch is in one-to-one correspondence with the single battery, and one end of the n second isolated sampling switches is connected to the second input end of the ADC with communication isolation, the n second The other end of the isolated sampling switch is respectively connected to the negative poles of the n single cells, and the second isolated sampling switch is connected to the single battery
  • an output end of the ADC with communication isolation is connected to an input end of the controller, and a first output group of the controller and a control end of the n first isolation sampling switches and n first a control terminal connection of the two isolated sampling switches for controlling opening or closing of the n isolated sampling
  • the first isolated sampling switch and the second isolated sampling switch can make the required measured cell voltages be connected to the positive and negative common nodes, and then converted by the ADC with communication isolation and transmitted to the controller, which can realize the pair High-precision differential sampling of the body battery voltage.
  • the method further includes: an auxiliary driving power source.
  • Any one of the n first isolated sampling switches and the n second isolated sampling switches includes a first transistor, a second transistor, a photocoupler, a first port of the first transistor and the a first port of the second transistor is connected, a second port of the first transistor is connected to a first port of the photocoupler, and a third port of the first transistor is connected to an anode of a corresponding single cell thereof.
  • a second port of the second transistor is coupled to the first port of the photocoupler, a third port of the second transistor is coupled to a first input of the voltage divider circuit, and a second of the optocoupler A port is co-located with the controller, a third port of the optocoupler is coupled to a first output group of the controller, and a fourth port of the optocoupler is coupled to an anode of the auxiliary drive power source.
  • a negative electrode of the auxiliary driving power source is coupled to a second input terminal of the ADC.
  • the first transistor and the second transistor are N-type metal oxide semiconductors.
  • any one of the n first isolation sampling switches and the n second isolation sampling switches includes a third transistor, a four-transistor, a photocoupler, a first port of the third transistor is connected to a first port of the fourth transistor, and a second port of the third transistor is connected to a fourth port of the photocoupler
  • the third port of the third transistor is connected to the anode of the corresponding single cell
  • the second port of the fourth transistor is connected to the fourth port of the photocoupler
  • the third port of the fourth transistor is a first input end of the voltage dividing circuit is connected
  • a first port of the photocoupler is connected to a negative pole of a corresponding single cell
  • a second port of the photocoupler is shared with the controller
  • the photoelectric A third port of the coupler is coupled to the first output set of the controller.
  • the first transistor and the second transistor are P-type metal oxide semiconductors.
  • an equalization circuit for a series battery cell is provided.
  • the sampling circuit applied to any one of the foregoing first aspect or the second aspect, comprising: a controller, a battery group consisting of n single cells connected in series, n equalization switches, and n equalizing resistors, wherein Any one of the single cells is connected in series with an equalization switch and an equalization resistor, and the second output group of the controller is respectively connected to the control ends of the n equalization switches for controlling the n equalization switches Turning on or off, the controller controls the equalization switch connection of the single cells that need to be balanced according to the preset battery equalization algorithm according to the sampling voltage value of each single battery collected by the sampling circuit, so that the balance that needs to be balanced The electrical energy of the body battery is released through the equalization resistor.
  • any one of the n equalization switches includes a fifth transistor, a second photocoupler, and a first resistor, the fifth transistor a first port via the first resistor and a first port of the second photocoupler, a second port of the fifth transistor and the second light a first port of the electrical coupler is connected, a third port of the fifth transistor is connected to a fourth port of the second photocoupler via the equalization resistor, and a first port of the second photocoupler corresponds thereto a cathode connection of the unit cell, a second port of the second photocoupler being grounded, a third port of the second photocoupler being coupled to a second output group of the controller, the second optocoupler
  • the fourth port of the device is connected to the anode of its corresponding single cell.
  • the fifth transistor is an N-type metal oxide semiconductor.
  • any one of the n equalization switches includes a sixth transistor, a second photocoupler, and a second resistor, the sixth transistor a first port is connected to a first port of the second photocoupler via the second resistor, and a second port of the sixth transistor is connected to a first port of the second photocoupler, the sixth a third port of the transistor is connected to a fourth port of the second photocoupler via the equalization resistor, and a first port of the second photocoupler is connected to a positive electrode of a corresponding single cell thereof, the second photoelectric a second port of the coupler is grounded, a third port of the second photocoupler is coupled to a second output group of the controller, a fourth port of the second photocoupler and a cathode of its corresponding single cell connection.
  • the sixth transistor is a P-type metal oxide semiconductor.
  • a sampling equalization system for a battery cell of a series battery pack is provided.
  • the controller is configured according to the voltage value of each single cell collected by the sampling circuit According to the preset battery equalization algorithm, the equalization control is performed on the single cells that need to be balanced.
  • FIG. 1 is a schematic structural diagram of a sampling circuit of a single battery of a series battery according to an embodiment of the present invention
  • FIG. 2 is a schematic structural diagram of a sampling circuit of a single battery of a series battery according to an embodiment of the present invention
  • FIG. 3 is a schematic structural diagram of an isolated sampling switch according to an embodiment of the present invention.
  • FIG. 4 is a schematic structural diagram of another isolation sampling switch according to an embodiment of the present invention.
  • FIG. 5 is a schematic structural diagram of another sampling circuit of a battery cell connected in series according to an embodiment of the present invention.
  • FIG. 6 is a schematic structural diagram of an equalization circuit of a battery cell of a series battery pack according to an embodiment of the present invention
  • FIG. 7 is a schematic structural diagram of an equalization switch according to an embodiment of the present disclosure.
  • FIG. 8 is a schematic structural diagram of another equalization switch according to an embodiment of the present disclosure.
  • FIG. 9 is a schematic structural diagram of a sampling equalization system for a battery cell of a series battery pack according to an embodiment of the present invention.
  • FIG. 10 is a schematic structural diagram of a sampling equalization system for a battery cell of a series battery pack according to an embodiment of the present invention
  • FIG. 11 is a schematic structural diagram of a sampling equalization system for a single battery of a series battery according to an embodiment of the present invention.
  • FIG. 12 is a schematic structural diagram of a sampling equalization system for a battery cell of a series battery pack according to an embodiment of the present invention
  • FIG. 13 is a schematic structural diagram of a sampling equalization system for a single battery of a series battery according to an embodiment of the present invention.
  • FIG. 1 exemplarily shows the structure of a sampling circuit of a serial battery unit battery provided by an embodiment of the present invention.
  • the sampling circuit can realize the collection of the positive-to-ground voltage of the single cells in the battery.
  • the sampling method in the embodiment of the present invention is a common mode partial pressure sampling method.
  • the acquisition circuit may include: a controller 101, an ADC 102, a voltage dividing circuit 103, and n single
  • the battery cells 104 are connected in series with the body batteries and n isolated sampling switches 105.
  • One end of the isolated sampling switch 105 is connected to the first input end of the voltage dividing circuit 103, and the other end of the isolated sampling switch 105 is respectively connected to the positive electrode of each single cell, and is isolated and sampled.
  • the switch 105 has a one-to-one correspondence with the single cells.
  • the negative electrode of the first single cell is connected to the second input terminal of the voltage dividing circuit 103 and grounded.
  • the output of voltage divider circuit 103 is coupled to a second input of ADC 102, the first input of ADC 102 is coupled to ground, and the output of ADC 102 is coupled to the input of controller 101.
  • the first output group of the controller 101 is respectively connected to the control ends of the n isolated sampling switches 105 for controlling the opening or closing of the n isolated sampling switches 105, and the controller 101 sequentially controls the closing of the n isolated sampling switches 105, and
  • the positive-to-ground voltages of the n individual cells corresponding to the n isolated sampling switches 105 are attenuated by the voltage dividing circuit and sent to the ADC 102 for conversion, and the ADC 102 transmits the converted sampling voltage value to the controller 101 for control.
  • the device 101 subtracts the values of the adjacent two sampling voltages to obtain the voltage values of the corresponding single cells.
  • the sampling circuit isolates the single cell from the voltage dividing resistor in the voltage dividing circuit through the isolation sampling switch to prevent leakage current when the single battery is not sampled, due to the sampling error existing in the adjacent two sampling voltage values. Basically the same, the sampling error is eliminated in the process of subtracting the adjacent two sampling voltages, thereby improving the accuracy of the sampling voltage of the single cell.
  • Fig. 2 exemplarily shows the structure of a voltage dividing circuit which, as shown in Fig. 2, may include a first voltage dividing resistor and a second voltage dividing resistor. One end of the first voltage dividing resistor is connected to the n isolated sampling switches, the other end is connected to the second input end of the ADC 102, and one end of the second voltage dividing resistor and the negative pole of the first single cell of the n single cells The other end is connected to the second input of the ADC 102.
  • an embodiment of the present invention provides an isolated sampling switch composed of a negative channel-metal-oxide-semiconductor (NMOS) and a photocoupler, in order to sample the isolation.
  • the switch is powered, and the sampling circuit further includes an auxiliary driving power source.
  • both the first transistor and the second transistor are N-type metal oxide semiconductors.
  • any one of the n isolated sampling switches includes a first transistor, a second transistor, and a photocoupler.
  • the first port of the first transistor is connected to the first port of the second transistor, the second port of the first transistor is connected to the first port of the photocoupler, and the third port of the first transistor is connected to the positive terminal of the corresponding single cell .
  • a second port of the second transistor is coupled to the first port of the photocoupler, a third port of the second transistor is coupled to the first input of the voltage divider circuit, and a second port of the photocoupler is coupled to the controller, optocoupler
  • the third port of the device is connected to the first output group of the controller, the fourth port of the photocoupler is connected to the positive terminal of the auxiliary driving power source, and the negative electrode of the auxiliary driving power source is connected to the first input end of the voltage dividing circuit.
  • the first port S of the first transistor of the isolation sampling switch is connected to the first port S of the second transistor, the second port G of the first transistor and the first port of the photocoupler E is connected, and the third port D of the first transistor is connected to the positive terminal V+ of its corresponding single cell.
  • the second port G of the second transistor is connected to the first port E of the photocoupler, the third port D of the second transistor is connected to the first input terminal SW_COM of the voltage dividing circuit, and the second port N of the photocoupler and the controller
  • the third port P of the photocoupler is connected to the first output group of the controller
  • the fourth port C of the photocoupler is connected to the positive DRV_VCC of the auxiliary driving power source, and the first of the negative driving and voltage dividing circuits of the auxiliary driving power supply
  • the input terminal SW_COM is connected.
  • the sampling circuit can isolate the single-cell battery from the voltage dividing resistor in the voltage dividing circuit through an isolated sampling switch composed of two NMOS and photocouplers to prevent leakage current when the corresponding single battery is not sampled.
  • the embodiment of the present invention further provides another P-type metal oxide semiconductor (positive channel- An isolation sampling switch composed of a metal-oxide-semiconductor (PMOS) and a photocoupler, in the embodiment of the invention, the third transistor and the fourth transistor are both PMOS.
  • PMOS metal-oxide-semiconductor
  • the isolated sampling switch can include a third transistor, a fourth transistor, and a photocoupler.
  • the first port of the third transistor is coupled to the first port of the fourth transistor
  • the second port of the third transistor is coupled to the fourth port of the photocoupler
  • the third port of the third transistor is associated with the corresponding single cell
  • the positive electrode is connected
  • the second port of the fourth transistor is connected to the fourth port of the photocoupler
  • the third port of the fourth transistor is connected to the first input end of the voltage dividing circuit
  • the negative terminal of the battery is connected
  • the second port of the photocoupler is common to the controller
  • the third port of the photocoupler is connected to the first output group of the controller.
  • the first port S of the third transistor of the isolation sampling switch is connected to the first port S of the fourth transistor, the second port G of the third transistor and the fourth port of the photocoupler C is connected, the third port D of the third transistor is connected to the positive V+ of the corresponding single cell, the second port G of the fourth transistor is connected to the fourth port C of the photocoupler, and the third port D of the fourth transistor is The first input terminal SW_COM of the voltage dividing circuit is connected, the first port E of the photocoupler is connected to the negative electrode V_ of the corresponding single cell, the second port N of the photocoupler is common to the controller, and the photocoupler is The three port P is connected to the first output group of the controller.
  • the sampling circuit can isolate the single-cell battery from the voltage dividing resistor in the voltage dividing circuit through an isolated sampling switch composed of two PMOS and photocouplers to prevent leakage current when the corresponding single battery is not sampled.
  • FIG. 5 exemplarily shows the structure of a sampling circuit of a series battery unit battery provided by an embodiment of the present invention.
  • the sampling circuit can implement the isolated sampling of the single cells in the series battery.
  • the sampling method provided by the embodiment of the present invention is a differential mode sampling method.
  • the sampling circuit includes: a controller 101, an ADC 102 with communication isolation, a battery pack 104 composed of n single cells connected in series, n first isolated sampling switches 105, and n second isolated samplings. Switch 106.
  • One end of the n first isolated sampling switches 105 is connected to the first input end of the ADC 102 with communication isolation, and the other ends of the n first isolated sampling switches 105 are respectively connected to the positive poles of the n single cells, first The isolating sampling switch 105 is in one-to-one correspondence with the single cells, one end of the n second isolated sampling switches 106 is connected to the second input end of the ADC 102 with communication isolation, and the other ends of the n second isolated sampling switches 106 are respectively The negative electrodes of the single cells are connected, and the second isolated sampling switch 106 is in one-to-one correspondence with the single cells.
  • the output of the ADC 102 with communication isolation is coupled to the input of the controller 101.
  • the first output group of the controller 101 is respectively connected to the control ends of the n first isolated sampling switches 105 and the control ends of the n second isolated sampling switches for controlling the opening or closing of the n isolated sampling switches, and the controller 101
  • the first isolation sampling switch 105 and the second isolation sampling switch 106 connected to each of the single cells are sequentially controlled to be closed, and the voltage of each single battery can be sequentially sent to the ADC 102 with communication isolation for conversion, and after the ADC 102 is converted.
  • the sampled voltage value of each of the individual cells is isolated and transmitted to the controller.
  • an embodiment of the present invention provides an isolated sampling switch composed of an NMOS and a photocoupler.
  • the sampling circuit further includes an auxiliary driving power supply for supplying power to the isolated sampling switch.
  • the first transistor and the second transistor may both be N-type metal-oxide-semiconductor field-effect transistors (MOSFETs).
  • any one of the n first isolation sampling switches and the n second isolation sampling switches includes a first transistor, a second transistor, and a photocoupler.
  • the first port of the first transistor is connected to the first port of the second transistor, the second port of the first transistor is connected to the first port of the photocoupler, and the third port of the first transistor is connected to the positive terminal of the corresponding single cell a second port of the second transistor is coupled to the first port of the photocoupler, a third port of the second transistor is coupled to the first input of the voltage divider circuit, and a second port of the photocoupler is co-located with the controller
  • the third port of the photocoupler is connected to the first output group of the controller, and the fourth port of the photocoupler is connected to the positive terminal of the auxiliary driving power source.
  • the negative terminal of the auxiliary drive power supply is connected to the second input of the ADC.
  • isolation sampling switch can be as shown in FIG. 3, and the specific connection relationship has been described in the above embodiments, and details are not described herein again.
  • the embodiment of the present invention further provides an isolated sampling switch composed of a PMOS and a photocoupler.
  • the third transistor and the fourth transistor are both PMOS.
  • the isolated sampling switch may include a third transistor, a fourth transistor, a photocoupler, and a first port of the third transistor
  • the first port of the fourth transistor is connected, the second port of the third transistor is connected to the fourth port of the photocoupler, the third port of the third transistor is connected to the anode of the corresponding single cell, and the second port of the fourth transistor Connected to the fourth port of the photocoupler, the third port of the fourth transistor is connected to the first input end of the voltage dividing circuit, the first port of the photocoupler is connected to the negative electrode of the corresponding single cell, and the photocoupler is connected
  • the two ports are co-located with the controller, and the third port of the optocoupler is coupled to the first output group of the controller.
  • isolation sampling switch can be as shown in FIG. 4, and the specific connection relationship has been described in the above embodiments, and details are not described herein again.
  • FIG. 6 exemplarily shows an equalization circuit of the battery cells of the series battery.
  • the equalization circuit can be controlled so that the voltages of the individual cells tend to be uniform.
  • the equalization circuit may include: a controller 101, a battery pack 104 composed of n single cells connected in series, n equalization switches 107, and n equalization resistors 108, any one of n single cells.
  • the body battery is connected in series with an equalization switch 107 and an equalization resistor 108.
  • the second output group of the controller 101 is respectively connected to the control ends of the n equalization switches 107 for controlling the opening or closing of the n equalization switches, and the controller 101 is based on the sampling voltage values of the individual cells collected by the sampling circuit.
  • the preset battery equalization algorithm controls the equalization switch 107 of the unit cells that need to be balanced, so that the power of the unit cells that need to be balanced is released through the equalization resistor 108.
  • the equalization switch may include a fifth transistor and a second photocoupler and a first resistor, and the fifth transistor may be an NMOS.
  • the first port of the fifth transistor of the equalization switch is connected to the first port of the second photocoupler via the first resistor, and the second port and the second photocoupler of the fifth transistor
  • the first port is connected
  • the third port of the fifth transistor is connected to the fourth port of the second photocoupler via the equalization resistor
  • the first port of the second photocoupler is connected to the negative terminal of the corresponding single cell
  • the second photoelectric The second port of the coupler is grounded
  • the third port of the second photocoupler is coupled to the second output group of the controller
  • the fourth port of the second photocoupler is coupled to the anode of its corresponding single cell.
  • the structure of the equalization switch shown in FIG. 7 is that the first port S of the fifth transistor of the equalization switch is connected to the first port E of the second photocoupler via the first resistor, and the second port G and the second port of the fifth transistor.
  • the first port E of the photocoupler is connected
  • the third port D of the fifth transistor is connected to the fourth port C of the second photocoupler via the equalization resistor, and the first port E of the second photocoupler and its corresponding single cell
  • the negative electrode is connected, the second port N of the second photocoupler is grounded, the third port P of the second photocoupler is connected to the second output group BALA_CELL of the controller, and the fourth port C of the second photocoupler is corresponding thereto
  • the positive electrode of the single cell is connected.
  • the embodiment of the present invention further provides an equalization switch composed of a PMOS and a photocoupler and a second resistor.
  • the sixth transistor is a PMOS.
  • the equalization switch includes a sixth transistor, a second photocoupler, and a second resistor, the first port of the sixth transistor being first coupled to the second photocoupler via the second resistor a port, a second port of the sixth transistor is connected to the first port of the second photocoupler, and a third port of the sixth transistor is connected to the fourth port of the second photocoupler via the equalization resistor, the second photocoupler One port is connected to the anode of its corresponding single cell, the second port of the second photocoupler is grounded, the third port of the second photocoupler is connected to the second output group of the controller, and the fourth of the second photocoupler The port is connected to the negative pole of its corresponding single battery.
  • the first port S of the sixth transistor of the equalization switch is connected to the first port E of the second photocoupler via the second resistor, and the second port G and the second port of the sixth transistor
  • the first port E of the photocoupler is connected
  • the third port D of the sixth transistor is connected to the fourth port C of the second photocoupler via the equalization resistor
  • the first port E of the second photocoupler and its corresponding single cell The positive terminal is connected, the second port N of the second photocoupler is grounded, the third port P of the second photocoupler is connected to the second output group BALA_CELL of the controller, and the fourth port C of the second photocoupler corresponds thereto
  • the negative electrode of the single cell is connected.
  • the equalization circuit shown in FIG. 6 above can be applied to the sampling circuit shown in FIG. 1 or FIG. 5 described above, and constitutes a sampling equalization system of a series battery unit battery as shown in FIG. 9. structure.
  • the controller performs equalization control on the single cells that need to be balanced according to the preset battery equalization algorithm according to the voltage values of the individual cells collected by the sampling circuit.
  • the positive poles of each of the unit cells (C1, C2, ..., Cn) in the series battery pack in the sampling circuit are respectively connected to one end of a sampling switch (Ks.1, Ks.2...Ks.n), and sampled.
  • the other ends of the switch are all connected together, and then connected to the resistor divider network formed by Rs.2 and Rs.1.
  • the sampling switches are sequentially closed (only one sampling switch is allowed to be closed at a time)
  • the positive pole to the battery pack's reference ground ie, the negative pole of C1 will be applied to the resistor divider network, attenuated by the voltage divider network and sent to the A/D converter, which will be controlled by the microcontroller unit (MCU).
  • MCU microcontroller unit
  • the adjacent two sample values are subtracted to obtain the voltage value of the corresponding single cell.
  • the sampling voltage obtained when the Ks.n switch is closed is Un
  • the sampling voltage obtained when the Ks.n-1 switch is closed is Un-1
  • the actual voltage value of the single battery Cn is Un-(Un-1).
  • the technical solution of the present invention is essentially a common mode voltage division sampling scheme, but due to the uniqueness of the resistor divider network and the sampling channel, the conventional common mode voltage division scheme is overcome due to the resistor divider network and the sampling channel.
  • the adjacent two common mode sampling errors of the scheme are basically the same. In the two voltage subtraction processes, the common mode error is eliminated, which greatly improves the accuracy of the single cell voltage sampling. It can achieve the precision effect close to the differential mode sampling method.
  • an equalization circuit composed of a resistor and a switch (Kb.1, Kb.2, ... Kb.n) connected in series is connected in parallel, and the MCU obtains each monomer in the battery pack through the above sampling circuit.
  • the voltage of the battery according to a certain battery equalization management algorithm, closes the equalization switch of the single cell that needs to start the equalization discharge to control the voltage of all the single cells to be consistent.
  • An isolated sampling switch unit composed of an NMOS, an auxiliary driving power supply, and a photocoupler for implementing a low-cost sampling switch Ks, including two N-type MOSFET tubes, whose source S is connected, the gate G is connected, and one tube is The drain D is connected to the anode of the single cell, and the drain D of the other tube is connected to the common terminal.
  • the common terminal is connected to the voltage dividing resistor network, an auxiliary driving power source, and the negative electrode is connected to the common terminal.
  • the CPU controls the auxiliary driving power supply and the gate G of the two N-type MOSFETs through the isolation optocoupler to control the opening of the isolated sampling switch unit composed of two NMOS transistors. And shutting down.
  • the isolated controllable sampling electronic switch unit composed of PMOS and optocoupler has the same principle as the NMOS. The difference is that the PMOS can directly use the voltage of the single battery to realize the opening and closing of the switch without the auxiliary power supply.
  • An isolated controllable battery equalization circuit unit composed of a resistor, an NMOS or a PMOS and an optocoupler, wherein the gate drive power of the NMOS or PMOS is derived from the corresponding cell voltage, and the MCU can control the turn-on and turn-on of the NMOS or PMOS through the isolation optocoupler.
  • the switch When the switch is turned on, the single cell will discharge through the paralleled resistor and MOSFET to achieve battery equalization.
  • FIG. 10 and FIG. 11 respectively show the structure of a sampling equalization system of a series battery cell of a common mode voltage division method, wherein the transistor of the equalization switch in the sampling equalization system shown in FIG. 10 uses an NMOS, isolated sampling.
  • the transistor in the switch uses an NMOS
  • the transistor of the equalization switch uses an NMOS
  • the transistor in the isolation sampling switch uses a PMOS.
  • the transistors in the sampling equalization system may be PMOS
  • the transistors in the isolated sampling switch use NMOS or the equalization switch transistors use PMOS
  • the transistors in the isolated sampling switch use PMOS.
  • an NMOS, an auxiliary driving power supply and an optocoupler constitute an isolated controllable sampling electronic switching unit
  • an NMOS and an optocoupler constitute an isolated controllable battery equalization switching unit.
  • a voltage dividing network composed of two resistors, and an A/D sampling circuit and an MCU unit, wherein: one end of the sampling electronic switching unit (the D pole of the NMOS) is connected to the anode of the single cell, and the other end (the other NMOS D pole) is connected to the common end, and the common end is connected to the voltage dividing resistor network, and all sampling electronic switch units share an auxiliary driving power source, and the negative pole of the driving power source is connected to the common end, and the positive pole is respectively coupled with the optocoupler of the corresponding sampling electronic switch unit.
  • the collector C is connected, and the MCU can control the auxiliary driving power source to be turned on and off to the gate G of the corresponding sampling electronic switch through the isolation optocoupler to realize the closing or opening of the sampling electronic switching unit.
  • the MCU turns on the sampling switch in turn, and can sample the common mode voltage value of the positive electrode of each single cell relative to the common ground of the battery, and the adjacent two sampled values are subtracted to obtain the voltage value of the corresponding single cell. Due to the uniqueness of the sampling channel, the common mode sampling error is eliminated in the process of subtraction, and the sampling accuracy of the single cell is close to the precision of the differential sampling.
  • the MCU activates the corresponding balanced electronic switch unit for the battery with high cell voltage through a certain battery management algorithm, so that all the cell voltages tend to be consistent.
  • FIG. 12 and FIG. 13 respectively show the structure of a sampling equalization system of a series battery cell of a differential mode sampling method, wherein the transistor of the equalization switch in the sampling equalization system shown in FIG. 12 uses a PMOS, an isolated sampling switch.
  • the transistor in the transistor uses an NMOS
  • the transistor of the equalization switch uses a PMOS
  • the transistor in the isolation sampling switch uses a PMOS.
  • the transistors in the sampling equalization system may be NMOS
  • the transistors in the isolated sampling switch use NMOS or the equalization switch transistors use NMOS
  • the transistors in the isolated sampling switch use PMOS.
  • the anodes of all the single cells are connected to the positive common terminal (CELL_P_COM) through an isolated controllable electronic switching unit composed of NMOS, and the negative electrodes of all the single cells are separated by an NMOS.
  • the control electronic switch unit is connected to the negative common terminal (CELL_N_COM), two auxiliary driving power sources, the negative poles of which are respectively connected to the positive common terminal and the negative common terminal, and the positive poles thereof are connected to the corresponding switching unit gate G through the isolation optocouplers.
  • the positive common terminal and the negative common terminal are respectively connected to the positive and negative of the A/D sampling circuit.
  • the MCU controls the positive and negative sampling electronic switch units of the corresponding single cells at the same time, the voltage of the single battery will be It is sent directly to the A/D sampling circuit, which enables high-precision differential sampling of the individual cell voltages.
  • the A/D sampling circuit sends the sampling result to the MCU through isolated communication, and then the MCU controls the equalization electronic switch to achieve the cell voltage equalization.
  • the common mode voltage sampling method described in the present invention can be used to obtain the equivalent of a professional battery tube.
  • the sampling accuracy of the chip and the differential mode sampling method, and the cost is greatly reduced, and the cost performance of the solution is high.
  • the isolated controllable electronic switch is composed of MOS tube and optocoupler, which are mature devices in the industry. Compared with special chips, mechanical relays and solid state relays, the reliability is high and the cost advantage is large;
  • the voltage sampling and equalization circuit of the single-cell battery pack of the discrete device is flexible in application configuration, and is not limited by the number of battery sections.
  • the voltage tolerance of the electronic switch is flexible, and there is no power-on timing and software configuration of the dedicated chip. , less additional cost and higher reliability;
  • the battery sampling accuracy is determined by the A/D chip, which is more selective than the dedicated chip A/D, and the entire A/D sampling channel can be further improved by digital calibration.

Abstract

一种串联电池组单体电池的采样电路、均衡电路及系统，包括：控制器、ADC、分压电路、由n个单体电池串联组成的电池组以及n个隔离采样开关。控制器依次控制n个隔离采样开关的闭合，将n个单体电池的正极对地的电压经过分压电路的衰减后送入所述ADC进行转换，ADC将转换后的采样电压值传输给所述控制器，控制器将相邻两次的采样电压值相减得到相应的单体电池的电压值。采样电路通过隔离采样开关将单体电池与分压电路中的分压电阻隔离，防止在不对该单体电池采样时出现漏电流的情况，由于相邻两次的采样电压值中存在的采样误差基本相同，在将相邻两次的采样电压相减的过程中将采样误差消除，提高了单体电池的采样电压的精度。

Description

一种串联电池组单体电池的采样电路、均衡电路及系统
本申请要求在2016年12月31日提交中华人民共和国知识产权局、申请号为201611265992.6、发明名称为“一种串联电池组单体电池的采样电路、均衡电路及系统”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本发明实施例涉及电池技术领域，特别涉及一种串联电池组单体电池的采样电路、均衡电路及系统。
背景技术
锂离子电池组一般由多节单体锂离子电池串并联构成，由于单体电池特性存在不一致性，为提高电池的使用性能，延长使用寿命以及充放电安全管理，需要采集单体电池的电压，在单体电池的电压存在差异情况下，需启动均衡电路针对单体电池进行充放电管理，从而使电池组中各单体电池的电压趋于一致。锂离子电池组单体电池电压采样精度一般要求在10mV以内，同时采样及均衡电路要求低漏电流(小于500uA)以确保电池存储时间。
目前，在对单体电池采样时，大部分采用共模分压法采样串联电池组的单体电压，这种采样方法电路简单，电池同处理器可工地，无需隔离通讯。但是由于电池组的单体电池一直与采样电阻连接，存在持续的漏电流，难以满足电池的存储时间要求。
发明内容
本发明实施例提供一种串联电池组单体电池的采样电路、均衡电路及系统，用以实现在不对单体电池采样时，隔离单体电池与采样电阻的连接，防止出现单体电池的漏电流的情况。
第一方面，提供一种串联电池组单体电池的采样电路。
包括：控制器、模数转换器(analog-to-digital converter，ADC)、分压电路、由n个单体电池串联组成的电池组以及n个隔离采样开关，所述n个隔离采样开关的一端与所述分压电路的第一输入端连接，所述n个隔离采样开关的另一端分别与所述n个单体电池的正极连接，所述隔离采样开关与所述单体电池一一对应，所述n个单体电池中的第1个单体电池的负极与所述分压电路的第二输入端连接并接地，所述分压电路的输出端与所述ADC的第二输入端连接，所述ADC的第一输入端接地，所述ADC的输出端与所述控制器的输入端连接，所述控制器的第一输出组分别与所述n个隔离采样开关的控制端连接，用于控制所述n个隔离采样开关的打开或闭合，所述控制器依次控制所述n个隔离采样开关的闭合，与所述n个隔离采样开关所对应的n个单体电池的正极对地的电压经过所述分压电路的衰减后送入所述ADC进行转换；所述ADC将转换后的采样电压值传输给所述控制器；所述控制器将相邻两次的采样电压值相减得到相应的单体电池的电压值。
通过第一隔离采样开关将单体电池与分压电路中的分压电阻进行隔离，可以防止出现单体电池的漏电流的情况，并且采样电路的采集的采样电压中的采样误差可以在差分计算中相互抵消，提高了单体电池电压的采样精度。
结合第一方面，在第一方面的第一种可能的实现方式中，所述分压电路包括第一分压电阻和第二分压电阻。所述第一分压电阻的一端与所述n个隔离采样开关连接，另一端与所述ADC的第二输入端连接，所述第二分压电阻的一端与所述n个单体电池中的第1个单体电池的负极连接，另一端与所述ADC的第二输入端连接。
通过分压电路中的第一分压电阻和第二分压电阻可以对单体电池的正极对地电压进行衰减处理。
结合第一方面或第一方面的第一种可能的实现方式，在第一方面的第二种可能的实现方式中，还包括：辅助驱动电源。所述n个隔离采样开关中任一隔离采样开关包括第一晶体管、第二晶体管、光电耦合器。所述第一晶体管的第一端口与所述第二晶体管的第一端口连接，所述第一晶体管的第二端口与所述光电耦合器的第一端口连接，所述第一晶体管的第三端口与其对应的单体电池的正极连接。所述第二晶体管的第二端口与所述光电耦合器的第一端口连接，所述第二晶体管的第三端口与所述分压电路的第一输入端连接，所述光电耦合器的第二端口与所述控制器共地，所述光电耦合器的第三端口与所述控制器的第一输出组连接，所述光电耦合器的第四端口与所述辅助驱动电源的正极连接，所述辅助驱动电源的负极与所述分压电路的第一输入端连接。
通过第一隔离采样开关中的第一晶体管和第二晶体可以将单体电池与分压电路中的分压电阻进行隔离，防止出现单体电池的漏电流的情况，并且采样电路的采集的采样电压中的采样误差可以在差分计算中相互抵消，提高了单体电池电压的采样精度。
结合第一方面或第一方面的第二种可能的实现方式，在第一方面的第三种可能的实现方式中，所述第一晶体管和所述第二晶体管为N型金属氧化物半导体。
结合第一方面或第一方面的第一种可能的实现方式，在第一方面的第四种可能的实现方式中，所述n个隔离采样开关中任一隔离采样开关包括第三晶体管、第四晶体管、光电耦合器，所述第三晶体管的第一端口与所述第四晶体管的第一端口连接，所述第三晶体管的第二端口与所述光电耦合器的第四端口连接，所述第三晶体管的第三端口与其对应的单体电池的正极连接，所述第四晶体管的第二端口与所述光电耦合器的第四端口连接，所述第四晶体管的第三端口与所述分压电路的第一输入端连接，所述光电耦合器的第一端口与其对应的单体电池的负极连接，所述光电耦合器的第二端口与所述控制器共地，所述光电耦合器的第三端口与所述控制器的第一输出组连接。
通过第一隔离采样开关中的第一晶体管和第二晶体可以将单体电池与分压电路中的分压电阻进行隔离，防止出现单体电池的漏电流的情况，并且采样电路的采集的采样电压中的采样误差可以在差分计算中相互抵消，提高了单体电池电压的采样精度。
结合第一方面或第一方面的第四种可能的实现方式，在第一方面的第五种可能的实现方式中，所述第三晶体管和所述第四晶体管为P型金属氧化物半导体。
第二方面，提供一种串联电池组单体电池的采样电路。
包括：控制器、带通信隔离的ADC、由n个单体电池串联组成的电池组、n个第一隔离采样开关和n个第二隔离采样开关。所述n个第一隔离采样开关的一端与所述带通信隔离的ADC的第一输入端连接，所述n个第一隔离采样开关的另一端分别与所述n个单体电池的正极连接，所述第一隔离采样开关与所述单体电池一一对应，所述n个第二隔离采样开关的一端与所述带通信隔离的ADC的第二输入端连接，所述n个第二隔离采样开关的另一端分别与所述n个单体电池的负极连接，所述第二隔离采样开关与所述单体电池一 一对应，所述带通信隔离的ADC的输出端与所述控制器的输入端连接，所述控制器的第一输出组分别与所述n个第一隔离采样开关的控制端以及n个第二隔离采样开关的控制端连接，用于控制所述n个隔离采样开关的打开或闭合，所述控制器依次控制每个单体电池连接的第一隔离采样开关和第二隔离采样开关的闭合，依次可以将每个单体电池的电压送入所述带通信隔离的ADC进行转换，所述ADC转换后的每个单体电池的采样电压值被隔离传输至所述控制器。
通过第一隔离采样开关和第二隔离采样开关可以使得所需测量的单体电池电压接通到正负极公共节点上，再由带通信隔离的ADC转换后传输至控制器，可以实现对单体电池电压的高精度差分采样。
结合第二方面，在第二方面的第一种可能的实现方式中，还包括：辅助驱动电源。所述n个第一隔离采样开关和所述n个第二隔离采样开关中任一隔离采样开关包括第一晶体管、第二晶体管、光电耦合器，所述第一晶体管的第一端口与所述第二晶体管的第一端口连接，所述第一晶体管的第二端口与所述光电耦合器的第一端口连接，所述第一晶体管的第三端口与其对应的单体电池的正极连接，所述第二晶体管的第二端口与所述光电耦合器的第一端口连接，所述第二晶体管的第三端口与所述分压电路的第一输入端连接，所述光电耦合器的第二端口与所述控制器共地，所述光电耦合器的第三端口与所述控制器的第一输出组连接，所述光电耦合器的第四端口与所述辅助驱动电源的正极连接。所述辅助驱动电源的负极与所述ADC的第二输入端连接。
结合第二方面或第二方面的第一种可能的实现方式，在第二方面的第二种可能的实现方式中，所述第一晶体管和所述第二晶体管为N型金属氧化物半导体。
结合第二方面，在第二方面的第三种可能的实现方式中，所述n个第一隔离采样开关和所述n个第二隔离采样开关中任一隔离采样开关包括第三晶体管、第四晶体管、光电耦合器，所述第三晶体管的第一端口与所述第四晶体管的第一端口连接，所述第三晶体管的第二端口与所述光电耦合器的第四端口连接，所述第三晶体管的第三端口与其对应的单体电池的正极连接，所述第四晶体管的第二端口与所述光电耦合器的第四端口连接，所述第四晶体管的第三端口与所述分压电路的第一输入端连接，所述光电耦合器的第一端口与其对应的单体电池的负极连接，所述光电耦合器的第二端口与所述控制器共地，所述光电耦合器的第三端口与所述控制器的第一输出组连接。
结合第二方面或第二方面的第三种可能的实现方式，在第二方面的第四种可能的实现方式中，所述第一晶体管和所述第二晶体管为P型金属氧化物半导体。
第三方面，提供一种串联电池组单体电池的均衡电路。
应用于上述第一方面或第二方面中任一实现方式中的采样电路，包括：控制器、由n个单体电池串联组成的电池组、n个均衡开关和n个均衡电阻，所述n个单体电池中任一单体电池串联一个均衡开关和一个均衡电阻，所述控制器的第二输出组分别与所述n个均衡开关的控制端连接，用于控制所述n个均衡开关的打开或闭合，所述控制器根据采样电路采集的各单体电池的采样电压值，依据预设的电池均衡算法，控制需要均衡的单体电池的均衡开关连接，使得所述需要均衡的单体电池的电能通过所述均衡电阻进行释放。
结合第三方面，在第三方面的第一种可能的实现方式中，所述n个均衡开关中任一均衡开关包括第五晶体管、第二光电耦合器和第一电阻，所述第五晶体管的第一端口经由所述第一电阻与所述第二光电耦合器的第一端口，所述第五晶体管的第二端口与所述第二光 电耦合器的第一端口连接，所述第五晶体管的第三端口经由所述均衡电阻与所述第二光电耦合器的第四端口连接，所述第二光电耦合器的第一端口与其对应的单体电池的负极连接，所述第二光电耦合器的第二端口接地，所述第二光电耦合器的第三端口与所述控制器的第二输出组连接，所述第二光电耦合器的第四端口与其对应的单体电池的正极连接。
结合第三方面或第三方面的第一种可能的实现方式，在第三方面的第二种可能的实现方式中，所述第五晶体管为N型金属氧化物半导体。
结合第三方面，在第三方面的第三种可能的实现方式中，所述n个均衡开关中任一均衡开关包括第六晶体管、第二光电耦合器和第二电阻，所述第六晶体管的第一端口经由所述第二电阻与所述第二光电耦合器的第一端口，所述第六晶体管的第二端口与所述第二光电耦合器的第一端口连接，所述第六晶体管的第三端口经由所述均衡电阻与所述第二光电耦合器的第四端口连接，所述第二光电耦合器的第一端口与其对应的单体电池的正极连接，所述第二光电耦合器的第二端口接地，所述第二光电耦合器的第三端口与所述控制器的第二输出组连接，所述第二光电耦合器的第四端口与其对应的单体电池的负极连接。
结合第三方面或第三方面的第三种可能的实现方式，在第三方面的第四种可能的实现方式中，所述第六晶体管为P型金属氧化物半导体。
第四方面，提供一种串联电池组单体电池的采样均衡系统。
包括上述第一方面或第二方面中任一实现方式中的采样电路和第三方面中任一实现方式中的均衡电路，所述控制器根据所述采样电路采集的各单体电池的电压值，依据预设的电池均衡算法，对需要均衡的单体电池进行均衡控制。
附图说明
图1为本发明实施例提供的一种串联电池组单体电池的采样电路的结构示意图；
图2为本发明实施例提供的一种串联电池组单体电池的采样电路的结构示意图；
图3为本发明实施例提供的一种隔离采样开关的结构示意图；
图4为本发明实施例提供的另一种隔离采样开关的结构示意图；
图5为本发明实施例提供的另一种串联电池组单体电池的采样电路的结构示意图；
图6为本发明实施例提供的一种串联电池组单体电池的均衡电路的结构示意图；
图7为本发明实施例提供的一种均衡开关的结构示意图；
图8为本发明实施例提供的另一种均衡开关的结构示意图；
图9为本发明实施例提供的一种串联电池组单体电池的采样均衡系统的结构示意图；
图10为本发明实施例提供的一种串联电池组单体电池的采样均衡系统的结构示意图；
图11为本发明实施例提供的一种串联电池组单体电池的采样均衡系统的结构示意图；
图12为本发明实施例提供的一种串联电池组单体电池的采样均衡系统的结构示意图；
图13为本发明实施例提供的一种串联电池组单体电池的采样均衡系统的结构示意图。
具体实施方式
图1示例性的示出了本发明实施例提供的一种串联电池组单体电池的采样电路的结构。该采样电路可以实现对电池组内单体电池的正极对地电压的采集，本发明实施例中的采样方法为共模分压采样法。
如图1所示，该采集电路可以包括：控制器101、ADC 102、分压电路103、由n个单 体电池串联组成的电池组104以及n个隔离采样开关105。
其中，该n个隔离采样开关105中任一个隔离采样开关105的一端与分压电路103的第一输入端连接，隔离采样开关105的另一端分别与每个单体电池的正极连接，隔离采样开关105与单体电池是一一对应的。在n个单体电池中，第1个单体电池的负极与分压电路103的第二输入端连接并接地。分压电路103的输出端与ADC 102的第二输入端连接，ADC 102的第一输入端接地，ADC 102的输出端与控制器101的输入端连接。控制器101的第一输出组分别与n个隔离采样开关105的控制端连接，用于控制n个隔离采样开关105的打开或闭合，控制器101依次控制n个隔离采样开关105的闭合，与n个隔离采样开关105所对应的n个单体电池的正极对地的电压经过分压电路的衰减后送入ADC 102进行转换，ADC 102将转换后的采样电压值传输给控制器101，控制器101将相邻两次的采样电压值相减得到相应的单体电池的电压值。
采样电路通过隔离采样开关将单体电池与分压电路中的分压电阻隔离，防止在不对该单体电池采样时出现漏电流的情况，由于相邻两次的采样电压值中存在的采样误差基本相同，在将相邻两次的采样电压相减的过程中将采样误差消除，提高了单体电池的采样电压的精度。
图2示例性的示出了一种分压电路的结构，如图2所示，该分压电路可以包括第一分压电阻和第二分压电阻。第一分压电阻的一端与n个隔离采样开关连接，另一端与ADC 102的第二输入端连接，第二分压电阻的一端与n个单体电池中的第1个单体电池的负极连接，另一端与ADC 102的第二输入端连接。
为了实现隔离采样开关的隔离功能，本发明实施例提供一种由N型金属氧化物半导体(negative channel-metal-oxide-semiconductor，NMOS)和光电耦合器组成的隔离采样开关，为了给该隔离采样开关供电，该采样电路还包括辅助驱动电源。在本发明实施例中第一晶体管和第二晶体管都为N型金属氧化物半导体。
具体的，上述n个隔离采样开关中任一隔离采样开关包括第一晶体管、第二晶体管、光电耦合器。第一晶体管的第一端口与第二晶体管的第一端口连接，第一晶体管的第二端口与光电耦合器的第一端口连接，第一晶体管的第三端口与其对应的单体电池的正极连接。第二晶体管的第二端口与光电耦合器的第一端口连接，第二晶体管的第三端口与分压电路的第一输入端连接，光电耦合器的第二端口与控制器共地，光电耦合器的第三端口与控制器的第一输出组连接，光电耦合器的第四端口与辅助驱动电源的正极连接，辅助驱动电源的负极与分压电路的第一输入端连接。
如图3所示的隔离采样开关，该隔离采样开关的第一晶体管的第一端口S与第二晶体管的第一端口S连接，第一晶体管的第二端口G与光电耦合器的第一端口E连接，第一晶体管的第三端口D与其对应的单体电池的正极V+连接。第二晶体管的第二端口G与光电耦合器的第一端口E连接，第二晶体管的第三端口D与分压电路的第一输入端SW_COM连接，光电耦合器的第二端口N与控制器共地，光电耦合器的第三端口P与控制器的第一输出组连接，光电耦合器的第四端口C与辅助驱动电源的正极DRV_VCC连接，辅助驱动电源的负极与分压电路的第一输入端SW_COM连接。
采样电路通过两个NMOS和光电耦合器组成的隔离采样开关可以实现将单体电池与分压电路中的分压电阻隔离，防止在不对其对应的单体电池采样时出现漏电流的情况。
相应地，本发明实施例还提供了另一种由P型金属氧化物半导体(positive channel- metal-oxide-semiconductor，PMOS)和光电耦合器组成的隔离采样开关，在本发明实施例中，第三晶体管和第四晶体管都为PMOS。
该隔离采样开关可以包括第三晶体管、第四晶体管、光电耦合器。其中，第三晶体管的第一端口与第四晶体管的第一端口连接，第三晶体管的第二端口与光电耦合器的第四端口连接，第三晶体管的第三端口与其对应的单体电池的正极连接，第四晶体管的第二端口与光电耦合器的第四端口连接，第四晶体管的第三端口与分压电路的第一输入端连接，光电耦合器的第一端口与其对应的单体电池的负极连接，光电耦合器的第二端口与控制器共地，光电耦合器的第三端口与控制器的第一输出组连接。
如图4所示的隔离采样开关，该隔离采样开关的第三晶体管的第一端口S与第四晶体管的第一端口S连接，第三晶体管的第二端口G与光电耦合器的第四端口C连接，第三晶体管的第三端口D与其对应的单体电池的正极V+连接，第四晶体管的第二端口G与光电耦合器的第四端口C连接，第四晶体管的第三端口D与分压电路的第一输入端SW_COM连接，光电耦合器的第一端口E与其对应的单体电池的负极V_连接，光电耦合器的第二端口N与控制器共地，光电耦合器的第三端口P与控制器的第一输出组连接。
采样电路通过两个PMOS和光电耦合器组成的隔离采样开关可以实现将单体电池与分压电路中的分压电阻隔离，防止在不对其对应的单体电池采样时出现漏电流的情况。
基于相同的技术构思，图5示例性的示出了本发明实施例提供的一种串联电池组单体电池的采样电路的结构。该采样电路可以实现对串联电池组中的单体电池的隔离采样，本发明实施例提供的采样方法为差模采样法。
如图5所示，该采样电路包括：控制器101、带通信隔离的ADC 102、由n个单体电池串联组成的电池组104、n个第一隔离采样开关105和n个第二隔离采样开关106。
其中，n个第一隔离采样开关105的一端与带通信隔离的ADC 102的第一输入端连接，n个第一隔离采样开关105的另一端分别与n个单体电池的正极连接，第一隔离采样开关105与单体电池一一对应，n个第二隔离采样开关106的一端与带通信隔离的ADC 102的第二输入端连接，n个第二隔离采样开关106的另一端分别与n个单体电池的负极连接，第二隔离采样开关106与单体电池一一对应。带通信隔离的ADC 102的输出端与控制器101的输入端连接。控制器101的第一输出组分别与n个第一隔离采样开关105的控制端以及n个第二隔离采样开关的控制端连接，用于控制n个隔离采样开关的打开或闭合，控制器101依次控制每个单体电池连接的第一隔离采样开关105和第二隔离采样开关106的闭合，依次可以将每个单体电池的电压送入带通信隔离的ADC 102进行转换，ADC 102转换后的每个单体电池的采样电压值被隔离传输至控制器。
为了实现隔离采样开关的隔离功能，本发明实施例提供一种由NMOS和光电耦合器组成的隔离采样开关，为了给该隔离采样开关供电，该采样电路还包括辅助驱动电源。在本发明实施例中第一晶体管和第二晶体管都可以为N型金属-氧化物半导体场效应晶体管(metal-oxide-semiconductor field-effect transistor，MOSFET)。
具体的上述n个第一隔离采样开关和n个第二隔离采样开关中任一隔离采样开关包括第一晶体管、第二晶体管、光电耦合器。第一晶体管的第一端口与第二晶体管的第一端口连接，第一晶体管的第二端口与光电耦合器的第一端口连接，第一晶体管的第三端口与其对应的单体电池的正极连接，第二晶体管的第二端口与光电耦合器的第一端口连接，第二晶体管的第三端口与分压电路的第一输入端连接，光电耦合器的第二端口与控制器共地， 光电耦合器的第三端口与控制器的第一输出组连接，光电耦合器的第四端口与辅助驱动电源的正极连接。辅助驱动电源的负极与ADC的第二输入端连接。
上述隔离采样开关的具体结构可以如图3所示，具体连接关系已在上述实施例中描述，不再赘述。
相应地，本发明实施例还提供了另一种由PMOS和光电耦合器组成的隔离采样开关，在本发明实施例中，第三晶体管和第四晶体管都为PMOS。
针对n个第一隔离采样开关和n个第二隔离采样开关中任一隔离采样开关，该隔离采样开关可以包括包括第三晶体管、第四晶体管、光电耦合器，第三晶体管的第一端口与第四晶体管的第一端口连接，第三晶体管的第二端口与光电耦合器的第四端口连接，第三晶体管的第三端口与其对应的单体电池的正极连接，第四晶体管的第二端口与光电耦合器的第四端口连接，第四晶体管的第三端口与分压电路的第一输入端连接，光电耦合器的第一端口与其对应的单体电池的负极连接，光电耦合器的第二端口与控制器共地，光电耦合器的第三端口与控制器的第一输出组连接。
上述隔离采样开关的具体结构可以如图4所示，具体连接关系已在上述实施例中描述，不再赘述。
为了实现对串联电池组单体电池的均衡管理，图6示例性的示出了本发明实施例提供一种串联电池组单体电池的均衡电路。该均衡电路可以实现控制所以单体电池的电压趋于一致。
如图6所示，该均衡电路可以包括：控制器101、由n个单体电池串联组成的电池组104、n个均衡开关107和n个均衡电阻108，n个单体电池中任一单体电池串联一个均衡开关107和一个均衡电阻108。控制器101的第二输出组分别与n个均衡开关107的控制端连接，用于控制n个均衡开关的打开或闭合，控制器101根据采样电路采集的各单体电池的采样电压值，依据预设的电池均衡算法，控制需要均衡的单体电池的均衡开关107连接，使得需要均衡的单体电池的电能通过均衡电阻108进行释放。
其中，该均衡开关可以包括第五晶体管和第二光电耦合器和第一电阻，该第五晶体管可以为NMOS。
针对n个均衡开关中任一均衡开关，该均衡开关的第五晶体管的第一端口经由第一电阻与第二光电耦合器的第一端口，第五晶体管的第二端口与第二光电耦合器的第一端口连接，第五晶体管的第三端口经由均衡电阻与第二光电耦合器的第四端口连接，第二光电耦合器的第一端口与其对应的单体电池的负极连接，第二光电耦合器的第二端口接地，第二光电耦合器的第三端口与控制器的第二输出组连接，第二光电耦合器的第四端口与其对应的单体电池的正极连接。
如图7所示的均衡开关的结构，该均衡开关的第五晶体管的第一端口S经由第一电阻与第二光电耦合器的第一端口E，第五晶体管的第二端口G与第二光电耦合器的第一端口E连接，第五晶体管的第三端口D经由均衡电阻与第二光电耦合器的第四端口C连接，第二光电耦合器的第一端口E与其对应的单体电池的负极连接，第二光电耦合器的第二端口N接地，第二光电耦合器的第三端口P与控制器的第二输出组BALA_CELL连接，第二光电耦合器的第四端口C与其对应的单体电池的正极连接。
相应地，本发明实施例还提供了另一种由PMOS和光电耦合器、第二电阻组成的均衡开关，在本发明实施例中，第六晶体管都为PMOS。
针对上述n个均衡开关中任一均衡开关，该均衡开关包括第六晶体管、第二光电耦合器和第二电阻，第六晶体管的第一端口经由第二电阻与第二光电耦合器的第一端口，第六晶体管的第二端口与第二光电耦合器的第一端口连接，第六晶体管的第三端口经由均衡电阻与第二光电耦合器的第四端口连接，第二光电耦合器的第一端口与其对应的单体电池的正极连接，第二光电耦合器的第二端口接地，第二光电耦合器的第三端口与控制器的第二输出组连接，第二光电耦合器的第四端口与其对应的单体电池的负极连接。
如图8所示的均衡开关的结构，该均衡开关的第六晶体管的第一端口S经由第二电阻与第二光电耦合器的第一端口E，第六晶体管的第二端口G与第二光电耦合器的第一端口E连接，第六晶体管的第三端口D经由均衡电阻与第二光电耦合器的第四端口C连接，第二光电耦合器的第一端口E与其对应的单体电池的正极连接，第二光电耦合器的第二端口N接地，第二光电耦合器的第三端口P与控制器的第二输出组BALA_CELL连接，第二光电耦合器的第四端口C与其对应的单体电池的负极连接。
基于相同的技术构思，上述图6所示的均衡电路可以应用于上述图1或图5所示的采样电路中，构成如图9所示的一种串联电池组单体电池的采样均衡系统的结构。控制器根据采样电路采集的各单体电池的电压值，依据预设的电池均衡算法，对需要均衡的单体电池进行均衡控制。
如图9所示，采样电路中的串联电池组中每个单体电池(C1，C2…Cn)的正极分别与一个采样开关(Ks.1，Ks.2…Ks.n)一端相连，采样开关的另一端全部连在一起，再与过Rs.2和Rs.1构成的电阻分压网络相连，当采样开关依次闭合时(每一时刻只允许一个采样开关闭合)，相应的单体电池的正极对电池组的参考地(即C1的负极)的电压将加在电阻分压网络上，经分压网络衰减后送入A/D转换，由微控制单元(microcontroller unit，MCU))将相邻的两次采样值相减，便可得到所对应的单体电池的电压值。例如：闭合Ks.n开关时得到的采样电压为Un，闭合Ks.n-1开关时得到的采样电压为Un-1，则单体电池Cn的实际电压值为Un-(Un-1)。本发明技术方案实质上为一种共模分压采样方案，但由于电阻分压网络和采样通道的唯一性，克服了传统共模分压方案由于电阻分压网络和采样通道所带来的较大误差问题，该方案的相邻两次的共模采样误差基本相同，在两次所采到的电压相减过程中，共模误差被消除，极大的提高了单体电池电压采样的精度，可达到接近差模采样法的精度效果。
在每个单体电池正负之间，并联有电阻和开关(Kb.1，Kb.2,…Kb.n)串联构成的均衡电路，MCU通过上述采样电路获取到电池组内每个单体电池的电压，根据一定的电池均衡管理算法，闭合需要启动均衡放电的单体电池的均衡开关，以控制所有单体电池的电压趋于一致。
由NMOS、辅助驱动电源及光电耦合器构成的隔离采样开关单元，用以实现低成本的采样开关Ks，包括两个N型MOSFET管，其源极S相连，栅极G相连，一只管子的漏极D与单体电池的正极相连，另一个管子的漏极D则连在公共端上，该公共端即与分压电阻网络相连，一个辅助驱动电源，其负极连在公共端上，正极同光耦三极管的集电极C相连，CPU(处理器)经隔离光耦可控制辅助驱动电源与两个N型MOSFET的栅极G通断，从而控制两个NMOS构成的隔离采样开关单元的开通和关断。
由PMOS和光耦构成的隔离可控型采样电子开关单元，其原理与NMOS类似，不同的是PMOS可以直接利用单体电池的电压实现开关的开通和关闭驱动，无需辅助电源。
由电阻、NMOS或PMOS和光耦构成的隔离可控型电池均衡电路单元，其中NMOS或PMOS的栅极驱动电源均来自相应的单体电池电压，MCU可通过隔离光耦控制NMOS或PMOS的开通和关闭，当开关开通时，单体电池将通过所并联的电阻和MOSFET管放电，实现电池均衡功能。
图10和图11分别示出了共模分压法的串联电池组单体电池的采样均衡系统的结构，其中，图10所示的采样均衡系统中均衡开关的晶体管使用的是NMOS，隔离采样开关中的晶体管使用的是NMOS，而图11所示采样均衡系统中均衡开关的晶体管使用的是NMOS，隔离采样开关中的晶体管使用的是PMOS。相应地，上述采样均衡系统中的晶体管使用的可以是PMOS，隔离采样开关中的晶体管使用的是NMOS或者均衡开关的晶体管使用的是PMOS，隔离采样开关中的晶体管使用的是PMOS。这两种示例，本发明实施例并未示出，在实际应用的过程中，可以交替使用。
举例来说，如图10所示的采样均衡系统的工作原理介绍如下：由NMOS、辅助驱动电源和光耦构成隔离可控型采样电子开关单元，由NMOS和光耦构成隔离可控型电池均衡开关单元，由两个电阻构成的分压网络，以及A/D采样电路和MCU单元，其中：采样电子开关单元的一端(NMOS的D极)与单体电池的正极相连，另一端(另一个NMOS的D极)与公共端相连，该公共端与分压电阻网络相连，所有采样电子开关单元共用一个辅助驱动电源，该驱动电源的负极同公共端相连，正极分别同相应采样电子开关单元的光耦集电极C相连，MCU可通过隔离光耦控制辅助驱动电源接通和断开至相应采样电子开关的栅极G，以实现采样电子开关单元的闭合或断开。MCU依次接通采样开关，即可采样到每个单体电池的正极相对于电池的公共地的共模电压值，相邻的两次采样值相减皆可得到对应单体电芯的电压值，由于采样通道的唯一性，共模采样误差在相减的过程中被消除，单体电池的采样精度接近差分采样的精度。
MCU根据获取的每个单体电池的电压值，通过一定的电池管理算法，对单体电压高的电池启动相应的均衡电子开关单元，即可实现所有单体电池电压趋于一致。
图12和图13分别示出了差模采样法的串联电池组单体电池的采样均衡系统的结构，其中，图12所示的采样均衡系统中均衡开关的晶体管使用的是PMOS，隔离采样开关中的晶体管使用的是NMOS，而图11所示采样均衡系统中均衡开关的晶体管使用的是PMOS，隔离采样开关中的晶体管使用的是PMOS。相应地，上述采样均衡系统中的晶体管使用的可以是NMOS，隔离采样开关中的晶体管使用的是NMOS或者均衡开关的晶体管使用的是NMOS，隔离采样开关中的晶体管使用的是PMOS。这两种示例，本发明实施例并未示出，在实际应用的过程中，可以交替使用。
如图12所示的采样均衡系统，所有单体电池的正极通过由NMOS构成的隔离可控型电子开关单元连到正极公共端(CELL_P_COM)，所有单体电池的负极通过由NMOS构成的隔离可控型电子开关单元连到负极公共端(CELL_N_COM)，两个辅助驱动电源，其负极分别连接在正极公共端和负极公共端上，其正极通过隔离光耦连接到相应的开关单元栅极G上，正极公共端和负极公共端分别连接至A/D采样电路的正负上，当MCU在同一时刻控制相应单体电池的正负采样电子开关单元导通时，该节单体电池的电压将被直接送至A/D采样电路，这样即可实现对每节单体电池电压的高精度差分采样。A/D采样电路通过隔离通讯，将采样结果送至MCU，再由MCU控制均衡电子开关实现单体电池电压均衡。
在本发明实施例中，采用本发明所描述的共模电压采样法，可获取等同于专业电池管 理芯片以及差模采样法的采样精度，且成本会大幅降低，该方案的性价比高。
隔离可控电子开关由MOS管及光耦构成，均为业界成熟器件，同专用芯片、机械继电器及固态继电器相比，可靠性高，成本优势大；
分立器件构成的串联电池组单体电池的电压采样和均衡电路，应用配置灵活，不受电池节数的限制，电子开关的耐压方面选择灵活，无专用芯片的上电时序、软件配置等限制，附加成本少，可靠性更高；
电池采样精度由A/D芯片决定，与专用芯片片内A/D相比，可选择性更强，且整个A/D采样通道可通过数字校准进一步提升精度。
显然，本领域的技术人员可以对本发明实施例进行各种改动和变型而不脱离本申请的精神和范围。这样，倘若本发明实施例的这些修改和变型属于本申请权利要求及其等同技术的范围之内，则本申请也意图包含这些改动和变型在内。

Claims (17)

  1. 一种串联电池组单体电池的采样电路，其特征在于，包括：控制器、模数转化器ADC、分压电路、由n个单体电池串联组成的电池组以及n个隔离采样开关；
    所述n个隔离采样开关的一端与所述分压电路的第一输入端连接，所述n个隔离采样开关的另一端分别与所述n个单体电池的正极连接，所述隔离采样开关与所述单体电池一一对应；
    所述n个单体电池中的第1个单体电池的负极与所述分压电路的第二输入端连接并接地；
    所述分压电路的输出端与所述ADC的第二输入端连接，所述ADC的第一输入端接地，所述ADC的输出端与所述控制器的输入端连接；
    所述控制器的第一输出组分别与所述n个隔离采样开关的控制端连接，用于控制所述n个隔离采样开关的打开或闭合；
    所述控制器依次控制所述n个隔离采样开关的闭合，与所述n个隔离采样开关所对应的n个单体电池的正极对地的电压经过所述分压电路的衰减后送入所述ADC进行转换；所述ADC将转换后的采样电压值传输给所述控制器；所述控制器将相邻两次的采样电压值相减得到相应的单体电池的电压值。
  2. 如权利要求1所述的采样电路，其特征在于，所述分压电路包括第一分压电阻和第二分压电阻；
    所述第一分压电阻的一端与所述n个隔离采样开关连接，另一端与所述ADC的第二输入端连接；
    所述第二分压电阻的一端与所述n个单体电池中的第1个单体电池的负极连接，另一端与所述ADC的第二输入端连接。
  3. 如权利要求1或2所述的采样电路，其特征在于，还包括：辅助驱动电源；
    所述n个隔离采样开关中任一隔离采样开关包括第一晶体管、第二晶体管、光电耦合器；
    所述第一晶体管的第一端口与所述第二晶体管的第一端口连接，所述第一晶体管的第二端口与所述光电耦合器的第一端口连接，所述第一晶体管的第三端口与其对应的单体电池的正极连接；
    所述第二晶体管的第二端口与所述光电耦合器的第一端口连接，所述第二晶体管的第三端口与所述分压电路的第一输入端连接；
    所述光电耦合器的第二端口与所述控制器共地，所述光电耦合器的第三端口与所述控制器的第一输出组连接，所述光电耦合器的第四端口与所述辅助驱动电源的正极连接；
    所述辅助驱动电源的负极与所述分压电路的第一输入端连接。
  4. 如权利要求3所述的采样电路，其特征在于，所述第一晶体管和所述第二晶体管为N型金属氧化物半导体。
  5. 如权利要求1或2所述的采样电路，其特征在于，所述n个隔离采样开关中任一隔离采样开关包括第三晶体管、第四晶体管、光电耦合器；
    所述第三晶体管的第一端口与所述第四晶体管的第一端口连接，所述第三晶体管的第二端口与所述光电耦合器的第四端口连接，所述第三晶体管的第三端口与其对应的单体电池的正极连接；
    所述第四晶体管的第二端口与所述光电耦合器的第四端口连接，所述第四晶体管的第三端口与所述分压电路的第一输入端连接；
    所述光电耦合器的第一端口与其对应的单体电池的负极连接，所述光电耦合器的第二端口与所述控制器共地，所述光电耦合器的第三端口与所述控制器的第一输出组连接。
  6. 如权利要求5所述的采样电路，其特征在于，所述第三晶体管和所述第四晶体管为P型金属氧化物半导体。
  7. 一种串联电池组单体电池的采样电路，其特征在于，包括：控制器、带通信隔离的模数转化器ADC、由n个单体电池串联组成的电池组、n个第一隔离采样开关和n个第二隔离采样开关；
    所述n个第一隔离采样开关的一端与所述带通信隔离的ADC的第一输入端连接，所述n个第一隔离采样开关的另一端分别与所述n个单体电池的正极连接，所述第一隔离采样开关与所述单体电池一一对应；
    所述n个第二隔离采样开关的一端与所述带通信隔离的ADC的第二输入端连接，所述n个第二隔离采样开关的另一端分别与所述n个单体电池的负极连接，所述第二隔离采样开关与所述单体电池一一对应；
    所述带通信隔离的ADC的输出端与所述控制器的输入端连接；
    所述控制器的第一输出组分别与所述n个第一隔离采样开关的控制端以及n个第二隔离采样开关的控制端连接，用于控制所述n个隔离采样开关的打开或闭合；
    所述控制器依次控制每个单体电池连接的第一隔离采样开关和第二隔离采样开关的闭合，依次可以将每个单体电池的电压送入所述带通信隔离的ADC进行转换，所述ADC转换后的每个单体电池的采样电压值被隔离传输至所述控制器。
  8. 如权利要求7所述的采样电路，其特征在于，还包括：辅助驱动电源；
    所述n个第一隔离采样开关和所述n个第二隔离采样开关中任一隔离采样开关包括第一晶体管、第二晶体管、光电耦合器；
    所述第一晶体管的第一端口与所述第二晶体管的第一端口连接，所述第一晶体管的第二端口与所述光电耦合器的第一端口连接，所述第一晶体管的第三端口与其对应的单体电池的正极连接；
    所述第二晶体管的第二端口与所述光电耦合器的第一端口连接，所述第二晶体管的第三端口与所述分压电路的第一输入端连接；
    所述光电耦合器的第二端口与所述控制器共地，所述光电耦合器的第三端口与所述控制器的第一输出组连接，所述光电耦合器的第四端口与所述辅助驱动电源的正极连接；
    所述辅助驱动电源的负极与所述ADC的第二输入端连接。
  9. 如权利要求8所述的采样电路，其特征在于，所述第一晶体管和所述第二晶体管为N型金属氧化物半导体。
  10. 如权利要求7所述的采样电路，其特征在于，所述n个第一隔离采样开关和所述n个第二隔离采样开关中任一隔离采样开关包括第三晶体管、第四晶体管、光电耦合器；
    所述第三晶体管的第一端口与所述第四晶体管的第一端口连接，所述第三晶体管的第二端口与所述光电耦合器的第四端口连接，所述第三晶体管的第三端口与其对应的单体电池的正极连接；
    所述第四晶体管的第二端口与所述光电耦合器的第四端口连接，所述第四晶体管的第 三端口与所述分压电路的第一输入端连接；
    所述光电耦合器的第一端口与其对应的单体电池的负极连接，所述光电耦合器的第二端口与所述控制器共地，所述光电耦合器的第三端口与所述控制器的第一输出组连接。
  11. 如权利要求10所述的采样电路，其特征在于，所述第一晶体管和所述第二晶体管为P型金属氧化物半导体。
  12. 一种串联电池组单体电池的均衡电路，其特征在于，应用于如权利要求1至11任一项所述的采样电路，包括：控制器、由n个单体电池串联组成的电池组、n个均衡开关和n个均衡电阻；
    所述n个单体电池中任一单体电池串联一个均衡开关和一个均衡电阻；
    所述控制器的第二输出组分别与所述n个均衡开关的控制端连接，用于控制所述n个均衡开关的打开或闭合；
    所述控制器根据采样电路采集的各单体电池的采样电压值，依据预设的电池均衡算法，控制需要均衡的单体电池的均衡开关连接，使得所述需要均衡的单体电池的电能通过所述均衡电阻进行释放。
  13. 如权利要求12所述的均衡电路，其特征在于，所述n个均衡开关中任一均衡开关包括第五晶体管、第二光电耦合器和第一电阻；
    所述第五晶体管的第一端口经由所述第一电阻与所述第二光电耦合器的第一端口，所述第五晶体管的第二端口与所述第二光电耦合器的第一端口连接，所述第五晶体管的第三端口经由所述均衡电阻与所述第二光电耦合器的第四端口连接；
    所述第二光电耦合器的第一端口与其对应的单体电池的负极连接，所述第二光电耦合器的第二端口接地，所述第二光电耦合器的第三端口与所述控制器的第二输出组连接，所述第二光电耦合器的第四端口与其对应的单体电池的正极连接。
  14. 如权利要求13所述的均衡电路，其特征在于，所述第五晶体管为N型金属氧化物半导体。
  15. 如权利要求12所述的均衡电路，其特征在于，所述n个均衡开关中任一均衡开关包括第六晶体管、第二光电耦合器和第二电阻；
    所述第六晶体管的第一端口经由所述第二电阻与所述第二光电耦合器的第一端口，所述第六晶体管的第二端口与所述第二光电耦合器的第一端口连接，所述第六晶体管的第三端口经由所述均衡电阻与所述第二光电耦合器的第四端口连接；
    所述第二光电耦合器的第一端口与其对应的单体电池的正极连接，所述第二光电耦合器的第二端口接地，所述第二光电耦合器的第三端口与所述控制器的第二输出组连接，所述第二光电耦合器的第四端口与其对应的单体电池的负极连接。
  16. 如权利要求15所述的均衡电路，其特征在于，所述第六晶体管为P型金属氧化物半导体。
  17. 一种串联电池组单体电池的采样均衡系统，其特征在于，包括如权利要求1至11任一项所述的采样电路和如权利要求12至16任一项所述的均衡电路；
    所述控制器根据所述采样电路采集的各单体电池的电压值，依据预设的电池均衡算法，对需要均衡的单体电池进行均衡控制。
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