WO2018120695A1 - 显示面板及其制作方法以及显示装置 - Google Patents

显示面板及其制作方法以及显示装置 Download PDF

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Publication number
WO2018120695A1
WO2018120695A1 PCT/CN2017/090556 CN2017090556W WO2018120695A1 WO 2018120695 A1 WO2018120695 A1 WO 2018120695A1 CN 2017090556 W CN2017090556 W CN 2017090556W WO 2018120695 A1 WO2018120695 A1 WO 2018120695A1
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WIPO (PCT)
Prior art keywords
substrate
display panel
gate
channel region
passivation layer
Prior art date
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Ceased
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PCT/CN2017/090556
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English (en)
French (fr)
Inventor
曹可
杨成绍
操彬彬
韩领
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BOE Technology Group Co Ltd
Hefei Xinsheng Optoelectronics Technology Co Ltd
Original Assignee
BOE Technology Group Co Ltd
Hefei Xinsheng Optoelectronics Technology Co Ltd
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Application filed by BOE Technology Group Co Ltd, Hefei Xinsheng Optoelectronics Technology Co Ltd filed Critical BOE Technology Group Co Ltd
Priority to US15/747,694 priority Critical patent/US10551709B2/en
Publication of WO2018120695A1 publication Critical patent/WO2018120695A1/zh
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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    • G—PHYSICS
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    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/133305—Flexible substrates, e.g. plastics, organic film
    • G—PHYSICS
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    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
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    • G02F1/1333—Constructional arrangements; Manufacturing methods
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    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
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    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
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    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
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    • G02F1/136286—Wiring, e.g. gate line, drain line
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    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
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    • G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
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    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6729—Thin-film transistors [TFT] characterised by the electrodes
    • H10D30/673—Thin-film transistors [TFT] characterised by the electrodes characterised by the shapes, relative sizes or dispositions of the gate electrodes
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    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
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    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
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    • H10D30/674—Thin-film transistors [TFT] characterised by the active materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
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    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
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    • H10D30/6757—Thin-film transistors [TFT] characterised by the structure of the channel, e.g. transverse or longitudinal shape or doping profile
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    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
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    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
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    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
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    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/441—Interconnections, e.g. scanning lines
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    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
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    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
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    • G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
    • G02F1/13685—Top gates

Definitions

  • Embodiments of the present disclosure relate to a display panel, a method of fabricating the same, and a display device.
  • curved display panels are becoming more and more popular.
  • the entire screen of the curved display panel is curved in the direction of the user, providing a wide panoramic image.
  • the screen edge of the curved display panel can also provide better viewing effects.
  • a curved liquid crystal display panel is fabricated by first making a flat liquid crystal display panel and then bending a flat liquid crystal display panel.
  • the liquid crystal display panel includes an array substrate, a color filter substrate, and a liquid crystal layer disposed between the array substrate and the color filter substrate.
  • the array substrate includes a base substrate, a thin film transistor array composed of a gate electrode, a gate insulating layer, an active layer, a source/drain electrode, and the like, and a pixel electrode or the like provided on the base substrate.
  • the color filter substrate includes a base substrate, a color film disposed on the base substrate, a black matrix, and the like.
  • At least one embodiment of the present disclosure provides a display panel, a method of fabricating the same, and a display device.
  • the display panel includes an array substrate and a counter substrate disposed at a relatively spaced interval; the array substrate includes a first substrate substrate, a source, a drain, an active layer disposed on the first substrate, and a source and a drain. And a passivation layer on the active layer; the opposite substrate includes a second substrate and a gate disposed on the second substrate; the active layer includes a source region, a drain region, and a source region and a drain In the channel region between the regions, the gate is spaced apart from the passivation layer at the location of the channel region.
  • the display panel can be used to form a curved display panel with high yield and quality.
  • At least one embodiment of the present disclosure provides a display panel including: an array substrate including a first substrate and a source, a drain, an active layer disposed on the first substrate, and the a source, the drain, and a passivation layer on the active layer; and an opposite substrate disposed at a distance from the array substrate and including a second substrate, the active layer including a source region, a drain region and a channel region between the source region and the drain region, the opposite substrate further comprising a gate disposed on the second substrate, the gate and the gate
  • the passivation layers at the locations where the channel regions are located are relatively spaced apart.
  • the display panel is configured to be curved such that an interval between the gate and the passivation layer at a position where the channel region is located is reduced.
  • the opposite substrate further includes: a protective layer disposed on a side of the gate adjacent to the array substrate, and a protective layer at a position where the gate is located The passivation layer at a position where the channel region is located is spaced apart from each other.
  • the display panel is configured to be bent such that the passivation layer at a position where the gate is located and the passivation at a position where the channel region is located Layer contact settings.
  • the protective layer at a position where the gate is located protrudes from the opposite substrate and forms a protrusion, and the passivation at a position of the channel region A layer is recessed toward the first substrate and a groove is formed, the protrusion being configured to be inserted into the groove.
  • the opposite substrate further includes: a plurality of filters; and a black matrix disposed at a periphery of each of the filters, the gate An orthographic projection on the second substrate substrate falls into an orthographic projection of the black matrix on the second substrate.
  • the plurality of filters are arranged in an array, and the opposite substrate further includes: a gate line extending along a row direction of the array, the gate line Overlap the filter.
  • the opposite substrate further includes: a spacer, an orthographic projection of the spacer on the second substrate falls into the black matrix An orthographic projection on the second substrate.
  • At least one embodiment of the present disclosure provides a method of fabricating a display panel, including: forming a source, a drain, an active layer, and a passivation layer on a first substrate to form an array substrate, the active The layer includes a source region, a drain region, and a channel region between the source region and the drain region; forming a gate on the second substrate to form an opposite substrate; and the array substrate and the substrate Determining the opposite substrate pair, and forming the side of the first base substrate on which the source, the drain, the active layer, and the passivation layer are formed facing the second substrate
  • One side of the gate is disposed at a distance from the passivation layer at a location where the channel region is located.
  • a method for fabricating a display panel according to an embodiment of the present disclosure further includes: bending the display panel to form a curved display panel such that the gate and the passivation layer at a position of the channel region are The interval is reduced.
  • a method for fabricating a display panel according to an embodiment of the present disclosure further includes: at the bending station Before the display panel is formed to form the curved display panel, a protective layer is formed on a side of the gate away from the second substrate, and the protective layer and the channel region at the position of the gate are located The passivation layers are disposed at relatively spaced intervals.
  • the display panel is bent to form a curved display panel such that the passivation is at a position where the gate and the channel region are located.
  • the reducing the interval of the layers specifically includes: bending the display panel to form a curved display panel such that the protective layer at the position where the gate is located is in contact with the passivation layer at a position where the channel region is located .
  • the display panel is bent to form a curved display panel such that the passivation is at a position where the gate and the channel region are located.
  • the reduction in the spacing of the layers includes controlling the degree of bending of the display panel according to the electrical properties of the source, the drain, and the active layer.
  • the array substrate and the opposite substrate of the pair of cassettes are performed in a vacuum environment.
  • At least one embodiment of the present disclosure provides a display device including the display panel of any of the above.
  • FIG. 1 is a schematic structural diagram of a display panel according to an embodiment of the present disclosure
  • FIG. 2 is a schematic structural diagram of another display panel according to an embodiment of the present disclosure.
  • FIG. 3 is a schematic structural diagram of another display panel according to an embodiment of the present disclosure.
  • FIG. 4 is a schematic plan view of an array substrate of a display panel according to an embodiment of the present disclosure
  • FIG. 5 is a schematic plan view of a counter substrate of a display panel according to an embodiment of the present disclosure
  • FIG. 6 is a flowchart of a method for fabricating a display panel according to an embodiment of the present disclosure
  • FIGS. 7a-7e are schematic diagrams showing steps of fabricating an array substrate in a method of fabricating a display panel according to an embodiment of the present disclosure
  • FIGS. 8a-8e are schematic diagrams showing steps of fabricating a counter substrate in a method of fabricating a display panel according to an embodiment of the present disclosure.
  • the inventors of the present application found that in the preparation process of the curved liquid crystal display panel, it is necessary to focus on monitoring the spacing of the array substrate and the opposite substrate and the liquid crystal amount when the array substrate and the opposite substrate (ie, the upper and lower substrates) are bent. Control; very small parameter changes will change the display of the curved LCD panel.
  • various parameters of the conventional curved liquid crystal display panel for example, the pitch of the array substrate and the opposite substrate and the amount of liquid crystal
  • the inventors of the present application have thought that by forming a gate on the opposite substrate, after determining the optimal degree of bending, the curved display panel can be optimally displayed by setting the distance between the gate and the array substrate; Alternatively, the optimum effect can be ensured by adjusting the degree of bending under the premise that the distance between the gate and the array substrate is fixed, thereby greatly increasing the control range of various parameters and making the product yield higher.
  • At least one embodiment of the present disclosure provides a display panel, a method of fabricating the same, and a display device.
  • the display panel includes an array substrate and a counter substrate disposed at a relatively spaced interval; the array substrate includes a first substrate substrate, a source, a drain, an active layer disposed on the first substrate, and a source and a drain. And a passivation layer on the active layer; the opposite substrate includes a second substrate and a gate disposed on the second substrate; the active layer includes a source region, a drain region, and a source region and a drain In the channel region between the regions, the gate is spaced apart from the passivation layer at the location of the channel region.
  • the display panel can be used to form a curved display panel with high yield and quality.
  • the display panel includes an array substrate 110 and a counter substrate 120 disposed opposite to each other.
  • the array substrate 110 includes a first base substrate 111 and a source 112, a drain 113, an active layer 114 disposed on the first substrate 111, and a source 112, a drain 113, and an active layer 114.
  • the counter substrate 120 includes a second substrate 121 and a gate 122 disposed on the second substrate 121.
  • the active layer 114 includes a source region 1141, a drain region 1143, and a channel region 1142 between the source region 1141 and the drain region 1143.
  • the gate 122 is spaced apart from the passivation layer 115 at the location of the channel region 1142.
  • the arrangement that is, the position at which the gate electrode 122 and the channel region 1142 are located at a position close to the surface of the opposite substrate 120 are relatively spaced apart. It should be noted that the above relative means that the gate is substantially opposite to the channel region, and is not strictly aligned, as long as the electric field generated by the gate of the display panel after bending can act on the channel region.
  • the gate is disposed at a distance from the passivation layer at the position of the channel region, and the display panel can be used to form a curved display panel.
  • the display panel is bent, the spacing between the array substrate and the opposite substrate is reduced, the distance between the gate and the passivation layer at the location of the channel region is reduced, and the gate is close to the channel region and can
  • the role of the gate that is, the electric field generated on the gate, acts on the channel region. Therefore, in the case of determining the optimal degree of bending, the curved display panel can be optimally displayed by setting the distance between the gate and the passivation layer, for example, the gate and the trench in the curved display panel.
  • the distance between the road zone is just the best distance for display; or, when the distance between the gate and the passivation layer is fixed, the best effect can be ensured by adjusting the degree of bending, thereby greatly increasing the control range of various parameters. To make the product yield higher.
  • the opposite substrate 120 further includes a side of the gate 122 adjacent to the array substrate 110 (or away from the second substrate substrate 121 ).
  • the protective layer 124, the protective layer 124 at the location of the gate 122 is spaced apart from the passivation layer 115 at the location of the channel region 1142, that is, the protective layer 124 and the channel region 1142 at the location of the gate 122.
  • the array substrate 110 at the position is disposed at a relatively spaced distance from the surface on the side opposite to the opposite substrate 120.
  • the protective layer can function to protect the gate, for example, to prevent the gate from being corroded or oxidized by the liquid crystal.
  • the material of the first base substrate and the second base substrate may include a glass substrate, a quartz substrate, a resin substrate, or the like.
  • the material of the gate electrode may include one or more selected from the group consisting of chromium, molybdenum, aluminum, copper, aluminum alloy, copper alloy, and the like.
  • the material of the active layer may include an oxide semiconductor, amorphous silicon, polysilicon, or other semiconductor material.
  • the display panel is configured to be bent such that the gate 122 (or the protective layer 124 at the position where the gate 122 is located) and the channel region 114 The spacing of the passivation layer 115 at the location is reduced.
  • the display panel can be used to form a curved display panel.
  • the display panel is configured to be bent such that the passivation layer 124 at the position where the gate 122 is located is passivated at the position of the channel region 114.
  • Layer 115 is in contact with the setting.
  • the distance between the gate 122 and the channel region 114 is the smallest, the electric field generated on the gate 122 has the largest effect on the channel region 114, and the gate 122 can be maintained by the array substrate 110 and the opposite substrate 120.
  • the effect of the thickness of the liquid crystal cell increases the stability of the display panel.
  • the protective layer 124 at the position of the gate 122 protrudes from the opposite substrate 120 and forms a protrusion at the position of the channel region 114.
  • the passivation layer 115 is recessed toward the first base substrate 111 and forms a groove into which the protrusion can be inserted. Therefore, after the display panel is bent, the protective layer at the position where the gate is located protrudes from the side surface of the array substrate adjacent to the opposite substrate where the protrusion formed by the opposite substrate is inserted into the channel region, and is recessed toward the first lining
  • the groove formed by the bottom substrate can fix the relative position of the gate and the channel region, thereby further improving the stability of the display panel.
  • the source 112 and the drain 113 are disposed on a side of the first substrate 111 close to the opposite substrate 120, and the active layer 114
  • the source region 1141 and the source substrate 112 are electrically connected to each other, and the drain region 1143 is connected to the drain electrode 113.
  • the gate 122 is spaced apart from the channel region 1142. When the display panel is bent, the gate 122, the source 112, the drain 113, and the active layer 114 may constitute a thin film transistor structure.
  • the array substrate 110 further includes a common electrode 116 disposed on the first substrate 111, and is disposed at the source 112 and the drain 113.
  • the array substrate 110 further includes a common electrode line 117 disposed on the first substrate 111, and the common electrode 116 is electrically connected to the common electrode line 117.
  • the display panel further includes a liquid crystal layer disposed between the array substrate and the opposite substrate (in the figure) Not shown), the pixel electrode and the common electrode may generate an electric field to drive liquid crystal deflection in the liquid crystal layer to achieve a display function.
  • the material of the common electrode and the pixel electrode may include a metal or a transparent oxide material.
  • the material of the passivation layer may be an inorganic insulating material such as SiO or SiNO or an organic insulating material such as organic glass or polyimide.
  • the array substrate 110 further includes a first alignment film 119 disposed on the pixel electrode 118 for aligning liquid crystal molecules.
  • the opposite substrate 120 further includes a plurality of filters 125 and a black matrix 123.
  • the black matrix 123 is disposed around the filter 125, and the orthographic projection of the gate 122 on the second substrate 121 falls onto the orthographic projection of the black matrix 123 on the second substrate 121, that is, the gate 122 is disposed.
  • the gate electrode 122 provided on the opposite substrate 120 does not affect the aperture ratio of the display panel.
  • the gate 122 is disposed on a side of the black matrix 123 adjacent to the array substrate 110 to facilitate the formation of the protrusions protruding toward the array substrate 110 by the protective layer 124 at the position where the gate 122 is located.
  • embodiments of the present disclosure include, but are not limited to, the orthographic projection of the gate on the second substrate may not fall into the orthographic projection of the black matrix on the second substrate.
  • the plurality of filters may include a blue filter, a red filter, and a green filter.
  • embodiments of the present disclosure include but are not limited thereto.
  • the opposite substrate 120 further includes a spacer 128.
  • the orthographic projection of the spacers 128 on the second substrate 121 falls onto the orthographic projection of the black matrix 123 on the second substrate 121. That is, the spacers 128 are disposed on the side of the black matrix 123 near the array substrate 110. Thus, the spacer 128 does not affect the aperture ratio of the display panel.
  • the black matrix 123 has a certain height relative to the second base substrate 121, the spacers 128 are disposed on the side of the black matrix 123 adjacent to the array substrate 110, which is advantageous for reducing the spacers while maintaining the same thickness of the substrate. height.
  • embodiments of the present disclosure include, but are not limited to, the orthographic projection of the spacer on the second substrate may not fall into the orthographic projection of the black matrix on the second substrate.
  • the opposite substrate 120 further includes a second alignment film 129 disposed on a side of the protective layer 124 adjacent to the array substrate 110.
  • the first alignment film 119 and the second alignment film 129 are oppositely disposed and disposed only in a region corresponding to the pixel electrode 118, and the region corresponding to the gate electrode 122 and the channel region 1142 is not provided.
  • An alignment film 119 and a second alignment film 129 are not limited to, embodiments of the present disclosure include, but are not limited to, The first alignment film 119 and the second alignment film 129 may also be disposed in regions corresponding to the gate electrode 122 and the channel region 1142.
  • the pixel electrodes 118 are arranged in an array, and the active layer 114, the source 112, and the drain 113 are disposed on one of the pixel electrodes 118.
  • the side is located at an intermediate position of each pixel electrode 118 in the column direction. It should be noted that the above intermediate positions include, but are not limited to, a midpoint of the pixel electrode along the column direction.
  • the plurality of filters 125 are arranged in an array, and the opposite substrate 120 further includes a plurality of filters 125.
  • the gate lines 126 of the array extend in the row direction, and the gate lines 126 overlap the filter 125.
  • the spacers 128 are disposed in a region near the corners of the filter 125.
  • the spacer 128 can better maintain the thickness of the box.
  • This embodiment provides a method for fabricating a display panel, as shown in FIG. 6, which includes steps S201-S203.
  • Step S201 forming a source, a drain, an active layer, and a passivation layer on the first base substrate to form an array substrate, the active layer including a source region, a drain region, and a trench between the source region and the region Road area.
  • Step S202 forming a gate on the second substrate to form an opposite substrate.
  • Step S203 aligning the array substrate and the opposite substrate, and forming a gate of the first substrate with the source, the drain, the active layer and the passivation layer facing the second substrate On one side, the gate is spaced apart from the passivation layer at the location of the channel region.
  • the curved display panel can be formed by forming the gate on the opposite substrate and the gate is spaced apart from the passivation layer at the position of the channel region.
  • the spacing between the array substrate and the opposite substrate is reduced, the distance between the gate and the passivation layer at the location of the channel region is reduced, and the gate is close to the channel region and can serve as a gate. Extreme role. Therefore, in the case of determining the optimal degree of bending, the curved display panel can be optimally displayed by setting the distance between the gate and the passivation layer, for example, the gate and the trench in the curved display panel.
  • the distance between the road zone is just the best distance for display; or, when the distance between the gate and the passivation layer is fixed, the best effect can be ensured by adjusting the degree of bending, thereby greatly increasing the control range of various parameters. To make the product yield higher.
  • the method for fabricating the display panel provided in the first embodiment may further include: forming a protective layer on a side of the gate away from the second substrate, the protection at the position of the gate The layer is disposed at a distance from the passivation layer at a location where the channel region is located.
  • the protective layer can function to protect the gate, for example, to prevent the gate from being corroded or oxidized by the liquid crystal.
  • the cassette can be placed in a vacuum environment, so that the yield of the manufacturing method can be further improved.
  • the method further includes: bending the display panel to form a curved display panel, so that the gate (or the protective layer at the position of the gate) and the channel region are located.
  • the spacing of the passivation layers at the locations is reduced.
  • an electric field generated on the gate electrode on the opposite substrate can act on the channel region on the array substrate, thereby functioning as a gate.
  • the electrical performance of the thin film transistor including the gate electrode, the active layer, the source, and the drain can be optimized by setting the degree of bending, thereby achieving an optimal display effect of the display panel.
  • the method further includes: bending the display panel to form a curved display panel such that the gate (or the protective layer at the position of the gate) and the channel region are located. Contact setting of the passivation layer at the location. At this time, the distance between the gate and the channel region is the shortest, and the gate can function to maintain the thickness of the liquid crystal cell formed by the array substrate and the opposite substrate, thereby increasing the stability of the display panel.
  • the method further includes: controlling the bending degree of the curved display panel according to the electrical properties of the source, the drain, and the active layer, so that the gate (or the gate is located) The distance between the protective layer at the location and the passivation layer at the location of the channel region is reduced or contacted.
  • the degree of bending of the curved display panel according to the electrical properties of the source, the drain, and the active layer, the distance between the gate and the active layer can be controlled, thereby enabling the gate, the active layer, and the source to be included.
  • the electrical performance of the thin-film transistor of the drain is optimized to achieve the best display effect of the display panel.
  • the source, the drain, and the active layer are formed on the first base substrate to form an array substrate, and the active layer includes a source region, a drain region, and a channel region between the source region and the drain region.
  • the steps may include forming a source electrode 112, a drain electrode 113, and a common electrode line 117 on the first base substrate 111 as shown in FIG. 7a.
  • a common electrode 116 is formed on the first base substrate 111 and the common electrode line 117.
  • an active layer 114 is formed on the source 112, the drain 113, and the first substrate 111.
  • a passivation layer 115 is formed on the array substrate shown in FIG. 7c.
  • a via 1150 is formed on the passivation layer 115 and a pixel electrode 118 is formed on the passivation layer 115.
  • the pixel electrode 118 is electrically connected to the drain 113 through the via 1150.
  • the gate electrode and the protective layer are formed on the second substrate to form a counter substrate, the protective layer is disposed on a side of the gate adjacent to the array substrate, and the gate is spaced apart from the channel region, and the gate is located at a position The surface of the array substrate near the opposite substrate at the position where the protective layer and the channel region are located
  • the setting may include forming a black matrix 123 on the second base substrate 121 as shown in FIG. 8a.
  • a color filter 125 is formed on the second base substrate 121.
  • a gate 122 is formed on the black matrix 123.
  • a protective layer 124 is formed on the gate electrode 122.
  • a spacer 128 is formed on the black matrix 123.
  • the method further includes: injecting liquid crystal between the array substrate behind the cassette and the opposite substrate, the pair of the array substrate and the The counter substrate is injected into the liquid crystal in a vacuum environment, thereby improving the precision of the cartridge, thereby further improving the yield of the manufacturing method of the display panel.
  • This embodiment provides a display device.
  • the display device includes the above display panel. Since the display device has the above-mentioned display panel, the display device has the technical effect corresponding to the technical effect of the display panel included therein, and the embodiment will not be described herein.

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Abstract

一种显示面板及其制作方法以及显示装置。该显示面板包括相对设置的阵列基板(110)和对置基板(120)；阵列基板(110)包括第一衬底基板(111)以及设置在第一衬底基板(111)上的源极(112)、漏极(113)、有源层(114)以及设置在源极(112)、漏极(113)和有源层(114)上的钝化层(115)；对置基板(120)包括第二衬底基板(121)和设置在第二衬底基板(121)上的栅极(122)；有源层(114)包括源极区域(1141)、漏极区域(1143)以及源极区域(1141)和漏极区域(1143)之间的沟道区(1142)，栅极(122)与沟道区(1142)所在位置处的钝化层(115)相对间隔设置。由此，该显示面板可用于形成曲面显示面板，并具有较高的良率和品质。

Description

显示面板及其制作方法以及显示装置 技术领域
本公开的实施例涉及一种显示面板及其制作方法以及显示装置。
背景技术
随着显示技术的不断发展，曲面显示面板越来越流行。通常，曲面显示面板的整个屏幕为朝用户方向包围的弧形设计，从而可提供宽阔的全景影像效果。相对于平面显示面板，除了显示面板的屏幕中心，曲面显示面板的屏幕边缘也能提供较佳的观看效果。
通常，曲面液晶显示面板通过先制作平面液晶显示面板，然后弯曲平面液晶显示面板制成。液晶显示面板包括阵列基板、彩膜基板以及设置在阵列基板和彩膜基板之间的液晶层。阵列基板包括衬底基板、设置在衬底基板上的由栅极、栅极绝缘层、有源层、源漏电极等组成的薄膜晶体管阵列以及像素电极等。彩膜基板包括衬底基板、设置在衬底基板上的彩膜片和黑矩阵等。
发明内容
本公开至少一个实施例提供一种显示面板及其制作方法以及显示装置。该显示面板包括相对间隔设置的阵列基板和对置基板；阵列基板包括第一衬底基板以及设置在第一衬底基板上的源极、漏极、有源层以及设置在源极、漏极和有源层上的钝化层；对置基板包括第二衬底基板和设置在第二衬底基板上的栅极；有源层包括源极区域、漏极区域以及源极区域和漏极区域之间的沟道区，栅极与沟道区所在位置处的钝化层相对间隔设置。由此，该显示面板可用于形成曲面显示面板，并具有较高的良率和品质。
本公开至少一个实施例提供一种显示面板，其包括：阵列基板，包括第一衬底基板以及设置在所述第一衬底基板上的源极、漏极、有源层以及设置在所述源极、所述漏极和所述有源层上的钝化层；以及对置基板，与所述阵列基板相对间隔设置且包括第二衬底基板，所述有源层包括源极区域、漏极区域以及所述源极区域和所述漏极区域之间的沟道区，所述对置基板还包括设置在所述第二衬底基板上的栅极，所述栅极与所述沟道区所在位置处的所述钝化层相对间隔设置。
例如，在本公开一实施例提供的显示面板中，所述显示面板被配置为弯曲以使得所述栅极与所述沟道区所在位置处的所述钝化层的间隔减小。
例如，在本公开一实施例提供的显示面板中，所述对置基板还包括：保护层，设置在所述栅极靠近所述阵列基板的一侧，所述栅极所在位置处的保护层与所述沟道区所在位置处的所述钝化层相对间隔设置。
例如，在本公开一实施例提供的显示面板中，所述显示面板被配置为弯曲以使得所述栅极所在位置处的所述保护层与所述沟道区所在位置处的所述钝化层接触设置。
例如，在本公开一实施例提供的显示面板中，所述栅极所在位置处的所述保护层突出于所述对置基板并形成突起，所述沟道区所在位置处的所述钝化层凹向所述第一衬底基板并形成凹槽，所述突起被配置为插入所述凹槽。
例如，在本公开一实施例提供的显示面板中，所述对置基板还包括：多个滤光片；以及黑矩阵，所述黑矩阵设置在各所述滤光片周边，所述栅极在所述第二衬底基板上的正投影落入所述黑矩阵在所述第二衬底基板上的正投影。
例如，在本公开一实施例提供的显示面板中，所述多个滤光片呈阵列排布，所述对置基板还包括：栅线，沿所述阵列的行方向延伸，所述栅线与所述滤光片交叠。
例如，在本公开一实施例提供的显示面板中，所述对置基板还包括：隔垫物，所述隔垫物在所述第二衬底基板上的正投影落入所述黑矩阵在所述第二衬底基板上的正投影。
例如，本公开至少一个实施例提供一种显示面板的制作方法，其包括：在第一衬底基板上形成源极、漏极、有源层以及钝化层以形成阵列基板，所述有源层包括源极区域、漏极区域以及所述源极区域和漏极区域之间的沟道区；在第二衬底基板上形成栅极以形成对置基板；以及将所述阵列基板和所述对置基板对盒，且使所述第一衬底基板的形成有所述源极、漏极、有源层以及钝化层的一侧面对所述第二衬底基板的形成有所述栅极的一侧，所述栅极与所述沟道区所在位置处的所述钝化层相对间隔设置。
例如，本公开一实施例提供的显示面板的制作方法还包括：弯曲所述显示面板以形成曲面显示面板，以使得所述栅极与所述沟道区所在位置处的所述钝化层的间隔减小。
例如，本公开一实施例提供的显示面板的制作方法还包括：在所述弯曲所 述显示面板以形成曲面显示面板之前，在所述栅极远离所述第二衬底基板的一侧形成保护层，所述栅极所在位置处的所述保护层与所述沟道区所在位置处的所述钝化层相对间隔设置。
例如，在本公开一实施例提供的显示面板的制作方法中，所述弯曲所述显示面板以形成曲面显示面板，以使得所述栅极与所述沟道区所在位置处的所述钝化层的间隔减小具体包括：弯曲所述显示面板以形成曲面显示面板，以使得所述栅极所在位置处的所述保护层与所述沟道区所在位置处的所述钝化层接触设置。
例如，在本公开一实施例提供的显示面板的制作方法中，所述弯曲所述显示面板以形成曲面显示面板，以使得所述栅极与所述沟道区所在位置处的所述钝化层的间隔减小包括：根据所述源极、所述漏极、所述有源层的电学性质控制弯曲所述显示面板的弯曲程度。
例如，在本公开一实施例提供的显示面板的制作方法中，所述对盒所述阵列基板和所述对置基板在真空环境下进行。
例如，本公开至少一个实施例提供一种显示装置，其包括上述任一项所述的显示面板。
附图说明
为了更清楚地说明本公开实施例的技术方案，下面将对实施例的附图作简单地介绍，显而易见地，下面描述中的附图仅仅涉及本公开的一些实施例，而非对本公开的限制。
图1为本公开一实施例提供的一种显示面板的结构示意图；
图2为本公开一实施例提供的另一种显示面板的结构示意图；
图3为本公开一实施例提供的另一种显示面板的结构示意图；
图4为本公开一实施例提供的一种显示面板的阵列基板的平面示意图；
图5为本公开一实施例提供的一种显示面板的对置基板的平面示意图；
图6为本公开一实施例提供的一种显示面板的制作方法的流程图；
图7a-7e为本公开一实施例提供的一种显示面板的制作方法中制作阵列基板的步骤示意图；以及
图8a-8e为本公开一实施例提供的一种显示面板的制作方法中制作对置基板的步骤示意图。
具体实施方式
为使本公开实施例的目的、技术方案和优点更加清楚，下面将结合本公开实施例的附图，对本公开实施例的技术方案进行清楚、完整地描述。显然，所描述的实施例是本公开的一部分实施例，而不是全部的实施例。基于所描述的本公开的实施例，本领域普通技术人员在无需创造性劳动的前提下所获得的所有其他实施例，都属于本公开保护的范围。
除非另外定义，本公开使用的技术术语或者科学术语应当为本公开所属领域内具有一般技能的人士所理解的通常意义。本公开中使用的“第一”、“第二”以及类似的词语并不表示任何顺序、数量或者重要性，而只是用来区分不同的组成部分。“包括”或者“包含”等类似的词语意指出现该词前面的元件或者物件涵盖出现在该词后面列举的元件或者物件及其等同，而不排除其他元件或者物件。“连接”或者“相连”等类似的词语并非限定于物理的或者机械的连接，而是可以包括电性的连接，不管是直接的还是间接的。
在研究中，本申请的发明人发现：在曲面液晶显示面板的制备过程中，需要重点监控阵列基板和对置基板(即，上下基板)在弯曲时阵列基板和对置基板的间距以及液晶量的控制；极小的参数变化都会改变曲面液晶显示面板的显示效果。然而，通常的曲面液晶显示面板的各类参数(例如阵列基板和对置基板的间距以及液晶量)较为复杂和难以控制。因此，本申请的发明人想到利用在对置基板上形成栅极，在确定最佳弯曲程度后，可通过设置栅极与阵列基板的距离来使得弯曲后的显示面板具有最佳的显示效果；或者，在栅极与阵列基板的距离固定的前提下可通过调整弯曲程度来保证最佳效果，从而可大大增加各类参数的调控范围，使产品良率更高。
本公开至少一个实施例提供一种显示面板及其制作方法以及显示装置。该显示面板包括相对间隔设置的阵列基板和对置基板；阵列基板包括第一衬底基板以及设置在第一衬底基板上的源极、漏极、有源层以及设置在源极、漏极和有源层上的钝化层；对置基板包括第二衬底基板和设置在第二衬底基板上的栅极；有源层包括源极区域、漏极区域以及源极区域和漏极区域之间的沟道区，栅极与沟道区所在位置处的钝化层相对间隔设置。由此，该显示面板可用于形成曲面显示面板，并具有较高的良率和品质。
下面结合附图对本公开实施例提供的显示面板及其制作方法以及显示装 置进行说明。
实施例一
本实施例提供一种显示面板，如图1所示，该显示面板包括相对设置的阵列基板110和对置基板120。阵列基板110包括第一衬底基板111以及设置在第一衬底基板111上的源极112、漏极113、有源层114以及设置在源极112、漏极113和有源层114上的钝化层115。对置基板120包括第二衬底基板121和设置在第二衬底基板121上的栅极122。有源层114包括源极区域1141、漏极区域1143以及源极区域1141和漏极区域1143之间的沟道区1142，栅极122与沟道区1142所在位置处的钝化层115相对间隔设置，也就是说，栅极122与沟道区1142所在位置处的阵列基板110靠近对置基板120一侧表面相对间隔设置。需要说明的是，上述的相对是指栅极与沟道区大致相对设置，并非严格正对，只要该显示面板弯曲后的栅极所产生的电场可作用于沟道区即可。
在本实施例提供的显示面板中，栅极与沟道区所在位置处的钝化层相对间隔设置，该显示面板可用于形成曲面显示面板。当该显示面板弯曲时，阵列基板和对置基板之间的间距减小，栅极与沟道区所在位置处的钝化层之间的距离减小，栅极靠近沟道区并可起到栅极的作用，即栅极上产生的电场可作用于沟道区。由此，在确定最佳弯曲程度的情况下，可通过设置栅极与钝化层的距离来使得弯曲后的显示面板具有最佳的显示效果，例如，弯曲后的显示面板中栅极与沟道区的距离恰好为显示效果最好的距离；或者，在栅极与钝化层的距离固定的情况下，可通过调整弯曲程度来保证最佳效果，从而可大大增加各类参数的调控范围，使产品良率更高。
例如，在本实施例一示例提供的显示面板中，如图1所示，对置基板120还包括设置在栅极122靠近阵列基板110一侧(或远离第二衬底基板121一侧)的保护层124，栅极122所在位置处的保护层124与沟道区1142所在位置处的钝化层115相对间隔设置，也就是说，栅极122所在位置处的保护层124与沟道区1142所在位置处的阵列基板110靠近对置基板120一侧表面相对间隔设置。由此，保护层可起到保护栅极的作用，例如，防止栅极被液晶腐蚀或氧化。
例如，第一衬底基板和第二衬底基板的材料可包括玻璃基板、石英基板、树脂基板等。栅极的材料可包括选自铬、钼、铝、铜、铝合金、铜合金等中的一种或多种。有源层的材料可包括氧化物半导体、非晶硅、多晶硅或其他半导体材料。
例如，在本实施例一示例提供的显示面板中，如图2所示，该显示面板被配置为弯曲以使得栅极122(或栅极122所在位置处的保护层124)与沟道区114所在位置处的钝化层115的间隔减小。由此，该显示面板可用于形成曲面显示面板。
例如，在本实施例一示例提供的显示面板中，如图3所示，该显示面板被配置为弯曲以使得栅极122所在位置处的保护层124与沟道区114所在位置处的钝化层115接触设置。此时，栅极122与沟道区114的间距最小，栅极122上产生的电场对沟道区114的作用最大，并且栅极122可起到维持由阵列基板110和对置基板120所形成的液晶盒厚度的作用，从而增加该显示面板的稳定性。
例如，在本实施例一示例提供的显示面板中，如图1-3所示，栅极122所在位置处的保护层124突出于对置基板120并形成突起，沟道区114所在位置处的钝化层115凹向第一衬底基板111并形成凹槽，突起可插入凹槽。由此，当该显示面板弯曲后，栅极所在位置处的保护层突出于对置基板所形成的突起插入沟道区所在位置处的阵列基板的靠近对置基板一侧表面凹向第一衬底基板所形成凹槽，可使栅极与沟道区的相对位置固定，进一步提高该显示面板的稳定性。
例如，在本实施例一示例提供的显示面板中，如图1-3所示，源极112、漏极113设置在第一衬底基板111靠近对置基板120的一侧，有源层114设置在源极113、漏极114和第一衬底基板111上，源极区域1141与源极112电性相连，漏极区域1143与漏极113相连。栅极122与沟道区1142相对间隔设置。当该显示面板弯曲时，栅极122、源极112、漏极113以及有源层114可构成一个薄膜晶体管结构。
例如，在本实施例一示例提供的显示面板中，如图1-3所示，阵列基板110还包括设置在第一衬底基板111上的公共电极116、设置在源极112、漏极113、有源层114以及公共电极116上的钝化层115、设置在钝化层115中并暴露部分漏极113的过孔1150、以及设置在钝化层115上且通过过孔1150与漏极113电性相连的像素电极118。
例如，如图1-3所示，阵列基板110还包括设置在第一衬底基板111上的公共电极线117，公共电极116与公共电极线117电性相连。
例如，该显示面板还包括设置在阵列基板和对置基板之间的液晶层(图中 未示出)，像素电极和公共电极可产生电场以驱动液晶层中的液晶偏转以实现显示功能。
例如，公共电极和像素电极的材料可包括金属或透明氧化物材料。钝化层的材料可为SiO、SiNO等无机绝缘材料或有机玻璃、聚酰亚胺等有机绝缘材料。
例如，在本实施例一示例提供的显示面板中，如图1-3所示，阵列基板110还包括设置在像素电极118上的第一配向膜119，用于对液晶分子进行配向。
例如，在本实施例一示例提供的显示面板中，如图1-3所示，对置基板120还包括多个滤光片125以及黑矩阵123。黑矩阵123设置在滤光片125周边，栅极122在第二衬底基板121上的正投影落入黑矩阵123在第二衬底基板121上的正投影，也就是说，栅极122设置在黑矩阵123靠近阵列基板110的一侧上。由此，设置在对置基板120上的栅极122不会影响该显示面板的开口率。另外栅极122设置在黑矩阵123靠近阵列基板110的一侧上有利于栅极122所在位置处的保护层124形成向阵列基板110凸起的突起。当然，本公开实施例包括但不限于此，栅极在第二衬底基板上的正投影也可不落入黑矩阵在第二衬底基板上的正投影。
例如，多个滤光片可包括蓝色滤光片、红色滤光片和绿色滤光片。当然，本公开实施例包括但不限于此。
例如，在本实施例一示例提供的显示面板中，如图1-3所示，对置基板120还包括隔垫物128。隔垫物128在第二衬底基板121上的正投影落入黑矩阵123在第二衬底基板121上的正投影。也就是说，隔垫物128设置在黑矩阵123靠近阵列基板110的一侧上。由此，隔垫物128不会影响该显示面板的开口率。另外，由于黑矩阵123相对第二衬底基板121具有一定高度，隔垫物128设置在黑矩阵123靠近阵列基板110的一侧上有利于在保持同样的盒厚的前提下降低隔垫物的高度。当然，本公开实施例包括但不限于此，隔垫物在第二衬底基板上的正投影也可不落入黑矩阵在第二衬底基板上的正投影。
例如，在本实施例一示例提供的显示面板中，如图1-3所示，对置基板120还包括第二配向膜129，设置在保护层124靠近阵列基板110的一侧。
例如，如图1-3所示，第一配向膜119和第二配向膜129相对设置并且只设置在像素电极118所对应的区域，栅极122和沟道区1142所对应的区域不设置第一配向膜119和第二配向膜129。当然，本公开实施例包括但不限于此， 第一配向膜119和第二配向膜129也可设置在栅极122和沟道区1142所对应的区域。
例如，在本实施例一示例提供的显示面板的阵列基板上，如图4所示，像素电极118呈阵列排布，有源层114、源极112、漏极113设置在像素电极118的一侧，且位于各像素电极118沿列方向的中间位置。需要说明的是，上述的中间位置包括但不限于像素电极沿列方向的中点。
例如，在本实施例一示例提供的显示面板的对置基板上，如图5所示，多个滤光片125呈阵列排布，对置基板120还包括沿多个滤光片125所形成的阵列的行方向延伸的栅线126，栅线126与滤光片125交叠。
例如，如图5所示，隔垫物128设置在靠近滤光片125边角的区域。由此，隔垫物128可更好地维持盒厚。
实施例二
本实施例提供一种显示面板的制作方法，如图6所示，其包括步骤S201-S203。
步骤S201：在第一衬底基板上形成源极、漏极、有源层以及钝化层以形成阵列基板，有源层包括源极区域、漏极区域以及源极区域和区域之间的沟道区。
步骤S202：在第二衬底基板上形成栅极以形成对置基板。
步骤S203：将阵列基板和对置基板对盒，且使第一衬底基板的形成有源极、漏极、有源层以及钝化层的一侧面对第二衬底基板的形成有栅极的一侧，栅极与沟道区所在位置处的钝化层相对间隔设置。
在本实施例提供的显示面板的制作方法中，通过将栅极形成在对置基板上，并且栅极与沟道区所在位置处的钝化层间隔设置，可用于形成曲面显示面板。在显示面板弯曲时，阵列基板和对置基板之间的间距减小，栅极与沟道区所在位置处的钝化层之间的距离减小，栅极靠近沟道区并可起到栅极的作用。由此，在确定最佳弯曲程度的情况下，可通过设置栅极与钝化层的距离来使得弯曲后的显示面板具有最佳的显示效果，例如，弯曲后的显示面板中栅极与沟道区的距离恰好为显示效果最好的距离；或者，在栅极与钝化层的距离固定的情况下，可通过调整弯曲程度来保证最佳效果，从而可大大增加各类参数的调控范围，使产品良率更高。
例如，本实施例一示例提供的显示面板的制作方法中还可包括：在所述栅极远离所述第二衬底基板的一侧形成保护层，所述栅极所在位置处的所述保护 层与所述沟道区所在位置处的所述钝化层相对间隔设置。由此，保护层可起到保护栅极的作用，例如，防止栅极被液晶腐蚀或氧化。
例如，可在真空环境下进行对盒，从而可进一步提高该制作方法的良率。
例如，在本实施例一示例提供的显示面板的制作方法中，还包括：弯曲上述显示面板以形成曲面显示面板，以使得栅极(或栅极所在位置处的保护层)与沟道区所在位置处的钝化层的间隔减小。由此，在弯曲上述显示面板之后，对置基板上的栅极上所产生的电场可作用于阵列基板上的沟道区，从而起到栅极的作用。并且，可通过设置弯曲的程度来使包括栅极、有源层、源极、漏极的薄膜晶体管的电学性能达到最佳，从而使显示面板实现最佳显示效果。
例如，在本实施例一示例提供的显示面板的制作方法中，还包括：弯曲显示面板以形成曲面显示面板，以使得栅极(或栅极所在位置处的保护层)与沟道区所在位置处的钝化层的接触设置。此时，栅极与沟道区的距离最短，并且，栅极可起到维持由阵列基板和对置基板所形成的液晶盒厚度的作用，从而增加该显示面板的稳定性。
例如，在本实施例一示例提供的显示面板的制作方法中，还包括：根据源极、漏极、有源层的电学性质控制弯曲显示面板的弯曲程度，以使得栅极(或栅极所在位置处的保护层)与沟道区所在位置处的钝化层的间隔减小或接触设置。由此，通过根据源极、漏极、有源层的电学性质来控制弯曲显示面板的弯曲程度，可控制栅极与有源层的距离，从而可使得包括栅极、有源层、源极、漏极的薄膜晶体管的电学性能达到最佳，从而使显示面板实现最佳显示效果。
例如，上述在第一衬底基板上形成源极、漏极、有源层以形成阵列基板，有源层包括源极区域、漏极区域以及源极区域和漏极区域之间的沟道区的步骤可包括：如图7a所示，在第一衬底基板111上形成源极112、漏极113和公共电极线117。如图7b所示，在第一衬底基板111和公共电极线117上形成公共电极116。如图7c所示，在源极112、漏极113和第一衬底基板111上形成有源层114。如图7d所示，在图7c所示的阵列基板上形成钝化层115。如图7e所示，在钝化层115上形成过孔1150并在钝化层115上形成像素电极118，像素电极118通过过孔1150与漏极113电性相连。
例如，上述在第二衬底基板上形成栅极和保护层以形成对置基板，保护层设置在栅极靠近阵列基板的一侧，栅极与沟道区相对间隔设置，栅极所在位置处的保护层与沟道区所在位置处的阵列基板的靠近对置基板一侧的表面间隔 设置的步骤可包括：如图8a所示，在第二衬底基板121上形成黑矩阵123。如图8b所示，在第二衬底基板121上形成彩色滤光片125。如图8c所示，在黑矩阵123上形成栅极122。如图8d所示，在栅极122上形成保护层124。如图8e所示，在黑矩阵123上形成隔垫物128。
例如，在本实施例一示例提供的显示面板的制作方法中，还可包括：在对盒后的阵列基板和所述对置基板之间注入液晶，所述对盒所述阵列基板和所述对置基板在真空环境下进行注入液晶，从而可提高对盒精度，从而进一步提高该显示面板的制作方法的良率。
实施例三
本实施例提供一种显示装置。该显示装置包括上述的显示面板。由于该显示装置具有上述的显示面板，因此该显示装置具有与其包括的显示面板的技术效果对应的技术效果，本实施例在此不再赘述。
有以下几点需要说明：
(1)本公开实施例附图中，只涉及到与本公开实施例涉及到的结构，其他结构可参考通常设计。
(2)为了清晰起见，在用于描述本公开的实施例的附图中，层或微结构的厚度和尺寸被放大。可以理解，当诸如层、膜、区域或基板之类的元件被称作位于另一元件“上”或“下”时，该元件可以“直接”位于另一元件“上”或“下”，或者可以存在中间元件。
(3)在不冲突的情况下，本公开同一实施例及不同实施例中的特征可以相互组合。
以上所述仅是本公开的示范性实施方式，而非用于限制本公开的保护范围，本公开的保护范围由所附的权利要求确定。
本申请要求于2016年12月26日递交的中国专利申请第201611220093.4号的优先权，在此全文引用上述中国专利申请公开的内容以作为本申请的一部分。

Claims (15)

  1. 一种显示面板，包括：
    阵列基板，包括第一衬底基板以及设置在所述第一衬底基板上的源极、漏极、有源层以及设置在所述源极、所述漏极和所述有源层上的钝化层；以及
    对置基板，与所述阵列基板相对间隔设置且包括第二衬底基板，
    其中，所述有源层包括源极区域、漏极区域以及所述源极区域和所述漏极区域之间的沟道区，所述对置基板还包括设置在所述第二衬底基板上的栅极，所述栅极与所述沟道区所在位置处的所述钝化层相对间隔设置。
  2. 根据权利要求1所述的显示面板，其中，所述显示面板被配置为弯曲以使得所述栅极与所述沟道区所在位置处的所述钝化层的间隔减小。
  3. 根据权利要求1或2所述的显示面板，其中，所述对置基板还包括：
    保护层，设置在所述栅极靠近所述阵列基板的一侧，所述栅极所在位置处的保护层与所述沟道区所在位置处的所述钝化层相对间隔设置。
  4. 根据权利要求3所述的显示面板，其中，所述显示面板被配置为弯曲以使得所述栅极所在位置处的所述保护层与所述沟道区所在位置处的所述钝化层接触设置。
  5. 根据权利要求4所述的显示面板，其中，所述栅极所在位置处的所述保护层突出于所述对置基板并形成突起，所述沟道区所在位置处的所述钝化层凹向所述第一衬底基板并形成凹槽，所述突起被配置为在所述显示面板弯曲时插入所述凹槽。
  6. 根据权利要求1-5中任一项所述的显示面板，其中，所述对置基板还包括：
    多个滤光片；以及
    黑矩阵，所述黑矩阵设置在各所述滤光片周边，
    其中，所述栅极在所述第二衬底基板上的正投影落入所述黑矩阵在所述第二衬底基板上的正投影。
  7. 根据权利要求6所述的显示面板，其中，所述多个滤光片呈阵列排布，所述对置基板还包括：
    栅线，沿所述阵列的行方向延伸，所述栅线与所述滤光片交叠。
  8. 根据权利要求1-5中任一项所述的显示面板，其中，所述对置基板还 包括：
    隔垫物，所述隔垫物在所述第二衬底基板上的正投影落入所述黑矩阵在所述第二衬底基板上的正投影。
  9. 一种显示面板的制作方法，包括：
    在第一衬底基板上形成源极、漏极、有源层以及钝化层以形成阵列基板，所述有源层包括源极区域、漏极区域以及所述源极区域和漏极区域之间的沟道区；
    在第二衬底基板上形成栅极以形成对置基板；以及
    将所述阵列基板和所述对置基板对盒，且使所述第一衬底基板的形成有所述源极、漏极、有源层以及钝化层的一侧面对所述第二衬底基板的形成有所述栅极的一侧，
    其中，所述栅极与所述沟道区所在位置处的所述钝化层相对间隔设置。
  10. 根据权利要求9所述的显示面板的制作方法，还包括：
    弯曲所述显示面板以形成曲面显示面板，以使得所述栅极与所述沟道区所在位置处的所述钝化层的间隔减小。
  11. 根据权利要求10所述的显示面板的制作方法，还包括：
    在所述弯曲所述显示面板以形成曲面显示面板之前，在所述栅极远离所述第二衬底基板的一侧形成保护层，
    其中，所述栅极所在位置处的所述保护层与所述沟道区所在位置处的所述钝化层相对间隔设置。
  12. 根据权利要求11所述的显示面板的制作方法，所述弯曲所述显示面板以形成曲面显示面板，以使得所述栅极与所述沟道区所在位置处的所述钝化层的间隔减小具体包括：弯曲所述显示面板以形成曲面显示面板，以使得所述栅极所在位置处的所述保护层与所述沟道区所在位置处的所述钝化层接触设置。
  13. 根据权利要求10所述的显示面板的制作方法，所述弯曲所述显示面板以形成曲面显示面板，以使得所述栅极与所述沟道区所在位置处的所述钝化层的间隔减小包括：
    根据所述源极、所述漏极、所述有源层的电学性质控制弯曲所述显示面板的弯曲程度。
  14. 根据权利要求9或10所述的显示面板的制作方法，其中，所述对盒 所述阵列基板和所述对置基板在真空环境下进行。
  15. 一种显示装置，包括根据权利要求1-8中任一项所述的显示面板。
PCT/CN2017/090556 2016-12-26 2017-06-28 显示面板及其制作方法以及显示装置 Ceased WO2018120695A1 (zh)

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