WO2018000431A1 - 在软性基板上形成导电图形的方法 - Google Patents

在软性基板上形成导电图形的方法 Download PDF

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Publication number
WO2018000431A1
WO2018000431A1 PCT/CN2016/088194 CN2016088194W WO2018000431A1 WO 2018000431 A1 WO2018000431 A1 WO 2018000431A1 CN 2016088194 W CN2016088194 W CN 2016088194W WO 2018000431 A1 WO2018000431 A1 WO 2018000431A1
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Prior art keywords
layer
ink
substrate
metal film
forming
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PCT/CN2016/088194
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English (en)
French (fr)
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吴孟锠
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吴孟锠
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Priority to PCT/CN2016/088194 priority Critical patent/WO2018000431A1/zh
Publication of WO2018000431A1 publication Critical patent/WO2018000431A1/zh

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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/18—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/22—Secondary treatment of printed circuits
    • H05K3/28—Applying non-metallic protective coatings

Definitions

  • the present invention relates to a method of forming a conductive pattern on a substrate, particularly a method of forming a conductive pattern in a roll-to-roll manner on a flexible substrate.
  • the 3D package should increase the chip density processing capability per unit area.
  • the chip is packaged in three dimensions, the chip is stacked, and the package is three-dimensionally packaged to increase the package density per unit area.
  • the surface roughness of the wires on the board is greatly affected. For example, a signal conductor carrying 10G, the surface roughness of the circuit is less than or equal to 1 micrometer; and the roughness specification for carrying the 100G signal is required to be less than 0.1 micrometer.
  • the surface roughness of the line copper line of the three-dimensional high-density package substrate with a line width of 10-20 micrometers needs to be within 2 micrometers. If the roughness is too large, the line may be deformed or the line may be short-circuited due to the residual copper, and high-precision and reliable interconnection cannot be achieved.
  • the related technology is to use a semi-additive process (SAP) to fabricate lines below 50 micrometers, and SAP technology can even achieve a line width of less than 25 The micron wire line; the other is called modified semi-additive (Modified SAP, MSAP).
  • SAP semi-additive process
  • MSAP modified semi-additive
  • FIG. 1 shows the process steps for fabricating a metal conductive line on a substrate using conventional SAP/MSAP techniques.
  • the difference between SAP and MSAP process is that the substrate material used by SAP is not covered by metal (copper) layer.
  • a layer of chemical copper (about 1.5 microns) is deposited on the surface of the substrate on which the circuit is to be fabricated, and then developed.
  • the process is the same as the process; while the surface of the substrate used by the MSAP has been 3-5 micrometers thick electrolytic copper, the electrolytic copper layer is etched to about 2 micrometers by chemical etching before the circuit is formed (step S101). Thereafter, a dry film having a photosensitive property is attached to the copper surface by a pretreatment (step S103) and a stamper (step S105). Further, using the micro-developing technique commonly used in the semiconductor industry, the dry film is formed into a default pattern through the processes of exposure (step S107) and development (step S109) to be used as a mold for the subsequent electroplating copper process (step S111). Form the basic appearance of the desired metal line.
  • step S113 After copper plating, it is usually necessary to wash with a chemical solution (step S113). Finally, it is also necessary to remove the excess dry film on the surface of the substrate (step S115), and then remove the chemical copper originally disposed on the surface of the substrate by chemical etching, which is called flash erosion (step S117).
  • a method of forming a conductive pattern on a substrate comprising the steps of: (a) disposing a first patterned ink layer on the first surface, Forming a plurality of first ink shielding regions on the surface and a plurality of first open regions between the plurality of first ink shielding regions; (b) at least one pre-corresponding to the plurality of first open regions on the substrate Forming a portion to form at least one through hole; (c) forming a first metal film layer on the first surface on which the first patterned ink layer is disposed to cover the plurality of first ink shielding regions and the plurality of first openings And (d) removing the first patterned ink layer and the first metal film layer covering the plurality of first ink masking regions.
  • a method of forming a conductive pattern on a flexible substrate comprising the steps of: (a) Configuring a first patterned ink layer on the first surface to form a plurality of first ink masking regions and a plurality of first open regions between the plurality of first ink masking regions on the first surface; (b) Forming a first metal film layer on the first surface of the first patterned ink layer to cover the plurality of first ink masking regions and the plurality of first open regions; (c) corresponding to the substrate Forming at least one through hole in at least one predetermined portion of the plurality of first open regions; (d) disposing a metal in the through hole to make both ends of the through hole conductive; and (e) removing the first patterned ink And a layer of the first metal film covering the plurality of first ink masking regions.
  • a method of forming a conductive pattern comprising the steps of: (a) providing a bare board substrate, wherein the bare board substrate has a surface; (b) the surface configuration corresponds to a patterned ink layer of the conductive pattern; (c) forming a metal film layer on the surface on which the patterned ink layer is disposed; and (d) removing the patterned ink layer and covering the metal on the patterned ink layer The film layer is obtained to obtain the conductive pattern.
  • a method of forming a conductive pattern comprising the steps of: (a) providing a bare board substrate, wherein the bare board substrate has a surface; and (b) forming a surface on the surface a metal film layer; (c) disposing a patterned ink layer corresponding to the conductive pattern on the first metal film layer; (d) forming a second metal film layer on the surface on which the patterned ink layer is disposed; e) removing the patterned ink layer and the second metal film layer overlying the patterned ink layer; and (f) etching to remove the first metal film layer previously covered by the patterned ink layer to obtain The conductive pattern.
  • FIG. 1 is a schematic diagram showing the flow steps using conventional SAP/MSAP techniques
  • 2A-2I are respectively schematic cross-sectional views showing various steps of the present invention.
  • FIG. 3 is a cross-sectional view showing an embodiment of the present invention for fabricating a multilayer circuit board
  • 4A-4I are respectively schematic cross-sectional views showing various steps of another embodiment of the present invention.
  • FIG. 2A there is shown a schematic cross-sectional view of a substrate 200 used in the present invention.
  • the substrate 200 is a bare substrate having no metal (copper) layer or other different material covering thereon, preferably soft.
  • the substrate 200 has a first surface 210 and a second surface 220 relative to the first surface 210.
  • a layer of interface material may be disposed on the first surface 210 and the second surface 220 of the substrate 200, respectively.
  • the interface material used has good affinity for the material of the substrate and the metal, and is advantageous for the metal to be attached thereto.
  • interface coatings 211 and 221 facilitate future bonding of the metal layer and substrate 200, but are not necessary in accordance with embodiments of the present invention.
  • the present invention utilizes a continuous printing manner to dispose a first patterned ink layer 213 on the first surface 210 to form a plurality of first ink masking regions 217 on the first surface 210, and in the plurality of A plurality of first open areas 215 between the ink masking regions 217.
  • the second patterned ink layer 223 may be disposed on the second surface 220 in the same manner to form a plurality of second ink masking regions 227 on the second surface 220 and located in the plurality of A plurality of second open regions 225 between the two ink masking regions 227.
  • the patterns formed on the substrate by the patterned ink layers 213 and 223 are designed according to the metal wire patterns predetermined on the respective surfaces, and the open areas 215 and 225 are basically preset.
  • the ink may be a release resin or a mixture having similar effects. Although it is applied to the surface of the substrate 200 by screen printing, stencil printing or stencil printing, it is easily removed afterwards.
  • the existing method was mechanical drilling, and in order to make a finer circuit, laser drilling can be used.
  • at least one through hole 230 may be formed in the substrate 200 corresponding to at least one predetermined portion of the plurality of first open regions 213.
  • the embodiment shown in the figures has two through holes 230, however this is merely for convenience of introduction of the present invention, and the practical application is not limited thereto.
  • the step of forming the through holes may be arranged after the step shown in FIG. 2E or before the step of arranging the first patterned ink layer 213 on the first surface 210, drilling at a predetermined position.
  • the first metal film may be formed on the first surface 210 of the first patterned ink layer 213 by sputtering or evaporation.
  • Layer 219 covers the plurality of first ink masking regions 217 and the plurality of first open regions 215.
  • the through hole 230 is already disposed on the substrate 200 and belongs to a configuration of a generally vertical through substrate, the hole wall 233 of the through hole 230 is not easily plated with the metal film layer 219.
  • the via hole is formed 230, the same as the device structure shown in Fig. 2E can be formed.
  • the second metal film layer 229 may be formed on the second surface 220 on which the second patterned ink layer 223 is disposed in the same manner to cover a plurality of Two ink masking regions 227 and the plurality of second open regions 225.
  • an activated metal 235 e.g., palladium
  • a metal such as copper, silver or gold
  • FIG. 2G a metal layer 237 is disposed on each of the hole walls 233 to a desired thickness by electroplating to ensure a conductive circuit is formed between both ends 231 and 232 of the via 230.
  • the circuits disposed on the upper and lower surfaces 210, 220 of the substrate 200 can be properly coupled through the metal layer 237 of the vias 230.
  • an important step of the present invention is to separately remove the first patterned ink layer 213 and the first covering the plurality of first ink masking regions 217 by rinsing. a metal film layer 219, and removing the second ink layer 223 and the second metal film layer 229 covering the plurality of second ink masking regions 227, leaving a first metal film layer covering those first open regions 215 219 and a second metal film layer 229 overlying those second open regions 225.
  • the ink used in the present invention is a release ink
  • the adhesion ability to the interface coating 211, 221 material (when the interface coating is disposed) or the substrate 200 (when the interface coating is not disposed) is far less than the metal film layer. 219, 229 adhesion to the interface material or the substrate 200, so under the impact of the water flow, the ink is easily detached, and the metal film originally covering the ink is also peeled off.
  • the above steps can be achieved as long as the adhesion of the ink itself is lower than the adhesion of the metal film to the substrate or the interface material.
  • the method of removing the metal film covering the ink masking area is not limited to water flow washing, and may be performed by brushing or other means.
  • the use of release ink can improve the effect of being washed away from the surface of the substrate by water, and from an engineering point of view, higher production efficiency and better construction quality can be expected.
  • the first metal film layer 219 on the first surface 210 of the substrate 200 covering the first open regions 215, and the second surface 220 are left.
  • the lower second metal film layer 229 overlying those second open regions 225 has been conformed to the pre-designed metal wire pattern. Therefore, the method of forming a conductive pattern on a substrate of the present invention is also achieved.
  • the first metal film layer 219 or 229 may be further plated with a first layer by electroplating.
  • the metal layer 218 and the second plated metal layer 228 are plated to a thickness that meets specifications.
  • FIG. 2A to 2I briefly illustrate a method of fabricating a multilayer (two-layer) metal wire circuit on a substrate of the present invention.
  • a multi-layered multi-layer circuit board it is necessary to laminate two or more circuit boards into a single unit by means of a stack.
  • FIG 3 there is shown a cross-sectional view of an embodiment of the present invention for fabricating a multilayer circuit board.
  • a person skilled in the art can perform the pressing step of more layers of circuit boards according to the same concept.
  • the first surface 310 and the second surface 320 of the first substrate 311 are respectively disposed with metal conductive lines 314 and 324 electrically connected by a plurality of through holes 350 internally provided with metal conductors;
  • the first surface 410 and the second surface 220 are also disposed with metal conductive lines, and are electrically connected to each other through a plurality of through holes having metal conductors disposed therein.
  • the metal circuit 450 disposed on the second substrate 400 is provided. Think of one. The above metal circuit disposed on the substrate is fabricated in accordance with the flow described in FIGS. 2A through 2I.
  • the first substrate 311 and the second substrate 400 are preferably flexible substrates to facilitate the roll-to-roll continuous process and increase the production efficiency.
  • the press-bonding process can also be carried out by means of roll-to-sheet.
  • the gel material 500 needs to be disposed between the first substrate 311 and the second substrate 400. It is necessary to select a soft rubber, a semi-cured rubber or a heat curing glue.
  • the manufacturing method proposed by the present invention can select the laminated multilayer circuit board to be a flexible multilayer circuit board or a rigid multilayer circuit board, or even a soft and hard bonding board to conform to A variety of different application needs.
  • the metal conductive lines 324 on the second surface 320 of the first substrate 311 and the metal circuit 450 of the second substrate 400 can be electrically connected at appropriate positions, so that the two pieces are made.
  • the circuit on the substrate is combined into one.
  • a through hole provided with a metal may be formed as needed, as shown in the center of the through hole assembly. Subsequently, if more layers of the circuit board are to be formed, the steps of pressing and drilling can be repeated to achieve the required number of layers, and the details are not repeated here.
  • FIG. 4A shows a cross-sectional view of a substrate 400 used in the present invention.
  • the substrate 400 is a bare substrate having no metal (copper) layer or other different materials on top, preferably one.
  • a flexible substrate adapted to perform a plurality of subsequent steps in a roll-to-roll manner. As shown, the substrate 400 has a first surface 410 and a second surface 420 relative to the first surface 410.
  • a layer of metal is disposed on the first surface 410 and the second surface 420 of the substrate 400 to form thin metal layers 411 and 421, respectively.
  • the metal material disposed on the substrate 400 generally contains copper or nickel or palladium. It is worth mentioning that, according to a preferred embodiment of the present invention, the thin metal layers 411 and 421 can form a grid-like pattern (not shown) by means of the aforementioned patterning of the ink layer, thereby avoiding metal. After the wire is formed, the stress caused by the difference in thermal expansion coefficient between the metal and the substrate material deforms the wire, and the subsequent flashing process is more easily controlled.
  • the present invention utilizes a continuous printing manner to dispose a first patterned ink layer 413 on the first surface 410 to form a plurality of first ink masking regions 417 on the first surface 410. And a plurality of first open areas 415 between the plurality of first ink masking regions 417.
  • the second patterned ink layer 423 may be disposed on the second surface 420 in the same manner to form a plurality of second ink masking regions 427 on the second surface 420 and located in the plurality of surfaces A plurality of second open areas 425 between the second ink masking regions 427.
  • the patterns formed on the substrate by the patterned ink layers 413 and 423 are designed according to the metal wire patterns predetermined on the respective surfaces, and the open areas 415 and 425 are basically preset.
  • the ink may be a release resin or a mixture having similar effects. Although it is applied to the surface of the substrate 400 by screen printing, stencil printing or stencil printing, it is easily removed afterwards.
  • the substrate 400 in order to allow the circuits on different surfaces of the substrate 400 to be properly turned on, it is necessary to drill holes at predetermined positions of the substrate 400 to form a metal circuit penetrating the upper and lower layers.
  • at least one through hole 430 may be formed in the substrate 400 corresponding to at least one predetermined portion of the plurality of first open regions 413.
  • the embodiment shown in the figures has two through holes 430, however this is merely for convenience of introduction of the present invention, and the practical application is not limited thereto.
  • the step of forming the through holes may be arranged after the step shown in FIG. 4E or before the step of arranging the first patterned ink layer 413 on the first surface 410, drilling at a predetermined position.
  • the first plated metal layer 418 may be directly formed on the first surface 410 of the first patterned ink layer 413 by electroplating.
  • the plurality of first ink masking regions 417 and the plurality of first open regions 415 are covered.
  • the through hole 430 is already disposed on the substrate 400 and belongs to a configuration of a generally vertical through substrate, the hole wall 433 of the through hole 430 is not easily plated with metal.
  • the device structure as shown in FIG. 4E can be formed as well.
  • a second plating metal layer 428 may be formed on the second surface 420 on which the second patterned ink layer 423 is disposed in the same manner to cover the plurality of Two ink masking regions 227 and the plurality of second open regions 225.
  • an activated metal 435 e.g., palladium
  • a metal such as copper, silver or gold
  • a metal layer 437 is disposed on each of the hole walls 433 to a desired thickness by electroplating to ensure a conductive circuit is formed between both ends 431 and 432 of the via 430.
  • an important step of the present invention is to separately remove the first patterned ink layer 413 and the first covering the plurality of first ink masking regions 417 by rinsing. Electroplating a metal layer 418, and removing the second ink layer 423 and the second plating metal layer 228 overlying the plurality of second ink masking regions 427 leaving a first plated metal layer overlying the first open regions 415 418 and a second plated metal layer 428 overlying those second open regions 425.
  • the adhesion to the substrate 400 is far less than the adhesion of the plated metal layers 418 and 428 to the substrate 400. Therefore, under the impact of the water flow, the ink is easily peeled off, and the associated The plated metal layer that originally covered the ink was also peeled off.
  • the method of removing the plated metal layer covering the ink masking region is not limited to water jet washing, and may be performed by brushing or other means.
  • the remaining surface on the first surface 410 of the substrate 400 is covered by that
  • the first plated metal layer 418 on the first open area 415 and the second plated metal layer 428 on the second surface 420 overlying the second open areas 425 have been conformed to the pre-designed metal Wire pattern.
  • the thickness of the thin metal layer 411 when the first surface 410 of the substrate 400 is etched by means of flash etching, since the thickness of the thin metal layer 411 is far less than the thickness of the first plated metal layer 418, under a proper process control, when a thin metal layer When the exposed portion of 411 is etched out, the thickness of the first plated metal layer 418 does not have much relative loss.
  • the thin metal layer 411 is formed into a mesh shape, or a metal such as nickel or palladium is used to form the thin metal layer 411, a person skilled in the art may choose an etching method to make the thin metal. The efficiency with which layer 411 is etched is higher than the efficiency with which first plated metal layer 418 is etched.
  • the finished circuit is formed on the first surface 410 of the substrate 400.
  • the second surface 420 of the substrate 400 is treated in the same manner, and the description thereof will not be repeated.
  • the method for forming a conductive pattern on a flexible substrate of the present invention can be performed in a roll-to-roll manner in a plurality of process steps, which greatly improves the efficiency of mass production.
  • the method for forming a conductive pattern on a flexible substrate according to the present invention can be used to realize a circuit having a line width/line pitch of less than 50 micrometers, and the present invention is free from the use of micro-developing technology, and the equipment cost required is much lower than that of the existing SAP or MSAP technology.
  • the invention uses the ink as a masking material to form a circuit pattern, and the ink can be easily removed, so that the use and cleaning of the chemical agent is not required, and the environmental problem of waste solution discharge is not formed. Therefore, the industrial utilization of the present invention is not only low in cost, high in efficiency, but also low in pollution, and fully meets the needs of the industry.
  • a method of forming a conductive pattern on a substrate, wherein the substrate has a first surface comprising the steps of: (a) disposing a first patterned ink layer on the first surface to form a plurality of layers on the surface a first ink masking region and a plurality of first open regions between the plurality of first ink masking regions; (b) forming at least one pass in the substrate corresponding to at least one predetermined portion of the plurality of first open regions a hole (c) forming a first metal film layer on the first surface on which the first patterned ink layer is disposed to cover the plurality of first ink masking regions and the plurality of first open regions; and (d) Removing the first patterned ink layer and the first metal film layer covering the plurality of first ink masking regions.
  • the substrate further has a second surface relative to the first surface
  • the method further comprising the step of: (b1) disposing a second patterned ink layer on the second surface, Forming a plurality of second ink masking regions on the surface and a plurality of second open regions between the plurality of second ink masking regions; (c1) configuring the second ink layer of the second patterned ink layer Forming a second metal film layer thereon to cover the plurality of second ink masking regions and the plurality of second opening regions; and (d1) removing the second ink layer and covering the plurality of second ink masking regions The second metal film layer.
  • step (b) or (b1) is produced in a roll-to-roll manner.
  • a method of forming a conductive pattern on a flexible substrate, wherein the substrate has a first surface and a second surface relative to the first surface comprising the steps of: (a) configuring the first surface a patterned ink layer to form a plurality of first ink masking regions on the first surface and a plurality of first open regions between the plurality of first ink masking regions; (b) configuring the first patterning Forming a first metal film layer on the first surface of the ink layer to cover the plurality of first ink shielding regions and the plurality of first opening regions; (c) corresponding to the plurality of first open regions in the substrate Forming at least one through hole at least one through hole; (d) disposing a metal in the through hole to make both ends of the through hole conductive; and (e) removing the first patterned ink layer and covering the plurality of The first metal film layer of the first ink masking region.
  • the method of embodiment 5, further comprising the steps of: (a1) disposing a second patterned ink layer on the second surface to form a plurality of second ink masking regions on the second surface and a plurality of second open regions between the plurality of second ink shielding regions; (b1) forming a second metal film layer on the second surface on which the second patterned ink layer is disposed to cover the plurality of second An ink masking region and the plurality of second open regions; and (e1) removing the second patterned ink layer and the second metal film layer covering the plurality of second ink mask regions.
  • a method of forming a conductive pattern comprising the steps of: (a) providing a bare board substrate, wherein the bare board substrate has a surface; (b) disposing a patterned ink corresponding to the conductive pattern on the surface a layer; (c) forming a metal film layer on the surface on which the patterned ink layer is disposed; and (d) removing the patterned ink layer and the metal film layer overlying the patterned ink layer to obtain the conductive layer Graphics.
  • step (b) further comprising: (b1) forming at least one through hole in the substrate corresponding to at least one predetermined portion of the plurality of first open regions; And (b2) disposing a metal in the through hole to electrically connect both ends of the through hole.
  • a method of forming a conductive pattern comprising the steps of: (a) providing a bare board substrate, wherein the bare board substrate has a surface; (b) forming a first metal film layer on the surface; Configuring a patterned ink layer corresponding to the conductive pattern on the first metal film layer; (d) forming a second metal film layer on the surface on which the patterned ink layer is disposed; (e) removing the patterned ink a layer and the second metal film layer overlying the patterned ink layer; and (f) etching to remove the first metal film layer previously covered by the patterned ink layer to obtain the conductive pattern.
  • step (c) further comprising: (c1) forming at least one through hole in the substrate corresponding to at least one predetermined portion of the plurality of first open regions; And (c2) disposing a metal in the through hole to make both ends of the through hole conductive

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Abstract

一种在基板 (200) 上形成导电图形的方法，其中该基板 (200)具有第一表面 (210)，该方法包括以下步骤：(a)在该第一表面 (210) 配置第一图形化油墨层 (213)，以在该表面 (210) 形成多个第一油墨遮蔽区 (217) 以及位于该多个第一油墨遮蔽区 (217) 之间的多个第一开放区 (215)；(b)在该基板 (200) 对应于该多个第一开放区 (215) 的至少一个预设部位形成至少一个通孔 (230)；(c)在配置该第一图形化油墨层 (213) 的该第一表面 (210) 上形成第一金属膜层 (219)，以覆盖该多个第一油墨遮蔽区 (217) 以及该多个第一开放区 (215)；以及(d)去除该第一图形化油墨层 (213) 以及覆盖于该多个第一油墨遮蔽区 (217) 的该第一金属膜层 (219)。

Description

在软性基板上形成导电图形的方法 技术领域
本发明是关于一种在基板上形成导电图形的方法，特别是在软性基板上以卷对卷的方式形成导电图形的方法。
背景技术
随着集成电路线路越来越细的发展，线路的细化，导致对于设备和工艺提出了新的挑战。3D封装应运提高单位面积上的芯片密度处理能力，芯片进行三维集成封装，芯片进行堆栈，三维封装，提高单位面积上的封装密度。为能乘载与传送不同传输频率的信号，电路板上的导线的表面粗糙度影响甚巨。例如承载10G的信号导线，电路表面的粗糙度要小于等于1微米；而对于承载100G信号的粗糙度规格更要求小于0.1微米。此外，三维高密度封装基板的线宽线距10-20微米的线路铜线表面粗糙度需要在2微米以内。如果粗糙度过大，就会发生线路变形或线间因铜的残留导致短路现象，无法实现高精度可靠互连。
当集成电路三维封装上导线的线宽线距小于50微米时，相关技术是采用半加成工艺(Semi-Additive Process,SAP)来制造50微米以下的线路，SAP技术甚至可以实现线宽小于25微米的导线线路；另一种是称之为改良型半加成法(Modified SAP,MSAP)。请参阅图1，其显示运用传统的SAP/MSAP技术在基板上制作金属导电线路的流程步骤。SAP与MSAP工艺的区别是，SAP所用的基板材料上面并没有金属(铜)层覆盖，在制作线路前需在预定制作线路的基材表面沉积一层化学铜(约1.5微米)，然后进行显影等工艺；而MSAP所使用的基材表面已经有3-5微米厚的电解铜，制作线路前需用化学蚀刻的方式将电解铜层咬蚀到约2微米(步骤S101)。之后，透过前处理(步骤S103)和压模(步骤S105)等方式，将具有感光性质的干膜贴附在铜面上。再使用半导体产业常用的微显影技术，透过曝光(步骤S107)和显影(步骤S109)的制程而将让干膜形成默认的图案，以用作为后续电镀铜制程(步骤S111)的模具，以形成所需要的金属线路的基本外型。在镀铜之后，通常需要以化学溶液清洗(步骤S113)。最后，还需要将基材表面上多余的干膜去除(步骤S115)，再将最初配置于基材表面的化学铜用化学蚀刻的方式去除，称之为闪蚀(步骤S117)。
上述的工艺程序中，需要多次的化学药剂的使用和清洗，构成废溶液排放的环保问题，而且微显影技术所需要的设备成本极为可观，更需要能够充分掌控蚀刻的制程步骤，以提高制程良率。所以无论在设备、良率或是环境问题的考虑上，SAP或MSAP技术都需要高额的成本。有的业者舍弃传统的SAP或MSAP技术改以使用导电银胶直接图布在基板上的 方式来制作电路板上的线路，例如手机上的触控面板。然而，当线宽线距小于50微米时，为能够符合电性规格的要求，导电银胶中需要使用奈米级的银粉颗粒，这样下来的成本更是难以负荷。
发明内容
因此，需要一种能够克服现有SAP或MSAP所存在的问题，特别是要能兼顾成本和防制污染功效的多层电路板制作方法。为了达成本发明的目的，提出一种在基板上形成导电图形的方法，其中该基板具有第一表面，该方法包括以下步骤：(a)在该第一表面配置第一图形化油墨层，以在该表面形成多个第一油墨遮蔽区以及位于该多个第一油墨遮蔽区之间的多个第一开放区；(b)在该基板对应于该多个第一开放区的至少一个预设部位形成至少一个通孔；(c)在配置该第一图形化油墨层的该第一表面上形成第一金属膜层，以覆盖该多个第一油墨遮蔽区以及该多个第一开放区；以及(d)去除该第一图形化油墨层以及覆盖于该多个第一油墨遮蔽区的该第一金属膜层。
依据本发明另一实施方式，提出一种在软性基板上形成导电图形的方法，其中该基板具有第一表面和相对于该第一表面的第二表面，该方法包括以下步骤：(a)在该第一表面配置第一图形化油墨层，以在该第一表面形成多个第一油墨遮蔽区以及位于该多个第一油墨遮蔽区之间的多个第一开放区；(b)在配置该第一图形化油墨层的该第一表面上形成第一金属膜层，以覆盖该多个第一油墨遮蔽区以及该多个第一开放区；(c)在该基板对应于该多个第一开放区的至少一个预设部位形成至少一个通孔；(d)在该通孔中配置金属，使该通孔的两端导通；以及(e)去除该第一图形化油墨层以及覆盖于该多个第一油墨遮蔽区的该第一金属膜层。
依据本发明另一实施方式，提出一种形成导电图形的方法，该方法包括以下步骤：(a)提供裸板基材，其中该裸板基材具有表面；(b)在该表面配置对应于该导电图形的图形化油墨层；(c)在配置该图形化油墨层的该表面上形成金属膜层；以及(d)去除该图形化油墨层以及覆盖于该图形化油墨层上的该金属膜层，以获得该导电图形。
依据本发明另一实施方式，提出一种形成导电图形的方法，该方法包括以下步骤：(a)提供裸板基材，其中该裸板基材具有表面；(b)在该表面上形成第一金属膜层；(c)在该第一金属膜层上配置对应于该导电图形的图形化油墨层；(d)在配置该图形化油墨层的该表面上形成第二金属膜层；(e)去除该图形化油墨层以及覆盖于该图形化油墨层上的该第二金属膜层；以及(f)蚀刻以去除先前被该图形化油墨层覆盖的该第一金属膜层，以获得该导电图形。
附图说明
图1是示意图，显示运用传统的SAP/MSAP技术的流程步骤；
图2A-2I分别是用以显示本发明各步骤的多个剖面示意图；
图3是用以显示本发明制作多层电路板实施例的剖面示意图；
图4A-4I分别是用以显示本发明另一实施方式各步骤的多个剖面示意图。
附图标记：
200/311/400 基板
210/310/410 第一表面
211/221/312/322/412/422 界面涂层
213/413 第一图形化油墨层
215/415 第一开放区
217/417 第一油墨遮蔽区
218/418 第一电镀金属层
219 第一金属膜层
220/320/420 第二表面
223/423 第二图形化油墨层
225/425 第二开放区
227/427 第二油墨遮蔽区
228/428 第二电镀金属层
229 第二金属膜层
230/350/430 通孔
231/232 通孔端
233 孔壁
237 金属层
411/421 薄金属层
450 金属电路
500 胶质材料。
具体实施方式
以下提供本发明在软性基板上以卷对卷的方式形成导电图形的方法的详细实施例并佐以参考图。
请参阅图2A，其显示本发明所使用的基板200的剖面示意图，该基板200是一种在上面并没有任何金属(铜)层或其它不同材质覆盖的裸板基材，较佳者为软性基板，其适合于进行以卷对卷的方式实施后续的多个步骤。如图，基板200具有第一表面210和相对于第一表面210的第二表面220。
参阅图2B，由于一般的基板的材质和金属之间并未具有高度的亲和性，为了改善这个问题，可以在基板200的第一表面210和第二表面220上分别配置一层接口材料，成为接口涂层211和221。所使用的接口材料对于基板的材质和金属同时具有良好的亲和性，有利于让金属附着其上。特别一提，依据本发明的实施方式，接口涂层211和221有助于未来的金属层和基板200的结合，但并非必要。
参阅图2C，本发明利用连续印刷的方式，在第一表面210上配置第一图形化油墨层213，以在第一表面210上形成多个第一油墨遮蔽区217，以及位于该多个第一油墨遮蔽区217之间的多个第一开放区215。如果需要在两个表面配置金属线路，可以用相同的方法在第二表面220配置第二图形化油墨层223，以在第二表面220形成多个第二油墨遮蔽区227以及位于该多个第二油墨遮蔽区227之间的多个第二开放区225。本领域专业人士可以理解，图形化油墨层213和223在基板上所形成的图案是依据预定配置于各表面上的金属导线图案而设计的，而开放区215和225基本上就是预设于各表面上的金属导线图案。所述的油墨可以是离型树脂或是具有类似功效的混合物，虽然以网印、绢印或刻版印刷等方式涂布于基板200表面，但是之后很容易被清除。
参阅图2D，为了让位于基板200不同表面上的电路能够适当的导通，需要在基板200预定的位置钻孔来制作贯穿上下层的金属电路。过去现有的方式是机械钻孔，而为了制作较精细的电路，则可以使用雷射钻孔。当第一图形化油墨层213形成之后，就可在基板200对应于该多个第一开放区213的至少一个预设部位形成至少一个通孔230。图中显示的实施例是有两个通孔230，然而这仅仅是为了方便介绍本发明，实际应用不在此限。此外，形成通孔的步骤也可以安排在图2E所示的步骤之后，或是在第一表面210上配置第一图形化油墨层213的步骤之前，按照预定的位置钻孔。
参阅图2E，接续上述的步骤，当第一图形化油墨层213形成之后，就可以在配置第一图形化油墨层213的第一表面210上以溅镀或蒸镀等方式形成第一金属膜层219，以覆盖该多个第一油墨遮蔽区217以及该多个第一开放区215。图中可知，如果基板200上已经配置有通孔230，而且属于一般垂直贯通基板的构型，则通孔230的孔壁233部位不容易被镀上金属膜层219。依照另一实施方式，如果选择先形成第一金属膜层219再制作通孔 230，也一样可以形成如第2E图所示的装置结构。此外，如果需要在两个表面都配置金属线路，可以用相同的方法在在配置该第二图形化油墨层223的第二表面220之上形成第二金属膜层229，以覆盖多个等第二油墨遮蔽区227以及该多个第二开放区225。
参阅图2F，当通孔230形成于基板200中之后，为了让通孔230的两端231和232之间形成导通的电路，需要透过浸泡的方式让通孔230的孔壁233上面附着有活化金属235(例如钯)，以作为化学镀铜的活性催化中心，后续再以化学电镀金属的方式电镀铜、银或金之类的金属于孔壁233的表面。如图2G所示，透过电镀，在每个孔壁233的上配置金属层237到达所需的厚度，以确保通孔230的两端231和232之间形成导通的电路。此后，基板200上下两个表面210、220上所配置的电路就可以透过这些通孔230的金属层237而适当的联结。
参阅图2F，并且和图2G相比较，其显示本发明的一个重要步骤，就是用冲洗的方式，分别去除第一图形化油墨层213以及覆盖于该多个第一油墨遮蔽区217的第一金属膜层219，和去除第二油墨层223以及覆盖于该多个第二油墨遮蔽区227的第二金属膜层229，而留下覆盖于那些第一开放区215上的第一金属膜层219以及覆盖于那些第二开放区225上的第二金属膜层229。由于本发明所使用的油墨性质为离型油墨，对于接口涂层211、221材料(当配置有接口涂层时)或基板200(当没有配置接口涂层时)的附着能力远不及金属膜层219、229对于接口材料或基板200的附着力，所以在水流的冲击之下，油墨很容易脱落，而连带的让原先覆盖于油墨上方的金属膜也一并剥离。其实只要所使用的油墨本身的附着力低于金属膜对基板或接口材料的附着力，就可以实现上述的步骤。去除覆盖于油墨遮蔽区金属膜的方法并不限于水流冲洗，也可用刷洗或其他方式来实施。利用离型油墨可以提高受水冲刷而脱离基板表面的效果，以工程的观点来说，可以预期较高的生产效率和较佳的施工质量。
完成了从图2G到图2H所示的步骤之后，基板200第一表面210上所留下的覆盖于那些第一开放区215上的第一金属膜层219，以及第二表面220上所留下的覆盖于那些第二开放区225上的第二金属膜层229，都已经符合所预先设计的金属导线图案。因此，也实现了本发明在基板上形成导电图形的方法。参阅图2I，如果金属膜219或229的厚度尚不符合规格所需，可以再透过电镀的方式，分别在第一金属膜层219和第二金属膜层229上再镀上一层第一电镀金属层218和第二电镀金属层228，以达到符合规格要求的厚度。
图2A到2I简单介绍本发明在一个基板上制作多层(两层)金属导线电路的方法。为了实现更多层的多层电路板，就需要透过堆栈的方式，将两层以上的电路基板压合成为一个整体。参阅图3，其本发明制作多层电路板实施例的剖面示意图。图中以两层电路板的压合为例，本领域专业人士可以依照相同的概念而推演出更多层电路板的压合步骤。如图， 第一基板311的第一表面310和第二表面320分别配置有金属导电线路314和324，两者之间以多个内部配置有金属导体的通孔350而电性连接；第二基板400的第一表面410和第二表面220也配置有金属导电线路，两者之间也以多个内部配置有金属导体的通孔电性连接，为了简单说明，配置于第二基板400的金属电路450视为一体。上述配置于基板上的金属电路是依照图2A到2I所述的流程而制作的。依据本发明实施例，第一基板311和第二基板400较佳为软性基板，以利于卷对卷的连续制程，增加生产效率。压合制程也可以透过卷对片的方式实施。压合之前，第一基板311和第二基板400之间需配置胶质材料500，是需要可选择软性胶、半固化胶或热固化胶。在后续的制程完成之后，本发明所提出的制作方式可以选择将压合后的多层电路板制作成为软性多层电路板或是硬性多层电路板，乃至于软硬结合板，以符合各种不同的应用需求。
压合完成后，从图3中可以了解，第一基板311的第二表面320上的金属导电线路324和第二基板400的金属电路450可在适当的位置电性连接，而使得这两片基板上的电路结合为一。此外，在两片基板311、400压合完成后，可以视需要再制作配置有金属于其内的通孔，如图中位于正中央的通孔组件所示。随后，如需制作更多层的电路板，可以重复压合和钻孔的步骤而达到所需要的层数，在此不重复赘述。
为了达到在基材的表面配置金属图案以利后续的电镀制程，也可以先行在基板上面以溅镀之类的方式配置一层较薄的金属层，最后再将不需要的部分以蚀刻的方式移除。请参阅图4A，其显示本发明所使用的基板400的剖面示意图，该基板400是一种在上面并没有任何金属(铜)层或其它不同材质覆盖的裸板基材，较佳者为一软性基板，其适合于进行以卷对卷的方式实施后续的多个步骤。如图，基板400具有第一表面410和相对于第一表面410的第二表面420。
参阅图4B，在基板400的第一表面410和第二表面420上分别配置一层金属，成为薄金属层411和421。所配置于基板400上的金属材料一般含有铜，或者是镍或钯。值得一提的是，依据本发明的较佳实施例，薄金属层411和421可以利用前述的透过图形化油墨层的方式而形成网格状的图形(未显示)，这样可以避免在金属导线形成之后，又因为金属与基板材质之间热膨胀系数的差异所形成的应力让导线变形，同时让后续的闪蚀过程更佳的容易控制。
参阅图4C，同前所述的概念，本发明利用连续印刷的方式，在第一表面410上配置第一图形化油墨层413，以在第一表面410上形成多个第一油墨遮蔽区417，以及位于该多个第一油墨遮蔽区417之间的多个第一开放区415。如果需要在两个表面都配置金属线路，可以用相同的方法在第二表面420配置第二图形化油墨层423，以在第二表面420形成多个第二油墨遮蔽区427以及位于该多个第二油墨遮蔽区427之间的多个第二开放区425。 本领域专业人士可以理解，图形化油墨层413和423在基板上所形成的图案是依据预定配置于各表面上的金属导线图案而设计的，而开放区415和425基本上就是预设于各表面上的金属导线图案。所述的油墨可以是离型树脂或是具有类似功效的混合物，虽然以网印、绢印或刻版印刷等方式涂布于基板400表面，但是之后很容易被清除。
参阅图4D，为了让位于基板400不同表面上的电路能够适当的导通，需要在基板400预定的位置钻孔来制作贯穿上下层的金属电路。当第一图形化油墨层413形成之后，就可在基板400对应于该多个第一开放区413的至少一个预设部位形成至少一个通孔430。图中显示的实施例是有两个通孔430，然而这仅仅是为了方便介绍本发明，实际应用不在此限。此外，形成通孔的步骤也可以安排在图4E所示的步骤之后，或是在第一表面410上配置第一图形化油墨层413的步骤之前，按照预定的位置钻孔。
参阅图4E，接续上述的步骤，当第一图形化油墨层413形成之后，就可以在配置第一图形化油墨层413的第一表面410上直接以电镀的方式形成第一电镀金属层418，以覆盖该多个第一油墨遮蔽区417以及该多个第一开放区415。图中可知，如果基板400上已经配置有通孔430，而且属于一般垂直贯通基板的构型，则通孔430的孔壁433部位不容易被镀上金属。依照另一实施方式，如果选择先形成第一电镀金属层218再制作通孔430，也一样可以形成如第4E图所示的装置结构。此外，如果需要在两个表面都配置金属线路，可以用相同的方法在在配置该第二图形化油墨层423的第二表面420之上形成第二电镀金属层428，以覆盖该多个第二油墨遮蔽区227以及该多个第二开放区225。
参阅图4F，当通孔430形成于基板400中之后，为了让通孔430的两端431和432之间形成导通的电路，需要透过浸泡的方式让通孔430的孔壁433上面附着有活化金属435(例如钯)，以作为化学镀铜的活性催化中心，后续再以化学电镀金属的方式电镀铜、银或金之类的金属于孔壁433的表面。如图4G所示，透过电镀，在每个孔壁433的上配置金属层437到达所需的厚度，以确保通孔430的两端431和432之间形成导通的电路。
参阅图4F，并且和图4G相比较，其显示本发明的一个重要步骤，就是用冲洗的方式，分别去除第一图形化油墨层413以及覆盖于该多个第一油墨遮蔽区417的第一电镀金属层418，和去除第二油墨层423以及覆盖于该多个第二油墨遮蔽区427的第二电镀金属层228，而留下覆盖于那些第一开放区415上的第一电镀金属层418以及覆盖于那些第二开放区425上的第二电镀金属层428。由于本发明所使用的油墨性质为离型油墨，对于基板400的附着能力远不及电镀金属层418、428对于基板400的附着力，所以在水流的冲击之下，油墨很容易脱落，而连带的让原先覆盖于油墨上方的电镀金属层也一并剥离。去除覆盖于油墨遮蔽区电镀金属层的方法并不限于水流冲洗，也可用刷洗或其他方式来实施。
完成了从图4G到图4H所示的步骤之后，基板400第一表面410上所留下的覆盖于那 些第一开放区415上的第一电镀金属层418，以及第二表面420上所留下的覆盖于那些第二开放区425上的第二电镀金属层428，都已经符合所预先设计的金属导线图案。然而，在基板上所形成的导电图形之间仍存在薄金属层，必需以蚀刻的方式去除。参阅图4I，当使用闪蚀的方式对基板400第一表面410进行蚀刻，由于薄金属层411的厚度远逊于第一电镀金属层418的厚度，在适当的制程控制下，当薄金属层411露出的部分被蚀刻殆尽时，第一电镀金属层418的厚度并没有太多相对的损失。依据一些较佳实施方式，如果薄金属层411被制作成网格形状，或是使用镍钯之类的金属来形成薄金属层411，本领域专业人士可以选择是当的蚀刻方式而让薄金属层411被蚀刻的效率高于第一电镀金属层418被蚀刻的效率。如图，当完成对导电图形之间薄金属层411的蚀刻之后，基板400第一表面410上就形成的完者的电路。对基板400第二表面420的处理方式相同，不再重复说明。
综上所述，本发明在软性基板上形成导电图形的方法可以再多个制程步骤中以卷对卷的方式进行，大幅提升了量产的效率。本发明所提出在软性基板上形成导电图形的方法可用于实现线宽/线距小于50微米的电路，本发明免于使用微显影技术，所需要的设备成本远低于现有的SAP或MSAP技术。本发明使用油墨作为遮蔽材料来制作电路图案的方法，油墨可以轻易的去除，所以不需要多次的化学药剂的使用和清洗，不至于构成废溶液排放的环保问题。因此，本发明极具的产业利用性，不但成本低，效率高，而且低污染，完全符合产业所需。
实施例
1.一种在基板上形成导电图形的方法，其中该基板具有第一表面，该方法包括以下步骤：(a)在该第一表面配置第一图形化油墨层，以在该表面形成多个第一油墨遮蔽区以及位于该多个第一油墨遮蔽区之间的多个第一开放区；(b)在该基板对应于该多个第一开放区的至少一个预设部位形成至少一个通孔；(c)在配置该第一图形化油墨层的该第一表面上形成第一金属膜层，以覆盖该多个第一油墨遮蔽区以及该多个第一开放区；以及(d)去除该第一图形化油墨层以及覆盖于该多个第一油墨遮蔽区的该第一金属膜层。
2.如实施例1所述的方法，其中该基板还具有相对于该第一表面的第二表面，该方法还包括以下步骤：(b1)在该第二表面配置第二图形化油墨层，以在该表面形成多个第二油墨遮蔽区以及位于该多个第二油墨遮蔽区之间的多个第二开放区；(c1)在配置该第二图形化油墨层的该第二油墨层之上形成第二金属膜层，以覆盖该多个第二油墨遮蔽区以及该多个第二开放区；以及(d1)去除该第二油墨层以及覆盖于该多个第二油墨遮蔽区的该第二金属膜层。
3.如实施例1或2所述的方法，还包括在该通孔中配置金属，使该通孔的两端导通。
4.如实施例1至3所述的方法，其中步骤(b)或(b1)是以卷对卷的方式制作。
5.一种在软性基板上形成导电图形的方法，其中该基板具有第一表面和相对于该第一表面的第二表面，该方法包括以下步骤：(a)在该第一表面配置第一图形化油墨层，以在该第一表面形成多个第一油墨遮蔽区以及位于该多个第一油墨遮蔽区之间的多个第一开放区；(b)在配置该第一图形化油墨层的该第一表面上形成第一金属膜层，以覆盖该多个第一油墨遮蔽区以及该多个第一开放区；(c)在该基板对应于该多个第一开放区的至少一个预设部位形成至少一个通孔；(d)在该通孔中配置金属，使该通孔的两端导通；以及(e)去除该第一图形化油墨层以及覆盖于该多个第一油墨遮蔽区的该第一金属膜层。
6.如实施例5所述的方法，该方法还包括以下步骤：(a1)在该第二表面配置第二图形化油墨层，以在该第二表面形成多个第二油墨遮蔽区以及位于该多个第二油墨遮蔽区之间的多个第二开放区；(b1)在配置该第二图形化油墨层的该第二表面上形成第二金属膜层，以覆盖该多个第二油墨遮蔽区以及该多个第二开放区；以及(e1)去除该第二图形化油墨层以及覆盖于该多个第二油墨遮蔽区的该第二金属膜层。
7.如实施例5或6所述的方法，更包含以下步骤：(f)提供与该软性基板相同的其他多个软性基板，并比照步骤(a)至步骤(e)，分别在该其他多个软性基板执行相同的步骤；以及(g)将该软性基板和该其他多个软性基板透过压合而合为一体。
8.一种形成导电图形的方法，该方法包括以下步骤：(a)提供裸板基材，其中该裸板基材具有表面；(b)在该表面配置对应于该导电图形的图形化油墨层；(c)在配置该图形化油墨层的该表面上形成金属膜层；以及(d)去除该图形化油墨层以及覆盖于该图形化油墨层上的该金属膜层，以获得该导电图形。
9.如实施例8所述的方法，其中该图形化油墨层是离型层。
10.如实施例8或9所述的方法，其中在步骤(b)之后还包括：(b1)在该基板对应于该多个第一开放区的至少一个预设部位形成至少一个通孔；以及(b2)在该通孔中配置金属，使该通孔的两端导通。
11.一种形成导电图形的方法，该方法包括以下步骤：(a)提供裸板基材，其中该裸板基材具有表面；(b)在该表面上形成第一金属膜层；(c)在该第一金属膜层上配置对应于该导电图形的图形化油墨层；(d)在配置该图形化油墨层的该表面上形成第二金属膜层；(e)去除该图形化油墨层以及覆盖于该图形化油墨层上的该第二金属膜层；以及(f)蚀刻以去除先前被该图形化油墨层覆盖的该第一金属膜层，以获得该导电图形。
12.如实施例11所述的方法，其中该图形化油墨层是离型层。
13.如实施例8或9所述的方法，其中在步骤(c)之后还包括：(c1)在该基板对应于该多个第一开放区的至少一个预设部位形成至少一个通孔；以及(c2)在该通孔中配置金属，使该通孔的两端导通
本发明以上述的较佳实施例与范例作为参考而揭露，读者须了解这些例子是用于描述而非限定之意。凡本领域专业人士，在不脱离本发明的精神与范围之下，当可做各种组合与修饰，其仍应属在本发明专利的涵盖范围之内。

Claims (14)

  1. 一种在基板上形成导电图形的方法，其中所述基板具有第一表面，所述方法包括以下步骤：
    (a)在所述第一表面配置第一图形化油墨层，以在所述表面形成多个第一油墨遮蔽区以及位于所述多个第一油墨遮蔽区之间的多个第一开放区；
    (b)在所述基板对应于所述多个第一开放区的至少一个预设部位形成至少一个通孔；
    (c)在配置所述第一图形化油墨层的所述第一表面上形成第一金属膜层，以覆盖所述多个第一油墨遮蔽区以及所述多个第一开放区；以及
    (d)去除所述第一图形化油墨层以及覆盖于所述多个第一油墨遮蔽区的所述第一金属膜层。
  2. 如权利要求1所述的方法，其中所述基板还具有相对于所述第一表面的第二表面，所述方法还包括以下步骤：
    (a1)在所述第二表面配置第二图形化油墨层，以在所述第二表面形成多个第二油墨遮蔽区以及位于所述多个第二油墨遮蔽区之间的多个第二开放区；
    (c1)在配置所述第二图形化油墨层的所述第二表面上形成第二金属膜层，以覆盖所述多个第二油墨遮蔽区以及所述多个第二开放区；以及
    (d1)去除所述第二油墨层以及覆盖于所述多个第二油墨遮蔽区的所述第二金属膜层。
  3. 如权利要求1或2所述的方法，还包括：
    (c1)在所述通孔中配置金属，使所述通孔的两端导通。
  4. 如权利要求1或2所述的方法，其中步骤(a)至(d)中的至少一个是以卷对卷的方式制作。
  5. 一种在软性基板上形成导电图形的方法，其中所述基板具有第一表面和相对于所述第一表面的第二表面，所述方法包括以下步骤：
    (a)在所述第一表面配置第一图形化油墨层，以在所述第一表面形成多个第一油墨遮蔽区以及位于所述多个第一油墨遮蔽区之间的多个第一开放区；
    (b)在配置所述第一图形化油墨层的所述第一表面上形成第一金属膜层，以覆盖所述多个第一油墨遮蔽区以及所述多个第一开放区；
    (c)在所述基板对应于所述多个第一开放区的至少一个预设部位形成至少一个通孔；
    (d)在所述通孔中配置金属，使所述通孔的两端导通；以及
    (e)去除所述第一图形化油墨层以及覆盖于所述多个第一油墨遮蔽区的所述第一金属膜层。
  6. 如权利要求5所述的方法，所述方法还包括以下步骤：
    (a1)在所述第二表面配置第二图形化油墨层，以在所述第二表面形成多个第二油墨遮蔽区以及位于所述多个第二油墨遮蔽区之间的多个第二开放区；
    (b1)在配置所述第二图形化油墨层的所述第二表面上形成第二金属膜层，以覆盖所述多个第二油墨遮蔽区以及所述多个第二开放区；以及
    (e1)去除所述第二图形化油墨层以及覆盖于所述多个第二油墨遮蔽区的所述第二金属膜层，其中步骤(c)和(d)可先于步骤(a)或(b)。
  7. 如权利要求5或6所述的方法，还包括以下步骤：
    (f)提供与所述软性基板相同的其他多个软性基板，并比照步骤(a)至步骤(e)，分别在所述其他多个软性基板执行相同的步骤；以及
    (g)将所述软性基板和所述其他多个软性基板透过压合而合为一体。
  8. 一种形成导电图形的方法，所述方法包括以下步骤：
    (a)提供裸板基材，其中所述裸板基材具有表面；
    (b)在所述表面配置对应于所述导电图形的图形化油墨层；
    (c)在配置所述图形化油墨层的所述表面上形成金属膜层；以及
    (d)去除所述图形化油墨层以及覆盖于所述图形化油墨层上的所述金属膜层，以获得所述导电图形。
  9. 如权利要求8所述的方法，其中所述图形化油墨层是离型层。
  10. 如权利要求书8或9所述的方法，在步骤(b)之后还包括：
    (b1)在所述基板对应于所述多个第一开放区的至少一个预设部位形成至少一个通孔；以及
    (b2)在所述通孔中配置金属，使所述通孔的两端导通。
  11. 一种形成导电图形的方法，所述方法包括以下步骤：
    (a)提供裸板基材，其中所述裸板基材具有表面；
    (b)在所述表面上形成第一金属膜层；
    (c)在所述第一金属膜层上配置对应于所述导电图形的图形化油墨层；
    (d)在配置所述图形化油墨层的所述表面上形成第二金属膜层；
    (e)去除所述图形化油墨层以及覆盖于所述图形化油墨层上的所述第二金属膜层；以及(f)蚀刻以去除先前被所述图形化油墨层覆盖的所述第一金属膜层，以获得所述导电图形。
  12. 如权利要求11所述的方法，其中所述图形化油墨层是离型层。
  13. 如权利要求11或12所述的方法，在步骤(c)之后还包括：
    (c1)在所述基板对应于所述多个第一开放区的至少一个预设部位形成至少一个通孔；以及
    (c2)在所述通孔中配置金属，使所述通孔的两端导通。
  14. 如权利要求11或12所述的方法，其中所述第一金属膜层具有网格形状。
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