WO2017161670A1 - Anti-surge surface mounted semiconductor device - Google Patents

Anti-surge surface mounted semiconductor device Download PDF

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Publication number
WO2017161670A1
WO2017161670A1 PCT/CN2016/083142 CN2016083142W WO2017161670A1 WO 2017161670 A1 WO2017161670 A1 WO 2017161670A1 CN 2016083142 W CN2016083142 W CN 2016083142W WO 2017161670 A1 WO2017161670 A1 WO 2017161670A1
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WIPO (PCT)
Prior art keywords
metal strip
epoxy package
metal
metal substrate
connecting piece
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PCT/CN2016/083142
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French (fr)
Chinese (zh)
Inventor
张雄杰
何洪运
程琳
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苏州固锝电子股份有限公司
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Publication of WO2017161670A1 publication Critical patent/WO2017161670A1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/367—Cooling facilitated by shape of device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/07—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/07—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
    • H01L25/072—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00 the devices being arranged next to each other
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Definitions

  • the present invention relates to a rectifying semiconductor device, and more particularly to a surge-resistant surface mount semiconductor device.
  • the rectifier is a bridge structure composed of four rectifier diodes, which uses the unidirectional conduction characteristics of the diode to rectify the alternating current. Since the bridge rectifier uses the input sine wave twice as efficiently as the wave rectification, it is the diode half. A significant improvement in wave rectification is widely used in circuits where AC power is converted to DC power.
  • the existing products have the following problems: (1) The product has a large thickness and cannot meet the needs of increasingly miniaturized and intelligent design of the client products; (2) The product has poor heat dissipation capability, which is not conducive to the energy-saving design of the client products; (3) The existing packaged products have poor instantaneous heat dissipation capability and low forward surge capability; (4) existing products have an old production process and are highly dependent on manual operations.
  • the object of the present invention is to provide a surge-resistant surface mount semiconductor device, which is generally more than 1.4 mm thick relative to the existing product, and the thickness of the product is less than 1.2 mm;
  • the invention has the heat sink structure and fully utilizes the heat dissipation capability of the PCB board itself.
  • the product is a heat sink structure, and the product has good instantaneous heat dissipation capability and strong forward surge capability.
  • a surge-resistant surface mount semiconductor device comprising: first, second, third, and fourth diode chips covered by an epoxy package; a first metal strip and a second metal strip;
  • the second and third diode chips are mounted on the upper surface of the first metal substrate and located on the left side of the epoxy package, and the first and fourth diode chips are mounted on the upper surface of the second metal substrate and located in the ring.
  • the positive ends of the second and third diode chips are electrically connected to the upper surface of the first metal substrate, and the negative ends of the first and fourth diode chips are respectively connected to the second metal.
  • the upper surface of the substrate is electrically connected;
  • the two ends of the first connecting piece are soldered between the negative end of the second diode chip and the positive end of the first diode chip, and the two ends of the second connecting piece are bridged to the third diode chip by soldering. Between the negative terminal and the positive terminal of the fourth diode chip;
  • the first metal strip and the second metal strip are located in the middle of the epoxy package and between the second and third diode chips and the first and fourth diode chips, and the first metal strip is located in the epoxy package One end is electrically connected to the middle of the first connecting piece, and one end of the second metal strip is located in the epoxy package body and is electrically connected to the middle of the second connecting piece;
  • first metal strip and the second metal strip respectively extend from one side of the epoxy package as the first AC input end
  • the first metal substrate and the second metal substrate are located at an outer side of the epoxy package extending from the epoxy package as a DC negative terminal and a DC positive terminal; respectively; the first metal substrate The lower surface of each of the second metal substrates is exposed from the epoxy package;
  • the first metal strip contacts the first connecting piece with two first protruding strips, the first connecting piece is embedded between the first protruding strips to achieve electrical connection, and the second metal strip is in contact with the second connecting piece.
  • the area has two second raised strips, and the second connecting piece is embedded between the two second raised strips to achieve electrical connection.
  • the thickness of the epoxy package is less than 1.4 mm, and is usually less than 1.2 mm.
  • the first metal strip, the second metal strip, the first metal substrate and the second metal substrate are made of copper, and a part of the surface of the exposed epoxy package is plated with a tin layer.
  • the present invention has the following advantages and effects compared with the prior art:
  • the anti-surge type surface mount semiconductor device of the present invention generally has a thickness of 1.4 mm or more relative to the existing product, and the thickness of the product is thinner than 1.2 mm.
  • the present invention is a heat sink structure, which fully utilizes the PCB board itself.
  • the heat dissipation capability the product is a heat sink structure, the product has good instantaneous heat dissipation capability and strong forward surge capability; once again, the dependence on manual work is minimized from the process design, and the labor efficiency is doubled.
  • the anti-surge type surface mount semiconductor device of the present invention wherein a region where the first metal strip contacts the first connecting strip has two first protruding strips, and the first connecting sheet is embedded between the first protruding strips to realize The electrical connection, the area where the second metal strip contacts the second connecting piece has two second protruding strips, and the second connecting piece is embedded between the two second protruding strips to realize electrical connection, thereby further improving the reliability of the contact. , thus extending the life of the product.
  • FIG. 1 is a schematic structural view of a conventional rectifier bridge device
  • Figure 2 is a bottom plan view of Figure 1;
  • FIG. 3 is a schematic structural view of an ultra-thin surface mount rectifier bridge device according to the present invention.
  • Figure 4 is a rear perspective view of Figure 4.
  • Figure 5 is a bottom plan view of Figure 3;
  • FIG. 6 is a schematic perspective view showing the structure of an ultra-thin surface mount rectifier bridge device of the present invention.
  • Embodiment 1 A surge-resistant surface mount semiconductor device comprising: first and second, which are covered by an epoxy package 1 Third and fourth diode chips 2, 3, 4, 5, a first metal strip and a second metal strip;
  • the second and third diode chips 3, 4 are mounted on the upper surface of the first metal substrate 6 and on the left side of the epoxy package 1, and the first and fourth diode chips 2, 5 are mounted on The upper surface of the second metal substrate 7 is located on the right side of the epoxy package 1, and the positive ends of the second and third diode chips 3, 4 are electrically connected to the upper surface of the first metal substrate 6, The negative ends of the first and fourth diode chips 2, 5 are electrically connected to the upper surface of the second metal substrate 7;
  • the two ends of the first connecting piece 8 are soldered between the negative end of the second diode chip 3 and the positive end of the first diode chip 2, and the two ends of the second connecting piece 9 are bridged to the third by solder. Between the negative terminal of the diode chip 4 and the positive terminal of the fourth diode chip 5;
  • the first metal strip and the second metal strip are located in the middle of the epoxy package 1 and between the second and third diode chips 3, 4 and the first and fourth diode chips 2, 5, first One end of the metal strip in the epoxy package 1 is electrically connected to the middle of the first connecting piece, and one end of the second metal strip in the epoxy package 1 is electrically connected to the middle of the second connecting piece;
  • first metal strip 10 and the second metal strip 11 respectively extend from the side of the epoxy package 1 as a first alternating current input terminal and a second alternating current input terminal, respectively, a first metal substrate 6, and a second metal base.
  • One end of the sheet 7 on the outer side of the epoxy package 1 extends from the epoxy package 1 as a DC negative terminal and a DC positive terminal, respectively; the lower surfaces of the first metal substrate 6 and the second metal substrate 7 are respectively The epoxy package 1 is exposed;
  • the first metal strip 10 is in contact with the first connecting piece 8 and has two first protruding strips 12, and the first connecting piece 8 is embedded between the first protruding strips 12 to realize electrical connection.
  • the second metal strip 11 The area in contact with the second connecting piece 9 has two second raised strips 13, and the second connecting piece 9 is embedded between the two second raised strips 13 to achieve electrical connection.
  • the thickness of the epoxy package 1 described above is less than 1.4 mm, and is usually less than 1.2 mm.
  • Embodiment 2 A surge-resistant surface mount semiconductor device comprising: first, second, third, and fourth diode chips 2, 3, 4, 5 covered by an epoxy package 1 a first metal strip and a second metal strip;
  • the second and third diode chips 3, 4 are mounted on the upper surface of the first metal substrate 6 and on the left side of the epoxy package 1, and the first and fourth diode chips 2, 5 are mounted on The upper surface of the second metal substrate 7 is located on the right side of the epoxy package 1, and the positive ends of the second and third diode chips 3, 4 are electrically connected to the upper surface of the first metal substrate 6, The negative ends of the first and fourth diode chips 2, 5 are electrically connected to the upper surface of the second metal substrate 7;
  • the two ends of the first connecting piece 8 are soldered between the negative end of the second diode chip 3 and the positive end of the first diode chip 2, and the two ends of the second connecting piece 9 are bridged to the third by solder. Between the negative terminal of the diode chip 4 and the positive terminal of the fourth diode chip 5;
  • the first metal strip and the second metal strip are located in the middle of the epoxy package 1 and between the second and third diode chips 3, 4 and the first and fourth diode chips 2, 5, first One end of the metal strip in the epoxy package 1 is electrically connected to the middle of the first connecting piece, and one end of the second metal strip in the epoxy package 1 is electrically connected to the middle of the second connecting piece;
  • the other ends of the first metal strip 10 and the second metal strip 11 respectively extend from the side of the epoxy package 1 as the first alternating current
  • the input end and the second AC input end, the first metal substrate 6 and the second metal substrate 7 are located at the outer side of the epoxy package 1 and extend from the epoxy package 1 as a DC negative terminal and a DC positive terminal;
  • the lower surface of each of the first metal substrate 6 and the second metal substrate 7 is exposed from the epoxy package 1;
  • the first metal strip 10 is in contact with the first connecting piece 8 and has two first protruding strips 12, and the first connecting piece 8 is embedded between the first protruding strips 12 to realize electrical connection.
  • the second metal strip 11 The area in contact with the second connecting piece 9 has two second raised strips 13, and the second connecting piece 9 is embedded between the two second raised strips 13 to achieve electrical connection.
  • the first metal strip 10, the second metal strip 11, the first metal substrate 6, and the second metal substrate 7 are made of copper, and a portion of the surface of the exposed epoxy package is plated with a tin layer.
  • the thickness of the product is usually 1.4 mm or more, and the thickness of the product is less than 1.2 mm.
  • the present invention is a heat sink structure, which fully utilizes the PCB board itself.
  • the heat dissipation capability the product is a heat sink structure, the product has good instantaneous heat dissipation capability and strong forward surge capability; again, the reliance on manual work is minimized from the process design, and the labor efficiency is doubled.

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
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Abstract

An anti-surge surface mounted semiconductor device, two ends of a first connection piece (8) thereof being connected, by means of solder, across the negative terminal of a second diode chip (3) and the positive terminal of a first diode chip (2), and two ends of a second connection piece (9) being connected, by means of the solder, across the negative terminal of a third diode chip (4) and the positive terminal of a fourth diode chip (5); one end of a first metal strip (10) which is located in an epoxy package body (1) being electrically connected to the middle portion of the first connection piece (8), and one end of the second metal strip (11) which is located in the epoxy package body (1) being electrically connected to the middle portion of the second connection piece (9); and the other ends of the first metal strip (10) and the second metal strip (11) each being extended from one side of the epoxy package body (1) to be taken as a first alternating current input terminal and a second alternating current input terminal, respectively, and the ends of a first metal substrate (6) and a second metal substrate (7) which are located at the outer side of the epoxy package body (1) being extended from the inside of the epoxy package body (1) to be taken as a direct current negative terminal and a direct current positive terminal. The thickness of the surface mounted semiconductor device is within 1.2mm; the heat dissipation capability of the PCB itself is utilized; the product is of a cooling fin structure; and the product has good instant heat dissipation capability and strong forward surge capacity.

Description

抗浪涌型表面贴装半导体器件Surge resistant surface mount semiconductor device 技术领域Technical field
本发明涉及一种整流半导体器件，尤其涉及一种抗浪涌型表面贴装半导体器件。The present invention relates to a rectifying semiconductor device, and more particularly to a surge-resistant surface mount semiconductor device.
背景技术Background technique
整流器是由四个整流二极管组成的一个桥式结构，它利用二极管的单向导电特性对交流电进行整流，由于桥式整流器对输入正正弦波的利用效率比波整流高一倍，是对二极管半波整流的一种显著改进，故被广泛应用于交流电转换成直流电的电路中。The rectifier is a bridge structure composed of four rectifier diodes, which uses the unidirectional conduction characteristics of the diode to rectify the alternating current. Since the bridge rectifier uses the input sine wave twice as efficiently as the wave rectification, it is the diode half. A significant improvement in wave rectification is widely used in circuits where AC power is converted to DC power.
现有同类桥堆产品主要存在如下弊端：产品厚度尺寸较大，极限厚度通常在1.4mm以上；产品无散热片结构，不能充分利用PCB的散热能力；产品的瞬时散热能力较差，正向浪涌能力较低；现有产品生产工艺陈旧，对手工作业依赖程度高。现有产品存在如下问题点：(1)产品厚度大，不能适应客户端产品日益小型化智能化设计的需求；(2)产品散热能力较差，不利于客户端产品的节能设计；(3)现有封装产品的瞬时散热能力较差，正向浪涌能力较低；(4)现有产品生产工艺陈旧，对手工作业依赖程度高。Existing similar bridge pile products mainly have the following drawbacks: the product thickness is large, the limit thickness is usually above 1.4mm; the product has no heat sink structure, can not fully utilize the heat dissipation capability of the PCB; the product has poor instantaneous heat dissipation capability, positive wave The ability to surge is low; the existing production process is outdated and relies heavily on manual work. The existing products have the following problems: (1) The product has a large thickness and cannot meet the needs of increasingly miniaturized and intelligent design of the client products; (2) The product has poor heat dissipation capability, which is not conducive to the energy-saving design of the client products; (3) The existing packaged products have poor instantaneous heat dissipation capability and low forward surge capability; (4) existing products have an old production process and are highly dependent on manual operations.
发明内容Summary of the invention
本发明目的是提供一种抗浪涌型表面贴装半导体器件，该抗浪涌型表面贴装半导体器件相对现有产品厚度通常在1.4mm以上，其该产品厚度薄在1.2mm以内；其次，本发明为散热片结构，充分利用了PCB板自身的散热能力，该产品为散热片结构，产品瞬时散热能力好，正向浪涌能力强。The object of the present invention is to provide a surge-resistant surface mount semiconductor device, which is generally more than 1.4 mm thick relative to the existing product, and the thickness of the product is less than 1.2 mm; The invention has the heat sink structure and fully utilizes the heat dissipation capability of the PCB board itself. The product is a heat sink structure, and the product has good instantaneous heat dissipation capability and strong forward surge capability.
为达到上述目的，本发明采用的技术方案是：一种抗浪涌型表面贴装半导体器件，包括：由环氧封装体包覆的第一、第二、第三、第四二极管芯片、第一金属条和第二金属条；In order to achieve the above object, the technical solution adopted by the present invention is: a surge-resistant surface mount semiconductor device comprising: first, second, third, and fourth diode chips covered by an epoxy package; a first metal strip and a second metal strip;
所述第二、第三二极管芯片安装于第一金属基片上表面且位于环氧封装体左侧，所述第一、第四二极管芯片安装于第二金属基片上表面且位于环氧封装体右侧，所述第二、第三二极管芯片各自的正极端与第一金属基片上表面电连接，所述第一、第四二极管芯片各自的负极端与第二金属基片上表面电连接；The second and third diode chips are mounted on the upper surface of the first metal substrate and located on the left side of the epoxy package, and the first and fourth diode chips are mounted on the upper surface of the second metal substrate and located in the ring. On the right side of the oxygen package, the positive ends of the second and third diode chips are electrically connected to the upper surface of the first metal substrate, and the negative ends of the first and fourth diode chips are respectively connected to the second metal. The upper surface of the substrate is electrically connected;
第一连接片两端通过焊锡跨接于第二二极管芯片的负极端和第一二极管芯片的正极端之间，第二连接片两端通过焊锡跨接于第三二极管芯片的负极端和第四二极管芯片的正极端之间；The two ends of the first connecting piece are soldered between the negative end of the second diode chip and the positive end of the first diode chip, and the two ends of the second connecting piece are bridged to the third diode chip by soldering. Between the negative terminal and the positive terminal of the fourth diode chip;
所述第一金属条和第二金属条位于环氧封装体中间且在第二、第三二极管芯片与第一、第四二极管芯片之间，第一金属条位于环氧封装体内的一端与第一连接片中部电连接，第二金属条位于环氧封装体内的一端与第二连接片中部电连接；The first metal strip and the second metal strip are located in the middle of the epoxy package and between the second and third diode chips and the first and fourth diode chips, and the first metal strip is located in the epoxy package One end is electrically connected to the middle of the first connecting piece, and one end of the second metal strip is located in the epoxy package body and is electrically connected to the middle of the second connecting piece;
第一金属条、第二金属条各自另一端均从环氧封装体一侧延伸出分别作为第一交流输入端 和第二交流输入端，第一金属基片、第二金属基片位于环氧封装体外侧的一端从环氧封装体内延伸出分别作为直流负极端和直流正极端；所述第一金属基片、第二金属基片各自的下表面从环氧封装体内裸露出；The other ends of the first metal strip and the second metal strip respectively extend from one side of the epoxy package as the first AC input end And the second metal input end, the first metal substrate and the second metal substrate are located at an outer side of the epoxy package extending from the epoxy package as a DC negative terminal and a DC positive terminal; respectively; the first metal substrate The lower surface of each of the second metal substrates is exposed from the epoxy package;
所述第一金属条与第一连接片接触的区域具有2个第一凸起条，第一连接片嵌入第一凸起条之间从而实现电连接，第二金属条与第二连接片接触的区域具有2个第二凸起条，第二连接片嵌入2个第二凸起条之间从而实现电连接。The first metal strip contacts the first connecting piece with two first protruding strips, the first connecting piece is embedded between the first protruding strips to achieve electrical connection, and the second metal strip is in contact with the second connecting piece. The area has two second raised strips, and the second connecting piece is embedded between the two second raised strips to achieve electrical connection.
上述技术方案中进一步改进的方案如下：The solution for further improvement in the above technical solution is as follows:
1.上述方案中，所述环氧封装体的厚度厚度薄小于1.4mm，通常小于1.2mm。1. In the above solution, the thickness of the epoxy package is less than 1.4 mm, and is usually less than 1.2 mm.
2.上述方案中，所述第一金属条、第二金属条、第一金属基片和第二金属基片材质均为铜，且露出环氧封装体的部分表面均镀覆有锡层。2. In the above solution, the first metal strip, the second metal strip, the first metal substrate and the second metal substrate are made of copper, and a part of the surface of the exposed epoxy package is plated with a tin layer.
由于上述技术方案运用，本发明与现有技术相比具有下列优点和效果：Due to the application of the above technical solutions, the present invention has the following advantages and effects compared with the prior art:
1.本发明抗浪涌型表面贴装半导体器件，相对现有产品厚度通常在1.4mm以上，其该产品厚度薄在1.2mm以内；其次，本发明为散热片结构，充分利用了PCB板自身的散热能力，该产品为散热片结构，产品瞬时散热能力好，正向浪涌能力强；再次，从工艺设计上最大限度的减少了对手工作业的依赖，成倍提升了人工效率。1. The anti-surge type surface mount semiconductor device of the present invention generally has a thickness of 1.4 mm or more relative to the existing product, and the thickness of the product is thinner than 1.2 mm. Secondly, the present invention is a heat sink structure, which fully utilizes the PCB board itself. The heat dissipation capability, the product is a heat sink structure, the product has good instantaneous heat dissipation capability and strong forward surge capability; once again, the dependence on manual work is minimized from the process design, and the labor efficiency is doubled.
2.本发明抗浪涌型表面贴装半导体器件，其第一金属条与第一连接片接触的区域具有2个第一凸起条，第一连接片嵌入第一凸起条之间从而实现电连接，第二金属条与第二连接片接触的区域具有2个第二凸起条，第二连接片嵌入2个第二凸起条之间从而实现电连接，进一步提高了接触的可靠性，从而延长了产品使用寿命。2. The anti-surge type surface mount semiconductor device of the present invention, wherein a region where the first metal strip contacts the first connecting strip has two first protruding strips, and the first connecting sheet is embedded between the first protruding strips to realize The electrical connection, the area where the second metal strip contacts the second connecting piece has two second protruding strips, and the second connecting piece is embedded between the two second protruding strips to realize electrical connection, thereby further improving the reliability of the contact. , thus extending the life of the product.
附图说明DRAWINGS
附图1为现有整流桥器件结构示意图；1 is a schematic structural view of a conventional rectifier bridge device;
附图2为附图1的仰视结构示意图；Figure 2 is a bottom plan view of Figure 1;
附图3为本发明超薄型表面贴装整流桥器件结构示意图；3 is a schematic structural view of an ultra-thin surface mount rectifier bridge device according to the present invention;
附图4为附图4的后视结构示意图；Figure 4 is a rear perspective view of Figure 4;
附图5为附图3的仰视结构示意图；Figure 5 is a bottom plan view of Figure 3;
附图6为本发明超薄型表面贴装整流桥器件立体结构示意图。6 is a schematic perspective view showing the structure of an ultra-thin surface mount rectifier bridge device of the present invention.
以上附图中：1、环氧封装体；2、第一二极管芯片；3、第二二极管芯片；4、第三二极管芯片；5、第四二极管芯片；6、第一金属基片；7、第二金属基片；8、第一连接片；9、第二连接片；10、第一金属条；11、第二金属条；12、第一凸起条；13、第二凸起条。In the above drawings: 1, an epoxy package; 2, a first diode chip; 3, a second diode chip; 4, a third diode chip; 5, a fourth diode chip; a first metal substrate; 7, a second metal substrate; 8, a first connecting piece; 9, a second connecting piece; 10, a first metal strip; 11, a second metal strip; 12, a first raised strip; 13. The second raised strip.
具体实施方式detailed description
下面结合附图及实施例对本发明作进一步描述：The present invention is further described below in conjunction with the accompanying drawings and embodiments:
实施例1：一种抗浪涌型表面贴装半导体器件，包括：由环氧封装体1包覆的第一、第二、 第三、第四二极管芯片2、3、4、5、第一金属条和第二金属条；Embodiment 1: A surge-resistant surface mount semiconductor device comprising: first and second, which are covered by an epoxy package 1 Third and fourth diode chips 2, 3, 4, 5, a first metal strip and a second metal strip;
所述第二、第三二极管芯片3、4安装于第一金属基片6上表面且位于环氧封装体1左侧，所述第一、第四二极管芯片2、5安装于第二金属基片7上表面且位于环氧封装体1右侧，所述第二、第三二极管芯片3、4各自的正极端与第一金属基片6上表面电连接，所述第一、第四二极管芯片2、5各自的负极端与第二金属基片7上表面电连接；The second and third diode chips 3, 4 are mounted on the upper surface of the first metal substrate 6 and on the left side of the epoxy package 1, and the first and fourth diode chips 2, 5 are mounted on The upper surface of the second metal substrate 7 is located on the right side of the epoxy package 1, and the positive ends of the second and third diode chips 3, 4 are electrically connected to the upper surface of the first metal substrate 6, The negative ends of the first and fourth diode chips 2, 5 are electrically connected to the upper surface of the second metal substrate 7;
第一连接片8两端通过焊锡跨接于第二二极管芯片3的负极端和第一二极管芯片2的正极端之间，第二连接片9两端通过焊锡跨接于第三二极管芯片4的负极端和第四二极管芯片5的正极端之间；The two ends of the first connecting piece 8 are soldered between the negative end of the second diode chip 3 and the positive end of the first diode chip 2, and the two ends of the second connecting piece 9 are bridged to the third by solder. Between the negative terminal of the diode chip 4 and the positive terminal of the fourth diode chip 5;
所述第一金属条和第二金属条位于环氧封装体1中间且在第二、第三二极管芯片3、4与第一、第四二极管芯片2、5之间，第一金属条位于环氧封装体1内的一端与第一连接片中部电连接，第二金属条位于环氧封装体1内的一端与第二连接片中部电连接；The first metal strip and the second metal strip are located in the middle of the epoxy package 1 and between the second and third diode chips 3, 4 and the first and fourth diode chips 2, 5, first One end of the metal strip in the epoxy package 1 is electrically connected to the middle of the first connecting piece, and one end of the second metal strip in the epoxy package 1 is electrically connected to the middle of the second connecting piece;
第一金属条10、第二金属条11各自另一端均从环氧封装体1一侧延伸出分别作为第一交流输入端和第二交流输入端，第一金属基片6、第二金属基片7位于环氧封装体1外侧的一端从环氧封装体1内延伸出分别作为直流负极端和直流正极端；所述第一金属基片6、第二金属基片7各自的下表面从环氧封装体1内裸露出；The other ends of the first metal strip 10 and the second metal strip 11 respectively extend from the side of the epoxy package 1 as a first alternating current input terminal and a second alternating current input terminal, respectively, a first metal substrate 6, and a second metal base. One end of the sheet 7 on the outer side of the epoxy package 1 extends from the epoxy package 1 as a DC negative terminal and a DC positive terminal, respectively; the lower surfaces of the first metal substrate 6 and the second metal substrate 7 are respectively The epoxy package 1 is exposed;
所述第一金属条10与第一连接片8接触的区域具有2个第一凸起条12，第一连接片8嵌入第一凸起条12之间从而实现电连接，第二金属条11与第二连接片9接触的区域具有2个第二凸起条13，第二连接片9嵌入2个第二凸起条13之间从而实现电连接。The first metal strip 10 is in contact with the first connecting piece 8 and has two first protruding strips 12, and the first connecting piece 8 is embedded between the first protruding strips 12 to realize electrical connection. The second metal strip 11 The area in contact with the second connecting piece 9 has two second raised strips 13, and the second connecting piece 9 is embedded between the two second raised strips 13 to achieve electrical connection.
上述环氧封装体1的厚度厚度薄小于1.4mm，通常小于1.2mm。The thickness of the epoxy package 1 described above is less than 1.4 mm, and is usually less than 1.2 mm.
实施例2：一种抗浪涌型表面贴装半导体器件，包括：由环氧封装体1包覆的第一、第二、第三、第四二极管芯片2、3、4、5、第一金属条和第二金属条；Embodiment 2: A surge-resistant surface mount semiconductor device comprising: first, second, third, and fourth diode chips 2, 3, 4, 5 covered by an epoxy package 1 a first metal strip and a second metal strip;
所述第二、第三二极管芯片3、4安装于第一金属基片6上表面且位于环氧封装体1左侧，所述第一、第四二极管芯片2、5安装于第二金属基片7上表面且位于环氧封装体1右侧，所述第二、第三二极管芯片3、4各自的正极端与第一金属基片6上表面电连接，所述第一、第四二极管芯片2、5各自的负极端与第二金属基片7上表面电连接；The second and third diode chips 3, 4 are mounted on the upper surface of the first metal substrate 6 and on the left side of the epoxy package 1, and the first and fourth diode chips 2, 5 are mounted on The upper surface of the second metal substrate 7 is located on the right side of the epoxy package 1, and the positive ends of the second and third diode chips 3, 4 are electrically connected to the upper surface of the first metal substrate 6, The negative ends of the first and fourth diode chips 2, 5 are electrically connected to the upper surface of the second metal substrate 7;
第一连接片8两端通过焊锡跨接于第二二极管芯片3的负极端和第一二极管芯片2的正极端之间，第二连接片9两端通过焊锡跨接于第三二极管芯片4的负极端和第四二极管芯片5的正极端之间；The two ends of the first connecting piece 8 are soldered between the negative end of the second diode chip 3 and the positive end of the first diode chip 2, and the two ends of the second connecting piece 9 are bridged to the third by solder. Between the negative terminal of the diode chip 4 and the positive terminal of the fourth diode chip 5;
所述第一金属条和第二金属条位于环氧封装体1中间且在第二、第三二极管芯片3、4与第一、第四二极管芯片2、5之间，第一金属条位于环氧封装体1内的一端与第一连接片中部电连接，第二金属条位于环氧封装体1内的一端与第二连接片中部电连接；The first metal strip and the second metal strip are located in the middle of the epoxy package 1 and between the second and third diode chips 3, 4 and the first and fourth diode chips 2, 5, first One end of the metal strip in the epoxy package 1 is electrically connected to the middle of the first connecting piece, and one end of the second metal strip in the epoxy package 1 is electrically connected to the middle of the second connecting piece;
第一金属条10、第二金属条11各自另一端均从环氧封装体1一侧延伸出分别作为第一交流 输入端和第二交流输入端，第一金属基片6、第二金属基片7位于环氧封装体1外侧的一端从环氧封装体1内延伸出分别作为直流负极端和直流正极端；所述第一金属基片6、第二金属基片7各自的下表面从环氧封装体1内裸露出；The other ends of the first metal strip 10 and the second metal strip 11 respectively extend from the side of the epoxy package 1 as the first alternating current The input end and the second AC input end, the first metal substrate 6 and the second metal substrate 7 are located at the outer side of the epoxy package 1 and extend from the epoxy package 1 as a DC negative terminal and a DC positive terminal; The lower surface of each of the first metal substrate 6 and the second metal substrate 7 is exposed from the epoxy package 1;
所述第一金属条10与第一连接片8接触的区域具有2个第一凸起条12，第一连接片8嵌入第一凸起条12之间从而实现电连接，第二金属条11与第二连接片9接触的区域具有2个第二凸起条13，第二连接片9嵌入2个第二凸起条13之间从而实现电连接。The first metal strip 10 is in contact with the first connecting piece 8 and has two first protruding strips 12, and the first connecting piece 8 is embedded between the first protruding strips 12 to realize electrical connection. The second metal strip 11 The area in contact with the second connecting piece 9 has two second raised strips 13, and the second connecting piece 9 is embedded between the two second raised strips 13 to achieve electrical connection.
上述第一金属条10、第二金属条11、第一金属基片6和第二金属基片7材质均为铜，且露出环氧封装体的部分表面均镀覆有锡层。The first metal strip 10, the second metal strip 11, the first metal substrate 6, and the second metal substrate 7 are made of copper, and a portion of the surface of the exposed epoxy package is plated with a tin layer.
采用上述抗浪涌型表面贴装半导体器件时，相对现有产品厚度通常在1.4mm以上，其该产品厚度薄在1.2mm以内；其次，本发明为散热片结构，充分利用了PCB板自身的散热能力，该产品为散热片结构，产品瞬时散热能力好，正向浪涌能力强；再次，从工艺设计上最大限度的减少了对手工作业的依赖，成倍提升了人工效率。When the above-mentioned anti-surge type surface mount semiconductor device is used, the thickness of the product is usually 1.4 mm or more, and the thickness of the product is less than 1.2 mm. Secondly, the present invention is a heat sink structure, which fully utilizes the PCB board itself. The heat dissipation capability, the product is a heat sink structure, the product has good instantaneous heat dissipation capability and strong forward surge capability; again, the reliance on manual work is minimized from the process design, and the labor efficiency is doubled.
上述实施例只为说明本发明的技术构思及特点，其目的在于让熟悉此项技术的人士能够了解本发明的内容并据以实施，并不能以此限制本发明的保护范围。凡根据本发明精神实质所作的等效变化或修饰，都应涵盖在本发明的保护范围之内。 The above embodiments are merely illustrative of the technical concept and the features of the present invention, and the purpose of the present invention is to enable those skilled in the art to understand the present invention and to implement the present invention, and the scope of the present invention is not limited thereto. Equivalent variations or modifications made in accordance with the spirit of the invention are intended to be included within the scope of the invention.

Claims (3)

  1. 一种抗浪涌型表面贴装半导体器件，其特征在于：包括：由环氧封装体(1)包覆的第一、第二、第三、第四二极管芯片(2、3、4、5)、第一金属条和第二金属条；An anti-surge type surface mount semiconductor device, comprising: first, second, third, and fourth diode chips (2, 3, 4) covered by an epoxy package (1) , 5), a first metal strip and a second metal strip;
    所述第二、第三二极管芯片(3、4)安装于第一金属基片(6)上表面且位于环氧封装体(1)左侧，所述第一、第四二极管芯片(2、5)安装于第二金属基片(7)上表面且位于环氧封装体(1)右侧，所述第二、第三二极管芯片(3、4)各自的正极端与第一金属基片(6)上表面电连接，所述第一、第四二极管芯片(2、5)各自的负极端与第二金属基片(7)上表面电连接；The second and third diode chips (3, 4) are mounted on the upper surface of the first metal substrate (6) and located on the left side of the epoxy package (1), the first and fourth diodes The chip (2, 5) is mounted on the upper surface of the second metal substrate (7) and located on the right side of the epoxy package (1), and the positive ends of the second and third diode chips (3, 4) Electrically connected to the upper surface of the first metal substrate (6), the negative ends of the first and fourth diode chips (2, 5) are electrically connected to the upper surface of the second metal substrate (7);
    第一连接片(8)两端通过焊锡跨接于第二二极管芯片(3)的负极端和第一二极管芯片(2)的正极端之间，第二连接片(9)两端通过焊锡跨接于第三二极管芯片(4)的负极端和第四二极管芯片(5)的正极端之间；The two ends of the first connecting piece (8) are soldered between the negative end of the second diode chip (3) and the positive end of the first diode chip (2), and the second connecting piece (9) The end is bridged between the negative terminal of the third diode chip (4) and the positive terminal of the fourth diode chip (5) by solder;
    所述第一金属条和第二金属条位于环氧封装体(1)中间且在第二、第三二极管芯片(3、4)与第一、第四二极管芯片(2、5)之间，第一金属条位于环氧封装体(1)内的一端与第一连接片(8)中部电连接，第二金属条位于环氧封装体(1)内的一端与第二连接片(9)中部电连接；The first metal strip and the second metal strip are located in the middle of the epoxy package (1) and in the second and third diode chips (3, 4) and the first and fourth diode chips (2, 5) Between the first metal strips at one end of the epoxy package (1) is electrically connected to the middle of the first connecting piece (8), and the second metal strip is located at one end of the epoxy package (1) and the second connection Piece (9) central electrical connection;
    第一金属条(10)、第二金属条(11)各自另一端均从环氧封装体(1)一侧延伸出分别作为第一交流输入端和第二交流输入端，第一金属基片(6)、第二金属基片(7)位于环氧封装体(1)外侧的一端从环氧封装体(1)内延伸出分别作为直流负极端和直流正极端；所述第一金属基片(6)、第二金属基片(7)各自的下表面从环氧封装体(1)内裸露出；所述第一金属条(10)与第一连接片(8)接触的区域具有2个第一凸起条(12)，第一连接片(8)嵌入第一凸起条(12)之间从而实现电连接，第二金属条(11)与第二连接片(9)接触的区域具有2个第二凸起条(13)，第二连接片(9)嵌入2个第二凸起条(13)之间从而实现电连接。The other ends of the first metal strip (10) and the second metal strip (11) extend from one side of the epoxy package (1) as a first alternating current input terminal and a second alternating current input terminal, respectively, the first metal substrate (6) a second metal substrate (7) is located at an outer side of the epoxy package (1) extending from the epoxy package (1) as a DC negative terminal and a DC positive terminal; respectively; the first metal base The lower surface of each of the sheet (6) and the second metal substrate (7) is exposed from the epoxy package (1); the area where the first metal strip (10) is in contact with the first connecting sheet (8) has 2 first protruding strips (12), the first connecting piece (8) is embedded between the first protruding strips (12) for electrical connection, and the second metal strip (11) is in contact with the second connecting piece (9) The area has two second raised strips (13), and the second connecting piece (9) is embedded between the two second raised strips (13) to achieve electrical connection.
  2. 根据权利要求1所述的抗浪涌型表面贴装半导体器件，其特征在于：所述环氧封装体(1)的厚度小于1.4mm，通常小于1.2mm。The surge-resistant surface mount semiconductor device according to claim 1, characterized in that the epoxy package (1) has a thickness of less than 1.4 mm, usually less than 1.2 mm.
  3. 根据权利要求1所述的抗浪涌型表面贴装半导体器件，其特征在于：所述第一金属条(10)、第二金属条(11)、第一金属基片(6)和第二金属基片(7)材质均为铜，且露出环氧封装体的部分表面均镀覆有锡层。 The surge-resistant surface mount semiconductor device according to claim 1, wherein said first metal strip (10), said second metal strip (11), said first metal substrate (6) and said second The metal substrate (7) is made of copper, and part of the surface of the exposed epoxy package is plated with a tin layer.
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112185941A (en) * 2020-09-28 2021-01-05 深圳市汇川技术股份有限公司 Semiconductor packaging part, motor controller and new energy automobile

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114551367B (en) * 2020-11-24 2024-03-22 苏州固锝电子股份有限公司 Semiconductor device with parallel structure

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20080054438A1 (en) * 2006-08-30 2008-03-06 Semiconductor Components Industries, Llc Semiconductor package structure having multiple heat dissipation paths and method of manufacture
CN201181702Y (en) * 2008-04-18 2009-01-14 苏州固锝电子股份有限公司 Thin soldering type commutation bridge stack
CN104124236A (en) * 2013-04-24 2014-10-29 敦南科技股份有限公司 Bridge rectifier and manufacturing method thereof
CN204966489U (en) * 2015-10-08 2016-01-13 苏州固锝电子股份有限公司 SMD rectifier of ultra -thin type
CN205069633U (en) * 2015-09-22 2016-03-02 常州星海电子有限公司 Ultra -thin high -power rectification bridge type diode

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN201752002U (en) * 2010-07-02 2011-02-23 重庆平伟实业股份有限公司 Thin type bridge rectifier
CN205723499U (en) * 2016-03-25 2016-11-23 苏州固锝电子股份有限公司 Antisurge type surface mount semiconductor device

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20080054438A1 (en) * 2006-08-30 2008-03-06 Semiconductor Components Industries, Llc Semiconductor package structure having multiple heat dissipation paths and method of manufacture
CN201181702Y (en) * 2008-04-18 2009-01-14 苏州固锝电子股份有限公司 Thin soldering type commutation bridge stack
CN104124236A (en) * 2013-04-24 2014-10-29 敦南科技股份有限公司 Bridge rectifier and manufacturing method thereof
CN205069633U (en) * 2015-09-22 2016-03-02 常州星海电子有限公司 Ultra -thin high -power rectification bridge type diode
CN204966489U (en) * 2015-10-08 2016-01-13 苏州固锝电子股份有限公司 SMD rectifier of ultra -thin type

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112185941A (en) * 2020-09-28 2021-01-05 深圳市汇川技术股份有限公司 Semiconductor packaging part, motor controller and new energy automobile

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