WO2017156678A1 - 线路板的叠孔制作方法 - Google Patents

线路板的叠孔制作方法 Download PDF

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Publication number
WO2017156678A1
WO2017156678A1 PCT/CN2016/076286 CN2016076286W WO2017156678A1 WO 2017156678 A1 WO2017156678 A1 WO 2017156678A1 CN 2016076286 W CN2016076286 W CN 2016076286W WO 2017156678 A1 WO2017156678 A1 WO 2017156678A1
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WO
WIPO (PCT)
Prior art keywords
copper foil
hole
inner layer
circuit board
layer
Prior art date
Application number
PCT/CN2016/076286
Other languages
English (en)
French (fr)
Inventor
王佐
刘克敢
王淑怡
Original Assignee
深圳崇达多层线路板有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 深圳崇达多层线路板有限公司 filed Critical 深圳崇达多层线路板有限公司
Priority to PCT/CN2016/076286 priority Critical patent/WO2017156678A1/zh
Priority to CN201680000087.XA priority patent/CN107079584A/zh
Publication of WO2017156678A1 publication Critical patent/WO2017156678A1/zh

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Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42Plated through-holes or plated via connections
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/0011Working of insulating substrates or insulating layers
    • H05K3/0044Mechanical working of the substrate, e.g. drilling or punching
    • H05K3/0047Drilling of holes
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/0011Working of insulating substrates or insulating layers
    • H05K3/0055After-treatment, e.g. cleaning or desmearing of holes
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42Plated through-holes or plated via connections
    • H05K3/429Plated through-holes specially for multilayer circuits, e.g. having connections to inner circuit layers
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4602Manufacturing multilayer circuits characterized by a special circuit board as base or central core whereon additional circuit layers are built or additional circuit boards are laminated
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/10Using electric, magnetic and electromagnetic fields; Using laser light
    • H05K2203/107Using laser light

Definitions

  • the present invention relates to the technical field of a circuit board manufacturing method, and in particular, to a method for manufacturing a stacked circuit of a circuit board.
  • a method for fabricating a stacked circuit of a prior art circuit board is performed by using a laser drilling method, and a copper hole is usually used for laser drilling.
  • a copper hole is usually used for laser drilling.
  • copper and copper of the inner and outer plates are required.
  • the plate layer is shrunk, and the laser drilling is easy to occur after the pressing, which may cause a short circuit; or the risk of the laser hole drilling energy is too large, and the risk of the inner layer plate hoist hole occurs;
  • the pores of the secondary outer layer are small, the overall thickness is constant, and the aspect ratio of the aperture is large, which affects the penetration of the electroplating syrup, which is prone to the risk of copper and other holes.
  • the circuit board is scrapped.
  • An object of the present invention is to provide a method for manufacturing a stacked hole of a circuit board, which aims to solve the problem that the inner and outer plates need to be treated with beryllium copper before laser drilling in the process of stacking holes in the prior art.
  • the technical solution of the present invention is: a method for manufacturing a stacked hole of a circuit board, comprising the following steps:
  • a circuit board is prepared, and the circuit board includes a core board layer and an inner layer board and an outer layer board which are sequentially pressed outside the core board layer;
  • the diameter of the mechanical bore is larger than the diameter of the laser drilled hole.
  • the diameter of the mechanical borehole is 1.5 to 2 times the aperture of the laser drilled hole.
  • the ratio of the hole depth to the aperture of the blind hole is ⁇ 1:1.
  • a portion of the medium of the inner layer after the laser drilling is completed has a thickness of 50 to 75 um.
  • the core layer includes a first core board, a second core board, and a first prepreg, and the upper surface and the lower surface of the first core board are respectively provided with a first a copper foil and a second copper foil, wherein the upper surface and the lower surface of the second core board are respectively provided with a third copper foil and a fourth copper foil, and the first prepreg is press-bonded to the second copper foil and Between the third copper foils;
  • the inner layer plate includes a fifth copper foil, a sixth copper foil, a second prepreg, and a third prepreg, wherein the fifth copper foil is disposed above the first copper foil, and the second prepreg is pressed Connected between the first copper foil and the fifth copper foil; the sixth copper foil is disposed under the fourth copper foil, and the third prepreg is press-bonded to the fourth copper Between the foil and the sixth copper foil;
  • the outer layer plate includes a seventh copper foil, an eighth copper foil, a fourth prepreg, and a fifth prepreg, wherein the seventh copper foil is disposed above the fifth copper foil, and the fourth prepreg is pressed Connected between the fifth copper foil and the seventh copper foil; the eighth copper foil is disposed under the sixth copper foil, and the fifth prepreg is press-bonded to the sixth copper Between the foil and the eighth copper foil.
  • a part of the medium of the inner layer plate is a second prepreg and a fourth prepreg.
  • the pre-process includes the following steps:
  • an inner layer pattern an inner layer pattern is formed, and a circuit pattern is formed on a surface of the inner layer board;
  • an inner layer AOI checking a defect of the defect of the inner layer of the inner layer and making a correction
  • the post process includes the following steps:
  • the outer layer is plated with a hole pattern, and the circuit pattern of the inner layer plate is exposed by an exposure ruler, and the electroplating is required to be developed. Hole position, and cover the rest with a dry film;
  • the abrasive belt is ground, and the copper protruding after plating is smoothed by the abrasive belt;
  • the body uses the X-my to drill the positioning hole required for the outer hole drilling;
  • outer hole drilling according to the thickness of the circuit board, using a positioning hole for drilling
  • the hole is degreased, and the hole is metallized, the backlight test is 9.5;
  • an outer layer AOI inspecting the flaw in the outer layer of the outer layer and making a correction
  • a step slicing analysis is further included, and according to the designed size of the stacked holes, whether the aperture of the stacked holes meets the requirements is analyzed.
  • the remaining part of the inner layer plate is drilled through the surface of the core layer to form a stack of holes, laser drilling, laser burning off part of the medium of the inner layer, without causing copper foil on the core layer Injury, avoiding the traditional technology.
  • Direct drilling with a mechanical drill through the inner layer may pose a risk of damaging the copper foil on the core layer.
  • the pore diameter larger than mechanical drilling, so as to avoid occurrence of a gourd-shaped hole, thereby avoiding the circuit board in the stack appears scrap processing hole phenomenon.
  • DRAWINGS 1 is a flow chart of a method for fabricating a stacked hole of a circuit board according to an embodiment of the present invention.
  • FIG. 2 is a flow chart in the pre-step of the step of manufacturing the stacked hole of the circuit board according to the embodiment of the present invention.
  • FIG 3 is a flow chart in the process after the steps of the method for manufacturing the stacked holes of the circuit board according to the embodiment of the present invention.
  • FIG. 4 is a cross-sectional view showing a circuit board after mechanical drilling processing according to an embodiment of the present invention.
  • FIG. 5 is a cross-sectional view showing a circuit board after laser drilling processing according to an embodiment of the present invention.
  • FIG. 6 is a partially enlarged schematic view of a portion A in FIG. 4.
  • the reference numerals include:
  • a method for fabricating a stacked hole of a circuit board according to an embodiment of the present invention includes the following steps.
  • Sl a pre-process, manufacturing a circuit board, the circuit board comprising a core layer 30 and an inner layer 20 and an outer layer 10 which are sequentially pressed outside the core layer 30; The sheets are pressed together to form a multilayer circuit board;
  • S3 laser drilling, using a laser drill to drill a portion of the medium 40 remaining in the inner layer 20 to the surface of the core layer 30 to form a stack of holes 60; drilling the inner layer 20 by laser drilling
  • the remaining portion of the medium 40 ensures that the laser will not cause damage to the copper foil on the surface of the core layer 30 after the last portion of the medium 40 is drilled, because it is not necessary to use an excessively large laser for laser drilling of the portion of the medium 40.
  • Energy when the laser energy is not too large, the laser energy will not cause damage to the copper material, so that the product can be effectively avoided;
  • S4 a post-process, processing the remaining process of the circuit board that completes the stacking hole 60; performing the processes required for the circuit board to the finished board in the subsequent process; for example, graphic imaging of the outer layer, A0I , character
  • a circuit board formed by pressing the core layer 30 and the inner layer board 20 and the outer layer board 10 is first formed, and the size is cut according to actual needs; then mechanical drilling is performed first.
  • the circuit board is mechanically drilled by a mechanical drill, the outer layer 10 and a part of the inner layer 20 are drilled, and a part of the medium 40 of the inner layer 20 is retained to form a blind hole 50, which can be directly drilled by a mechanical drill.
  • the copper foil of the outer layer 10 and the inner layer 20 is not required to perform a copper-plating process before drilling, and a part of the medium of the inner layer 20 is retained; then a laser drilling process is performed, and the inner layer is laser-drilled
  • the remaining portion of the medium 40 of the board 20 is drilled through the surface of the core layer 30 to form a stack of holes 60, which are laser drilled, and the laser burns off part of the medium of the inner layer 20 without being on the core layer 30.
  • the copper foil causes damage, avoiding the risk that the conventional technology directly drilling the inner layer plate 20 with the mechanical drill may damage the copper foil on the core layer 30, and the laser hole can easily control the aperture size, and the laser drill can be avoided.
  • the medium in the partial medium 40 is a prepreg, and may be, for example, a PP sheet (PP:
  • the diameter of the mechanical borehole is larger than the bore diameter of the laser drilled hole.
  • the mechanical drilling is performed first to effectively drill through the copper foil of the inner layer 20 and the outer layer 10, and then the laser drilling is performed to drill the remaining portion of the medium 40 on the inner layer board 20, so that Need to use too much laser energy, After ensuring that the hole diameter of the mechanical drilling is larger than the aperture of the laser drilling, the remaining medium on the inner layer 20 is slowly processed by laser drilling in the later stage to avoid the risk of the hoist hole.
  • the diameter of the mechanical borehole is 1.5 to 2 times the aperture of the laser drilled hole.
  • the diameter of the mechanical drilling hole may be 1.5 times, 1.6 times, 1.7 times, 1.8 times, 1.9 times or 2 times the diameter of the laser drilling; the mechanical drilling aperture and the aperture of the laser drilling in the above size range
  • the ratio of the numerical value is advantageous for the processing of the aperture, in particular, the risk of the hoist-type hole is avoided, and the subsequent processing of the electroplating syrup is facilitated.
  • the ratio of the hole depth to the aperture of the blind hole 50 is ⁇ 1:1.
  • the ratio of the hole depth to the aperture of the blind hole 50 may be 1, 0.9, 0.8, 0.7, 0.6, 0.5, etc.
  • the blind hole 50 of the proportional structure is easy to be processed in the subsequent stack 60, and the aspect ratio of the aperture is not It will be too large, so as to further avoid the electroplating solution that affects the subsequent process and avoid the risk of copper in the hole.
  • a portion of the medium 40 of the inner layer 20 after laser drilling is completed has a thickness of 50 to 75 um.
  • the portion of the medium 40 may have a thickness of 50 um, 55 um, 60 um, 65 um, 70 um or 75 um or the like.
  • the portion of the medium 40 of the thickness does not include the copper foil material on the inner layer 20, so as to avoid subsequent laser drilling, it can be completed without using excessive energy, and the medium 40 is completed. After drilling, it will not cause damage to the copper foil material on the core layer 30, and the structure formed after the mechanical drilling process is reasonable.
  • the core layer 30 includes a first core plate 31, a second core plate 32, and a first prepreg 33, and the upper surface and the lower surface of the first core plate 31
  • the surface is respectively provided with a first copper foil 34 and a second copper foil 35
  • the upper surface and the lower surface of the second core plate 32 are respectively provided with a third copper foil 36 and a fourth copper foil 37, and the first prepreg 33 Pressing and connecting between the second copper foil 35 and the third copper foil 36
  • the inner layer plate 20 includes a fifth copper foil 21, a sixth copper foil 22, a second prepreg 23, and a third prepreg 24.
  • the fifth copper foil 21 is disposed above the first copper foil 34.
  • the second prepreg 23 is press-bonded between the first copper foil 34 and the fifth copper foil 21;
  • the sixth copper foil 22 is disposed under the fourth copper foil 37,
  • the third prepreg 24 is press-bonded between the fourth copper foil 37 and the sixth copper foil 2 2;
  • the outer layer plate 10 includes a seventh copper foil 11, an eighth copper foil 12, a fourth prepreg 13 and a fifth prepreg
  • the seventh copper foil 11 is disposed above the fifth copper foil 21, and the fourth prepreg 13 is press-bonded between the fifth copper foil 21 and the seventh copper foil 11;
  • the eighth copper foil 12 is disposed under the sixth copper foil 22, and the fifth prepreg 14 is press-bonded between the sixth copper foil 22 and the eighth copper foil 12.
  • the circuit board structure is a multi-layer circuit board, that is, the stacking holes 60 are required to be formed on both the upper surface and the lower surface of the circuit board.
  • the seventh copper foil 11, the fourth prepreg 13, the fifth copper foil 21 and the partial medium 40 of the second prepreg 23 on the surface of the circuit board are drilled by mechanical drilling, thus forming the blind hole 50.
  • the seventh copper foil 11 is not subjected to beryllium copper treatment; likewise, the eighth copper foil 12, the fifth prepreg 14, the sixth copper foil 22, and the second surface of the lower surface of the wiring board are continuously drilled by a mechanical drill.
  • a portion of the medium 40 of the three prepreg sheets 24 forms a blind hole 50, and the bead copper treatment of the eighth copper foil 12 is not required in the drilling.
  • the remaining portion of the medium 40 of the second prepreg 23 and the remaining portion of the medium 40 of the third prepreg 24 are drilled by laser drilling to ensure that the laser drill does not affect the seventh copper foil 11 and the second core on the first core plate 31.
  • the fourth copper foil 37 on the board 32 causes damage and prevents the product from being scrapped.
  • a portion of the medium 40 of the inner layer 20 is a second prepreg 23 and a third prepreg 24.
  • a portion of the medium 40 of the inner layer 20 that is, a portion of the second prepreg 23 and the third prepreg 24 medium, which are not on the first core plate 31 and the second core plate 32, remain.
  • the copper foil causes damage, and it can also ensure that the diameter of the machined drill hole is larger than that of the laser drill hole, thus avoiding the appearance of the hoist hole.
  • the method of the present invention is equally applicable to stack fabrication of other layers of circuit boards.
  • a circuit board of six layers of copper foil structure that is, a structure in which a single core board is used to match two outer layers and two inner layers, and the upper and lower surfaces of the core board are provided with copper foil, outer layer and inner layer.
  • the laminates each include a copper foil and a prepreg to form a wiring board having six layers of copper foil.
  • the pre-S1 process includes the following steps:
  • the inner layer of the inner layer 20 is exposed by a 6-screen exposure ruler or a 21-screen exposure ruler, and the line pattern is etched after development;
  • the pressing of the multilayer wiring board is completed by the above-mentioned pre-S1 process, thereby avoiding problems such as core plate shrinkage and the like, and facilitating the subsequent drilling process directly.
  • This avoids the occurrence of the first copper foil 11 and the eighth copper foil 12 of the outer layer 10 and the fifth copper foil 12 and the sixth copper foil 22 of the inner layer 20, and then the inner layer.
  • the problem of the misalignment between the beryllium copper position and the drilling position which may occur when the outer layer plate 10 is pressed together, so that the drilling deviation can be effectively prevented by the above-mentioned S1 pre-step, and the problem of short circuit of the line can be prevented.
  • the post-S4 process includes the following steps:
  • the outer layer pattern, the outer layer 10 is patterned, and a circuit pattern is formed on the surface of the outer layer 10; the outer layer 10 is completed by a 6-screen exposure ruler or a 21-screen exposure ruler. Exposure of the outer layer and development Graphic plating, electroplating according to customers' requirements for holes and copper, to meet customer copper thickness; outer etching, alkaline etching, etching speed etching according to bottom copper, controlling etching line width;
  • the outer layer AOI inspecting the defects of the outer layer of the outer layer 10 and correcting the defects; after completing the outer layer AOI, the screen printing can be performed, and the solder resist is processed according to the above process according to the production requirements.
  • normal production of solder mask using exposure ruler to control exposure in 9 ⁇ 13 grids; characters, using white screen to print the characters and images required by customers; surface treatment, surface treatment according to customer requirements; appearance, milling according to customer requirements Electrical test, test to check the electrical performance of the finished board;
  • the step analysis is further included, and according to the designed size of the stacked holes 60, whether the aperture of the stacked hole 60 meets the requirements is analyzed; Different materials are selected to remove the glue method, and the laser lamination hole 60 is metallized; after the step of analyzing the slice is completed, the step of removing the copper can be continued, and the de-glue method is selected according to different materials to metallize the laser lamination hole 60.
  • the AOI Auto Optic Inspection
  • the AOI is automatic optical detection.

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Perforating, Stamping-Out Or Severing By Means Other Than Cutting (AREA)
  • Laser Beam Processing (AREA)

Abstract

一种线路板的叠孔制作方法,包括以下步骤:前工序,制作线路板,线路板包括芯板层(30)以及依序压合在芯板层(30)外的内层板(20)和外层板(10);机械钻孔,采用机械钻对线路板进行机械钻孔,钻穿外层板(10)和部分内层板(20),并保留内层板(20)的部分介质(40),形成盲孔(50);激光钻孔,采用激光钻将内层板(20)剩余的部分介质(40)钻穿至芯板层(30)的表面,形成叠孔(60);后工序,对完成所述叠孔(60)加工的线路板进行剩余工序的加工。该线路板的叠孔制作方法能够降低产品的报废率,提升线路板的叠孔(60)制作的质量。

Description

发明名称:线路板的叠孔制作方法
技术领域
[0001] 本发明涉及线路板制作方法技术领域, 尤其涉及线路板的叠孔制作方法。
背景技术
[0002] 现有技术的线路板 (例如 HDI板) 的叠孔制作方法在进行叠孔钻孔吋, 通常采 用激光钻孔, 在进行激光钻前, 需要进行内外层板的掏铜, 因芯板层涨缩, 压 合后激光钻孔制作易出现偏位而造成短路; 或因激光钻孔能量过大而出现内层 板葫芦型孔等风险; 同吋需增加外层板盲孔幵窗, 流程长, 浪费成本; 另外, 还因采用掏铜方式造成次外层板孔小, 总体厚度不变, 出现孔径纵横比大, 而 影响电镀药水贯穿, 易出现孔无铜等风险, 从而导致线路板报废。
技术问题
[0003] 本发明的目的在于提供一种线路板的叠孔制作方法, 旨在解决现有技术中在进 行叠孔钻孔过程中于激光钻孔前需要对内外层板进行掏铜处理导致线路板报废 的技术问题。
问题的解决方案
技术解决方案
[0004] 为实现上述目的, 本发明的技术方案是: 线路板的叠孔制作方法, 包括以下步 骤:
[0005] 前工序, 制作线路板, 所述线路板包括芯板层以及依序压合在所述芯板层外的 内层板和外层板;
[0006] 机械钻孔, 采用机械钻对所述线路板进行机械钻孔, 钻穿所述外层板和部分内 层板, 并保留所述内层板的部分介质, 形成盲孔;
[0007] 激光钻孔, 采用激光钻将所述内层板剩余的部分介质钻穿至所述芯板层的表面
, 形成叠孔;
[0008] 后工序, 对完成所述叠孔加工的线路板进行剩余工序的加工。
[0009] 优选地, 所述机械钻孔的孔径大于所述激光钻孔的孔径。 [0010] 优选地, 所述机械钻孔的孔径为所述激光钻孔的孔径的 1.5~2倍。
[0011] 优选地, 在所述机械钻孔步骤中, 所述盲孔的孔深与孔径的比例≤1: 1。
[0012] 优选地, 在所述激光钻孔步骤中, 完成激光钻孔后的所述内层板的部分介质的 厚度为 50~75um。
[0013] 进一步地, 在所述前工序步骤中, 所述芯板层包括第一芯板、 第二芯板和第一 半固化片, 所述第一芯板的上表面和下表面分别设有第一铜箔和第二铜箔, 所 述第二芯板的上表面和下表面分别设有第三铜箔和第四铜箔, 所述第一半固化 片压合连接于所述第二铜箔和所述第三铜箔之间;
[0014] 所述内层板包括第五铜箔、 第六铜箔、 第二半固化片和第三半固化片, 所述第 五铜箔设于所述第一铜箔的上方, 所述第二半固化片压合连接于所述第一铜箔 与所述第五铜箔之间; 所述第六铜箔设于所述第四铜箔的下方, 所述第三半固 化片压合连接于所述第四铜箔与所述第六铜箔之间;
[0015] 所述外层板包括第七铜箔、 第八铜箔、 第四半固化片和第五半固化片, 所述第 七铜箔设于所述第五铜箔的上方, 所述第四半固化片压合连接于所述第五铜箔 与所述第七铜箔之间; 所述第八铜箔设于所述第六铜箔的下方, 所述第五半固 化片压合连接于所述第六铜箔与所述第八铜箔之间。
[0016] 进一步地, 在所述机械钻孔步骤中, 所述内层板的部分介质为第二半固化片和 第四半固化片。
[0017] 进一步地, 所述前工序包括以下步骤:
[0018] 幵料, 根据实际需要的尺寸幵出芯板层、 内层板和外层板;
[0019] 内层图形, 内层板图形制作, 在所述内层板的板面上形成电路图形;
[0020] 内层 AOI, 检査所述内层板存在的幵短路缺陷并作出修正;
[0021] 压合, 将内层板覆盖在芯板层外, 将外层板覆盖在内层板外, 压合芯板层、 内 层板和外层板得到线路板。
[0022] 进一步地, 所述后工序包括以下步骤:
[0023] 除胶沉铜, 对所述叠孔进行除胶, 并金属化所述叠孔, 背光测试为 9.5级; [0024] 板电, 对所述叠孔进行电镀;
[0025] 外层镀孔图形, 以曝光尺完成所述内层板的电路图形曝光, 显影出需要电镀的 孔位置, 并用干膜盖住其余位置;
[0026] 点镀叠孔, 将叠孔电镀填平;
[0027] 褪膜, 将干膜退掉, 露出表铜;
[0028] 砂带磨板, 用砂带将电镀后突出的铜打磨平整;
[0029] 打靶位孔, 禾 lj用 X-my钻出外层钻孔所需的定位孔;
[0030] 外层钻孔, 根据所述线路板的厚度, 利用定位孔进行钻孔加工;
[0031] 除胶沉铜, 对所述钻孔进行除胶, 并金属化所述钻孔, 背光测试为 9.5级;
[0032] 板电, 对所述钻孔进行电镀;
[0033] 外层图形, 外层板图形制作, 在所述外层板的板面上形成电路图形;
[0034] 外层 AOI, 检査所述外层板存在的幵短路缺陷并作出修正;
[0035] 品检, 检査成品板的外观性不良。
[0036] 进一步地, 在所述激光钻孔步骤之后、 除胶沉铜步骤之前, 还包括步骤切片分 析, 根据设计的所述叠孔的大小, 分析所述叠孔的孔径是否符合要求。
发明的有益效果
有益效果
[0037] 本发明的有益效果: 本发明的线路板的叠孔制作方法, 在前工序中先制作出由 芯板层以及内层板和外层板压合形成的线路板, 尺寸根据实际需要的情况进行 裁切; 然后先进行机械钻孔工序, 采用机械钻对线路板进行机械钻孔, 钻穿外 层板和部分内层板, 并保留所述内层板的部分介质, 形成盲孔, 通过机械钻可 以直接钻穿外层板和内层板的铜箔, 无需在钻孔前进行掏铜工序, 并保留内层 板的一部分介质; 接着再进行激光钻孔工序, 采用激光钻将所述内层板剩余的 部分介质钻穿至所述芯板层的表面, 形成叠孔, 激光钻孔吋, 激光烧掉内层板 的部分介质, 而不会对芯板层上的铜箔造成伤害, 避免了传统技术直接用机械 钻钻穿内层板可能存在损伤芯板层上的铜箔的风险, 同吋由于激光钻孔吋较容 易控制孔径大小, 能够避免激光钻孔的孔径大于机械钻孔的孔径, 从而可以避 免葫芦形孔的出现, 进而避免了线路板在叠孔加工过程中出现报废的现象。 对附图的简要说明
附图说明 [0038] 图 1是本发明实施例的线路板的叠孔制作方法的流程图。
[0039] 图 2是本发明实施例的线路板的叠孔制作方法步骤前工序中的流程图。
[0040] 图 3是本发明实施例的线路板的叠孔制作方法步骤后工序中的流程图。
[0041] 图 4为本发明实施例中的线路板完成机械钻孔加工后的剖切图。
[0042] 图 5为本发明实施例中的线路板完成激光钻孔加工后的剖切图。
[0043] 图 6为图 4中 A处的局部放大示意图。
[0044] 附图标记包括:
[0045] 10_外层板 11_第七铜箔 12_第八铜箔
[0046] 13_第四半固化片 14_第五半固化片 20_内层板
[0047] 21—第五铜箔 22—第六铜箔 23—第二半固化片
[0048] 24—第三半固化片 30—芯板层 31一第一芯板
[0049] 32—第二芯板 33—第一半固化片 34—第一铜箔
[0050] 35—第二铜箔 36—第三铜箔 37—第四铜箔
[0051] 40—部分介质 50—盲孔 60—叠孔。
本发明的实施方式
[0052] 为了使本发明的目的、 技术方案及优点更加清楚明白, 以下结合附图 1~6及实 施例, 对本发明进行进一步详细说明。 应当理解, 此处所描述的具体实施例仅 仅用以解释本发明, 并不用于限定本发明。
[0053] 需要说明的是, 本实施例中的左、 右、 上、 下、 顶、 底等方位用语, 仅是互为 相对概念或是以产品的正常使用状态为参考的, 而不应该认为是具有限制性的
[0054] 如图 1至图 6所示, 本发明实施例提供的线路板的叠孔制作方法, 包括以下步骤
[0055] Sl、 前工序, 制作线路板, 所述线路板包括芯板层 30以及依序压合在所述芯板 层 30外的内层板 20和外层板 10; 根据需要的尺寸选择板材进行压合, 形成多层 线路板;
[0056] S2、 机械钻孔, 采用机械钻对所述线路板进行机械钻孔, 钻穿所述外层板 10和 部分内层板 20, 并保留所述内层板 20的部分介质 40, 形成盲孔 50; 无需单独对 外层板 10进行幵窗工序, 缩短流程, 节约成本, 还可以避免因为幵窗掏铜方式 造成的后工序加工难的问题;
[0057] S3、 激光钻孔, 采用激光钻将所述内层板 20剩余的部分介质 40钻穿至所述芯板 层 30的表面, 形成叠孔 60; 通过激光钻钻掉内层板 20剩余的部分介质 40, 可以 确保在钻掉最后部分介质 40吋, 激光不会对芯板层 30的表面的铜箔造成伤害, 因为在进行激光钻部分介质 40吋, 不需要使用过大的激光能量, 在激光能量不 会过大的吋候, 该激光能量不会对铜质材料造成伤害, 从而可以有效避免产品 报废;
[0058] S4、 后工序, 对完成所述叠孔 60加工的线路板进行剩余工序的加工; 后续的工 序进行一些线路板至成品板所需要的工序; 例如, 外层的图形成像、 A0I、 字符
、 表面处理、 銑外形、 电测试、 品检等至最后成品出货之前的工序。
[0059] 具体的, 在前工序中先制作出由芯板层 30以及内层板 20和外层板 10压合形成的 线路板, 尺寸根据实际需要的情况进行裁切; 然后先进行机械钻孔工序, 采用 机械钻对线路板进行机械钻孔, 钻穿外层板 10和部分内层板 20, 并保留所述内 层板 20的部分介质 40, 形成盲孔 50, 通过机械钻可以直接钻穿外层板 10和内层 板 20的铜箔, 无需在钻孔前进行掏铜工序, 并保留内层板 20的一部分介质; 接 着再进行激光钻孔工序, 采用激光钻将所述内层板 20剩余的部分介质 40钻穿至 所述芯板层 30的表面, 形成叠孔 60, 激光钻孔吋, 激光烧掉内层板 20的部分介 质, 而不会对芯板层 30上的铜箔造成伤害, 避免了传统技术直接用机械钻钻穿 内层板 20可能存在损伤芯板层 30上的铜箔的风险, 同吋由于激光钻孔吋较容易 控制孔径大小, 能够避免激光钻孔的孔径大于机械钻孔的孔径, 从而可以避免 葫芦形孔的出现, 进而避免了线路板在叠孔加工过程中出现报废的现象。
[0060] 在该实施例中, 所述部分介质 40中的介质为半固化片, 例如可以是 PP片 (PP:
Polypropylene, 为粘结齐1 J) 。
[0061] 本实施例中, 所述机械钻孔的孔径大于所述激光钻孔的孔径。 具体的, 先进行 机械钻孔可以有效的钻穿内层板 20和外层板 10的铜箔, 接着再进行的激光钻孔 用于钻内层板 20上剩余的部分介质 40, 这样可以不需要使用过大的激光能量, 在保证机械钻孔的孔径大于激光钻孔的孔径后, 后期慢慢通过激光钻加工内层 板 20上剩余的介质, 避免出现葫芦型孔的风险。
[0062] 本实施例中, 所述机械钻孔的孔径为所述激光钻孔的孔径的 1.5~2倍。 具体的 , 机械钻孔的孔径可以为激光钻孔的孔径的 1.5倍、 1.6倍、 1.7倍、 1.8倍、 1.9倍 或者 2倍; 在上述尺寸范围内的机械钻孔孔径与激光钻孔的孔径的比例数值范围 内有利于进行孔径的加工, 特别能够避免出现葫芦型孔的风险, 也方便后续进 行电镀药水贯穿的加工。
[0063] 本实施例中, 在所述机械钻孔步骤中, 所述盲孔 50的孔深与孔径的比例≤1 : 1 。 具体的, 盲孔 50的孔深与孔径的比例可以为 1、 0.9、 0.8、 0.7、 0.6、 0.5等, 该 种比例结构的盲孔 50易于在后续进行叠孔 60加工, 孔径的纵横比例不会过大, 进而进一步避免影响后续工序的电镀药水贯穿工序和避免出现孔无铜的风险。
[0064] 本实施例中, 在所述激光钻孔步骤中, 完成激光钻孔后的所述内层板 20的部分 介质 40的厚度为 50~75um。 具体的, 该部分介质 40的厚度可以为 50um、 55um 、 60um、 65um、 70um或者 75um等。 总而言之, 该厚度的部分介质 40不包含有 内层板 20上的铜箔材料, 这样是为了避免后续进行激光钻孔吋, 不需要使用过 大的能量就能够完成, 且完成对该部分介质 40钻穿后, 不会对芯板层 30上的铜 箔材料造成伤害, 机械钻孔加工后形成的结构设计合理。
[0065] 进一步地, 在所述前工序步骤中, 所述芯板层 30包括第一芯板 31、 第二芯板 32 和第一半固化片 33, 所述第一芯板 31的上表面和下表面分别设有第一铜箔 34和 第二铜箔 35, 所述第二芯板 32的上表面和下表面分别设有第三铜箔 36和第四铜 箔 37, 所述第一半固化片 33压合连接于所述第二铜箔 35和所述第三铜箔 36之间
[0066] 所述内层板 20包括第五铜箔 21、 第六铜箔 22、 第二半固化片 23和第三半固化片 24, 所述第五铜箔 21设于所述第一铜箔 34的上方, 所述第二半固化片 23压合连 接于所述第一铜箔 34与所述第五铜箔 21之间; 所述第六铜箔 22设于所述第四铜 箔 37的下方, 所述第三半固化片 24压合连接于所述第四铜箔 37与所述第六铜箔 2 2之间;
[0067] 所述外层板 10包括第七铜箔 11、 第八铜箔 12、 第四半固化片 13和第五半固化片 14, 所述第七铜箔 11设于所述第五铜箔 21的上方, 所述第四半固化片 13压合连 接于所述第五铜箔 21与所述第七铜箔 11之间; 所述第八铜箔 12设于所述第六铜 箔 22的下方, 所述第五半固化片 14压合连接于所述第六铜箔 22与所述第八铜箔 1 2之间。 具体的, 该种线路板结构为多层线路板, 即需要在线路板的上表面和下 表面均进行叠孔 60制作。 其中, 在进行机械钻孔吋, 通过机械钻钻掉线路板上 表面的第七铜箔 11、 第四半固化片 13、 第五铜箔 21和第二半固化片 23的部分介 质 40, 这样形成盲孔 50, 且在钻孔吋不需要对第七铜箔 11进行掏铜处理; 同样 , 继续通过机械钻钻掉线路板下表面的第八铜箔 12、 第五半固化片 14、 第六铜 箔 22和第三半固化片 24的部分介质 40, 这样形成盲孔 50, 且在钻孔吋不需要对 第八铜箔 12进行掏铜处理。 接着再通过激光钻孔钻掉第二半固化片 23剩余的部 分介质 40和第三半固化片 24剩余的部分介质 40, 确保激光钻不会对第一芯板 31 上的第七铜箔 11和第二芯板 32上的第四铜箔 37造成伤害, 避免产品报废。
[0068] 进一步需要说明的是, 在所述机械钻孔步骤中, 所述内层板 20的部分介质 40为 第二半固化片 23和第三半固化片 24。 这样, 完成机械钻孔吋还保留有内层板 20 的部分介质 40, 即部分第二半固化片 23和第三半固化片 24介质, 机械钻不会对 第一芯板 31和第二芯板 32上的铜箔造成损伤, 也可以确保加工的机械钻孔的孔 径比激光钻孔的孔径大, 这样能够避免葫芦型孔的出现。
[0069] 当然, 在其他实施例中, 本发明的方法同样适用其他层数的线路板的叠孔制作 。 例如, 还可以使用六层铜箔结构的线路板, 即采用单块芯板配合两块外层板 和两块内层板的结构, 芯板的上下表面设有铜箔, 外层板和内层板均包括铜箔 和半固化片, 从而形成有六层铜箔的线路板。
[0070] 本实施例进一步地, 所述 S1前工序包括以下步骤:
[0071] Sl.l、 幵料, 根据实际需要的尺寸幵出芯板层 30、 内层板 20和外层板 10;
[0072] S1.2、 内层图形, 内层板 20图形制作, 在所述内层板 20的板面上形成电路图形
; 以 6格曝光尺或者 21格曝光尺完成内层板 20的内层线路曝光, 显影后蚀刻出线 路图形;
[0073] S1.3、 内层 AOI, 检査所述内层板 20存在的幵短路缺陷并作出修正;
[0074] S1.4、 压合, 将内层板 20覆盖在芯板层 30外, 将外层板 10覆盖在内层板 20外, 压合芯板层 30、 内层板 20和外层板 10得到线路板; 棕化速度按照内层板 20上的 铜箔铜厚棕化, 根据板料选用适当的层压条件进行压合, 铜箔根据客户要求成 品表铜的厚度进行选择。
[0075] 具体的, 通过上述的 S1前工序完成对多层线路板的压合, 避免出现芯板涨缩等 的问题, 方便后续的钻孔加工工序直接进行。 这样就避免了出现前期先对外层 板 10的第七铜箔 11和第八铜箔 12以及内层板 20的第五铜箔 12 和第六铜箔 22 进行掏铜, 然后在将内层板 20与外层板 10进行压合可能出现的掏铜位与钻孔位 之间偏位的问题, 从而通过上述的 S1前工序可以有效防止钻孔偏位, 进而可以 防止出现线路短路的问题。
[0076] 本实施例进一步地, 所述 S4后工序包括以下步骤:
[0077] S4.1、 除胶沉铜, 对所述叠孔进行除胶, 并金属化所述叠孔, 背光测试为 9.5级
[0078] S4.2、 板电, 对所述叠孔 60进行电镀; 板电采用整板填孔电镀, 小电流一次电 镀板电, 保证深孔电镀镀铜, 为后续点度盲孔 50吋降低风险;
[0079] S4.3、 外层镀孔图形, 以曝光尺完成所述内层板的电路图形曝光, 显影出需要 电镀的孔位置, 并用干膜盖住其余位置;
[0080] S4.4、 点镀叠孔 60, 将叠孔 60电镀填平; 接着可进行以下步骤切片分析, 根据 叠孔 60填平要求, 切片分析叠孔 60是否填平;
[0081] S4.5、 褪膜, 将干膜退掉, 露出表铜;
[0082] S4.6、 砂带磨板, 用砂带将电镀后突出的铜打磨平整;
[0083] S4.7、 打靶位孔, 利用 X-my (X光) 钻出外层钻孔所需的定位孔;
[0084] S4.8、 外层钻孔, 根据所述线路板的厚度, 利用定位孔进行钻孔加工;
[0085] S4.9、 除胶沉铜, 对所述钻孔进行除胶, 并金属化所述钻孔, 背光测试为 9.5级
[0086] S4.10、 板电, 对所述钻孔进行电镀; 全板电镀, 按客户对孔铜要求满足 IPC标 准, 对铜厚的要求, 一般控制在 7~12um范围;
[0087] S4.l l、 外层图形, 外层板 10图形制作, 在所述外层板 10的板面上形成电路图 形; 以 6格曝光尺或者 21格曝光尺完成外层板 10上的外层线路曝光, 并进行显影 ; 图形电镀, 按客户对孔、 表铜要求进行电镀, 满足客户铜厚; 外层蚀刻, 碱 性蚀刻, 蚀刻速度按底铜进行蚀刻, 控制蚀刻线宽;
[0088] S4.12、 外层 AOI, 检査所述外层板 10存在的幵短路缺陷并作出修正; 完成外层 AOI后, 接着可进行丝印阻焊, 阻焊按上述流程, 根据生产要求, 正常制作阻焊 , 采用曝光尺控制在 9~13格进行曝光; 字符, 采用白网印刷客户要求的字符和 图像; 表面处理, 根据客户要求制作表面处理; 外型, 按客户要求銑外型; 电 测试, 测试检査成品板的电气性能;
[0089] S4.13、 品检, 检査成品板的外观性不良。
[0090] 进一步地, 在所述 S4.1除胶沉铜步骤之前, 还包括步骤切片分析, 根据设计的 所述叠孔 60的大小, 分析所述叠孔 60的孔径是否符合要求; 接着根据不同材料 选择除胶方式, 并金属化激光叠孔 60; 完成该切片分析步骤后, 继续可以进行 除胶沉铜步骤, 根据不同材料选择除胶方式, 金属化激光叠孔 60。
[0091] 其中, 本实施例中的 AOI (Automatic Optic Inspection) 为自动光学检测。
[0092] 以上所述仅为本发明的较佳实施例而已, 并不用以限制本发明, 凡在本发明的 思想和原则之内所作的任何修改、 等同替换或改进等, 均应包含在本发明的保 护范围之内。

Claims

权利要求书
线路板的叠孔制作方法, 其特征在于, 包括以下步骤:
前工序, 制作线路板, 所述线路板包括芯板层以及依序压合在所述芯 板层外的内层板和外层板;
机械钻孔, 采用机械钻对所述线路板进行机械钻孔, 钻穿所述外层板 和部分内层板, 并保留所述内层板的部分介质, 形成盲孔; 激光钻孔, 采用激光钻将所述内层板剩余的部分介质钻穿至所述芯板 层的表面, 形成叠孔;
后工序, 对完成所述叠孔加工的线路板进行剩余工序的加工。
根据权利要求 1所述的线路板的叠孔制作方法, 其特征在于, 所述机 械钻孔的孔径大于所述激光钻孔的孔径。
根据权利要求 2所述的线路板的叠孔制作方法, 其特征在于, 所述机 械钻孔的孔径为所述激光钻孔的孔径的 1.5~2倍。
根据权利要求 1所述的线路板的叠孔制作方法, 其特征在于, 在所述 机械钻孔步骤中, 所述盲孔的孔深与孔径的比例≤1 1。
根据权利要求 1所述的线路板的叠孔制作方法, 其特征在于, 在所述 激光钻孔步骤中, 完成激光钻孔后的所述内层板的部分介质的厚度为
50~75
根据权利要求 1~5任一项所述的线路板的叠孔制作方法, 其特征在于 , 在所述前工序步骤中, 所述芯板层包括第一芯板、 第二芯板和第一 半固化片, 所述第一芯板的上表面和下表面分别设有第一铜箔和第二 铜箔, 所述第二芯板的上表面和下表面分别设有第三铜箔和第四铜箔 , 所述第一半固化片压合连接于所述第二铜箔和所述第三铜箔之间; 所述内层板包括第五铜箔、 第六铜箔、 第二半固化片和第三半固化片 , 所述第五铜箔设于所述第一铜箔的上方, 所述第二半固化片压合连 接于所述第一铜箔与所述第五铜箔之间; 所述第六铜箔设于所述第四 铜箔的下方, 所述第三半固化片压合连接于所述第四铜箔与所述第六 铜箔之间; 所述外层板包括第七铜箔、 第八铜箔、 第四半固化片和第五半固化片 , 所述第七铜箔设于所述第五铜箔的上方, 所述第四半固化片压合连 接于所述第五铜箔与所述第七铜箔之间; 所述第八铜箔设于所述第六 铜箔的下方, 所述第五半固化片压合连接于所述第六铜箔与所述第八 铜箔之间。
[权利要求 7] 根据权利要求 6所述的线路板的叠孔制作方法, 其特征在于, 在所述 机械钻孔步骤中, 所述内层板的部分介质为第二半固化片和第四半固 化片。
[权利要求 8] 根据权利要求 1~5任一项所述的线路板的叠孔制作方法, 其特征在于
, 所述前工序包括以下步骤:
幵料, 根据实际需要的尺寸幵出芯板层、 内层板和外层板; 内层图形, 内层板图形制作, 在所述内层板的板面上形成电路图形; 内层 AOI, 检査所述内层板存在的幵短路缺陷并作出修正; 压合, 将所述内层板覆盖在所述芯板层外, 将所述外层板覆盖在所述 内层板外, 压合所述芯板层、 所述内层板和所述外层板得到所述线路 板。
[权利要求 9] 根据权利要求 1~5任一项所述的线路板的叠孔制作方法, 其特征在于
, 所述后工序包括以下步骤:
除胶沉铜, 对所述叠孔进行除胶, 并金属化所述叠孔, 背光测试为 9. 5级;
板电, 对所述叠孔进行电镀;
外层镀孔图形, 以曝光尺完成所述内层板的电路图形曝光, 显影出需 要电镀的孔位置, 并用干膜盖住其余位置;
点镀叠孔, 将所述叠孔电镀填平;
褪膜, 将所述干膜退掉, 露出表铜;
砂带磨板, 用砂带将电镀后突出的铜打磨平整;
打靶位孔, 利用 X-my钻出外层钻孔所需的定位孔; 外层钻孔, 根据所述线路板的厚度, 利用定位孔进行钻孔加工; 除胶沉铜, 对所述钻孔进行除胶, 并金属化所述钻孔, 背光测试为 9.
5级;
板电, 对所述钻孔进行电镀;
外层图形, 外层板图形制作, 在所述外层板的板面上形成电路图形; 外层 AOI, 检査所述外层板存在的幵短路缺陷并作出修正; 品检, 检査成品板的外观性不良。
[权利要求 10] 根据权利要求 9所述的线路板的叠孔制作方法, 其特征在于, 在所述 激光钻孔步骤之后、 所述除胶沉铜步骤之前, 还包括步骤切片分析, 根据设计的所述叠孔的大小, 分析所述叠孔的孔径是否符合要求。
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