WO2017121016A1 - 显示装置 - Google Patents

显示装置 Download PDF

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Publication number
WO2017121016A1
WO2017121016A1 PCT/CN2016/074698 CN2016074698W WO2017121016A1 WO 2017121016 A1 WO2017121016 A1 WO 2017121016A1 CN 2016074698 W CN2016074698 W CN 2016074698W WO 2017121016 A1 WO2017121016 A1 WO 2017121016A1
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WO
WIPO (PCT)
Prior art keywords
pixels
gate
lines
data lines
display device
Prior art date
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Ceased
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PCT/CN2016/074698
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English (en)
French (fr)
Inventor
甘启明
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TCL China Star Optoelectronics Technology Co Ltd
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Shenzhen China Star Optoelectronics Technology Co Ltd
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Publication of WO2017121016A1 publication Critical patent/WO2017121016A1/zh
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/131—Interconnections, e.g. wiring lines or terminals
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3266—Details of drivers for scan electrodes

Definitions

  • the present invention relates to the field of liquid crystal display technology, and in particular to an application to an OLED (Organic Light Emitting) Diode) display device.
  • OLED Organic Light Emitting
  • the display device 10 includes a plurality of pixels, a plurality of data lines (D1-D7...), and a plurality of gate lines (G1-G4).
  • the plurality of pixels are distributed into x column pixels.
  • Each column of pixels needs to connect two data lines, that is, the x column pixels, and a total of 2x data lines are required to be normally controlled.
  • the first column of pixels on the left side needs to connect the data lines (D1, D2).
  • This method takes up a lot of space and affects the aperture ratio (aperture).
  • Ratio, AR which greatly increases the number of control chips (ICs) of the data lines and increases manufacturing costs.
  • the present invention provides a display device including a display panel, at least one gate driver, at least one source driver, and a timing controller.
  • the display panel includes a distribution of n rows of X a plurality of pixels of a matrix of m columns, and including n gate lines and m data lines, each row of pixels being connected to one of the n gate lines, each column of pixels being connected to the m strips Two data lines in the data line, each of the data lines connecting two columns of pixels in the m column of pixels, and a plurality of pixels of each column of pixels are alternately connected to the two data lines.
  • the at least one gate driver drives the n gate lines.
  • the at least one source driver drives the m data lines.
  • the timing controller controls the at least one gate driver and the at least one source driver. m and n are natural numbers.
  • the at least one gate driver comprises a chip on film. COF) or array driver on array (GOA) circuit.
  • the m data lines include a plurality of first data lines and a plurality of second data lines
  • the first source driver drives the plurality of first data lines
  • the second source The pole driver drives the plurality of second data lines.
  • the plurality of first data lines and the plurality of second data lines are staggered.
  • the at least one gate driver includes a first gate driver and a second gate driver, and the first gate driver and the second gate driver are respectively disposed on the display panel. On both sides.
  • the n gate lines include a plurality of first gate lines and a plurality of second gate lines
  • the first gate driver drives the plurality of first gate lines.
  • the second gate driver drives the plurality of second gate lines.
  • the plurality of first gate lines and the plurality of second gate lines are staggered.
  • the first gate driver and the second gate driver simultaneously drive the n gate lines by emitting gate signals from left and right sides of the n gate lines.
  • the m column of pixels is divided into a first group of pixels and a second group of pixels, and the first gate driver and the second gate driver respectively control the first group of pixels and the The second set of pixels.
  • the first set of pixels comprises a portion of the m columns of pixels and the second set of pixels comprises another portion of the m columns of pixels.
  • the present invention proposes a solution that can solve the problem of insufficient COF space for single side placement. That is, the signal of the data line is crossed and fed from the upper and lower sides of the panel, and in the case of the same number of data lines, the space can be doubled. This is a solution for small to medium sized high resolution panels.
  • each of the data lines of the present invention controls one half of the pixels in the left and right columns, in other words, one data line controls one column of pixels, does not affect the aperture ratio, and does not increase the manufacturing cost.
  • FIG. 1 is a schematic diagram of a prior art display device
  • FIG. 2 is a schematic diagram of a display device in accordance with a first preferred embodiment of the present invention
  • FIG. 3 is a schematic diagram of a display device in accordance with a second preferred embodiment of the present invention.
  • FIG. 4 is a schematic diagram of a display device in accordance with a third preferred embodiment of the present invention.
  • the display device 100 includes a display panel 110 , a first source driver 130 , a second source driver 140 , a first gate driver 150 , and a timing controller 120 .
  • the display panel 110 includes a distribution of n rows of X
  • the m columns are arranged in a matrix of a plurality of pixels, and include n gate lines G1-Gn and m data lines D1-Dm. Where m and n are natural numbers.
  • Each row of pixels is connected to one of the n gate lines G1-Gn, and each column of pixels is connected to two of the m data lines D1-Dm.
  • Each of the data lines connects two columns of pixels in the m column of pixels, and a plurality of pixels of each column of pixels are alternately connected to the two data lines.
  • the leftmost column of pixels is connected to the gate line D1 and the data lines G1, G2.
  • the first gate driver drives the n gate lines G1-Gn.
  • the first source driver 130 and the second source driver 140 drive the m data lines D1-Dn.
  • the timing controller 120 controls the first source driver 130, the second source driver 140, and the first gate driver 150.
  • the data line D3 is connected to a half pixel of a column of pixels on the left side (a third column of pixels from the left) and a column of pixels on the right side thereof (the fourth column of pixels from the left) Half of the pixels;
  • the data line D4 is connected to a half of the pixels of the left column of pixels (the fourth column of pixels from the left) and half of the pixels of the column of the right column (the fifth column of pixels from the left);
  • the fourth column of pixels is connected to the data lines D3, D4.
  • the n data lines can control the display of the plurality of pixels.
  • the m data lines D1-Dm include a plurality of first data lines D1, D3, D5, D7, ... and a plurality of second data lines D2, D4, D6, .
  • the first source driver 130 drives the plurality of first data lines D1, D3, D5, D7, ...
  • the second source driver 140 drives the plurality of second data lines D2, D4, D6, ...
  • the plurality of first data lines D1, D3, D5, D7, ... and the plurality of second data lines D2, D4, D6, ... are staggered.
  • adjacent data lines (such as D1 and D2) are controlled by different source drivers.
  • the first source driver 130 and the second source driver 140 are respectively disposed on two sides of the display panel 110.
  • the cross scan of the first data line and the second data line and the gate line are sequentially scanned from top to bottom to achieve a screen display.
  • the first source driver 130 and the second source driver 140 are stripped with a data circuit board (Data PCB) implementation.
  • Data PCB data circuit board
  • the first gate driver 150 is implemented by a thin film flip chip or an array substrate row scan driving circuit.
  • the plurality of first data lines and the plurality of second data lines may not be staggered.
  • FIG 3 is a schematic diagram of a display device 200 in accordance with a second preferred embodiment of the present invention.
  • the preferred embodiment differs from the first preferred embodiment in that a second gate driver 160 is added.
  • the first gate driver 150 and the second gate driver 160 simultaneously drive the gate signals from the left and right sides of the n gate lines G1-Gn to drive the n gate lines G1-Gn.
  • the first gate driver 150 and the second gate driver 160 are respectively disposed on two sides of the display panel 110.
  • the m column of pixels is divided into a first group of pixels and a second group of pixels.
  • the first gate driver 150 and the second gate driver 160 respectively control the first group of pixels and the second group of pixels.
  • the first gate driver 150 and the second gate driver 160 respectively control the first group of pixels and the second group of pixels.
  • the first group comprises a portion of the m column of pixels; the second group of pixels comprises another portion of the m column of pixels.
  • the load on the gate driver can be reduced and the RC delay can be reduced.
  • a part of the m column of pixels may be the first column to the m/2 (or the nearest integer) column pixel; and the other part of the m column pixel may be the m/2+1 (or the nearest integer) columns to the mth column of pixels.
  • the portion and the other portion may also include unequal columns of pixels.
  • the part is 1/3 m columns of pixels; the other part is 2/3 m columns of pixels.
  • the scanning manner of the data lines of the preferred embodiment is the same as that of the first preferred embodiment, but the scanning manner of the gate lines is different.
  • the scanning method of the gate line of the preferred embodiment is that the plurality of gate lines are sequentially scanned for a picture to achieve a screen display.
  • the first gate driver 150 and the second gate driver 160 are not limited to control only a part of the m columns of pixels, but can control all the pixels to be gated. Taking the epipolar line G1 as an example, the first gate driver 150 and the second gate driver 160 can transmit gate signals corresponding to each pixel of the first row of pixels. Therefore, the display of the picture can still be maintained when one of the gate drivers or a part of the gate lines fails.
  • n gate lines G1-Gn include a plurality of first gate lines G1, G3, G5, ... and a plurality of second gate lines G2, G4, G6...
  • the first gate driver 150 is responsible for driving the plurality of first gate lines G1, G3, G5, ...
  • the second gate driver 160 is responsible for driving the plurality of second gate lines G2, G4, G6, .
  • the plurality of first gate lines G1, G3, G5, ... and the plurality of second gate lines G2, G4, G6, ... are staggered.
  • the first gate driver 150 and the second gate driver 160 control the first gate line and the second gate line, respectively.
  • the first gate line and the second gate line are not repeated, so the space occupied by the first gate driver 150 and the second gate driver 160 can be reduced. Further, it is possible to realize the design of a narrow bezel on both sides of the display panel 110.
  • the scanning manner of the data lines of the preferred embodiment is the same as that of the first preferred embodiment, but the scanning manner of the gate lines is different.
  • the scanning method of the gate line of the preferred embodiment is that the first gate line and the second gate line are cross-scanned to achieve a screen display.
  • the first gate driver 150 and the second gate driver 160 of the third preferred embodiment only need to control a part of the n gate lines, thus The space occupied by the first gate driver 150 and the second gate driver 160 can be effectively low, which is advantageous for the design of the narrow bezel.
  • the plurality of first gate lines and the plurality of second gate lines may not be staggered.

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

一种显示装置，包括显示面板（110）、至少一栅极驱动器（150，160）、至少一源极驱动器（130，140）以及时序控制器（120）。显示面板（110）包括分布成n行×m列矩阵的多个像素，n条栅极线和m条数据线。每一行像素连接n条栅极线中的一条栅极线，每一列像素连接至m条数据线中的两条数据线，每一条数据线连接m列像素中的两列像素，从而有效控制数据线的数量。

Description

显示装置 技术领域
本发明涉及液晶显示技术领域，特别是涉及一种应用于OLED(Organic Light Emitting Diode)的显示装置。
 背景技术
在目前TV 面板的分辨率越来越高，相同尺寸的面板数据线也越来越多。数据线越多，因此用于将外部数据信号引入面板内的薄膜覆晶(chip on film, COF)的数量也越来越多。然而，COF的接脚有一定数量上限，COF与COF之间的距离也需要足够的空间来满足制程裕度(margin)。当面板数据线越来越多的情况下，就很难像现有设计方案一样摆放COF。
参考图1，绘示现有技术的显示设备10的示意图。所述显示设备10包括多个像素、多条数据线(D1-D7…)以及多条栅极线(G1-G4…)。所述多个像素分布成x列像素。每一列像素需要连接两条数据线，即所述x列像素，总共需要2x条数据线才能够正常控制。举例而言，左侧第1列像素需要连接数据线(D1、D2)，此作法会占用许多空间而影响开口率(aperture ratio, AR)、极大的增加数据线的控制芯片(IC)的数量而增加制造成本。
故，有必要提出一种显示装置，以解决上述技术问题。
 技术问题
本发明的目的在于提供一种显示装置，能有效控制数据线的数量，以解决因为数据线数量增加产生的问题。
 技术解决方案
为实现上述目的，本发明提供一种显示装置，所述显示装置包括显示面板、至少一栅极驱动器、至少一源极驱动器以及时序控制器。
所述显示面板包括分布成n行X m列之矩阵的多个像素，并包括n条栅极线与m条数据线，每一行像素连接至所述n条栅极线中的一条栅极线，每一列像素连接至所述m条数据线中的两条数据线，每一条所述数据线连接所述m列像素中的两列像素，每一列像素的多个像素交错地连接至所述两条数据线。
所述至少一栅极驱动器，驱动所述n条栅极线。所述至少一源极驱动器，驱动所述m条数据线。所述时序控制器，控制所述至少一栅极驱动器以及所述至少一源极驱动器。m和n为自然数。
在一优选实施例中，所述至少一栅极驱动器包含薄膜覆晶(chip on film, COF)或阵列基板行扫描驱动(gate driver on array; GOA)电路。
在一优选实施例中，所述m条数据线包含多条第一数据线与多条第二数据线，所述第一源极驱动器驱动所述多条第一数据线，所述第二源极驱动器驱动所述多条第二数据线。
在一优选实施例中，所述多条第一数据线以及所述多条第二数据线交错排列。
在一优选实施例中，所述至少一栅极驱动器包括第一栅极驱动器以及第二栅极驱动器，所述第一栅极驱动器及所述第二栅极驱动器分别设置于所述显示面板的两侧。
在一优选实施例中，所述n条栅极线包含多条第一栅极线与多条第二栅极线，所述第一栅极驱动器驱动所述多条第一栅极线，所述第二栅极驱动器驱动所述多条第二栅极线。
在一优选实施例中，所述多条第一栅极线以及所述多条第二栅极线交错排列。
在一优选实施例中，所述第一栅极驱动器以及所述第二栅极驱动器同时由所述n条栅极线的左右两侧发出栅极信号驱动所述 n条栅极线。
在一优选实施例中，所述m列像素分为第一组像素以及第二组像素，所述第一栅极驱动器以及所述第二栅极驱动器分别控制所述第一组像素以及所述第二组像素。
在一优选实施例中，所述第一组像素包括所述m列像素的一部分，所述第二组像素包括所述m列像素的另一部分。
 有益效果
相较于现有技术，本发明提出一种方案，可以解决单边摆放COF空间不够的难题。即将数据线的信号从面板上下两侧交叉给入，在相同数据线数量的情况下，可以增加一倍的空间。这对于中小尺寸的高分辨率面板的一种解决方案。
再者，本发明的每一条数据线分别控制其左右两列各一半的像素，换句话说，相当于一条数据线控制一列像素，不会影响开口率，也不会增加制造成本。
 附图说明
图1绘示现有技术的显示设备的示意图；
图2绘示根据本发明的第一优选实施例的显示设备的示意图；
图3绘示根据本发明的第二优选实施例的显示设备的示意图；
图4绘示根据本发明的第三优选实施例的显示设备的示意图。
 本发明的最佳实施方式
以下各实施例的说明是参考附加的图式，用以例示本发明可用以实施的特定实施例。本发明所提到的方向用语，例如「上」、「下」、「前」、「后」、「左」、「右」、「内」、「外」、「侧面」等，仅是参考附加图式的方向。因此，使用的方向用语是用以说明及理解本发明，而非用以限制本发明。
图2，绘示根据本发明的第一优选实施例的显示设备100的示意图。所述显示设备100包括显示面板110、第一源极驱动器130、第二源极驱动器140、第一栅极驱动器150以及时序控制器120。
所述显示面板110包括分布成n行X m列之成矩阵分布的多个像素，并包括n条栅极线G1-Gn与m条数据线D1-Dm。其中,m和n为自然数。每一行像素连接至所述n条栅极线G1-Gn中的一条栅极线，每一列像素连接至所述m条数据线D1-Dm中的两条数据线。每一条所述数据线连接所述m列像素中的两列像素，每一列像素的多个像素交错地连接至所述两条数据线。举例而言，最左的一列像素连接栅极线D1以及数据线G1、G2。所述第一栅极驱动器，驱动所述n条栅极线G1-Gn。所述第一源极驱动器130以及所述第二源极驱动器140，驱动所述m条数据线D1-Dn。所述时序控制器120控制所述第一源极驱动器130、所述第二源极驱动器140以及所述第一栅极驱动器150。
优选地，以数据线D3为例，所述数据线D3连接其左侧一列像素（由左数起第三列像素）的一半像素以及其右侧一列像素（由左数起第四列像素）的一半像素；所述数据线D4连接其左侧一列像素（由左数起第四列像素）的一半像素以及其右侧一列像素（由左数起第五列像素）的一半像素；换句话说，第四列像素连接所述数据线D3、D4。在本优选实施例中，所述n条数据线可以控制所述多个像素的显示。
详细地，且所述m条数据线D1-Dm包含多条第一数据线D1、D3、D5、D7…与多条第二数据线D2、D4、D6…。所述第一源极驱动器130驱动所述多条第一数据线D1、D3、D5、D7…，所述第二源极驱动器140驱动所述多条第二数据线D2、D4、D6…，所述多条第一数据线D1、D3、D5、D7…以及所述多条第二数据线D2、D4、D6…交错排列。换句话说，相邻的数据线(如D1以及D2)是由不同的源极驱动器所控制。且所述第一源极驱动器130以及所述第二源极驱动器140分别设置于所述显示面板110的两侧。
本优选实施例通过所述第一数据线以及所述第二数据线的交叉扫描以及栅极线从上而下依序扫描以达成画面显示。
优选地，在本优选实施例中，所述第一源极驱动器130以及所述第二源极驱动器140是以薄膜覆晶搭配数据电路版(Data PCB)实施。所述第一栅极驱动器150是以薄膜覆晶或阵列基板行扫描驱动电路实施。
在其他优选实施例中，所述多条第一数据线以及所述多条第二数据线可以不是交错排列。
图3，绘示根据本发明的第二优选实施例的显示设备200的示意图。本优选实施例与第一优选实施例的区别在于：增加一第二栅极驱动器160。所述第一栅极驱动器150以及所述第二栅极驱动器160同时由所述n条栅极线G1-Gn的左右两侧发出栅极信号驱动所述 n条栅极线G1-Gn。优选地，所述第一栅极驱动器150及所述第二栅极驱动器160分别设置于所述显示面板110的两侧。
详细地，所述m列像素分为第一组像素以及第二组像素。所述第一栅极驱动器150以及所述第二栅极驱动器160分别控制所述第一组像素以及所述第二组像素。优选地，所述第一栅极驱动器150以及所述第二栅极驱动器160分别控制所述第一组像素以及所述第二组像素。优选地，所述第一组包括所述m列像素的一部分；所述第二组像素包括所述m列像素的另一部分。一方面可以降低栅极驱动器的负荷进而降低RC延迟的问题。在本优选实施例中，所述m列像素的一部分可以是第1列至第m/2(或最接近的整數)列像素；所述m列像素的另一部分可以是第m/2+1(或最接近的整數)列至第m列像素。
在其他优选实施例中，所述一部分以及所述另一部分也可以包括不相等的像素列。举例而言，所述一部分是1/3 m列像素；所述另一部分是2/3m列像素。
本优选实施例的数据线的扫描方式与第一优选实施例相同，但是在所述栅极线的扫描方式相异。本优选实施例的栅极线的扫描方式为所述多条栅极线依序对冲扫描以达成画面显示。
然而，在其他优选实施例中，并不限制所述第一栅极驱动器150以及所述第二栅极驱动器160只能控制所述m列像素的一部分，而是能控制全部的像素，以栅极线G1为例，所述第一栅极驱动器150以及所述第二栅极驱动器160均可传送对应第一行像素的每一个像素的栅极信号。故，当其中一个栅极驱动器或其中部分栅极线故障时仍然能够维持画面的显示。
图4，绘示根据本发明的第三优选实施例的显示设备300的示意图。本优选实施例与第二优选实施例的区别在于：所述n条栅极线G1-Gn包括多条第一栅极线G1、G3、G5…以及多条第二栅极线G2、G4、G6…所述第一栅极驱动器150负责驱动多条第一栅极线G1、G3、G5…以及所述第二栅极驱动器160负责驱动多条第二栅极线G2、G4、G6…。所述多条第一栅极线G1、G3、G5…以及所述多条第二栅极线G2、G4、G6…交错排列。换句话说，所述第一栅极驱动器150以及所述第二栅极驱动器160分别控制第一栅极线以及第二栅极线。在本优选实施例中，所述第一栅极线与所述第二栅极线不重复，因此可以减小所述第一栅极驱动器150以及所述第二栅极驱动器160所占用的空间，进而能够使所述显示面板110的两侧能够实现窄边框的设计。
本优选实施例的数据线的扫描方式与第一优选实施例相同，但是在所述栅极线的扫描方式相异。本优选实施例的栅极线的扫描方式为所述第一栅极线以及所述第二栅极线交叉扫描以达成画面显示。
相较于第二优选实施例而言，所述第三优选实施例的所述第一栅极驱动器150以及所述第二栅极驱动器160只需要控制所述n条栅极线的一部分，因此能够有效地将低所述第一栅极驱动器150以及所述第二栅极驱动器160所占用的空间，有利于窄边框的设计。
在其他优选实施例中，所述多条第一栅极线以及所述多条第二栅极线可以不是交错排列。
综上所述，虽然本发明已以优选实施例揭露如上，但上述优选实施例并非用以限制本发明，本领域的普通技术人员，在不脱离本发明的精神和范围内，均可作各种更动与润饰，因此本发明的保护范围以权利要求界定的范围为准。

Claims (18)

  1. 一种显示装置，所述显示装置包括：
    显示面板，包括分布成n行X m列之矩阵的多个像素，并包括n条栅极线与m条数据线，每一行像素连接至所述n条栅极线中的一条栅极线，每一列像素连接至所述m条数据线中的两条数据线，每一条所述数据线连接所述m列像素中的两列像素，每一列像素的多个像素交错地连接至所述两条数据线；
    至少一栅极驱动器，驱动所述n条栅极线；
    至少一源极驱动器，驱动所述m条数据线；以及
    时序控制器，控制所述至少一栅极驱动器以及所述至少一源极驱动器；
    其中m和n为自然数，所述多条第一数据线以及所述多条第二数据线交错排列，所述m条数据线包含多条第一数据线与多条第二数据线，所述第一源极驱动器驱动所述多条第一数据线，所述第二源极驱动器驱动所述多条第二数据线。
  2. 如权利要求1所述显示装置，其中所述至少一栅极驱动器包含薄膜覆晶(chip on film, COF)或阵列基板行扫描驱动(gate driver on array; GOA)电路。
  3. 如权利要求1所述显示装置，其中所述至少一栅极驱动器包括第一栅极驱动器以及第二栅极驱动器，所述第一栅极驱动器及所述第二栅极驱动器分别设置于所述显示面板的两侧。
  4. 如权利要求3所述显示装置，其中所述n条栅极线包含多条第一栅极线与多条第二栅极线，所述第一栅极驱动器驱动所述多条第一栅极线，所述第二栅极驱动器驱动所述多条第二栅极线。
  5. 如权利要求4所述显示装置，其中所述多条第一栅极线以及所述多条第二栅极线交错排列。
  6. 如权利要求3所述显示装置，其中所述第一栅极驱动器以及所述第二栅极驱动器同时由所述n条栅极线的左右两侧发出栅极信号驱动所述 n条栅极线。
  7. 如权利要求6所述显示装置，其中所述m列像素分为第一组像素以及第二组像素，所述第一栅极驱动器以及所述第二栅极驱动器分别控制所述第一组像素以及所述第二组像素。
  8. 如权利要求7所述显示装置，其中所述第一组像素包括所述m列像素的一部分，所述第二组像素包括所述m列像素的另一部分。
  9. 一种显示装置，所述显示装置包括：
    显示面板，包括分布成n行X m列之矩阵的多个像素，并包括n条栅极线与m条数据线，每一行像素连接至所述n条栅极线中的一条栅极线，每一列像素连接至所述m条数据线中的两条数据线，每一条所述数据线连接所述m列像素中的两列像素，每一列像素的多个像素交错地连接至所述两条数据线；
    至少一栅极驱动器，驱动所述n条栅极线；
    至少一源极驱动器，驱动所述m条数据线；以及
    时序控制器，控制所述至少一栅极驱动器以及所述至少一源极驱动器；
    其中m和n为自然数。
  10. 如权利要求9所述显示装置，其中所述至少一栅极驱动器包含薄膜覆晶(chip on film, COF)或阵列基板行扫描驱动(gate driver on array; GOA)电路。
  11. 如权利要求9所述显示装置，其中所述m条数据线包含多条第一数据线与多条第二数据线，所述第一源极驱动器驱动所述多条第一数据线，所述第二源极驱动器驱动所述多条第二数据线。
  12. 如权利要求9所述显示装置，其中所述多条第一数据线以及所述多条第二数据线交错排列。
  13. 如权利要求9所述显示装置，其中所述至少一栅极驱动器包括第一栅极驱动器以及第二栅极驱动器，所述第一栅极驱动器及所述第二栅极驱动器分别设置于所述显示面板的两侧。
  14. 如权利要求13所述显示装置，其中所述n条栅极线包含多条第一栅极线与多条第二栅极线，所述第一栅极驱动器驱动所述多条第一栅极线，所述第二栅极驱动器驱动所述多条第二栅极线。
  15. 如权利要求14所述显示装置，其中所述多条第一栅极线以及所述多条第二栅极线交错排列。
  16. 如权利要求13所述显示装置，其中所述第一栅极驱动器以及所述第二栅极驱动器同时由所述n条栅极线的左右两侧发出栅极信号驱动所述 n条栅极线。
  17. 如权利要求16所述显示装置，其中所述m列像素分为第一组像素以及第二组像素，所述第一栅极驱动器以及所述第二栅极驱动器分别控制所述第一组像素以及所述第二组像素。
  18. 如权利要求17所述显示装置，其中所述第一组像素包括所述m列像素的一部分，所述第二组像素包括所述m列像素的另一部分。
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