WO2017071049A1 - 一种降低表面粗糙度的低温多晶硅的制备方法及一种低温多晶硅 - Google Patents

一种降低表面粗糙度的低温多晶硅的制备方法及一种低温多晶硅 Download PDF

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WO2017071049A1
WO2017071049A1 PCT/CN2015/098995 CN2015098995W WO2017071049A1 WO 2017071049 A1 WO2017071049 A1 WO 2017071049A1 CN 2015098995 W CN2015098995 W CN 2015098995W WO 2017071049 A1 WO2017071049 A1 WO 2017071049A1
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polycrystalline silicon
temperature polycrystalline
low
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low temperature
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任维
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TCL China Star Optoelectronics Technology Co Ltd
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Shenzhen China Star Optoelectronics Technology Co Ltd
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    • HELECTRICITY
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    • H10P50/00Etching of wafers, substrates or parts of devices
    • H10P50/60Wet etching
    • H10P50/66Wet etching of conductive or resistive materials
    • H10P50/663Wet etching of conductive or resistive materials by chemical means only
    • H10P50/667Wet etching of conductive or resistive materials by chemical means only by liquid etching only
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/34Deposited materials, e.g. layers
    • H10P14/3402Deposited materials, e.g. layers characterised by the chemical composition
    • H10P14/3404Deposited materials, e.g. layers characterised by the chemical composition being Group IVA materials
    • H10P14/3411Silicon, silicon germanium or germanium
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/136277Active matrix addressed cells formed on a semiconductor substrate, e.g. of silicon
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/34Deposited materials, e.g. layers
    • H10P14/3451Structure
    • H10P14/3452Microstructure
    • H10P14/3456Polycrystalline
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/38Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by treatments done after the formation of the materials
    • H10P14/3802Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
    • H10P14/3808Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth using laser beams
    • H10P14/3816Pulsed laser beam
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P34/00Irradiation with electromagnetic or particle radiation of wafers, substrates or parts of devices
    • H10P34/40Irradiation with electromagnetic or particle radiation of wafers, substrates or parts of devices with high-energy radiation
    • H10P34/42Irradiation with electromagnetic or particle radiation of wafers, substrates or parts of devices with high-energy radiation with electromagnetic radiation, e.g. laser annealing
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H10P95/90Thermal treatments, e.g. annealing or sintering
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F2202/00Materials and properties
    • G02F2202/10Materials and properties semiconductor
    • G02F2202/104Materials and properties semiconductor poly-Si

Definitions

  • the invention relates to the technical field of liquid crystal display panels, in particular to a method for preparing low-temperature polysilicon with reduced surface roughness and a low-temperature polysilicon.
  • LTPS low temperature polysilicon
  • an amorphous silicon (a-Si) layer is usually formed by chemical vapor deposition, and the amorphous silicon layer is further subjected to crystallization treatment.
  • crystallization is generally performed by excimer laser annealing (ELA) technology.
  • ELA technology generally melts amorphous silicon into amorphous silicon liquid by high temperature generated by laser. When amorphous silicon liquid is cooled, amorphous silicon liquid adheres to solid phase. The crystal nuclei generated in the vicinity of the interface with the liquid phase Si gradually crystallize to form a polycrystalline silicon (p-Si) layer.
  • ELA crystallization pretreatment Before crystallization of ELA, pre-crystallization pretreatment of a-Si is often required. ELA crystallization pretreatment generally forms a surface oxide layer on the a-Si layer, and energy buffering is performed by the oxide layer. The p-Si layer has a large and uniform p-Si grain size. Therefore, many researchers are working to optimize the ELA pre-crystallization pretreatment process to achieve a uniform polysilicon layer.
  • the present invention provides a method for preparing low-temperature polycrystalline silicon with reduced surface roughness, which comprises two excimer laser annealing treatments (ELA) and an amorphous silicon layer before the first ELA crystallization treatment.
  • ELA excimer laser annealing treatments
  • the pretreatment of the polysilicon layer before the second ELA crystallization treatment is washed, and the low temperature polysilicon having a low surface roughness and a uniform surface can be obtained by the preparation method.
  • the present invention provides a method for preparing low temperature polycrystalline silicon having reduced surface roughness, comprising the steps of:
  • the substrate comprises one of a glass substrate, a plastic substrate, ceramics, and graphite.
  • a buffer layer is further included between the substrate and the amorphous silicon layer.
  • the buffer layer is formed by sequentially depositing silicon nitride or silicon oxide.
  • Amorphous silicon is oxidized in the natural environment, and a silicon oxide oxide layer is formed on the surface thereof.
  • the uniformity and quality of the oxide layer are not good, and the surface oxide layer plays an energy buffering role in the subsequent ELA crystallization process.
  • the unevenness of the surface oxide layer will inevitably affect the crystallization effect of ELA, resulting in poor uniformity of polysilicon. Therefore, it is necessary to prepare surface polycrystalline silicon on the surface of amorphous silicon to form a uniform layer. Oxide layer.
  • the surface pretreatment of the substrate comprises: sequentially washing the substrate with an HF solution and ozone water. First, the substrate is etched by HF, and the natural oxide layer, burrs, etc. with poor uniformity on the substrate are removed, and then a uniform oxide layer of excellent quality is formed on the surface of the amorphous silicon by ozone water treatment.
  • the substrate is washed with water, and after drying, the substrate is washed with ozone water.
  • the substrate can be cleaned using purified water, H 2 Water (pure water containing 1 ppm H 2 ) or high pressure water.
  • the HF solution has a concentration of 0.5 to 2%, and the HF solution has a cleaning time of 20 to 40 s.
  • the concentration of the HF solution is 1%, and the cleaning time using the HF solution is 30 s.
  • the ozone water has a concentration of 15 to 25 ppm, and the ozone water has a cleaning time of 40 to 70 s.
  • the concentration of the ozone water is 15-25 ppm, and the cleaning time with ozone water is 60 s.
  • the oxide layer formed by surface pretreatment is SiO 2
  • the SiO 2 oxide layer can perform heat preservation during the laser annealing treatment on the substrate to prevent heat loss.
  • the oxide layer has a thickness of 3-5 nm.
  • the surface When a shot laser is irradiated onto the a-Si layer, the surface reaches the crystallization value energy density when the temperature reaches the silicon melting point, and the surface melting front of the a-Si layer penetrates into the a-Si interior, a- After the Si layer is irradiated, the temperature is low on both sides, and a crystal nucleus is formed at the boundary. After the laser irradiation is stopped, the molten layer is first cooled from both sides, and the interface between the solid phase and the liquid phase moves to the middle and the surface, and the middle is formed in order. Natural nuclear. After cooling, the amorphous silicon is crystallized into polycrystalline silicon p-Si, and the crystal grains are formed by the natural core.
  • the p-Si layer is composed of small-sized crystalline particles (Grain) of many Si atoms. The boundary between them is called the grain boundary.
  • the excimer laser annealing treatment is performed by using an excimer laser having a wavelength of 308 nm.
  • the excimer laser used has an energy density of 440-465 W/cm 2 .
  • the surface-pretreated substrate is irradiated with the excimer laser of the energy density.
  • the energy density of the laser also has a certain relationship with the thickness of the surface oxide layer.
  • the thickness of the oxide layer is thin, the higher the energy of digesting the heat of the SiO 2 oxide layer, the higher the laser energy density required, when the thickness of the oxide layer When thicker, the weaker heat loss of the SiO 2 oxide layer, the lower the laser energy density required.
  • the laser energy in the ELA process can be adjusted accordingly according to the thickness of the oxide layer after surface pretreatment.
  • the concentration of the HF solution is 0.5 to 2%, and the cleaning time using the HF solution is 20 to 40 s.
  • the concentration of the HF solution is 1%, and the cleaning time using the HF solution is 30 s.
  • the excimer laser light used has an energy density of 350-440 W/cm 2 .
  • the grain size of the low temperature polysilicon is The surface roughness is 1-2 nm.
  • the first ELA crystallization treatment mainly comprises crystallizing a-Si into p-Si, so that the lattice size of p-Si can reach the required requirement, and normal.
  • the difference in density between a-Si and p-Si and the stress at the corresponding interface may cause partial crystals to be Pushing onto the surface of the polysilicon layer, forming protrusions in the crystal nucleation crystallization process of p-Si; then using the second HF cleaning action and the second low-energy ELA crystallization treatment, the embossing can be performed by the HF solution.
  • the material is treated, the surface roughness is initially reduced, and the effect of the second ELA can be reduced to reduce the damage which may be caused by the crystallinity of the polycrystalline silicon during the cleaning, and the crystallized complete polycrystalline silicon is obtained, so that the surface roughness is further reduced significantly.
  • the grain size is required to meet the required requirements.
  • the preparation method is simple and easy to operate, can effectively reduce the surface roughness of polycrystalline silicon, and obtain low-temperature polycrystalline silicon with low roughness, uniform surface and good crystallization performance.
  • the present invention provides a low temperature polycrystalline silicon produced by the preparation method of the first aspect of the invention.
  • the grain size of the low temperature polysilicon is The surface roughness of the low-temperature polysilicon is 1-2 nm, and the roughness refers to the height of the protrusion of the polysilicon surface.
  • the invention provides a method for preparing low temperature polycrystalline silicon with reduced surface roughness, wherein the preparation method comprises two excimer laser annealing treatments and an amorphous silicon layer cleaning pretreatment before the first excimer laser annealing treatment, and a second quasi-standard
  • the polysilicon layer cleaning pretreatment before the molecular laser annealing treatment is simple and easy to operate, and can effectively solve the problem that the surface of the polysilicon surface formed by the conventional primary excimer laser annealing treatment has many surface bumps and low roughness, and the surface is obtained.
  • the low temperature polysilicon provided by the present invention is excellent in performance and can be used in the field of high resolution displays.
  • 1 is a schematic view showing a process of forming polycrystalline silicon in the prior art, wherein 1 is a substrate, 2 is solid phase silicon, 3 is liquid phase silicon, 3' is polysilicon, and 4 is a grain boundary protrusion formed on a 3' surface;
  • FIG. 2 is a flow chart of a method for preparing low temperature polysilicon with reduced surface roughness according to an embodiment of the present invention
  • FIG. 3 is a comparison diagram of a scanning electron microscope (SEM) of low-temperature polysilicon prepared in Example 1 of the present invention and low-temperature polycrystalline silicon obtained in the prior art, wherein the first column of FIG. 3 is prepared in Comparative Example 1.
  • the polycrystalline silicon, the second column of Fig. 3 is a polycrystalline silicon produced in the first embodiment of the present invention.
  • a flow chart of a method for preparing low-temperature polysilicon for reducing surface roughness includes the following steps:
  • a glass is used as the substrate, and an amorphous silicon layer having a thickness of 45 nm is formed on the glass substrate by chemical vapor deposition.
  • the step further includes depositing a buffer layer on the substrate to form a buffer layer. Above the buffer layer.
  • the buffer layer and the amorphous silicon layer can be deposited according to the existing process conditions.
  • the buffer layer is sequentially deposited by silicon nitride and silicon oxide.
  • the surface pretreatment is: firstly, the substrate is washed with an HF solution having a concentration of 1% for about 30 s, and washed with water and dried with a clean N 2 substrate; then the substrate is washed with ozone water having a concentration of 20 ppm for 60 s. The substrate was washed with water and dried with a clean N 2 to form a uniform SiO 2 oxide layer having a thickness of 4 nm.
  • an excimer laser annealing apparatus of JSW Corporation is used at room temperature and atmospheric pressure to irradiate the surface-pretreated substrate with an excimer laser having a wavelength of 308 nm, a scanning pitch of 25 ⁇ m, and an energy density of 440 W/cm 2 .
  • the amorphous silicon layer is formed to form a polysilicon layer.
  • the concentration of the HF solution used in this step was 1%, and the cleaning time using the HF solution was 30 s.
  • an excimer laser annealing apparatus of JSW Corporation is used at room temperature and atmospheric pressure to irradiate the acid-cleaned polysilicon layer with an excimer laser having a wavelength of 308 nm, an energy density of 400 W/cm 2 , and a scanning pitch of 25 ⁇ m.
  • Low temperature polysilicon with low surface roughness.
  • the amorphous silicon is subjected to surface pretreatment and laser annealing treatment by a prior art process, and the specific operation is the same as steps S101-S102 of the embodiment.
  • the low temperature polycrystalline silicon (second row of FIG. 3) obtained by the method of the embodiment of the present invention has a uniform grain size and a crystal grain size of 380 nm. (diameter), the surface of the polycrystalline silicon is flat, almost no protrusions, and the surface roughness is 1-2 nm; and the surface of the polycrystalline silicon obtained in Comparative Example 1 (the first column of FIG. 3) is rough, and there are a plurality of continuous protrusions.
  • the height (surface roughness) of the protrusions is about 43 nm.
  • the roughness of the polycrystalline silicon obtained by the conventional primary ELA laser treatment is high, which inevitably affects the application of polysilicon in the subsequent film forming process. It is difficult to obtain uniform threshold voltage and current characteristics, which in turn affects the application of polysilicon in high quality displays. It can be seen from the comparison between the first embodiment and the comparative example 1 that the preparation method provided by the invention can effectively reduce the surface roughness of the polycrystalline silicon, and obtain low-temperature polycrystalline silicon with low roughness, uniform surface and good crystal performance.
  • a method for preparing low temperature polycrystalline silicon with reduced surface roughness comprising the following steps:
  • the surface roughness of the low-temperature polysilicon obtained in the step (4) is greatly reduced with respect to the polysilicon layer of the step (2).
  • a method for preparing low temperature polycrystalline silicon with reduced surface roughness comprising the following steps:
  • the surface roughness of the low-temperature polysilicon obtained in the step (4) is greatly reduced with respect to the polysilicon layer of the step (2).

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Abstract

一种降低表面粗糙度的低温多晶硅的制备方法和由该方法制得的低温多晶硅。该制备方法包括:先对表面形成有非晶硅层的基板进行表面预处理,以在非晶硅层上形成一氧化层,之后进行第一次准分子激光退火处理,使非晶硅层形成多晶硅层;然后对多晶硅层进行酸清洗,以除去多晶硅层上的凸起物,最后再进行第二次准分子激光退火处理,得到表面粗糙度低的低温多晶硅。该制备方法简单易操作,可以有效降低多晶硅的表面粗糙度,得到粗糙度低、表面均匀且结晶性能良好的低温多晶硅。

Description

一种降低表面粗糙度的低温多晶硅的制备方法及一种低温多晶硅
本发明要求2015年10月30日向中国专利局递交的发明名称为“一种降低表面粗糙度的低温多晶硅的制备方法及一种低温多晶硅”、申请号为201510724613.4的在先申请的优先权,上述在先申请的内容以引入的方式并入本文本中。
技术领域
本发明涉及液晶显示面板技术领域,尤其涉及一种降低表面粗糙度的低温多晶硅的制备方法及一种低温多晶硅。
背景技术
在液晶显示面板制造行业中,低温多晶硅(LTPS,Low Temperature Poly-silicon)技术由于拥有更好的电子迁移率,逐步成为液晶显示面板技术革新的方向,这使得具有轻、薄、低耗能、高亮度、高分辨率等优点的LPS显示器备受瞩目。
在LPS技术中,通常先采用化学气相沉积形成非晶硅(a-Si)层,再对该非晶硅层进行结晶化处理。目前一般是采用准分子激光退火(ELA)技术进行结晶化,ELA技术一般是通过激光产生的高温将非晶硅熔融形成非晶硅液体,非晶硅液体冷却时,非晶硅液体依附固相和液相Si间的界面附近产生的晶核逐渐结晶生长而形成多晶硅(p-Si)层。
ELA结晶化之前往往需要对a-Si进行结晶前预处理,ELA结晶预处理一般是在a-Si层之上形成表面氧化层,借由该氧化层进行能量缓冲,从而得到 p-Si晶粒尺寸较大且均匀的p-Si层。因此,许多研究人员致力于优化ELA结晶前预处理工艺,以期望得到均匀的多晶硅层。
然而,由于固相硅与液相硅的密度存在差异,以及长晶体过程的应力作用不同,经上述ELA结晶预处理后,即使形成了均匀的表面氧化层,但最终形成的p-Si层表面处于晶界的凸起物仍较多(如附图1所示),这使得p-Si层的表面粗糙较大,最终影响到后续的多晶硅制膜工序。因此,有必要提供一种降低表面粗糙度的低温多晶硅的新方法。
发明内容
有鉴于此,本发明提供了一种降低表面粗糙度的低温多晶硅的制备方法,所述制备方法中包括两次准分子激光退火处理(ELA)及第一次ELA结晶处理前的非晶硅层清洗预处理、第二次ELA结晶处理前的多晶硅层清洗预处理,采用所述制备方法可以得到表面粗糙度低且表面均匀的低温多晶硅。
第一方面,本发明提供了一种降低表面粗糙度的低温多晶硅的制备方法,包括以下步骤:
(1)提供一表面形成有非晶硅层的基板,对所述基板进行表面预处理,以在所述非晶硅层上形成一均匀氧化层;
(2)对所述表面预处理后的基板进行第一次准分子激光退火处理,使所述非晶硅层形成多晶硅层;
(3)采用HF溶液对所述多晶硅层进行酸清洗,以除去所述多晶硅层上的凸起物;
(4)对酸清洗后的所述多晶硅层进行第二次准分子激光退火处理,得到低温多晶硅。
优选地,步骤(1)中,所述基板包括玻璃基板、塑料基板、陶瓷和石墨中的一种。
优选地,所述基板与所述非晶硅层之间还包括一缓冲层。
优选地,所述缓冲层由氮化硅、氧化硅依次沉积而成。
非晶硅在自然环境中会被氧化,在其表面形成二氧化硅氧化层,该氧化层的均匀性及品质均不佳,而表面氧化层在后续的ELA结晶过程中起着能量缓冲的作用,表面氧化层的不均匀必然影响ELA的结晶效果,造成多晶硅均匀性不佳,因此,要制备出均匀性高的多晶硅必然需要在非晶硅的表面进行表面预处理,以形成一层均匀的氧化层。
优选地,步骤(1)中,所述对所述基板进行表面预处理,包括:采用HF溶液和臭氧水依次清洗所述基板。首先采用HF对基板进行刻蚀,将基板上的均匀性不佳的自然氧化层、毛刺等除去,再经过臭氧水处理在非晶硅表面形成品质优良的均匀氧化层。
为避免残留在基板表面的溶液对后续操作步骤造成影响,优选地,在采用HF溶液清洗基板后,采用水清洗所述基板,经干燥处理之后再采用臭氧水清洗基板。可使用纯净水、H2Water(含1ppm H2的纯净水)或高压水对基板进行清洗。
进一步优选地,所述HF溶液的浓度为0.5-2%,采用HF溶液的清洗时间为20-40s。
更优选地,所述HF溶液的浓度为1%,采用HF溶液的清洗时间为30s。
进一步优选地,所述臭氧水的浓度为15-25ppm,采用臭氧水的清洗时间为40-70s。
更优选地,所述臭氧水的浓度为15-25ppm,采用臭氧水的清洗时间为60s。
如本发明所述的,经表面预处理形成的氧化层为SiO2,SiO2氧化层可以在对基板激光退火处理的过程中,起到保温作用,防止热量散失。
优选地,步骤(1)中,所述氧化层的厚度为3-5nm。
当一个shot的激光照射到a-Si层上,使其表面在温度达到硅熔点时即达到了晶化域值能量密度,a-Si层的表面熔化前沿会深入到a-Si内部,a-Si层照射后的温度,中间高两边低,边界处形成结晶核,停止激光照射后,熔融层首先从两边开始冷却,固相和液相之间的界面会移动到中间和表面,中间依次形成自然核。冷却之后,非晶硅晶化为多晶硅p-Si,以自然核为界形成晶粒,p-Si层是由许多Si原子的小规模结晶颗粒(简称晶粒,Grain)组合而成,晶粒之间的边界称为晶界。
激光的照射强度(或能量密度)越大,晶粒的尺寸越大,p-Si的迁移率越大,但能量也不能太大,太大的能量反而会使迁移率下降。
优选地,步骤(1)和步骤(4)中,所述准分子激光退火处理为采用波长为308nm的准分子激光进行照射。
优选地,步骤(2)中,所述第一次准分子激光退火处理中,所用准分子激光的能量密度为440-465W/cm2。采用该能量密度的准分子激光照射所述表面预处理后的基板。
所述激光的能量密度与表面氧化层的厚度也有一定关系,当氧化层的厚度薄时,SiO2氧化层对热量的消化能量越强,所需的激光能量密度越高,当氧化层的厚度较厚时,SiO2氧化层对热量的散失越弱,所需的激光能量密度越低。在具体的实施例中,可以根据表面预处理后氧化层的厚度对ELA工序中的激 光能量进行相应调整。
优选地,步骤(3)中,所述HF溶液的浓度为0.5-2%,采用HF溶液的清洗时间为20-40s。
更优选地,步骤(3)中,所述HF溶液的浓度为1%,采用HF溶液的清洗时间为30s。
优选地,步骤(4)中,所述第二次准分子激光退火处理中,采用的准分子激光的能量密度为350-440W/cm2
优选地,步骤(4)中,所述低温多晶硅的晶粒大小为
Figure PCTCN2015098995-appb-000001
表面粗糙度为1-2nm。
本发明提供的降低表面粗糙度的低温多晶硅的制备方法中,第一次ELA结晶化处理主要为将a-Si结晶为p-Si可使得p-Si的晶格大小达到所需要求,而正常的ELA结晶过程,由于a-Si在瞬间激光作用下,a-Si高温熔融为p-Si时,a-Si和p-Si的密度差异以及相应界面的应力作用不同,会导致部分的晶体被推挤到多晶硅层的表面上,在p-Si的晶体成核结晶过程形成突起物;之后采用第二次HF清洗作用以及第二次低能量的ELA结晶处理,既能通过HF溶液对凸起物进行处理作用、初步降低表面粗糙度,又可通过第二次ELA的作用,降低清洗时可能对多晶硅的结晶性造成的一定损伤,得到结晶性完整的多晶硅,使表面粗糙度进一步明显降低且使晶粒尺寸达到所需要求。所述制备方法简单易操作,可以有效降低多晶硅的表面粗糙度,得到粗糙度低、表面均匀且结晶性能良好的低温多晶硅。
第二方面,本发明提供了采用本发明第一方面所述的制备方法制得的低温多晶硅。
所述低温多晶硅的晶粒大小为
Figure PCTCN2015098995-appb-000002
所述低温多晶硅的表面粗糙度为1-2nm,所述粗糙度是指多晶硅表面隆起的凸起物的高度。
本发明的有益效果
本发明提供的降低表面粗糙度的低温多晶硅的制备方法,所述制备方法包括两次准分子激光退火处理及第一次准分子激光退火处理前的非晶硅层清洗预处理、第二次准分子激光退火处理前的多晶硅层清洗预处理,采用所述制备方法简单易操作,可以有效解决传统的一次准分子激光退火处理形成的多晶硅表面界面凸起物多、粗糙度低的问题,得到表面粗糙度低、晶粒大小均匀且结晶性能良好的低温多晶硅。本发明提供的低温多晶硅的性能优异,可以用于高分辨率的显示器领域。
附图说明
为了更清楚地说明本发明实施例或现有技术中的技术方案,下面将对实施例或现有技术描述中所需要使用的附图作简单的介绍。
图1是现有技术中多晶硅的形成过程示意图,1为基板,2为固相硅,3为液相硅,3’为多晶硅,4为3’表面形成的晶界凸起物;
图2是本发明实施例提供的降低表面粗糙度的低温多晶硅的制备方法流程图;
图3是本发明实施例1制得的低温多晶硅与现有技术制得的低温多晶硅的扫描电子显微镜(SEM)的对比图,其中图3的第一列的图均为对比实施例1制得的多晶硅,图3的第二列的图均为本发明实施例1制得的多晶硅。
具体实施方式
下面结合附图及实施例,对本发明实施例中的技术方案进行清楚、完整地描述,显然,所描述的实施例仅仅是本发明一部分实施例,而不是全部的实施例。应当指出,此处所描述的具体实施例仅仅用以解释本发明,并不用于限定本发明。
实施例1
参见附图2的降低表面粗糙度的低温多晶硅的制备方法流程图,本实施例提供的降低表面粗糙度的低温多晶硅的制备方法,包括以下步骤:
S101、提供一表面形成有非晶硅层的基板,对所述基板进行表面预处理,以在所述非晶硅层上形成一均匀氧化层。
本实施例中,选用玻璃作为基板,采用化学气相沉积法在玻璃基板上形成厚度为45nm的非晶硅层,该步骤之前还包括在基板上沉积形成一缓冲层,所述非晶硅层形成于所述缓冲层之上。该缓冲层及非晶硅层均可按照现有工艺条件沉积而成,本实施例中,所述缓冲层由氮化硅、氧化硅依次沉积而成。
本实施例中,所述表面预处理为:首先采用浓度为1%的HF溶液清洗基板约30s,并用水清洗并采用洁净N2干燥基板;之后采用浓度为20ppm的臭氧水清洗基板为60s,并用水清洗并采用洁净N2干燥基板,形成厚度为4nm的均匀为SiO2氧化层。
S102、对所述表面预处理后的基板进行第一次准分子激光退火处理,使所述非晶硅层形成多晶硅层。
本实施例中,在室温和大气压下采用JSW公司的准分子激光退火设备,以波长为308nm、扫描间距为25μm、能量密度为440W/cm2的准分子激光照 射表面预处理后的基板上的非晶硅层,使其形成多晶硅层。
S103、采用HF溶液所述多晶硅层进行酸清洗,以除去所述多晶硅层上的凸起物。
本实施例中,该步骤中所用HF溶液的浓度为1%,采用HF溶液的清洗时间为30s。
S104、对酸清洗后的所述多晶硅层进行第二次准分子激光退火处理,得到低温多晶硅。
本实施例中,在室温和大气压下采用JSW公司的准分子激光退火设备,以波长为308nm、能量密度为400W/cm2、扫描间距为25μm的准分子激光照射酸清洗后的多晶硅层,得到表面粗糙度低的低温多晶硅。
对比实施例1
为了突出本发明实施例的有益效果,采用现有技术的工艺对非晶硅进行表面预处理、激光退火处理,具体操作同本实施例的步骤S101-S102。
利用扫描电子显微镜对本发明实施例、对比实施例1所得低温多晶硅层的表面粗糙度、晶粒大小进行测定,结果如图3所示。
由实施例1与对比实施例1的对比可知,从图3可以看出,采用本发明实施例的方法制得的低温多晶硅(图3第二列)的晶粒大小均一,晶粒大小为380nm(直径),多晶硅的表面平整,几乎没有凸起物,表面粗糙度为1-2nm;而对比实施1所得的多晶硅(图3第一列)的表面很粗糙,存在多处连绵的凸起,凸起物的高度(表面粗糙度)约为43nm,由此可知,常规一次ELA激光处理所得的多晶硅的粗糙度很高,这必然会影响多晶硅在后续制膜工艺中的应 用,难以获得均匀的阈值电压和电流特性,进而影响到多晶硅在高品质显示器中的应用。由实施例1与对比实施例1的对比可知,本发明提供的制备方法,可以有效降低多晶硅的表面粗糙度,得到粗糙度低、表面均匀且结晶性能良好的低温多晶硅。
实施例2
一种降低表面粗糙度的低温多晶硅的制备方法,包括以下步骤:
(1)提供一表面形成有厚度为43nm的非晶硅层的陶瓷基板,对陶瓷基板进行表面预处理,以在所述非晶硅层上形成一均匀氧化层,其中表面预处理为:首先采用浓度为0.5%的HF溶液清洗基板约70s,并用水清洗并采用洁净N2干燥基板;之后采用浓度为15ppm的臭氧水清洗基板为70s,并用水清洗并采用洁净N2干燥基板,形成厚度为3nm的均匀为SiO2氧化层;
(2)对上述表面预处理后的基板进行第一次准分子激光退火(ELA)处理,使非晶硅层转变形成多晶硅层,所用激光的能量密度为450W/cm2
(3)采用浓度为0.5%的HF溶液对多晶硅层进行酸清洗40s,以除去多晶硅层上的凸起物;
(4)对酸清洗后的多晶硅层进行第二次ELA处理,得到低温多晶硅,其中所用激光的能量密度为350W/cm2
其中,相对于步骤(2)的多晶硅层,步骤(4)中得到的低温多晶硅的表面粗糙度大大降低。
实施例3
一种降低表面粗糙度的低温多晶硅的制备方法,包括以下步骤:
(1)提供一表面形成有厚度为47nm的非晶硅层的陶瓷基板,对陶瓷基板进行表面预处理,以在所述非晶硅层上形成一均匀氧化层,其中表面预处理为:首先采用浓度为2%的HF溶液清洗基板约40s,并用水清洗并采用洁净N2干燥基板;之后采用浓度为25ppm的臭氧水清洗基板为40s,并用水清洗并采用洁净N2干燥基板,形成厚度为5nm的均匀为SiO2氧化层;
(2)对上述表面预处理后的基板进行第一次准分子激光退火(ELA)处理,使非晶硅层转变形成多晶硅层,所用激光的能量密度为465W/cm2
(3)采用浓度为2%的HF溶液对多晶硅层进行酸清洗20s,以除去多晶硅层上的凸起物;
(4)对酸清洗后的多晶硅层进行第二次ELA处理,得到低温多晶硅,其中所用激光的能量密度为440W/cm2
其中,相对于步骤(2)的多晶硅层,步骤(4)中得到的低温多晶硅的表面粗糙度大大降低。
需要说明的是,本申请所提供的实施例仅仅是示意性的。所属领域的技术人员可以清楚地了解到,为了描述的方便和简洁,在上述实施例中,对各个实施例的描述都各有侧重,某个实施例中没有详述的部分,可以参见其他实施例的相关描述。在本发明实施例、权利要求以及附图中揭示的特征可以独立存在也可以组合存在。

Claims (20)

  1. 一种降低表面粗糙度的低温多晶硅的制备方法,其中,包括以下步骤:
    (1)提供一表面形成有非晶硅层的基板,对所述基板进行表面预处理,以在所述非晶硅层上形成一均匀氧化层;
    (2)对所述表面预处理后的基板进行第一次准分子激光退火处理,使所述非晶硅层形成多晶硅层;
    (3)采用HF溶液对所述多晶硅层进行酸清洗,以除去所述多晶硅层上的凸起物;
    (4)对酸清洗后的所述多晶硅层进行第二次准分子激光退火处理,得到低温多晶硅。
  2. 根据权利要求1所述的低温多晶硅的制备方法,其中,步骤(1)和步骤(4)中,所述准分子激光退火处理为采用波长为308nm的准分子激光进行照射。
  3. 根据权利要求1所述的低温多晶硅的制备方法,其中,步骤(4)中,所述第二次准分子激光退火处理中,所用准分子激光的能量密度为350-440W/cm2
  4. 根据权利要求1所述的低温多晶硅的制备方法,其中,步骤(2)中,所述第一次准分子激光退火处理中,所用准分子激光的能量密度为440-465W/cm2
  5. 根据权利要求1所述的低温多晶硅的制备方法,其中,步骤(3)中,所述HF溶液的浓度为0.5-2%,采用HF溶液的清洗时间为20-40s。
  6. 根据权利要求2所述的低温多晶硅的制备方法,其中,步骤(3)中,所述HF溶液的浓度为0.5-2%,采用HF溶液的清洗时间为20-40s。
  7. 根据权利要求3所述的低温多晶硅的制备方法,其中,步骤(3)中,所述HF溶液的浓度为0.5-2%,采用HF溶液的清洗时间为20-40s。
  8. 根据权利要求4所述的低温多晶硅的制备方法,其中,步骤(3)中,所述HF溶液的浓度为0.5-2%,采用HF溶液的清洗时间为20-40s。
  9. 根据权利要求1所述的低温多晶硅的制备方法,其中,步骤(1)中,所述对所述基板进行表面预处理,包括:采用HF溶液和臭氧水依次清洗所述基板。
  10. 根据权利要求9所述的低温多晶硅的制备方法,其中,所述HF溶液的浓度为0.5-2%,采用HF溶液的清洗时间为20-40s。
  11. 根据权利要求9所述的低温多晶硅的制备方法,其中,所述臭氧水的浓度为15-25ppm,采用臭氧水的清洗时间为40-70s。
  12. 根据权利要求1所述的低温多晶硅的制备方法,其中,步骤(1)中,所述基板与所述非晶硅层之间还包括一缓冲层,所述缓冲层由氮化硅、氧化硅依次沉积而成。
  13. 根据权利要求1所述的低温多晶硅的制备方法制得的低温多晶硅。
  14. 根据权利要求2所述的低温多晶硅的制备方法制得的低温多晶硅。
  15. 根据权利要求3所述的低温多晶硅的制备方法制得的低温多晶硅。
  16. 根据权利要求4所述的低温多晶硅的制备方法制得的低温多晶硅。
  17. 根据权利要求5所述的低温多晶硅的制备方法制得的低温多晶硅。
  18. 根据权利要求9所述的低温多晶硅的制备方法制得的低温多晶硅。
  19. 根据权利要求11所述的低温多晶硅的制备方法制得的低温多晶硅。
  20. 根据权利要求12所述的低温多晶硅的制备方法制得的低温多晶硅。
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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112151354A (zh) * 2019-06-26 2020-12-29 陕西坤同半导体科技有限公司 一种多晶硅薄膜表面处理方法
KR20210102557A (ko) 2020-02-11 2021-08-20 삼성디스플레이 주식회사 디스플레이 장치
CN112044872B (zh) * 2020-08-05 2022-02-25 中国人民解放军陆军装甲兵学院 一种激光清洗后基体表面熔融层厚度的调控方法
CN115714128A (zh) * 2021-08-19 2023-02-24 上海和辉光电股份有限公司 一种阵列基板及其制备方法、显示面板及显示装置
CN117139850A (zh) * 2023-09-01 2023-12-01 浙江大学 一种协同作用在硅光波导的表面光滑化方法

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1540719A (zh) * 2003-04-23 2004-10-27 友达光电股份有限公司 低温多晶硅薄膜的制造方法及低温多晶硅薄膜晶体管
CN102651311A (zh) * 2011-12-20 2012-08-29 京东方科技集团股份有限公司 一种低温多晶硅薄膜的制备方法及低温多晶硅薄膜
CN104779139A (zh) * 2015-03-31 2015-07-15 深超光电(深圳)有限公司 半导体薄膜的制造方法及薄膜晶体管的制造方法

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5817550A (en) * 1996-03-05 1998-10-06 Regents Of The University Of California Method for formation of thin film transistors on plastic substrates
US6716768B2 (en) * 2000-02-15 2004-04-06 Matsushita Electric Industrial Co., Ltd. Method of manufacturing thin-film transistor, and liquid-crystal display
JP4024508B2 (ja) * 2001-10-09 2007-12-19 株式会社半導体エネルギー研究所 半導体装置の作製方法
US20060240647A1 (en) * 2005-04-25 2006-10-26 Toshiba Matsushita Display Technology Co., Ltd. Film control method and device thereof
JP5243046B2 (ja) * 2006-01-25 2013-07-24 シャープ株式会社 半導体装置の製造方法、及び、半導体装置
US20080121892A1 (en) * 2006-11-29 2008-05-29 Tpo Displays Corp. Low temperature poly silicon liquid crystal display

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1540719A (zh) * 2003-04-23 2004-10-27 友达光电股份有限公司 低温多晶硅薄膜的制造方法及低温多晶硅薄膜晶体管
CN102651311A (zh) * 2011-12-20 2012-08-29 京东方科技集团股份有限公司 一种低温多晶硅薄膜的制备方法及低温多晶硅薄膜
CN104779139A (zh) * 2015-03-31 2015-07-15 深超光电(深圳)有限公司 半导体薄膜的制造方法及薄膜晶体管的制造方法

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