WO2017066919A1 - 相位校准的方法、装置及设备 - Google Patents

相位校准的方法、装置及设备 Download PDF

Info

Publication number
WO2017066919A1
WO2017066919A1 PCT/CN2015/092275 CN2015092275W WO2017066919A1 WO 2017066919 A1 WO2017066919 A1 WO 2017066919A1 CN 2015092275 W CN2015092275 W CN 2015092275W WO 2017066919 A1 WO2017066919 A1 WO 2017066919A1
Authority
WO
WIPO (PCT)
Prior art keywords
phase
negative feedback
stable
feedback circuit
interval
Prior art date
Application number
PCT/CN2015/092275
Other languages
English (en)
French (fr)
Inventor
郭晓乐
Original Assignee
海能达通信股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 海能达通信股份有限公司 filed Critical 海能达通信股份有限公司
Priority to PCT/CN2015/092275 priority Critical patent/WO2017066919A1/zh
Publication of WO2017066919A1 publication Critical patent/WO2017066919A1/zh

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/06—Receivers
    • H04B1/16—Circuits

Definitions

  • the present invention relates to the field of control, and in particular, to a method, apparatus and apparatus for phase calibration.
  • phase shift occurs.
  • more and more devices will accurately control the phase information, for example, by using a negative feedback system device or adding a negative feedback circuit to achieve phase calibration.
  • FIG. 1 is a schematic structural diagram of a negative feedback system in the prior art.
  • the feedback system includes an input signal A, an output signal B, and a feedback signal C.
  • the phase value of the feedback signal C must be maintained at a difference of 180 from the phase value of the input signal A.
  • the difference between the phase value of the feedback signal C and the phase value of the input signal A is generally not maintained at 180 degrees, which further affects the stability of the system.
  • the prior art generally uses phase detection or discrimination from inside the feedback circuit or inside the feedback system, and further compensates and corrects according to the phase deviation detected from inside the feedback circuit or inside the feedback system.
  • phase compensation of the feedback circuit or the feedback system can be realized to a certain extent, the stability of the system is ensured.
  • a separate phase calibration scheme is required for each different circuit or system, which not only complicates the original circuit, but also increases Manpower and resource costs, and poor versatility, and lack of ease of use.
  • the technical problem to be solved by the present invention is to provide a method, a device and a device for phase calibration, which can realize the calibration of the phase information and ensure the stability of the device without changing the design idea of the original negative feedback system.
  • Different systems are versatile and easy to use.
  • a first aspect of the present invention provides a method for phase calibration, including:
  • the optimum phase is input as the phase of the input signal of the negative feedback circuit.
  • the step of detecting a stable phase interval of the negative feedback circuit and determining an optimal phase according to the stable phase interval is specifically:
  • An optimum phase is determined based on the stable phase interval.
  • the determining the optimal phase according to the stable phase interval specifically includes:
  • the intermediate phase value of the stable phase interval is determined to be the optimum phase.
  • the phase of the input signal of the negative feedback circuit is scanned at a predetermined time, by detecting the stability indicator
  • the step of determining the stable phase interval of the negative feedback circuit by the signal specifically includes:
  • the phase of the input signal of the negative feedback circuit is scanned from 0 degrees to 360 degrees for a predetermined time, and the stable phase interval of the negative feedback circuit is determined by detecting the stable index signal.
  • the phase of the input signal of the negative feedback circuit is scanned at a predetermined time, by detecting the stability indicator
  • the step of determining the stable phase interval of the negative feedback circuit by the signal specifically includes:
  • the phase of the input signal of the negative feedback circuit is scanned from 0 degrees to 360 degrees for a predetermined time, and after the stable phase interval is detected, the subsequent phase of the stable phase interval is stopped.
  • the stable phase interval is a continuous phase interval.
  • the stability indicator signal includes at least one of an amplitude of an out-of-band signal, a degree of signal distortion, a change in a supply current, and a voltage change.
  • a second aspect of the present invention provides a phase calibration apparatus, including: an acquisition unit, a stability detection unit, a stable phase determination unit, and a phase adjustment unit,
  • the collecting unit is configured to collect a stable indicator signal of the negative feedback circuit
  • the stability detecting unit is configured to detect the stable indicator signal, and determine whether the negative feedback circuit is stable;
  • the stable phase determining unit is configured to detect a stable phase interval of the negative feedback circuit when the negative feedback circuit is unstable, and determine an optimal phase according to the stable phase interval;
  • the phase adjustment unit is configured to input the optimal phase as a phase of an input signal of the negative feedback circuit.
  • a third aspect of the present invention provides a device for phase calibration, including a processor and a memory.
  • the processor is configured to: collect a stable indicator signal in a negative feedback circuit, determine whether the negative feedback circuit is stable by detecting the stable indicator signal; and detect the negative feedback circuit when determining that the negative feedback circuit is unstable a stable phase interval, determining an optimal phase according to the stable phase interval; and inputting the optimal phase as a phase of an input signal of the negative feedback circuit;
  • the memory is configured to store a program running in the processor and data generated during the running of the program.
  • the processor is specifically configured to scan a phase of an input signal of the negative feedback circuit at a predetermined time, and determine by determining the stable indicator signal a stable phase interval of the negative feedback circuit;
  • An optimum phase is determined based on the stable phase interval.
  • the processor is specifically configured to determine an intermediate phase value of the stable phase interval as an optimal phase.
  • the processor is specifically configured to use a phase of the input signal of the negative feedback circuit from 0 degrees to a predetermined time Scanning is performed 360 degrees, and the stable phase interval of the negative feedback circuit is determined by detecting the stable index signal.
  • the processor is specifically configured to: Scanning is performed 360 degrees, and after detecting the stable phase interval, scanning of the subsequent phase of the stable phase interval is stopped.
  • the stable phase interval is a continuous phase interval.
  • the stability indicator signal includes at least one of an amplitude of the out-of-band signal, a degree of signal distortion, a change in the supply current, and a voltage change.
  • the present invention detects the stable index signal after collecting the stable index signal of the negative feedback circuit, determines whether the negative feedback circuit is stable, and determines that the negative feedback circuit is not When stable, the stable phase interval of the negative feedback circuit is detected, and after determining the optimum phase according to the stable phase interval, the optimum phase is input as the phase of the input signal of the negative feedback circuit.
  • the phase information can be calibrated without changing the design idea of the original negative feedback system, the stability of the device can be ensured, and the scope of application is not limited, and can be easily used in different devices and devices. Better versatility.
  • the method of the invention is simple in its own, can be realized highly, and has strong practicability.
  • FIG. 1 is a schematic structural view of a prior art phase calibration system of the present invention
  • FIG. 2 is a schematic structural view of an embodiment of a phase calibration system of the present invention
  • FIG. 3 is a schematic flow chart of an embodiment of a method for phase calibration according to the present invention.
  • FIG. 4 is a schematic flow chart of another embodiment of a method for phase calibration according to the present invention.
  • FIG. 5 is a schematic structural diagram of a specific application implementation manner of the phase calibration method of FIG. 3; FIG.
  • FIG. 6 is a schematic structural view of an embodiment of a device for phase calibration according to the present invention.
  • FIG. 7 is a schematic structural view of an embodiment of a phase calibration apparatus of the present invention.
  • FIG. 2 is a schematic structural view of an embodiment of a phase calibration system according to the present invention.
  • the phase calibration system of the present embodiment includes a negative feedback circuit 201 and a phase calibration device 202.
  • the phase calibration system of the present embodiment is applicable to a closed negative feedback system. It is also applicable to any device and device that includes a negative feedback system.
  • the negative feedback circuit 201 includes a negative feedback unit 2011 and an energy coupling unit 2022.
  • the negative feedback unit 2011 is generally a relatively information sensitive system. In this embodiment, it is an object of phase calibration.
  • the energy coupling unit 2022 couples the output signal portion of the closed negative feedback system to the negative feedback unit 2010, and together with the negative feedback unit 2011, constitutes a closed negative feedback loop circuit.
  • the phase calibration device 202 is configured to collect the stability indicator signal of the negative feedback circuit 201, and determine whether the negative feedback circuit 201 is stable according to the stability indicator signal.
  • the phase calibration device 202 determines that the negative feedback circuit 201 is unstable, the input signal is adjusted by adjusting the negative feedback circuit 201.
  • the stable index signal is acquired and the stable phase interval of the negative feedback circuit is stably detected.
  • the optimum phase is determined according to the stable phase interval, and the optimum phase is input as the phase of the input signal of the negative feedback circuit.
  • the stable output of the negative feedback circuit 201 is guaranteed.
  • FIG. 3 is a schematic flowchart diagram of an embodiment of a method for phase calibration according to the present invention.
  • the method of phase calibration of this embodiment includes the following steps:
  • the stability of the negative feedback circuit needs to be identified.
  • the real-time acquisition of the phase-calibrated device can characterize whether the negative feedback circuit is in a stable state.
  • phase calibration device can collect the amplitude of the out-of-band signal. To determine if the negative feedback circuit is stable.
  • some negative feedback circuits are unstable, due to the deviation of the phase information, the transmission signal is lost, and the distortion of the signal occurs. Due to the instability of the negative feedback circuit, the power supply condition of the negative feedback circuit changes.
  • the phase calibration device can also determine whether the negative feedback circuit is stable by acquiring the degree of distortion of the signal or detecting a change in the supply current or voltage of the negative feedback circuit. In other embodiments, other stable phase indicators are also included, which are not limited herein.
  • phase calibration device collects the stability indicator signal, in order to determine whether the current negative feedback circuit is stable, it is further determined whether the negative feedback circuit is in a stable state by detecting the stability indicator signal. For example, whether the signal has an out-of-band extension, whether the amplitude is stable, whether the signal is distorted, the supply current and the voltage are normal, etc., will not be described here.
  • the phase detection device By detecting the stability indicator signal, if the current stability indicator signal is normal, that is, the negative feedback circuit is in a stable state, the phase detection device does not change the current input phase of the negative feedback circuit.
  • the phase calibration device scans the phase of the input signal of the negative feedback circuit from 0 degrees to 360 degrees at a predetermined time, detects the stable index signal while scanning the input signal, and detects the stability index by detecting the stability index.
  • the signal shows that during the scanning of the phase of the input signal from 0 to 360 degrees, the negative feedback circuit also switches between the steady state and the unstable state, further determining the corresponding stable phase interval when the negative feedback circuit is in the steady state.
  • the stable phase interval is a continuous interval. The specific reasons are as follows:
  • the stability of the negative feedback circuit generally depends on the gain margin and phase margin of the circuit. If the gain margin of the negative feedback circuit is fixed, then the stability of the negative feedback circuit is phase-dependent. Margin decision. The above principle is explained from the mathematical point of view below.
  • the absolute value of the difference between the phase value P of the actual input signal of the negative feedback circuit and the optimum phase P0 that satisfies the difference between P and P0 is less than Q, as shown in the following relationship:
  • the phase P of the input signal of the negative feedback circuit is stable in the interval [P0-Q, P0+Q], that is, the stable phase interval is a continuous interval [P0-Q, P0+Q].
  • the negative feedback circuit displays a relatively stable state throughout the stable phase interval, it is found in the detection that an optimal phase corresponding to the minimum error occurs in the stable phase interval.
  • the intermediate phase value of the stable phase interval is defined as the best phase:
  • the phase calibration device detects the stability of the negative feedback circuit in real time. However, sometimes the stable phase intervals do not all appear at 360 degrees.
  • negative feedback will be provided.
  • the phase of the input signal of the circuit is scanned from 0 degrees to 360 degrees at a predetermined time. After detecting the stable phase interval of the negative feedback circuit, the scanning of the phase after the stable phase interval is stopped, without necessarily scanning from 0 degrees to 360 degrees to save time and negative feedback circuit processor resources.
  • the specific work flow chart is shown in Figure 4.
  • the phase calibration device calibrates the input signal of the negative feedback circuit and inputs the optimum phase as the phase of the input signal of the negative feedback circuit.
  • FIG. 5 is a schematic structural diagram of a specific application implementation manner of a phase calibration method.
  • FIG. 5 is a transmitting system having a negative feedback circuit including a negative feedback circuit 501 composed of all components in a broken line frame, a phase calibration device 502, and a transmitting antenna 503.
  • the external controller such as the DSP performs the phase value by the phase shifter unit 5011 of the negative feedback circuit 501 through the PV, and the transmitting system controls the negative feedback circuit 501 with the phase value as the input phase.
  • the phase calibration device 502 collects the feedback signal I and the feedback signal Q output by the negative feedback circuit 501 as a stable index signal for determining whether the current negative feedback circuit 501 is in a stable operating state, such as by detecting the feedback signal I and the feedback signal Q and the input signal I. Whether there is a predetermined phase relationship with the input signal Q or the like is not limited herein.
  • the transmitting system scans the input phase of the phase shifter unit 5011 from 0 degrees to 360 degrees through the PV, and collects feedback while scanning.
  • the feedback signal I and the feedback signal Q output by the circuit 501.
  • the stable phase interval of the negative feedback circuit 501 of the transmitting system is determined by observing the correspondence relationship between the input phase value and the stable index signal, and the optimal phase of the negative feedback circuit 501 is determined according to the stable phase interval.
  • the phase calibration device of the embodiment detects the stability indicator signal to determine whether the negative feedback circuit is stable, and when determining that the negative feedback circuit is unstable, The stable phase interval of the negative feedback circuit is detected, and after determining the optimal phase according to the stable phase interval, the optimum phase is input as the phase of the input signal of the negative feedback circuit.
  • FIG. 6 is a schematic structural diagram of an embodiment of a phase calibration apparatus according to the present invention.
  • the apparatus for phase calibration of the present embodiment includes an acquisition unit 601, a stability detection unit 602, a stable phase determination unit 603, and a phase adjustment unit 604.
  • the collecting unit 601 is configured to collect a stable indicator signal of the negative feedback circuit.
  • the acquisition unit 601 collects in real time a stable index signal capable of characterizing whether the negative feedback circuit is in a stable state.
  • the acquisition unit 601 can also determine whether the negative feedback circuit is stable by acquiring the degree of distortion of the signal or detecting a change in the supply current or voltage of the negative feedback circuit. In other embodiments, other stable phase indicators are also included, which are not limited herein.
  • the stability detecting unit 602 is configured to detect the stable indicator signal and determine whether the negative feedback circuit is stable.
  • the acquisition unit 601 After collecting the stability indicator signal, the acquisition unit 601 further determines whether the negative feedback circuit is in a stable state by detecting the stability indicator signal to determine whether the current negative feedback circuit is stable. For example, whether the signal has an out-of-band extension, whether the amplitude is stable, whether the signal is distorted, the supply current and the voltage are normal, etc., will not be described here.
  • the stable phase determining unit 603 is configured to detect a stable phase interval of the negative feedback circuit when the negative feedback circuit is unstable, and determine an optimal phase according to the stable phase interval.
  • the phase detecting device By detecting the stable index signal by the stable phase determining unit 603, it is determined that if the current stable index signal is normal, that is, the negative feedback circuit is in a stable state, the phase detecting device does not change the current input phase of the negative feedback circuit.
  • the stable phase determining unit 603 scans the phase of the input signal of the negative feedback circuit from 0 degrees to 360 degrees at a predetermined time, and detects the stable index signal while scanning the input signal, and is stable by detection.
  • the index signal shows that during the scanning of the phase of the input signal from 0 degrees to 360 degrees, the negative feedback circuit also switches between the steady state and the unstable state, and the stable phase determining unit 603 further determines that the negative feedback circuit is in a stable state. Stabilize the phase interval. Among them, after multiple detections, the stable phase interval is a continuous interval. The specific reasons are as follows:
  • the stability of the negative feedback circuit generally depends on the gain margin and phase margin of the circuit. If the gain margin of the negative feedback circuit is fixed, then the stability of the negative feedback circuit is phase-dependent. Margin decision. The above principle is explained from the mathematical point of view below.
  • the absolute value of the difference between the phase value P of the actual input signal of the negative feedback circuit and the optimum phase P0 that satisfies the difference between P and P0 is less than Q, as shown in the following relationship:
  • the phase P of the input signal of the negative feedback circuit is stable in the interval [P0-Q, P0+Q], that is, the stable phase interval is a continuous interval [P0-Q, P0+Q].
  • the negative feedback circuit displays a relatively stable state throughout the stable phase interval, it is found in the detection that an optimal phase corresponding to the minimum error occurs in the stable phase interval.
  • the intermediate phase value of the stable phase interval is defined as the best phase:
  • the stability detecting unit 602 detects the stability of the negative feedback circuit in real time. However, sometimes the stable phase intervals do not all appear at 360 degrees. In order to save scan time and to minimize the impact on the normal operation of the device during phase calibration, in another embodiment, negative feedback will be provided.
  • the phase of the input signal of the circuit is scanned from 0 degrees to 360 degrees at a predetermined time. After detecting the stable phase interval of the negative feedback circuit, the scanning of the phase after the stable phase interval is stopped, without necessarily scanning from 0 degrees to 360 degrees to save time and negative feedback circuit processor resources.
  • the phase adjustment unit 604 is configured to input the optimum phase as the phase of the input signal of the negative feedback circuit.
  • the phase adjustment unit 604 calibrates the input signal of the negative feedback circuit, and inputs the optimum phase as the phase of the input signal of the negative feedback circuit.
  • the stability detection unit detects the stability index signal to determine whether the negative feedback circuit is stable and stable phase determination.
  • the stable detecting unit determines that the negative feedback circuit is unstable, the unit detects the stable phase interval of the negative feedback circuit, and determines the optimal phase according to the stable phase interval, and the phase adjusting unit inputs the optimal phase as the phase of the input signal of the negative feedback circuit.
  • FIG. 7 is a schematic structural diagram of an embodiment of a phase calibration apparatus according to the present invention.
  • the device for phase calibration of the present embodiment includes a processor 701 and a memory 702,
  • the processor 701 and the memory 702 are coupled together by a bus 703.
  • the bus 703 may include a power bus, a control bus, a status signal bus, and the like in addition to the data bus. However, for clarity of description, various buses are labeled as bus 703 in the figure.
  • the processor 701 is configured to collect a stable indicator signal in the negative feedback circuit, determine whether the negative feedback circuit is stable by detecting the stable indicator signal, and detect the negative feedback circuit when determining that the negative feedback circuit is unstable. Stabilizing the phase interval, determining an optimum phase according to the stable phase interval; and inputting the optimal phase as a phase of an input signal of the negative feedback circuit.
  • the processor 701 collects in real time a stable indicator signal capable of characterizing whether the negative feedback circuit is in a steady state.
  • the processor 701 can also determine whether the negative feedback circuit is stable by acquiring the degree of distortion of the signal or detecting a change in the supply current or voltage of the negative feedback circuit. In other embodiments, other stable phase indicators are also included, which are not limited herein.
  • the processor 701 After collecting the stable indicator signal, the processor 701 further determines whether the negative feedback circuit is in a stable state by detecting the stability indicator signal to determine whether the current negative feedback circuit is stable. For example, whether the signal has an out-of-band extension, whether the amplitude is stable, whether the signal is distorted, the supply current and the voltage are normal, etc., will not be described here.
  • the processor 701 determines, by detecting the stability indicator signal, that if the current stability indicator signal is normal, that is, the negative feedback circuit is in a stable state, the phase detection device does not change the current input phase of the negative feedback circuit.
  • the processor 701 scans the phase of the input signal of the negative feedback circuit from 0 degrees to 360 degrees at a predetermined time, and detects the stable index signal while scanning the input signal, and detects the stable indicator signal. It can be seen that during the scanning of the phase of the input signal from 0 degrees to 360 degrees, the negative feedback circuit also switches between the steady state and the unstable state, and the stable phase determining unit 603 further determines the corresponding stable phase when the negative feedback circuit is in the steady state. Interval. Among them, after multiple detections, the stable phase interval is a continuous interval. The specific reasons are as follows:
  • the stability of the negative feedback circuit generally depends on the gain margin and phase margin of the circuit. If the gain margin of the negative feedback circuit is fixed, then the stability of the negative feedback circuit is phase-dependent. Margin decision. The above principle is explained from the mathematical point of view below.
  • the absolute value of the difference between the phase value P of the actual input signal of the negative feedback circuit and the optimum phase P0 that satisfies the difference between P and P0 is less than Q, as shown in the following relationship:
  • the phase P of the input signal of the negative feedback circuit is stable in the interval [P0-Q, P0+Q], that is, the stable phase interval is a continuous interval [P0-Q, P0+Q].
  • the negative feedback circuit displays a relatively stable state throughout the stable phase interval, it is found in the detection that an optimal phase corresponding to the minimum error occurs in the stable phase interval.
  • the intermediate phase value of the stable phase interval is defined as the best phase:
  • the processor 701 detects the stability of the negative feedback circuit in real time. However, sometimes the stable phase intervals do not all appear at 360 degrees. In order to save scan time and to minimize the impact on the normal operation of the device during phase calibration, in another embodiment, negative feedback will be provided.
  • the phase of the input signal of the circuit is scanned from 0 degrees to 360 degrees at a predetermined time. After detecting the stable phase interval of the negative feedback circuit, the scanning of the phase after the stable phase interval is stopped, without necessarily scanning from 0 degrees to 360 degrees to save time and negative feedback circuit processor resources.
  • the processor 701 calibrates the input signal of the negative feedback circuit, and inputs the optimum phase as the phase of the input signal of the negative feedback circuit.
  • the memory 702 is configured to store a program running in the processor and data generated during the running of the program. Read-only memory and random access memory may be included and instructions and data may be provided to processor 701. A portion of memory 702 may also include non-volatile random access memory (NVRAM).
  • NVRAM non-volatile random access memory
  • the memory 702 stores the following elements, executable units or data structures, or a subset thereof, or an extended set thereof:
  • Operation instructions include various operation instructions for implementing various operations.
  • Operating system Includes a variety of system programs for implementing various basic services and handling hardware-based tasks.
  • the processor 701 performs the above operations by calling an operation instruction stored in the memory 702, which can be stored in the operating system.
  • the processor 701 can also be called a CPU (Central Processing) Unit, central processing unit).
  • Memory 702 can include read only memory and random access memory and provides instructions and data to processor 901.
  • a portion of memory 702 may also include non-volatile random access memory (NVRAM).
  • NVRAM non-volatile random access memory
  • Processor 701 may be an integrated circuit chip with signal processing capabilities. In the implementation process, each step of the foregoing method may be completed by an integrated logic circuit of hardware in the processor 701 or an instruction in a form of software.
  • the processor 701 described above may be a general purpose processor, a digital signal processor (DSP), an application specific integrated circuit (ASIC), an off-the-shelf programmable gate array (FPGA) or other programmable logic device, a discrete gate or transistor logic device, or discrete hardware. Component.
  • DSP digital signal processor
  • ASIC application specific integrated circuit
  • FPGA off-the-shelf programmable gate array
  • the methods, steps, and logical block diagrams disclosed in the embodiments of the present invention may be implemented or carried out.
  • the general purpose processor may be a microprocessor or the processor or any conventional processor or the like.
  • the steps of the method disclosed in the embodiments of the present invention may be directly implemented by the hardware decoding processor, or may be performed by a combination of hardware and software units in the decoding processor.
  • the software unit can be located in a conventional storage medium such as random access memory, flash memory, read only memory, programmable read only memory or electrically erasable programmable memory, registers, and the like.
  • the storage medium is located in the memory 702, and the processor 701 reads the information in the memory 702 and completes the steps of the above method in combination with its hardware.
  • the processor of the phase calibration device of the embodiment collects the stable index signal of the negative feedback circuit, it detects the stability indicator signal to determine whether the negative feedback circuit is stable, and determines that the negative feedback circuit is not When stable, the stable phase interval of the negative feedback circuit is detected, and the optimal phase is determined according to the stable phase interval, and the optimum phase is input as the phase of the input signal of the negative feedback circuit.
  • the phase information can be calibrated without changing the design idea of the original negative feedback system, the stability of the device can be ensured, and the scope of application is not limited, and can be easily used in different devices and devices. Better versatility.
  • the invention has the advantages of simple structure, strong achievability and strong practicability.

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)

Abstract

本发明公开了一种相位校准的方法、装置及设备，所述相位校准的方法包括：采集负反馈电路的稳定指标信号；对所述稳定指标信号进行检测，并判断所述负反馈电路是否稳定；当所述负反馈电路不稳定时，检测所述负反馈电路的稳定相位区间，并根据所述稳定相位区间确定最佳相位；以及将所述最佳相位作为所述负反馈电路的输入信号的相位进行输入。通过上述方式，本发明能够在不改变原有负反馈系统设计思路的前提下，实现对相位信息的校准，保证设备的稳定性，且在不同的系统间具有通用性，易用性强。

Description

相位校准的方法、装置及设备
【技术领域】
本发明涉及控制领域，特别是涉及一种相位校准的方法、装置及设备。
【背景技术】
伴随着通信技术和测控技术的不断发展，各种测控设备、通信设备对设备的精度要求也越来越高，但是由于信号在采集或传输过程中，一般都会或多或少的存在信号损耗，即出现相位偏移，为了保证信号传输的稳定性，越来越多的设备会进行相位信息的精准控制，例如，通过负反馈系统设备或增加负反馈电路来对实现对相位的校准。
如图1所示，图1为现有技术中的负反馈系统的结构示意图。反馈系统中包括输入信号A、输出信号B以及反馈信号C，为了保证负反馈系统的有效性和工作稳定性，那么反馈信号C的相位值必须与输入信号A的相位值保持180的差值。但是由于信号损耗的存在，一般情况下反馈信号C的相位值与输入信号A的相位值的差值一般都不会保持在180度，进一步影响系统的稳定性。
为了解决上述问题，现有技术一般是采用从反馈电路内部或者反馈系统内部来进行相位信息的检测、甄别，并进一步根据从反馈电路内部或者反馈系统内部检测出的相位偏差进行补偿，修正。通过上述方法，虽然能够一定程度的实现对反馈电路或反馈系统的相位补偿，保证系统的稳定性。但是由于现在出现的不同的通信系统以及检测系统都会存在不同的电路方案，针对每一个不同的电路或系统都需要单独设置与之对应的相位校准方案，不仅使原有的电路更加复杂化，增加人力和资源成本，而且通用性差，易用性也不足。
【发明内容】
本发明主要解决的技术问题是提供一种相位校准的方法、装置及设备，能够在不改变原有负反馈系统设计思路的前提下，实现对相位信息的校准，保证设备的稳定性，且在不同的系统间具有通用性，易用性强。
为解决上述技术问题，本发明第一方面提供一种相位校准的方法，包括：
采集负反馈电路的稳定指标信号；
对所述稳定指标信号进行检测，并判断所述负反馈电路是否稳定；
当所述负反馈电路不稳定时，检测所述负反馈电路的稳定相位区间，并根据所述稳定相位区间确定最佳相位；以及
将所述最佳相位作为所述负反馈电路的输入信号的相位进行输入。
结合第一方面，在第一方面的第一种可能实施方式中，所述检测所述负反馈电路的稳定相位区间，并根据所述稳定相位区间确定最佳相位的步骤具体为：
将所述负反馈电路的输入信号的相位在预定时间进行扫描，通过检测所述稳定指标信号确定所述负反馈电路的稳定相位区间；
根据所述稳定相位区间确定最佳相位。
结合第一方面的第一种可能实施方式，在第一方面的第二种可能实施方式中，所述根据所述稳定相位区间确定最佳相位的步骤具体包括：
将所述稳定相位区间的中间相位值确定为最佳相位。
结合第一方面的第一种可能实施方式，在第一方面的第三种可能实施方式中，所述将所述负反馈电路的输入信号的相位在预定时间进行扫描，通过检测所述稳定指标信号确定所述负反馈电路的稳定相位区间的步骤具体包括：
将所述负反馈电路的输入信号的相位在预定时间从0度至360度进行扫描，通过检测所述稳定指标信号确定所述负反馈电路的稳定相位区间。
结合第一方面的第一种可能实施方式，在第一方面的第四种可能实施方式中，所述将所述负反馈电路的输入信号的相位在预定时间进行扫描，通过检测所述稳定指标信号确定所述负反馈电路的稳定相位区间的步骤具体包括：
将所述负反馈电路的输入信号的相位在预定时间从0度向360度进行扫描，至检测到所述稳定相位区间后，停止对所述稳定相位区间后续的相位进行扫描。
结合第一方面或第一方面的第一、第二、第三种或第四种可能实施方式，在第一方面的第五种可能实施方式中，所述稳定相位区间为连续的相位区间。
结合第一方面，在第一方面的第六种实施方式中，所述稳定指标信号包括带外信号的幅度、信号畸变的程度、供电电流的变化以及电压变化中的至少一个。
为解决上述技术问题，本发明第二方面提供一种相位校准的装置，包括：采集单元、稳定检测单元、稳定相位确定单元以及相位调整单元，
所述采集单元用于采集负反馈电路的稳定指标信号；
所述稳定检测单元用于对所述稳定指标信号进行检测，并判断所述负反馈电路是否稳定；
所述稳定相位确定单元用于在所述负反馈电路不稳定时，检测所述负反馈电路的稳定相位区间，并根据所述稳定相位区间确定最佳相位；
所述相位调整单元用于将所述最佳相位作为所述负反馈电路的输入信号的相位进行输入。
为解决上述技术问题，本发明第三方面提供一种相位校准的设备，包括处理器与存储器，
所述处理器用于，采集负反馈电路中稳定指标信号，通过对所述稳定指标信号进行检测确定所述负反馈电路是否稳定；在确定所述负反馈电路不稳定时，检测所述负反馈电路的稳定相位区间，根据所述稳定相位区间确定最佳相位；并将所述最佳相位作为所述负反馈电路的输入信号的相位进行输入；
所述存储器用于，存储所述处理器中运行的程序、以及所述程序运行过程中产生的数据。
结合第三方面，在第三方面的第一种可能实施方式中，所述处理器具体用于将所述负反馈电路的输入信号的相位在预定时间进行扫描，通过检测所述稳定指标信号确定所述负反馈电路的稳定相位区间；
根据所述稳定相位区间确定最佳相位。
结合第三方面的第一种可能实施方式，在第三方面的第二种可能实施方式中，所述处理器具体用于将所述稳定相位区间的中间相位值确定为最佳相位。
结合第三方面的第一种可能实施方式，在第三方面的第三种可能实施方式中，所述处理器具体用于将所述负反馈电路的输入信号的相位在预定时间从0度至360度进行扫描，通过检测所述稳定指标信号确定所述负反馈电路的稳定相位区间。
结合第三方面的第一种可能实施方式，在第三方面的第四种可能实施方式中，所述处理器具体用于将所述负反馈电路的输入信号的相位在预定时间从0度向360度进行扫描，至检测到所述稳定相位区间后，停止对所述稳定相位区间后续的相位进行扫描。
结合第三方面或第一方面的第一、第二或、第三或第四种可能实施方式，在第三方面的第五种可能实施方式中，所述稳定相位区间为连续的相位区间。
结合第三方面，在第三方面的第六种可能实施方式中，所述稳定指标信号包括带外信号的幅度、信号畸变的程度、供电电流的变化以及电压变化中的至少一个。
本发明的有益效果是：区别于现有技术的情况，本发明在采集到负反馈电路的稳定指标信号后，对稳定指标信号进行检测，判断负反馈电路是否稳定，并在确定负反馈电路不稳定时，检测负反馈电路的稳定相位区间，根据稳定相位区间确定最佳相位后，将最佳相位作为负反馈电路的输入信号的相位进行输入。通过上述方式，能够在不改变原有负反馈系统设计思路的前提下，实现对相位信息的校准，保证设备的稳定性，且适用范围不限定，能够在不同的设备与装置见易用，具有较好的通用性。并且本发明方法本身简便，可实现性强，具有较强的实用性。
【附图说明】
图1是本发明现有技术相位校准系统的结构示意图；
图2是本发明相位校准的系统一实施方式的结构示意图；
图3是本发明相位校准的方法一实施方式的流程示意图；
图4是本发明相位校准的方法另一实施方式的流程示意图；
图5是图3相位校准方法一具体应用实施方式的结构示意图；
图6是本发明相位校准的装置一实施方式的结构示意图；
图7是本发明相位校准的设备一实施方式的结构示意图。
【具体实施方式】
参阅图2，图2是本发明相位校准系统一实施方式的结构示意图。本实施方式的相位校准系统包括负反馈电路201以及相位校准设备202。其中，本实施方式的相位校准系统适用于闭合的负反馈系统。且适用于任何包含负反馈系统的装置以及设备。
负反馈电路201包括负反馈单元2011以及能量耦合单元2022。其中，负反馈单元2011一般为相对信息敏感的系统，在本实施方式中，为相位校准的作用对象。能量耦合单元2022将闭合的负反馈系统的输出信号部分耦合到负反馈单元2010中，与负反馈单元2011共同组成闭合的负反馈环路电路。
相位校准设备202用于采集负反馈电路201的稳定指标信号，根据稳定指标信号判断负反馈电路201是否稳定，当相位校准设备202确定负反馈电路201不稳定时，通过调整负反馈电路201输入信号的相位的同时采集稳定指标信号并根据上述稳定检测负反馈电路的稳定相位区间，在根据稳定相位区间确定最佳相位，将最佳相位作为负反馈电路的输入信号的相位进行输入。保证负反馈电路201的稳定输出。
具体地，请参阅图3，图3是本发明相位校准的方法一实施方式的流程示意图。本实施方式的相位校准的方法包括如下步骤：
301：采集负反馈电路的稳定指标信号。
为了保证闭合的负反馈系统的环路处于正常的工作状态，需要对负反馈电路的稳定性进行鉴别。具体地，相位校准的设备实时的采集能够表征负反馈电路是否处于稳定状态的稳定指标信号。
一般的能够体现闭合的负反馈电路是否处于稳定状态的指标有很多，例如当负反馈电路处于不稳定状态时，会出现信号的带外扩展，因此相位校准的设备可通过采集带外信号的幅度来确定负反馈电路是否稳定。另外，在一些负反馈电路出现不稳定状态时，由于相位信息出现偏差，传输信号发生损耗，会出现信号的畸变，受负反馈电路不稳定的影响，负反馈电路的供电状况发生变化，因此，相位校准的设备还可以通过采集信号的畸变程度或检测负反馈电路的供电电流或电压的变化来判断负反馈电路是否稳定。在其他实施方式中，还包括其他稳定相位指标，在此不做限定。
302：对所述稳定指标信号进行检测并判断所述负反馈电路是否稳定。
相位校准的设备在采集到稳定指标信号后，为了确定当前负反馈电路是否稳定，进一步地通过对稳定指标信号进行检测，来判断负反馈电路是否处于稳定状态。如判断信号是否出现了带外扩展，幅度是否稳定、信号是否出现畸变、供电电流以及电压是否正常等，在此不再赘述。
303：当所述负反馈电路不稳定时，检测所述负反馈电路的稳定相位区间，并根据所述稳定相位区间确定最佳相位。
通过对稳定指标信号的检测，如果当前稳定指标信号显示正常，即负反馈电路处于稳定状态，相位检测的设备不改变负反馈电路的当前输入相位。
如果当前负反馈电路处于不稳定状态，相位校准的设备将负反馈电路的输入信号的相位在预定时间从0度至360度进行扫描，在扫描输入信号的同时检测稳定指标信号，通过检测稳定指标信号可知，在输入信号的相位从0度至360度扫描过程中，负反馈电路也在稳定状态和不稳定状态之间切换，进一步确定负反馈电路处于稳定状态时对应的稳定相位区间。其中，经过多次检测发现，上述稳定相位区间为连续的区间。具体原因如下：
由于，对于一个负反馈电路而言，负反馈电路的稳定与否一般取决于电路的增益裕度和相位裕度，如果负反馈电路的增益裕度固定，那么负反馈电路的稳定与否由相位裕度决定。下面从数学的角度对上述原理进行解释。
假设负反馈电路的增益裕度为Q，则负反馈电路的实际输入信号的相位值P与最佳相位P0之间满足P与P0的差的绝对值小于Q，如下关系式所示：
|P-P0|<Q；
即(P0 - Q) < P < (P0 + Q )。
由上可知，负反馈电路的输入信号的相位P在区间[P0-Q,P0+Q]内是稳定的，即稳定相位区间为连续的区间[P0-Q,P0+Q]。
虽然，负反馈电路在整个稳定相位区间内都会显示较为稳定的状态，但是在检测中发现，在稳定相位区间内会出现一个与最小误差对应的最佳相位，具体地，本实施方式中，采用平均的方式，定义所述稳定相位区间的中间相位值为最佳相位：
[(P0-Q)+(P0+Q)]/2=P0。
在本实施方式中，相位校准的设备是实时的对负反馈电路的稳定性进行检测。但是，有时候稳定相位区间并非都出现在360度的位置处，为了节省扫描时间，也为了便于最大限度地降低相位校准过程中对设备正常工作的影响，在另一个实施方式中，将负反馈电路的输入信号的相位在预定时间从0度向360度进行扫描，在检测到负反馈电路的稳定相位区间后，停止对稳定相位区间后的相位的扫描，而无需一定要从0度扫描至360度，以节省时间和负反馈电路的处理器资源。具体工作流程图，如图4所示。
304：将所述最佳相位作为所述负反馈电路的输入信号的相位进行输入。
相位校准的设备在得到负反馈电路的最佳相位后，对负反馈电路的输入信号进行校准，将上述最佳相位作为负反馈电路的输入信号的相位进行输入。
举例来说，参阅图5，图5是相位校准方法一具体应用实施方式的结构示意图。
如图5所示，图5是一具有负反馈电路的发射系统，包括由虚线框内所有元器件组成的负反馈电路501、相位校准设备502以及发射天线503。
当发射系统处于闭环工作状态时，外界控制器如DSP通过PV对负反馈电路501的移相器单元5011进行赋相位值后，发射系统会以该相位值为输入相位控制负反馈电路501工作，相位校准设备502采集负反馈电路501输出的反馈信号I和反馈信号Q作为确定当前负反馈电路501是否处于稳定工作状态的稳定指标信号，如通过检测判断反馈信号I和反馈信号Q与输入信号I和输入信号Q是否存在预定的相位关系等，在此不做限制。如果相位校准设备502经过检测，确定当前负反馈电路501处于非稳定的工作状态，发射系统通过PV对移相器单元5011的输入相位从0度到360度进行扫描，并在扫描的同时采集反馈电路501输出的反馈信号I和反馈信号Q。通过观察观察输入相位值的与稳定指标信号的对应关系，确定发射系统的负反馈电路501的稳定相位区间，并根据稳定相位区间确定负反馈电路501的最佳相位。例如，在[0,360]度范围内，发现移相器单元5011的输入相位在 [120,200]度的区间内，负反馈电路501处于稳定工作状态，那么就确定区间[120,200]度为发射系统的稳定相位区间，由（120+200）/2=160度可知，最佳相位为160度。然后，以160度为负反馈电路501的最佳相位进行输入，在输入信号I和输入信号Q经过调制放大后由发射器503发射出去。
区别于现有技术，本实施方式的相位校准设备在采集到负反馈电路的稳定指标信号后，对稳定指标信号进行检测，以判断负反馈电路是否稳定，并在确定负反馈电路不稳定时，检测负反馈电路的稳定相位区间，根据稳定相位区间确定最佳相位后，将最佳相位作为负反馈电路的输入信号的相位进行输入。通过上述方式，能够在不改变原有负反馈系统设计思路的前提下，实现对相位信息的校准，保证设备的稳定性，且适用范围不限定，能够在不同的设备与装置见易用，具有较好的通用性。并且本发明方法本身简便，可实现性强，具有较强的实用性。
参阅图6，图6是本发明相位校准的装置一实施方式的结构示意图。如图6所示，本实施方式的相位校准的装置包括：采集单元601、稳定检测单元602、稳定相位确定单元603以及相位调整单元604。
其中，采集单元601用于采集负反馈电路的稳定指标信号。
为了保证闭合的负反馈系统的环路处于正常的工作状态，需要对负反馈电路的稳定性进行鉴别。具体地，采集单元601实时地采集能够表征负反馈电路是否处于稳定状态的稳定指标信号。
一般的能够体现闭合的负反馈电路是否处于稳定状态的指标有很多，例如当负反馈电路处于不稳定状态时，会出现信号的带外扩展，因此相位校准的设备可通过采集带外信号的幅度来确定负反馈电路是否稳定。另外，在一些负反馈电路出现不稳定状态时，由于相位信息出现偏差，传输信号发生损耗，会出现信号的畸变，受负反馈电路不稳定的影响，负反馈电路的供电状况发生变化，因此，采集单元601还可以通过采集信号的畸变程度或检测负反馈电路的供电电流或电压的变化来判断负反馈电路是否稳定。在其他实施方式中，还包括其他稳定相位指标，在此不做限定。
稳定检测单元602用于对所述稳定指标信号进行检测，并判断所述负反馈电路是否稳定。
采集单元601在采集到稳定指标信号后，为了确定当前负反馈电路是否稳定，进一步地通过对稳定指标信号进行检测，来判断负反馈电路是否处于稳定状态。如判断信号是否出现了带外扩展，幅度是否稳定、信号是否出现畸变、供电电流以及电压是否正常等，在此不再赘述。
稳定相位确定单元603用于在所述负反馈电路不稳定时，检测所述负反馈电路的稳定相位区间，并根据所述稳定相位区间确定最佳相位。
通过稳定相位确定单元603对稳定指标信号的检测，确定，如果当前稳定指标信号显示正常，即负反馈电路处于稳定状态，相位检测的装置不改变负反馈电路的当前输入相位。
如果当前负反馈电路处于不稳定状态，稳定相位确定单元603将负反馈电路的输入信号的相位在预定时间从0度至360度进行扫描，在扫描输入信号的同时检测稳定指标信号，通过检测稳定指标信号可知，在输入信号的相位从0度至360度扫描过程中，负反馈电路也在稳定状态和不稳定状态之间切换，稳定相位确定单元603进一步确定负反馈电路处于稳定状态时对应的稳定相位区间。其中，经过多次检测发现，上述稳定相位区间为连续的区间。具体原因如下：
由于，对于一个负反馈电路而言，负反馈电路的稳定与否一般取决于电路的增益裕度和相位裕度，如果负反馈电路的增益裕度固定，那么负反馈电路的稳定与否由相位裕度决定。下面从数学的角度对上述原理进行解释。
假设负反馈电路的增益裕度为Q，则负反馈电路的实际输入信号的相位值P与最佳相位P0之间满足P与P0的差的绝对值小于Q，如下关系式所示：
|P-P0|<Q；
即(P0 - Q) < P < (P0 + Q )。
由上可知，负反馈电路的输入信号的相位P在区间[P0-Q,P0+Q]内是稳定的，即稳定相位区间为连续的区间[P0-Q,P0+Q]。
虽然，负反馈电路在整个稳定相位区间内都会显示较为稳定的状态，但是在检测中发现，在稳定相位区间内会出现一个与最小误差对应的最佳相位，具体地，本实施方式中，采用平均的方式，定义所述稳定相位区间的中间相位值为最佳相位：
[(P0-Q)+(P0+Q)]/2=P0。
在本实施方式中，稳定检测单元602是实时的对负反馈电路的稳定性进行检测。但是，有时候稳定相位区间并非都出现在360度的位置处，为了节省扫描时间，也为了便于最大限度地降低相位校准过程中对设备正常工作的影响，在另一个实施方式中，将负反馈电路的输入信号的相位在预定时间从0度向360度进行扫描，在检测到负反馈电路的稳定相位区间后，停止对稳定相位区间后的相位的扫描，而无需一定要从0度扫描至360度，以节省时间和负反馈电路的处理器资源。
相位调整单元604用于将所述最佳相位作为所述负反馈电路的输入信号的相位进行输入。
相位调整单元604在得到负反馈电路的最佳相位后，对负反馈电路的输入信号进行校准，将上述最佳相位作为负反馈电路的输入信号的相位进行输入。
区别于现有技术，本实施方式的相位校准的装置的采集单元在采集到负反馈电路的稳定指标信号后，稳定检测单元对稳定指标信号进行检测，以判断负反馈电路是否稳定，稳定相位确定单元在稳定检测单元确定负反馈电路不稳定时，检测负反馈电路的稳定相位区间，并根据稳定相位区间确定最佳相位，相位调整单元将最佳相位作为负反馈电路的输入信号的相位进行输入。通过上述方式，能够在不改变原有负反馈系统设计思路的前提下，实现对相位信息的校准，保证设备的稳定性，且适用范围不限定，能够在不同的设备与装置见易用，具有较好的通用性。并且本发明本身结构简单，可实现性强，具有较强的实用性。
参阅图7，图7是本发明相位校准的设备一实施方式的结构示意图。本实施方式的相位校准的设备包括处理器701与存储器702，
处理器701以及存储器702通过总线703耦合在一起，其中总线703除包括数据总线之外，还可以包括电源总线、控制总线和状态信号总线等。但是为了清楚说明起见，在图中将各种总线都标为总线703。
处理器701用于采集负反馈电路中稳定指标信号，通过对所述稳定指标信号进行检测确定所述负反馈电路是否稳定；在确定所述负反馈电路不稳定时，检测所述负反馈电路的稳定相位区间，根据所述稳定相位区间确定最佳相位；并将所述最佳相位作为所述负反馈电路的输入信号的相位进行输入。
具体地，为了保证闭合的负反馈系统的环路处于正常的工作状态，需要对负反馈电路的稳定性进行鉴别。处理器701实时地采集能够表征负反馈电路是否处于稳定状态的稳定指标信号。
一般能够体现闭合的负反馈电路是否处于稳定状态的指标有很多，例如当负反馈电路处于不稳定状态时，会出现信号的带外扩展，因此相位校准的设备可通过采集带外信号的幅度来确定负反馈电路是否稳定。另外，在一些负反馈电路出现不稳定状态时，由于相位信息出现偏差，传输信号发生损耗，会出现信号的畸变，受负反馈电路不稳定的影响，负反馈电路的供电状况发生变化，因此，处理器701还可以通过采集信号的畸变程度或检测负反馈电路的供电电流或电压的变化来判断负反馈电路是否稳定。在其他实施方式中，还包括其他稳定相位指标，在此不做限定。
处理器701在采集到稳定指标信号后，为了确定当前负反馈电路是否稳定，进一步地通过对稳定指标信号进行检测，来判断负反馈电路是否处于稳定状态。如判断信号是否出现了带外扩展，幅度是否稳定、信号是否出现畸变、供电电流以及电压是否正常等，在此不再赘述。
处理器701通过对稳定指标信号的检测，确定，如果当前稳定指标信号显示正常，即负反馈电路处于稳定状态，相位检测的装置不改变负反馈电路的当前输入相位。
如果当前负反馈电路处于不稳定状态，处理器701将负反馈电路的输入信号的相位在预定时间从0度至360度进行扫描，在扫描输入信号的同时检测稳定指标信号，通过检测稳定指标信号可知，在输入信号的相位从0度至360度扫描过程中，负反馈电路也在稳定状态和不稳定状态之间切换，稳定相位确定单元603进一步确定负反馈电路处于稳定状态时对应的稳定相位区间。其中，经过多次检测发现，上述稳定相位区间为连续的区间。具体原因如下：
由于，对于一个负反馈电路而言，负反馈电路的稳定与否一般取决于电路的增益裕度和相位裕度，如果负反馈电路的增益裕度固定，那么负反馈电路的稳定与否由相位裕度决定。下面从数学的角度对上述原理进行解释。
假设负反馈电路的增益裕度为Q，则负反馈电路的实际输入信号的相位值P与最佳相位P0之间满足P与P0的差的绝对值小于Q，如下关系式所示：
|P-P0|<Q；
即(P0 - Q) < P < (P0 + Q )。
由上可知，负反馈电路的输入信号的相位P在区间[P0-Q,P0+Q]内是稳定的，即稳定相位区间为连续的区间[P0-Q,P0+Q]。
虽然，负反馈电路在整个稳定相位区间内都会显示较为稳定的状态，但是在检测中发现，在稳定相位区间内会出现一个与最小误差对应的最佳相位，具体地，本实施方式中，采用平均的方式，定义所述稳定相位区间的中间相位值为最佳相位：
[(P0-Q)+(P0+Q)]/2=P0。
在本实施方式中，处理器701是实时的对负反馈电路的稳定性进行检测。但是，有时候稳定相位区间并非都出现在360度的位置处，为了节省扫描时间，也为了便于最大限度地降低相位校准过程中对设备正常工作的影响，在另一个实施方式中，将负反馈电路的输入信号的相位在预定时间从0度向360度进行扫描，在检测到负反馈电路的稳定相位区间后，停止对稳定相位区间后的相位的扫描，而无需一定要从0度扫描至360度，以节省时间和负反馈电路的处理器资源。
处理器701在得到负反馈电路的最佳相位后，对负反馈电路的输入信号进行校准，将上述最佳相位作为负反馈电路的输入信号的相位进行输入。
存储器702用于存储所述处理器中运行的程序、以及所述程序运行过程中产生的数据。可以包括只读存储器和随机存取存储器，并向处理器701提供指令和数据。存储器702的一部分还可以包括非易失性随机存取存储器（NVRAM）。
存储器702存储了如下的元素，可执行单元或者数据结构，或者它们的子集，或者它们的扩展集:
操作指令：包括各种操作指令，用于实现各种操作。
操作系统：包括各种系统程序，用于实现各种基础业务以及处理基于硬件的任务。
在本发明实施例中，处理器701通过调用存储器702存储的操作指令（该操作指令可存储在操作系统中），来执行上述操作。
处理器701还可以称为CPU（Central Processing Unit，中央处理单元）。存储器702可以包括只读存储器和随机存取存储器，并向处理器901提供指令和数据。存储器702的一部分还可以包括非易失性随机存取存储器（NVRAM）。
上述本发明实施例揭示的方法可以应用于处理器701中，或者由处理器701实现。处理器701可能是一种集成电路芯片，具有信号的处理能力。在实现过程中，上述方法的各步骤可以通过处理器701中的硬件的集成逻辑电路或者软件形式的指令完成。上述的处理器701可以是通用处理器、数字信号处理器（DSP）、专用集成电路（ASIC）、现成可编程门阵列（FPGA）或者其他可编程逻辑器件、分立门或者晶体管逻辑器件、分立硬件组件。可以实现或者执行本发明实施例中的公开的各方法、步骤及逻辑框图。通用处理器可以是微处理器或者该处理器也可以是任何常规的处理器等。结合本发明实施例所公开的方法的步骤可以直接体现为硬件译码处理器执行完成，或者用译码处理器中的硬件及软件单元组合执行完成。软件单元可以位于随机存储器，闪存、只读存储器，可编程只读存储器或者电可擦写可编程存储器、寄存器等本领域成熟的存储介质中。该存储介质位于存储器702，处理器701读取存储器702中的信息，结合其硬件完成上述方法的步骤。
区别于现有技术，本实施方式的相位校准的设备的处理器在采集到负反馈电路的稳定指标信号后，对稳定指标信号进行检测，以判断负反馈电路是否稳定，在确定负反馈电路不稳定时，检测负反馈电路的稳定相位区间，并根据稳定相位区间确定最佳相位，并将最佳相位作为负反馈电路的输入信号的相位进行输入。通过上述方式，能够在不改变原有负反馈系统设计思路的前提下，实现对相位信息的校准，保证设备的稳定性，且适用范围不限定，能够在不同的设备与装置见易用，具有较好的通用性。并且本发明本身结构简单，可实现性强，具有较强的实用性。
以上所述仅为本发明的实施方式，并非因此限制本发明的专利范围，凡是利用本发明说明书及附图内容所作的等效结构或等效流程变换，或直接或间接运用在其他相关的技术领域，均同理包括在本发明的专利保护范围内。

Claims (15)

  1. 一种相位校准的方法，其特征在于，包括：
    采集负反馈电路的稳定指标信号；
    对所述稳定指标信号进行检测，并判断所述负反馈电路是否稳定；
    当所述负反馈电路不稳定时，检测所述负反馈电路的稳定相位区间，并根据所述稳定相位区间确定最佳相位；以及
    将所述最佳相位作为所述负反馈电路的输入信号的相位进行输入。
  2. 根据权利要求1所述的方法，其特征在于，所述检测所述负反馈电路的稳定相位区间，并根据所述稳定相位区间确定最佳相位的步骤包括：
    将所述负反馈电路的输入信号的相位在预定时间进行扫描，通过检测所述稳定指标信号确定所述负反馈电路的稳定相位区间；
    根据所述稳定相位区间确定最佳相位。
  3. 根据权利要求2所述的方法，其特征在于，所述根据所述稳定相位区间确定最佳相位的步骤包括：
    将所述稳定相位区间的中间相位值确定为最佳相位。
  4. 根据权利要求2所述的方法，其特征在于，所述将所述负反馈电路的输入信号的相位在预定时间进行扫描，通过检测所述稳定指标信号确定所述负反馈电路的稳定相位区间的步骤包括：
    将所述负反馈电路的输入信号的相位在预定时间从0度至360度进行扫描，通过检测所述稳定指标信号确定所述负反馈电路的稳定相位区间。
  5. 根据权利要求2所述的方法，其特征在于，所述将所述负反馈电路的输入信号的相位在预定时间进行扫描，通过检测所述稳定指标信号确定所述负反馈电路的稳定相位区间的步骤包括：
    将所述负反馈电路的输入信号的相位在预定时间从0度向360度进行扫描，至检测到所述稳定相位区间后，停止对所述稳定相位区间后续的相位进行扫描。
  6. 根据权利要求1~5任一项所述的方法，其特征在于，所述稳定相位区间为连续的相位区间。
  7. 根据权利要求1所述的方法，其特征在于，所述稳定指标信号包括带外信号的幅度、信号畸变的程度、供电电流的变化以及电压变化中的至少一个。
  8. 一种相位校准的装置，其特征在于，包括：采集单元、稳定检测单元、稳定相位确定单元以及相位调整单元，
    所述采集单元用于采集负反馈电路的稳定指标信号；
    所述稳定检测单元用于对所述稳定指标信号进行检测，并判断所述负反馈电路是否稳定；
    所述稳定相位确定单元用于在所述负反馈电路不稳定时，检测所述负反馈电路的稳定相位区间，并根据所述稳定相位区间确定最佳相位；
    所述相位调整单元用于将所述最佳相位作为所述负反馈电路的输入信号的相位进行输入。
  9. 一种相位校准的设备，其特征在于，包括处理器与存储器，
    所述处理器用于，采集负反馈电路中稳定指标信号，通过对所述稳定指标信号进行检测确定所述负反馈电路是否稳定；在确定所述负反馈电路不稳定时，检测所述负反馈电路的稳定相位区间，根据所述稳定相位区间确定最佳相位；并将所述最佳相位作为所述负反馈电路的输入信号的相位进行输入；
    所述存储器用于，存储所述处理器中运行的程序、以及所述程序运行过程中产生的数据。
  10. 根据权利要求9所述的设备，其特征在于，所述处理器具体用于将所述负反馈电路的输入信号的相位在预定时间进行扫描，通过检测所述稳定指标信号确定所述负反馈电路的稳定相位区间；
    根据所述稳定相位区间确定最佳相位。
  11. 根据权利要求10所述的设备，其特征在于，所述处理器具体用于
    将所述稳定相位区间的中间相位值确定为最佳相位。
  12. 根据权利要求10所述的设备，其特征在于，所述处理器具体用于将所述负反馈电路的输入信号的相位在预定时间从0度至360度进行扫描，通过检测所述稳定指标信号确定所述负反馈电路的稳定相位区间。
  13. 根据权利要求10所述的设备，其特征在于，所述处理器具体用于将所述负反馈电路的输入信号的相位在预定时间从0度向360度进行扫描，至检测到所述稳定相位区间后，停止对所述稳定相位区间后续的相位进行扫描。
  14. 根据权利要求9~13所述的设备，其特征在于，所述稳定相位区间为连续的相位区间。
  15. 根据权利要求9所述的设备，其特征在于，所述稳定指标信号包括带外信号的幅度、信号畸变的程度、供电电流的变化以及电压变化中的至少一个。
PCT/CN2015/092275 2015-10-20 2015-10-20 相位校准的方法、装置及设备 WO2017066919A1 (zh)

Priority Applications (1)

Application Number Priority Date Filing Date Title
PCT/CN2015/092275 WO2017066919A1 (zh) 2015-10-20 2015-10-20 相位校准的方法、装置及设备

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/CN2015/092275 WO2017066919A1 (zh) 2015-10-20 2015-10-20 相位校准的方法、装置及设备

Publications (1)

Publication Number Publication Date
WO2017066919A1 true WO2017066919A1 (zh) 2017-04-27

Family

ID=58556624

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2015/092275 WO2017066919A1 (zh) 2015-10-20 2015-10-20 相位校准的方法、装置及设备

Country Status (1)

Country Link
WO (1) WO2017066919A1 (zh)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7501900B2 (en) * 2006-05-31 2009-03-10 Intel Corporation Phase-locked loop bandwidth calibration
CN101547008A (zh) * 2009-04-30 2009-09-30 复旦大学 一种覆盖超宽带4～5GHz和6～9GHz频点的频率综合器
CN104300994A (zh) * 2014-10-24 2015-01-21 中国科学院嘉兴微电子与系统工程中心 低中频接收机的i/q失配补偿电路

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7501900B2 (en) * 2006-05-31 2009-03-10 Intel Corporation Phase-locked loop bandwidth calibration
CN101547008A (zh) * 2009-04-30 2009-09-30 复旦大学 一种覆盖超宽带4～5GHz和6～9GHz频点的频率综合器
CN104300994A (zh) * 2014-10-24 2015-01-21 中国科学院嘉兴微电子与系统工程中心 低中频接收机的i/q失配补偿电路

Similar Documents

Publication Publication Date Title
WO2020004840A1 (ko) 액츄에이터 제어장치 및 방법
WO2016169390A1 (zh) 应用安全防护方法、终端、存储介质
WO2015060556A1 (ko) 전력 증폭 장치 및 방법
WO2021085780A1 (ko) 증폭기의 입력 신호를 처리하는 전자 장치 및 그 동작 방법
WO2013077623A1 (ko) 구조물 변위 측정 시스템 및 방법
WO2020135049A1 (zh) 显示面板的过流保护方法及显示装置
WO2017067259A1 (zh) 一种指纹传感器的校准参数的获取方法、装置及移动终端
WO2020004841A1 (ko) 액츄에이터 제어장치 및 방법
WO2020166939A1 (ko) 열화상 카메라를 이용한 온도 측정 장치, 방법 및 컴퓨터로 독출 가능한 기록 매체
WO2020045915A1 (ko) 션트 저항의 전류값 보정 시스템 및 방법
WO2018214147A1 (zh) 一种机器人标定方法、系统、机器人及存储介质
WO2018076890A1 (zh) 数据备份的方法、装置、存储介质、服务器及系统
WO2018145597A1 (zh) 基于移动终端的屏幕补光拍照方法及系统、移动终端
WO2020062615A1 (zh) 显示面板的伽马值调节方法、装置及显示设备
WO2020080910A1 (ko) 통신 열화를 방지하기 위한 전자 장치 및 그 제어 방법
WO2015156553A1 (ko) 지문 검출 장치 및 이의 구동 신호 감쇄 보상 방법
WO2017066919A1 (zh) 相位校准的方法、装置及设备
WO2018152901A1 (zh) 一种电源电路及液晶显示器
WO2017215214A1 (zh) 调整相机焦距的方法、系统、及移动终端
WO2018124467A1 (ko) 모터 제어 장치 및 모터 제어 장치의 제어 방법
WO2020242163A1 (ko) 계통 전압 위상 검출 장치
WO2022131506A1 (ko) 두뇌 임피던스 측정 기기 및 그 동작 방법
WO2020125408A1 (zh) 数据的传输方法及装置
WO2016117833A1 (ko) 소음제어방법
WO2020105838A1 (ko) 인버터 제어장치

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 15906438

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

32PN Ep: public notification in the ep bulletin as address of the adressee cannot be established

Free format text: NOTING OF LOSS OF RIGHTS PURSUANT TO RULE 112(1) EPC (EPO FORM 1205A DATED 15.11.2018)

122 Ep: pct application non-entry in european phase

Ref document number: 15906438

Country of ref document: EP

Kind code of ref document: A1