WO2017065407A1 - Ceramic circuit board and manufacturing method therefor - Google Patents

Ceramic circuit board and manufacturing method therefor Download PDF

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Publication number
WO2017065407A1
WO2017065407A1 PCT/KR2016/009704 KR2016009704W WO2017065407A1 WO 2017065407 A1 WO2017065407 A1 WO 2017065407A1 KR 2016009704 W KR2016009704 W KR 2016009704W WO 2017065407 A1 WO2017065407 A1 WO 2017065407A1
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Prior art keywords
metal layer
circuit board
ceramic circuit
ceramic
base metal
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PCT/KR2016/009704
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French (fr)
Korean (ko)
Inventor
박미소
곽만석
이은복
김동래
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주식회사 케이씨씨
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Publication of WO2017065407A1 publication Critical patent/WO2017065407A1/en

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    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/03Use of materials for the substrate
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/09Use of materials for the conductive, e.g. metallic pattern
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/10Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/12Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using thick film techniques, e.g. printing techniques to apply the conductive material or similar techniques for applying conductive paste or ink patterns
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42Plated through-holes or plated via connections

Definitions

  • the present invention relates to a ceramic circuit board used in high-brightness LEDs, photovoltaic devices, electronic components for hybrid vehicles, and the like, and a method of manufacturing the same.
  • Ceramic has high heat resistance, high mechanical strength and high insulation resistance, so that a high voltage is applied or a high output semiconductor device substrate is used.
  • a conductive layer must be formed on the ceramic surface. Examples of the conductive layer include a chemical plating method (electroless plating), an electrolytic plating method, and an electrode paste printing method.
  • the chemical plating method refers to a method of forming a conductive layer on the surface of a ceramic by immersing the ceramic in a chemical plating solution.
  • the electroplating method involves depositing a conductive metal layer on the surface of a ceramic and then conducting the current by immersing the ceramic in an electrolytic plating solution.
  • the method of plating a conductive layer, and the electrode paste printing method is a method of printing a paste directly on a substrate and baking to form an electrode, which is excellent in bonding strength between the substrate and the paste.
  • another method of depositing a metal on the ceramic surface may be sputtering or CVD.
  • Sputtering is a method of ionizing a target material in a vacuum plasma state and depositing it on a ceramic substrate. In a high vacuum state, a target material is supplied in a gas state and deposited on a heated ceramic substrate.
  • a hole formed in the ceramic substrate is filled with an electrode material to apply a via hole method, and then a conductive layer is formed.
  • the electroplating method or the paste printing method may be applied to the conductive layer formation.
  • holes are formed and the electrode material is filled in the holes so as to enhance adhesion between the semiconductor element to be formed on the ceramic substrate and the ceramic substrate.
  • Various methods for forming a conductive layer have been attempted.
  • the present invention is to provide a ceramic circuit board having a base metal layer capable of increasing the adhesion strength between the substrate and the semiconductor device mounted in the manufacture of a ceramic circuit board for mounting a semiconductor device, and a method of manufacturing the same.
  • the weight ratio of Ni: Cr of the first metal layer is 90:10 to 75:25.
  • the base metal layer may include a first metal layer including NiCr, and a second metal layer formed on the first metal layer to improve contact between the conductive layer and the ceramic substrate.
  • the second metal layer may include Cu.
  • the ceramic substrate is at least one compound selected from the group consisting of alumina (Al 2 O 3 ), aluminum nitride (AlN), silicon nitride (Si 3 N 4 ) and silicon carbide (SiC).
  • the ceramic substrate may be provided with a plurality of via holes, but the average diameter of the via holes may be about 200 ⁇ m or less.
  • the thickness of the first metal layer is in the range of 0.015 to 0.2 ⁇ m
  • the thickness of the second metal layer is in the range of 0.05 to 0.5 ⁇ m, thereby having excellent thermal characteristics, it is possible to implement a precise circuit pattern.
  • the conductive layer includes at least one metal selected from the group consisting of Cu, Au, Ni, and Ag.
  • the ceramic circuit board of the present invention may be equipped with an electronic component on the substrate, the electronic component includes a light emitting diode (LED), although not particularly limited thereto.
  • LED light emitting diode
  • a method of manufacturing a ceramic circuit board is provided as follows.
  • the ceramic substrate may have a plurality of via holes having a diameter of about 200 ⁇ m or less formed by punching, drilling laser, or the like
  • the second metal layer may include Cu
  • the conductive layer may include Cu, Au, Ni, and the like. It may include one or more metals selected from the group consisting of Ag.
  • first metal layer and the second metal layer may be formed by a sputtering method, a printing method or a chemical plating method, and among them, the first metal layer and the second metal layer may be formed by a DC sputtering method from the viewpoint of the improvement of the film formation speed and the ease of thickness control.
  • the thickness of the first metal layer may be in the range of 0.015 to 0.2 ⁇ m
  • the thickness of the second metal layer may be in the range of 0.05 to 0.5 ⁇ m.
  • the adhesion strength is improved and the metal layer is not separated from the ceramic circuit board even after repeated application for a long time, the reliability can be improved. It is possible to safely mount electronic component elements having a large amount of heat generation, such as electronic components for hybrid automobiles.
  • FIG. 1 (a) and (b) show a cross section of a ceramic circuit board of the present invention obtained by depositing a base metal layer that can be energized on a surface of a ceramic substrate, depositing it in an electrolytic plating solution, and then energizing and plating a conductive layer.
  • FIGS. 2A and 2B are conceptual views illustrating a cross section of a substrate on which a base metal layer and a conductive layer are formed on both sides of the ceramic substrate of the present invention.
  • 3 is a view showing the adhesion strength test of the ceramic circuit board of the present invention.
  • Ceramic circuit board 100 is formed on the ceramic substrate 101 and the ceramic substrate 101, as shown in Figure 1 (a) and the base metal layer 102 containing NiCr and the Containing a conductive layer 103 formed on the base metal layer, the weight ratio of Ni: Cr of the base metal layer may be 90:10 to 75:25.
  • the ceramic circuit board according to another embodiment of the present invention may include a plurality of via holes 104 passing through the ceramic substrate 101 as shown in FIG. 1B.
  • the ceramic circuit board 200 may be formed on both sides of the base metal layer 202 and the conductive layer 203 based on the ceramic substrate 201. As shown in FIG. 2B, a plurality of via holes 204 may be formed in the ceramic circuit board 200.
  • the same reference numerals in the drawings correspond to the same members indicating the same function.
  • the base metal layer 102 may include a first metal layer including NiCr, and a second metal layer formed on the first metal layer to improve contact between the conductive layer and the ceramic substrate.
  • the conductive layer may be formed as a conductive layer on the second metal layer, and the second metal layer may include Cu.
  • the first metal layer containing NiCr is referred to as a NiCr base metal layer
  • the second metal layer containing Cu as a Cu base metal layer and the first and second metal layers are collectively referred to as a NiCr / Cu base metal layer.
  • the material of the ceramic substrate 101 used in the present invention is not particularly limited thereto, but alumina (Al 2 O 3 ), aluminum nitride (AlN), silicon nitride (Si 3 N 4 ), silicon carbide (SiC), or the like may be used.
  • alumina or an aluminum nitride substrate having excellent thermal conductivity may be used in terms of low cost and excellent mechanical strength, but silicon nitride (Si 3 N 4 ) or silicon carbide (SiC) may be used.
  • At least one metal layer of the first and second metal layers is formed on the ceramic substrate 101 by a sputtering method.
  • a sputtering method There is also a method of depositing Cu directly on a ceramic substrate by sputtering, followed by electroplating. However, in this case, since the adhesive strength is low, the substrate and the electrode are easily separated. Deposit metal.
  • metal targets having good adhesive strength include Ti and NiCr, but when Ti and NiCr are used as base metals, they are easily oxidized in the air, thereby preventing Cu electroplating. Therefore, in one embodiment of the present invention, a method of using a metal having good adhesion to ceramics as a base metal as the first metal layer and using a metal capable of electroplating as a second metal layer while preventing oxidation of the first metal layer is used. Accordingly, in one embodiment of the present invention, the base metal layer (first metal layer) formed directly on the ceramic substrate 101 of the two types of base metals, and the base metal layer (second metal layer) formed on the first metal layer The structure of the base metal layer 102 of the layer was adopted.
  • the weight ratio of Ni: Cr of the base metal layer (first metal layer) is 90:10 to 75:25, so that the ratio of Ni and Cr of NiCr having good adhesion to the substrate is different.
  • the residue can be minimized after the progress of the process while minimizing the adhesion strength.
  • the thickness of the NiCr base metal layer, which is the first metal layer, may be 0.015 to 0.2 ⁇ m, and the thickness of the Cu base metal layer, which is the second metal layer, may be 0.05 to 0.5 ⁇ m.
  • the method for forming the base metal layer 102 is not particularly limited, but may be a sputtering method, a printing method, or a chemical plating method.
  • the DC sputtering method may be used in view of high film growth rate and easy thickness control. Can be used.
  • the power is 1.0 to 2.0 kW
  • the voltage is 400 to 550 V
  • the current is 2.0 to 4.0 A
  • the amount of Ar is 100 to 300 sccm
  • the pressure is 3.0 to 4.0 mTorr.
  • an electroconductive layer 103 containing Cu or the like is electrolyzed on the second metal layer. It is formed using the plating method.
  • copper (Cu) is used as the material of the conductive layer 103
  • other materials having low electrical resistance for example, gold (Au), silver (Ag), nickel (Ni), and the like. May be formed by an electroplating method.
  • the ceramic circuit according to the embodiment of the present invention improves the adhesion strength between the ceramic substrate 101 and the conductive layer 103 by using the NiCr / Cu base metal layer 102 as the first and second metal layers.
  • the substrate 100 is suitable for mounting electronic component elements having a large amount of heat generation, such as high-brightness LEDs, photovoltaic devices, and hybrid electronic components.
  • the manufacturing method of the ceramic circuit board 100 consists of the following steps.
  • the ceramic substrate 101 may be made of one or more compounds selected from the group consisting of alumina (Al 2 O 3 ), aluminum nitride (AlN), silicon nitride (Si 3 N 4 ), and silicon carbide (SiC), and the conductive Layer 103 may comprise one or more metals selected from the group consisting of Cu, Au, Ni, and Ag.
  • the adhesion strength of the ceramic circuit board manufactured by the above method and the ceramic circuit board manufactured by the conventional method was tested according to the type of ceramic substrate, and the adhesion test method used the peel test method as shown in FIG. 2. .
  • the Cu plating is completed, and the ceramic substrate 301, the base metal layer 302, and the conductive layer 303 are melted at 300 ° C. in the ceramic specimen 300 sequentially stacked. It is a method of measuring the adhesion strength by melting the solder (glue) and attaching a Cu wire (metal foil, 304) matching the Cu plating pattern and pulling it toward the arrow shown in FIG.
  • the etching potential of the ceramic circuit board obtained in the present invention was measured. After the metal etching solution was maintained at a temperature between 50 to 55 ° C. in the heating mantle, the deposited metal layer ceramic substrate specimen was dipped in the etching solution for 3 minutes. , And the residual metal was measured and confirmed by the method of analyzing with a component analyzer.
  • the TCT (thermal cycle test) performance of the ceramic circuit board obtained in the present invention was measured. Specifically, the cycle was continuously rotated at a temperature of -55 ° C to 150 ° C. It calculated
  • Example 1 and Comparative Examples 1 to 4 adhesion strength comparison for alumina (Al 2 O 3 ) substrate
  • the ceramic circuit board manufacturing method according to the embodiment of the present invention described above was manufactured.
  • As the ceramic substrate an alumina substrate having a via hole was used.
  • base metal layer 1 the base metal layer adjacent to the ceramic substrate
  • base metal layer 2 the base metal layer formed on the base metal layer 1
  • base metal layer 2 the base metal layer formed on the base metal layer 1
  • base metal layer 1 / base metal layer 2 was designated.
  • the thickness of the base metal layer 1 was 0.2 ⁇ m, the thickness of the base metal layer 2 was 0.1 ⁇ m, and the thickness of the Cu electroplating layer plated on the base metal layer 2 was 50 ⁇ m, which was the same in Examples and Comparative Examples.
  • the base metal layer was a DC sputtering method, and before the sputtering, an ultrasonic cleaning process was performed to remove organic substances and impurities from the surface of the alumina substrate.
  • the DC sputtering was sputtered under conditions of a voltage of 450 V, a current of 3 A, an amount of Ar of 200 sccm, and a pressure of 3.5 mTorr, thereby forming a base metal layer having the thickness as described above.
  • Example 2 and Comparative Example 5-6 Comparison of adhesion strength to aluminum nitride (AlN) substrate
  • the adhesion strength of the ceramic substrate produced in the same manner as in Example 1 was measured except that the used ceramic substrate was replaced with aluminum nitride instead of alumina.
  • the ceramic substrate using NiCr / Cu of the present invention as the base metal layer has excellent adhesion strength to the aluminum nitride substrate.
  • the adhesion strength was 15.2 N / mm more than the adhesion strength on the alumina substrate, but was still insufficient level, NiCr / Ag base metal layer In case of use, 6.0 N / mm was poor as in the case of adhesion strength to alumina substrate.
  • Example 3-6 and Comparative Example 7-8 Comparison of adhesion strength by Ni content in NiCr base metal layer
  • Example 1 In the case of using the same alumina substrate as in Example 1, the experiment was performed once how the adhesion strength changes as the Ni content of the NiCr base metal layer changes.
  • Example 3 Example 4
  • Example 5 Example 6 Comparative Example 8 Ni content (%) 95 90 88 80 75 70 Cr content (%) 5 10 12 20 25 30 Average adhesion strength (N / mm) 8 18 23.5 25.8 32 35 Etchable ⁇ ⁇ ⁇ ⁇ ⁇ ⁇ TCT (times) 10 90 100 150 155 160
  • the adhesion strength and the TCT result were excellent and the etching was also possible.
  • the adhesion strength was found to be increased in proportion to the content of Cr.
  • the Cr content was 30% by weight, as in the case of Comparative Example 8, it was confirmed that the residue remained in the etching process after the pattern formation.

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Manufacturing Of Printed Wiring (AREA)
  • Parts Printed On Printed Circuit Boards (AREA)
  • Chemical & Material Sciences (AREA)
  • Ceramic Engineering (AREA)
  • Inorganic Chemistry (AREA)

Abstract

The present invention relates to a ceramic circuit board and a manufacturing method therefor, the ceramic circuit board comprising: a ceramic substrate; a base metal layer formed on the ceramic substrate and including NiCr; and a conductive layer formed on the base metal layer, wherein a weight ratio of Ni:Cr of the base metal layer is 90:10 to 75:25. When the ceramic circuit board of the present invention is used, adhesion strength is enhanced such that the metal layer is not separated from the ceramic circuit board even when the ceramic circuit board is repetitively used by applying a current thereto for a long time, thereby enabling reliability to be enhanced, and thus an electronic part element having a large caloric value, such as a high-brightness LED, a photovoltaic power generation device, or an electronic part for a hybrid vehicle, can be safely loaded thereon.

Description

세라믹 회로기판 및 이의 제조방법Ceramic Circuit Board and Manufacturing Method Thereof
본 발명은 고휘도 LED, 태양광 발전장치, 하이브리드 자동차용 전자부품 등에 사용되는 세라믹 회로기판 및 이의 제조방법에 관한 것이다. The present invention relates to a ceramic circuit board used in high-brightness LEDs, photovoltaic devices, electronic components for hybrid vehicles, and the like, and a method of manufacturing the same.
세라믹은 내열성, 기계적 강도가 우수하고 절연저항이 높아 고전압이 인가되거나 고출력의 반도체 소자 기판 재료로 사용된다. 기판재료로 사용하기 위해서는 세라믹 표면에 도전층을 형성시켜야 하는데, 도전층을 형성하는 방법으로는 화학 도금법(무전해 도금), 전해 도금법, 전극 페이스트 인쇄법 등이 있다. Ceramic has high heat resistance, high mechanical strength and high insulation resistance, so that a high voltage is applied or a high output semiconductor device substrate is used. In order to use it as a substrate material, a conductive layer must be formed on the ceramic surface. Examples of the conductive layer include a chemical plating method (electroless plating), an electrolytic plating method, and an electrode paste printing method.
화학 도금법이란, 세라믹을 화학도금액에 침지시켜서 도전층을 세라믹 표면에 형성하는 방법을 말하며, 전해 도금법은 세라믹 표면에 통전이 가능한 금속층을 증착하고 난 후에 세라믹을 전해 도금액에 침지시킨 후 통전을 시켜 도전층을 도금하는 방법이고, 또한, 전극 페이스트 인쇄법은 기판에 직접 페이스트를 인쇄하고 소성하여 전극을 형성시키는 방법으로서 기판과 페이스트의 접합 강도가 우수한 방법이다.The chemical plating method refers to a method of forming a conductive layer on the surface of a ceramic by immersing the ceramic in a chemical plating solution.The electroplating method involves depositing a conductive metal layer on the surface of a ceramic and then conducting the current by immersing the ceramic in an electrolytic plating solution. The method of plating a conductive layer, and the electrode paste printing method is a method of printing a paste directly on a substrate and baking to form an electrode, which is excellent in bonding strength between the substrate and the paste.
상기 방법들 이외에 세라믹 표면에 금속을 증착시키는 또 다른 방법으로는 스퍼터링법이나 CVD법 등을 들 수 있는데, 스퍼터링은 진공의 플라즈마 상태에서 타겟물질을 이온화 시켜 세라믹 기판에 증착하는 방법이며, CVD법은 고진공상태에서 타겟물질을 가스 상태로 공급하여 가열된 세라믹기판에 증착시키는 방법이다. In addition to the above methods, another method of depositing a metal on the ceramic surface may be sputtering or CVD. Sputtering is a method of ionizing a target material in a vacuum plasma state and depositing it on a ceramic substrate. In a high vacuum state, a target material is supplied in a gas state and deposited on a heated ceramic substrate.
고휘도 LED와 같이 소비전력의 상당한 부분을 열로 방출하는 소자는 효율적인 열 배출이 가능해야 되는데, 이를 위해서 세라믹 기판에 홀(hole)을 형성할 수 있다. 이 경우, 세라믹 기판에 형성된 홀에는 전극 재료를 충진하여 비아홀(via hole) 방식을 적용한 후 도전층을 형성하는데, 도전층 형성에는 상기 전해 도금법이나 페이스트 인쇄법이 적용될 수 있다. 세라믹 기판에 홀을 형성하고 비아홀 방식을 적용하여 도전층을 형성하는 경우에는, 이후에 세라믹 기판 상에 형성될 반도체 소자와 세라믹 기판과의 밀착성을 높일 수 있도록 홀을 형성하고 홀 내에 전극재료를 충진하여 도전층을 형성하는 다양한 방법들이 시도되고 있다. Devices that emit a significant portion of power consumption as heat, such as high-brightness LEDs, must be capable of efficient heat dissipation, which can form holes in the ceramic substrate. In this case, a hole formed in the ceramic substrate is filled with an electrode material to apply a via hole method, and then a conductive layer is formed. The electroplating method or the paste printing method may be applied to the conductive layer formation. In the case of forming a hole in the ceramic substrate and applying a via hole method to form a conductive layer, holes are formed and the electrode material is filled in the holes so as to enhance adhesion between the semiconductor element to be formed on the ceramic substrate and the ceramic substrate. Various methods for forming a conductive layer have been attempted.
[선행기술문헌][Preceding technical literature]
[특허문헌][Patent Documents]
한국특허공개공보 2014-0001735Korean Patent Publication No. 2014-0001735
일본특허공개공보 2013-143411Japanese Patent Laid-Open Publication 2013-143411
미국특허 제6,800,211호U.S. Patent 6,800,211
일본특허 제3,570,407호Japanese Patent No. 3,570,407
본 발명은 반도체 소자 실장용 세라믹 회로기판을 제조하는데 있어, 기판과 실장된 반도체 소자와의 밀착강도를 높일 수 있는 베이스 금속층을 구비한 세라믹 회로기판 및 이의 제조방법을 제공하고자 한다.The present invention is to provide a ceramic circuit board having a base metal layer capable of increasing the adhesion strength between the substrate and the semiconductor device mounted in the manufacture of a ceramic circuit board for mounting a semiconductor device, and a method of manufacturing the same.
본 발명의 일측면에 따른 세라믹 회로기판은,Ceramic circuit board according to an aspect of the present invention,
세라믹 기판;Ceramic substrates;
상기 세라믹 기판 위에 형성되고 NiCr을 포함하는 베이스 금속층; 및 A base metal layer formed on the ceramic substrate and including NiCr; And
상기 베이스 금속층 위에 형성되는 전도층을 포함하고, 상기 제1 금속층의 Ni:Cr의 중량비는 90:10 내지 75:25이다.Containing a conductive layer formed on the base metal layer, the weight ratio of Ni: Cr of the first metal layer is 90:10 to 75:25.
본 발명의 일 실시태양에서 상기 베이스 금속층은 NiCr을 포함하는 제1 금속층과, 상기 전도층과 상기 세라믹 기판과의 접촉성을 향상하기 위해 상기 제1 금속층 위에 형성되는 제2 금속층을 포함할 수 있으며, 상기 제2 금속층은 Cu를 포함할 수 있다.In one embodiment of the present invention, the base metal layer may include a first metal layer including NiCr, and a second metal layer formed on the first metal layer to improve contact between the conductive layer and the ceramic substrate. The second metal layer may include Cu.
또한, 본 발명의 일 실시태양에서 상기 세라믹 기판은 알루미나(Al2O3), 질화알루미늄(AlN), 질화규소(Si3N4) 및 탄화규소(SiC)로 이루어진 군으로부터 선택되는 하나 이상의 화합물로 이루어질 수 있으며, 또한 상기 세라믹 기판은 비아홀이 복수개 구비되어 있어도 되는데 비아홀의 평균 직경은 대략 200㎛ 이하이어도 된다. 또한, 상기 제1 금속층의 두께는 0.015 내지 0.2㎛ 범위 내이고, 상기 제2 금속층의 두께는 0.05 내지 0.5㎛ 범위 내인데, 이로써 우수한 열적 특성을 가지며, 정밀한 회로패턴을 구현할 수 있다.In addition, in one embodiment of the present invention, the ceramic substrate is at least one compound selected from the group consisting of alumina (Al 2 O 3 ), aluminum nitride (AlN), silicon nitride (Si 3 N 4 ) and silicon carbide (SiC). In addition, the ceramic substrate may be provided with a plurality of via holes, but the average diameter of the via holes may be about 200 μm or less. In addition, the thickness of the first metal layer is in the range of 0.015 to 0.2㎛, the thickness of the second metal layer is in the range of 0.05 to 0.5㎛, thereby having excellent thermal characteristics, it is possible to implement a precise circuit pattern.
또한, 본 발명의 다른 일 실시태양에서 상기 전도층은 Cu, Au, Ni 및 Ag로 이루어진 군으로부터 선택되는 하나 이상의 금속을 포함한다.Further, in another embodiment of the present invention, the conductive layer includes at least one metal selected from the group consisting of Cu, Au, Ni, and Ag.
또한, 본 발명의 세라믹 회로기판은 이 기판 상에 전자부품이 탑재될 수 있는데, 상기 전자부품은 특별히 이에 제한되지는 않지만, 발광 다이오드(LED)를 포함한다.In addition, the ceramic circuit board of the present invention may be equipped with an electronic component on the substrate, the electronic component includes a light emitting diode (LED), although not particularly limited thereto.
본 발명의 다른 일측면에 따라 하기와 같이, 세라믹 회로기판의 제조방법을 제공하는데, 이 제조방법은According to another aspect of the present invention, a method of manufacturing a ceramic circuit board is provided as follows.
(i) 세라믹 기판 위에 Ni:Cr의 중량비가 90:10 내지 75:25인 NiCr을 포함하는 제1 금속층을 형성하는 단계;(i) forming a first metal layer comprising NiCr having a weight ratio of Ni: Cr of 90:10 to 75:25 on the ceramic substrate;
(ii) 상기 제1 금속층 위에 제2 금속층을 형성하는 단계; 및(ii) forming a second metal layer over the first metal layer; And
(iii) 상기 제2 금속층 위에 전도층을 형성하는 단계를 포함하는 것이다.(iii) forming a conductive layer on the second metal layer.
여기에서, 상기 세라믹 기판은 펀칭, 드릴링 레이저 등으로 형성된 직경 약 200㎛ 이하의 복수개의 비아홀을 가질 수 있으며, 상기 제2 금속층은 Cu를 포함할 수 있고, 상기 전도층은 Cu, Au, Ni 및 Ag으로 이루어진 군으로부터 선택되는 하나 이상의 금속을 포함할 수 있다.Here, the ceramic substrate may have a plurality of via holes having a diameter of about 200 μm or less formed by punching, drilling laser, or the like, the second metal layer may include Cu, and the conductive layer may include Cu, Au, Ni, and the like. It may include one or more metals selected from the group consisting of Ag.
또한, 상기 제1 금속층 및 제2 금속층은 스퍼터링법, 인쇄법 또는 화학도금법으로 형성될 수 있으며, 그 중에서도 성막 속도의 개선 및 두께 조절의 용이성의 관점에서는 DC 스퍼터링법으로 형성될 수 있다.In addition, the first metal layer and the second metal layer may be formed by a sputtering method, a printing method or a chemical plating method, and among them, the first metal layer and the second metal layer may be formed by a DC sputtering method from the viewpoint of the improvement of the film formation speed and the ease of thickness control.
아울러, 전술한 바와 같이, 상기 제1 금속층의 두께는 0.015 내지 0.2㎛ 범위 내이어도 되며, 상기 제2 금속층의 두께는 0.05 내지 0.5 ㎛ 범위 내이어도 된다.In addition, as described above, the thickness of the first metal layer may be in the range of 0.015 to 0.2 μm, and the thickness of the second metal layer may be in the range of 0.05 to 0.5 μm.
본 발명의 세라믹 회로기판을 사용할 경우에는 밀착강도가 향상되어 있어 장기간 전류를 인가하여 반복 사용하여도 금속층이 세라믹 회로기판으로부터 이탈되지 않아 신뢰성을 향상시킬 수 있기 때문에, 고휘도 LED, 태양광 발전장치, 하이브리드 자동차용 전자부품 등의 발열량이 큰 전자부품 소자를 안전하게 탑재할 수 있다.In the case of using the ceramic circuit board of the present invention, since the adhesion strength is improved and the metal layer is not separated from the ceramic circuit board even after repeated application for a long time, the reliability can be improved. It is possible to safely mount electronic component elements having a large amount of heat generation, such as electronic components for hybrid automobiles.
도 1의 (a) 및 (b)는 세라믹 기판 표면에 통전이 가능한 베이스 금속층을 증착하고 전해 도금액에 침전시킨 후 통전을 시켜 도전층을 도금하는 방법으로 얻어진 본 발명의 세라믹 회로기판의 단면을 나타내는 개념도이다.1 (a) and (b) show a cross section of a ceramic circuit board of the present invention obtained by depositing a base metal layer that can be energized on a surface of a ceramic substrate, depositing it in an electrolytic plating solution, and then energizing and plating a conductive layer. Conceptual diagram.
도 2의 (a) 및 (b)는 본 발명의 세라믹 기판을 기준으로 베이스 금속층 및 전도층이 양면으로 형성된 기판의 단면을 나타내는 개념도이다.2A and 2B are conceptual views illustrating a cross section of a substrate on which a base metal layer and a conductive layer are formed on both sides of the ceramic substrate of the present invention.
도 3은 본 발명의 세라믹 회로기판의 밀착강도 테스트를 나타낸 도면이다.3 is a view showing the adhesion strength test of the ceramic circuit board of the present invention.
본 발명의 세라믹 회로기판에 대해 보다 구체적으로 살펴보면 다음과 같다.Looking at the ceramic circuit board of the present invention in more detail as follows.
본 발명의 일 실시형태에 따른 세라믹 회로 기판(100)은 도 1(a)에서 나타내는 바와 같이 세라믹 기판(101)과 상기 세라믹 기판(101) 위에 형성되고 NiCr을 포함하는 베이스 금속층(102) 및 상기 베이스 금속층 위에 형성되는 전도층(103)을 포함하고, 상기 베이스 금속층의 Ni:Cr의 중량비는 90:10 내지 75:25인 것일 수 있다. 또한 본 발명의 다른 실시형태에 따른 세라믹 회로 기판은 도 1(b)에 나타낸 바와 같이 세라믹 기판(101)을 관통하는 비아홀(104)이 복수개 구비되어 있을 수도 있다.Ceramic circuit board 100 according to an embodiment of the present invention is formed on the ceramic substrate 101 and the ceramic substrate 101, as shown in Figure 1 (a) and the base metal layer 102 containing NiCr and the Containing a conductive layer 103 formed on the base metal layer, the weight ratio of Ni: Cr of the base metal layer may be 90:10 to 75:25. In addition, the ceramic circuit board according to another embodiment of the present invention may include a plurality of via holes 104 passing through the ceramic substrate 101 as shown in FIG. 1B.
본 발명의 또 다른 실시형태에 의하면 도 2(a)에 나타내는 바와 같이 세라믹 기판(201)을 기준으로 베이스 금속층(202) 및 전도층(203)이 양면으로 형성된 세라믹 회로 기판(200)일 수도 있고, 도 2(b)에 나타내는 바와 같이 복수의 비아홀(204)이 세라믹 회로 기판(200) 내에 형성되는 것일 수 도 있다. 상술한 도면의 설명에 있어서, 도면 내의 부호가 동일한 것은 동일 기능을 나타내는 동일 부재에 해당한다.According to another embodiment of the present invention, as shown in FIG. 2A, the ceramic circuit board 200 may be formed on both sides of the base metal layer 202 and the conductive layer 203 based on the ceramic substrate 201. As shown in FIG. 2B, a plurality of via holes 204 may be formed in the ceramic circuit board 200. In the above description of the drawings, the same reference numerals in the drawings correspond to the same members indicating the same function.
이하에서는 본 발명의 세라믹 회로 기판의 각 부재에 대하여, 편의를 위하여 도 1을 참조로 하여 설명한다.Hereinafter, each member of the ceramic circuit board of the present invention will be described with reference to FIG. 1 for convenience.
상기 베이스 금속층(102)은 NiCr을 포함하는 제1 금속층과, 상기 전도층과 상기 세라믹 기판과의 접촉성을 향상하기 위해 상기 제1 금속층 위에 형성되는 제2 금속층을 포함하는 것일 수 있으며, 상기 제2 금속층 위에 전도층으로서 전도층이 형성되는 것일 수 있고, 상기 제2 금속층은 Cu를 포함할 수 있다.The base metal layer 102 may include a first metal layer including NiCr, and a second metal layer formed on the first metal layer to improve contact between the conductive layer and the ceramic substrate. The conductive layer may be formed as a conductive layer on the second metal layer, and the second metal layer may include Cu.
본 명세서에서는 NiCr을 함유한 제1 금속층을 NiCr 베이스 금속층으로, Cu을 함유한 제2 금속층을 Cu 베이스 금속층으로, 상기 제1 및 제2 금속층을 합쳐서 NiCr/Cu 베이스 금속층으로 표기하기도 하였다.In the present specification, the first metal layer containing NiCr is referred to as a NiCr base metal layer, the second metal layer containing Cu as a Cu base metal layer, and the first and second metal layers are collectively referred to as a NiCr / Cu base metal layer.
본 발명의 세라믹 회로기판(100)을 구성하는 상기 요소들 각각에 대한 구체적인 내용을 살펴본다.The details of each of the elements constituting the ceramic circuit board 100 of the present invention will be described.
<세라믹 기판><Ceramic Substrate>
먼저 본 발명에 사용되는 세라믹 기판(101) 재료로는 특별히 이에 제한되지는 않지만, 알루미나(Al2O3), 질화알루미늄(AlN), 질화규소(Si3N4), 탄화규소(SiC) 등을 들 수 있는데, 이 중에서도 저렴하고 기계적 강도가 우수한 점에서는 알루미나 또는 열전도도가 우수한 질화알루미늄 기판이 사용될 수 있지만, 그 외에도 질화규소(Si3N4)나 탄화규소(SiC) 등도 사용될 수 있다.First, the material of the ceramic substrate 101 used in the present invention is not particularly limited thereto, but alumina (Al 2 O 3 ), aluminum nitride (AlN), silicon nitride (Si 3 N 4 ), silicon carbide (SiC), or the like may be used. Among them, alumina or an aluminum nitride substrate having excellent thermal conductivity may be used in terms of low cost and excellent mechanical strength, but silicon nitride (Si 3 N 4 ) or silicon carbide (SiC) may be used.
<제1 및 제2 금속층 (베이스 금속층)><First and second metal layer (base metal layer)>
상기 세라믹 기판(101)에 스퍼터링 방법으로 제1 및 제2 금속층의 적어도 어느 하나의 금속층을 형성한다. 스퍼터링으로 Cu를 세라믹 기판에 직접 증착한 후 전해도금을 실시하는 방법도 있지만, 이 경우 밀착강도가 낮아 기판과 전극이 쉽게 분리되는 문제가 발생하기 때문에 세라믹과 접착력이 좋은 금속을 먼저 증착한 후 Cu 금속을 증착한다.At least one metal layer of the first and second metal layers is formed on the ceramic substrate 101 by a sputtering method. There is also a method of depositing Cu directly on a ceramic substrate by sputtering, followed by electroplating. However, in this case, since the adhesive strength is low, the substrate and the electrode are easily separated. Deposit metal.
접착력이 좋은 금속 타겟으로는 Ti, NiCr 등을 들 수 있는데, Ti, NiCr만 베이스 금속으로 각각 이용하면 대기 중에서 쉽게 산화되어 Cu 전해도금이 되지 않는 문제가 있다. 따라서, 본 발명의 일 실시형태에서는 베이스 금속으로 세라믹과의 접착력이 좋은 금속을 제1 금속층으로 사용하고 제1 금속층의 산화를 방지하면서 전해도금이 가능한 금속을 제2 금속층으로 사용하는 방법을 채용하였는데, 이에 따라 본 발명의 일 실시형태에서는 두 종류의 베이스 금속 중 세라믹 기판(101) 바로 위에 형성되는 베이스 금속층 (제1 금속층), 상기 제1 금속층 위에 형성되는 베이스 금속층 (제2 금속층)으로 이루어진 2층의 베이스 금속층(102)의 구조를 채용하였다.Examples of metal targets having good adhesive strength include Ti and NiCr, but when Ti and NiCr are used as base metals, they are easily oxidized in the air, thereby preventing Cu electroplating. Therefore, in one embodiment of the present invention, a method of using a metal having good adhesion to ceramics as a base metal as the first metal layer and using a metal capable of electroplating as a second metal layer while preventing oxidation of the first metal layer is used. Accordingly, in one embodiment of the present invention, the base metal layer (first metal layer) formed directly on the ceramic substrate 101 of the two types of base metals, and the base metal layer (second metal layer) formed on the first metal layer The structure of the base metal layer 102 of the layer was adopted.
또한, 본 발명의 일 실시형태에 따르면 상기 베이스 금속층(제1 금속층)의 Ni:Cr의 중량비를 90:10 내지 75:25로 함으로써, 기판에 대한 접착력이 좋은 NiCr의 Ni와 Cr의 비를 달리하여 밀착강도를 최적화 할 수 있으면서도 공정 진행 후의 발생할 수 있는 잔류물을 최소화 할 수 있으며, 이러한 수치범위의 중량비를 갖는 NiCr 베이스 금속층을 본 발명에서의 제1 금속층으로 사용하였다.In addition, according to one embodiment of the present invention, the weight ratio of Ni: Cr of the base metal layer (first metal layer) is 90:10 to 75:25, so that the ratio of Ni and Cr of NiCr having good adhesion to the substrate is different. By using the NiCr base metal layer having a weight ratio of the numerical range, the residue can be minimized after the progress of the process while minimizing the adhesion strength.
또한, 상기 제1 금속층인 NiCr 베이스 금속층의 두께는 0.015 내지 0.2㎛이며, 상기 제2 금속층인 Cu 베이스 금속층의 두께는 0.05 내지 0.5㎛이어도 된다.The thickness of the NiCr base metal layer, which is the first metal layer, may be 0.015 to 0.2 µm, and the thickness of the Cu base metal layer, which is the second metal layer, may be 0.05 to 0.5 µm.
상기 베이스 금속층(102)을 형성하기 위한 방법으로는 특별히 이에 제한되지는 않지만, 스퍼터링법, 인쇄법 또는 화학도금법 등을 들 수 있는데, 막 성장 속도가 높고 두께 조절이 용이하다는 점에서 DC 스퍼터링법을 사용할 수 있다.The method for forming the base metal layer 102 is not particularly limited, but may be a sputtering method, a printing method, or a chemical plating method. The DC sputtering method may be used in view of high film growth rate and easy thickness control. Can be used.
상기 DC 스퍼터링 방법에서의 조건으로는, 전력은 1.0 내지 2.0kW, 전압은 400 내지 550V, 전류는 2.0 내지 4.0A이며, Ar량은 100 내지 300sccm, 압력은 3.0 내지 4.0mTorr을 사용할 수 있다.In the DC sputtering method, the power is 1.0 to 2.0 kW, the voltage is 400 to 550 V, the current is 2.0 to 4.0 A, the amount of Ar is 100 to 300 sccm, and the pressure is 3.0 to 4.0 mTorr.
<전도층><Conductive layer>
본 발명의 일 실시형태에서는 상기 세라믹 기판에 스퍼터링 방법을 이용하여 제1 및 제2 금속층인 베이스 금속층(102)을 형성한 후, Cu 등이 포함된 전도층(103)을 상기 제2 금속층 위에 전해 도금법을 사용하여 형성시킨다. 본 발명의 일 실시형태에서는 상기 전도층(103)의 재료로 구리(Cu)를 이용했지만, 기타, 전기 저항이 낮은 물질, 예를 들면 금(Au)이나 은(Ag) 또는 니켈(Ni) 등을 전해 도금법으로 형성할 수도 있다.In an exemplary embodiment of the present invention, after forming the base metal layer 102, which is the first and second metal layers, on the ceramic substrate using a sputtering method, an electroconductive layer 103 containing Cu or the like is electrolyzed on the second metal layer. It is formed using the plating method. In one embodiment of the present invention, although copper (Cu) is used as the material of the conductive layer 103, other materials having low electrical resistance, for example, gold (Au), silver (Ag), nickel (Ni), and the like. May be formed by an electroplating method.
상술한 바와 같이, 제1 및 제2 금속층인 NiCr/Cu 베이스 금속층(102)을 사용하여 세라믹 기판(101)과 전도층(103)의 밀착 강도를 향상시킨 본 발명의 일 실시형태에 따른 세라믹 회로기판(100)은 고휘도 LED, 태양광 발전장치, 하이브리드 자동차용 전자부품 등의 발열량이 많은 전자부품 소자를 탑재하기에 적합하다.As described above, the ceramic circuit according to the embodiment of the present invention improves the adhesion strength between the ceramic substrate 101 and the conductive layer 103 by using the NiCr / Cu base metal layer 102 as the first and second metal layers. The substrate 100 is suitable for mounting electronic component elements having a large amount of heat generation, such as high-brightness LEDs, photovoltaic devices, and hybrid electronic components.
본 발명의 일 실시형태에 따른, 세라믹 회로기판(100)의 제조 방법은 하기 단계로 이루어진다.According to one embodiment of the present invention, the manufacturing method of the ceramic circuit board 100 consists of the following steps.
(i) 세라믹 기판 위에 Ni:Cr의 중량비가 90:10 내지 75:25인 NiCr을 포함하는 제1 금속층을 두께 0.015 내지 0.05㎛의 범위 내로 형성하는 단계;(i) forming a first metal layer including NiCr having a weight ratio of Ni: Cr of 90:10 to 75:25 on a ceramic substrate in a range of 0.015 to 0.05 μm in thickness;
(ii) 상기 제1 금속층 위에 Cu를 포함하는 제2 금속층을 두께 0.05 내지 0.35㎛의 범위 내로 형성하는 단계; 및(ii) forming a second metal layer including Cu on the first metal layer within a thickness of 0.05 to 0.35 μm; And
(iii) 상기 제2 금속층 위에 전도층을 형성하는 단계.(iii) forming a conductive layer over the second metal layer.
상기 세라믹 기판(101)은 알루미나(Al2O3), 질화알루미늄(AlN), 질화규소(Si3N4) 및 탄화규소(SiC)으로 이루어진 군으로부터 선택되는 하나 이상의 화합물로 이루어질 수 있으며, 상기 전도층(103)은 Cu, Au, Ni 및 Ag로 이루어진 군으로부터 선택되는 하나 이상의 금속을 포함할 수 있다.The ceramic substrate 101 may be made of one or more compounds selected from the group consisting of alumina (Al 2 O 3 ), aluminum nitride (AlN), silicon nitride (Si 3 N 4 ), and silicon carbide (SiC), and the conductive Layer 103 may comprise one or more metals selected from the group consisting of Cu, Au, Ni, and Ag.
상기 방법으로 제조한 세라믹 회로기판과 종래 방법으로 제조한 세라믹 회로기판의 밀착 강도를 세라믹 기판의 종류에 따라 테스트해 보았는데, 밀착 강도 테스트 방법은 도 2와 같은 필 테스트(peel test) 방법을 사용하였다.The adhesion strength of the ceramic circuit board manufactured by the above method and the ceramic circuit board manufactured by the conventional method was tested according to the type of ceramic substrate, and the adhesion test method used the peel test method as shown in FIG. 2. .
상기 방법은 도 3에서 나타내는 바와 같이, Cu 도금이 완료되고, 세라믹 기판(301), 베이스 금속층(302), 전도층(303)이 순차적으로 적층된 세라믹 시편(300)에, 300℃에서 용융되는 솔더(solder)를 녹여 Cu 도금 패턴과 매칭되는 Cu 와이어(금속박, 304)를 붙이고 도 3에서 나타내는 화살표 방향을 향하여 UTM 장비로 당겨서 밀착강도를 측정하는 방법이다.As shown in FIG. 3, the Cu plating is completed, and the ceramic substrate 301, the base metal layer 302, and the conductive layer 303 are melted at 300 ° C. in the ceramic specimen 300 sequentially stacked. It is a method of measuring the adhesion strength by melting the solder (glue) and attaching a Cu wire (metal foil, 304) matching the Cu plating pattern and pulling it toward the arrow shown in FIG.
또한, 본 발명에서 얻어지는 세라믹 회로기판에 대해서 에칭 가능성을 측정하였는데, 금속 에칭액을 히팅 맨틀에서 50 내지 55℃ 사이로 온도를 유지시켜 증착된 금속층 세라믹 기판 시편을 에칭액에 3분동안 딥핑(dipping)한 후, 금속 잔존여부를 성분 분석기로 분석하는 방법에 의해 측정 및 확인하였다.In addition, the etching potential of the ceramic circuit board obtained in the present invention was measured. After the metal etching solution was maintained at a temperature between 50 to 55 ° C. in the heating mantle, the deposited metal layer ceramic substrate specimen was dipped in the etching solution for 3 minutes. , And the residual metal was measured and confirmed by the method of analyzing with a component analyzer.
나아가, 본 발명에서 얻어지는 세라믹 회로기판에 대해서 TCT(열 싸이클 테스트: Thermal Cycle Test) 성능을 측정하였는데, 구체적으로 -55℃~150℃의 온도로 계속 싸이클을 돌려 박리현상(delamination)이 몇 싸이클째 나타나는지를 조사해 보는 방법에 의해 구하였다.Furthermore, the TCT (thermal cycle test) performance of the ceramic circuit board obtained in the present invention was measured. Specifically, the cycle was continuously rotated at a temperature of -55 ° C to 150 ° C. It calculated | required by the method of examining whether it appears.
이하, 본 발명을 하기와 같은 실시예에 의거하여 더욱 상세하게 설명한다. 단, 하기 실시예들은 본 발명을 예시하기 위한 것일 뿐, 본 발명이 이들 실시예들에 의해 한정되는 것은 아니다.Hereinafter, the present invention will be described in more detail based on the following examples. However, the following examples are only for illustrating the present invention, and the present invention is not limited by these examples.
실시예 1 및 비교예 1 내지 4: 알루미나(Al2O3) 기판에 대한 밀착강도 비교 Example 1 and Comparative Examples 1 to 4 : adhesion strength comparison for alumina (Al 2 O 3 ) substrate
상술한 본 발명의 일 실시형태에 따른 세라믹 회로기판 제조방법에 의해 제조하였는데, 세라믹 기판으로서는 비아홀을 구비한 알루미나 기판을 사용하였다.The ceramic circuit board manufacturing method according to the embodiment of the present invention described above was manufactured. As the ceramic substrate, an alumina substrate having a via hole was used.
베이스 금속층을 2개 사용하는 경우, 세라믹 기판에 인접한 베이스 금속층을 베이스 금속층 1로, 상기 베이스 금속층 1 위에 형성되는 베이스 금속층을 베이스 금속층 2로 명명하며, 편의를 위해 예를 들어 "NiCr/Cu"와 같이 베이스 금속층 1/베이스 금속층 2로 표기하였다.When two base metal layers are used, the base metal layer adjacent to the ceramic substrate is referred to as base metal layer 1, and the base metal layer formed on the base metal layer 1 is referred to as base metal layer 2, and for example, "NiCr / Cu" and Likewise, the base metal layer 1 / base metal layer 2 was designated.
상기 베이스 금속층 1의 두께는 0.2㎛로 하였고, 상기 베이스 금속층 2의 두께는 0.1㎛로 하였으며, 상기 베이스 금속층 2에 도금되는 Cu 전해 도금층의 두께는 50㎛로 실시예 및 비교예에서 동일하게 하였는데, 본 발명의 세라믹 회로기판을 나타내는 실시예 1에서는 NixCr1 -x (x = 0.8)/Cu의 베이스 금속층을 사용하였으며, 비교예 1에서는 종래 사용되어 오는 Ti/Cu를, 비교예 2 및 3에서는 각각 Cu 및 NiCr만을 단독으로 베이스 금속층으로 사용하였고, 비교예 4에서는 NiCr/Ag를 베이스 금속층으로 사용하였다.The thickness of the base metal layer 1 was 0.2 μm, the thickness of the base metal layer 2 was 0.1 μm, and the thickness of the Cu electroplating layer plated on the base metal layer 2 was 50 μm, which was the same in Examples and Comparative Examples. In Example 1 representing the ceramic circuit board of the present invention, a base metal layer of Ni x Cr 1- x (x = 0.8) / Cu was used, and in Comparative Example 1, Ti / Cu, which is conventionally used, was used. In each case, only Cu and NiCr were used alone as the base metal layer, and in Comparative Example 4, NiCr / Ag was used as the base metal layer.
또한, 상기 베이스 금속층은 DC 스퍼터링 방법을 사용하였는데, 스퍼터링을 실시하기 전에 알루미나 기판의 표면으로부터 유기물 및 불순물을 제거하기 위하여 초음파 세정 공정을 진행하였다.In addition, the base metal layer was a DC sputtering method, and before the sputtering, an ultrasonic cleaning process was performed to remove organic substances and impurities from the surface of the alumina substrate.
상기 DC 스퍼터링은, 전압 450V, 전류 3A, Ar량 200sccm 및 압력 3.5mTorr의 조건으로 스퍼터링을 하였으며, 이로써 상기와 같은 두께의 베이스 금속층을 형성하였다.The DC sputtering was sputtered under conditions of a voltage of 450 V, a current of 3 A, an amount of Ar of 200 sccm, and a pressure of 3.5 mTorr, thereby forming a base metal layer having the thickness as described above.
이와 같이 제조한 각각의 세라믹 회로기판을 상술한 필 테스트 방법으로 밀착강도를 측정하였는데, 그 결과를 하기 표 1에 나타내었다.The adhesion strength of each ceramic circuit board thus manufactured was measured by the above-described peel test method, and the results are shown in Table 1 below.
구분division 두께thickness 실시예 1Example 1 비교예 1Comparative Example 1 비교예 2Comparative Example 2 비교예 3Comparative Example 3 비교예 4Comparative Example 4
베이스 금속층 1 Base metal layer 1 0.2㎛0.2 μm NixCr1 -x(x=0.8)Ni x Cr 1 -x (x = 0.8) TiTi CuCu NixCr1 -x(x=0.8)Ni x Cr 1 -x (x = 0.8) NixCr1 -x(x=0.8)Ni x Cr 1 -x (x = 0.8)
베이스금속층 2Base metal layer 2 0.1㎛0.1 μm CuCu CuCu -- -- AgAg
Cu전해 도금Cu Electroplating 50㎛50 μm 도금불가No plating
평균 밀착강도(N/mm)Average adhesion strength (N / mm) 21.421.4 10.310.3 1.01.0 -- 7.87.8
에칭가능성Etchability OO OO OO OO OO
상기 표 1에서 보는 바와 같이, 본 발명에서와 같은 NiCr/Cu를 베이스 금속층으로 사용한 경우 평균 밀착강도가 21.4N/mm로, 종래 Ti/Cu를 베이스 금속층으로 사용한 경우의 10.3N/mm보다 크게 향상되었음을 알 수 있었다. 또한, Cu만을 베이스 금속층으로 증착한 경우에는 밀착강도가 매우 낮았으며, NiCr만을 베이스 금속만으로 증착한 경우에는 Cu가 도금되지 않는 문제가 발생하였다. 아울러, 본 발명에서와 같이 NiCr을 베이스 금속층 1로 사용하고, 베이스 금속층 2로 Cu 대신에 Ag를 사용한 비교예 4의 경우에는 밀착강도가 7.8N/mm로 본 발명에 비해 밀착강도가 1/3 정도밖에 되지 않았다.As shown in Table 1 above, when NiCr / Cu is used as the base metal layer, the average adhesion strength is improved to 21.4 N / mm, compared to 10.3 N / mm when Ti / Cu is used as the base metal layer. It was found. In addition, when only Cu was deposited as the base metal layer, the adhesion strength was very low. When only NiCr was deposited as the base metal, Cu did not plate. In addition, in the case of Comparative Example 4 using NiCr as the base metal layer 1 and Ag instead of Cu as the base metal layer 2 as in the present invention, the adhesion strength was 7.8 N / mm and the adhesive strength was 1/3 compared to the present invention. It was only about.
실시예 2 및 비교예 5-6: 질화알루미늄(AlN) 기판에 대한 밀착강도 비교 Example 2 and Comparative Example 5-6 : Comparison of adhesion strength to aluminum nitride (AlN) substrate
사용한 세라믹 기판을 알루미나 대신 질화알루미늄으로 대체한 것 외에는 상기 실시예 1에서와 동일한 방법으로 제작한 세라믹 기판의 밀착강도를 측정하였다.The adhesion strength of the ceramic substrate produced in the same manner as in Example 1 was measured except that the used ceramic substrate was replaced with aluminum nitride instead of alumina.
베이스 금속층을 상기 비교예 2 및 3에서와 같이 Cu 또는 NiCr의 한 종류로만 사용한 경우는 배제하였으며, NixCr1 -x(x=0.8)/Cu를 사용한 경우(실시예 2), Ti/Cu를 사용한 경우(비교예 5) 및 NiCr/Ag를 사용한 경우(비교예 6)로 나누어 실험해보았다.When the base metal layer was used as only one type of Cu or NiCr as in Comparative Examples 2 and 3, except when Ni x Cr 1- x (x = 0.8) / Cu was used (Example 2), Ti / Cu The experiment was divided into the case of using (Comparative Example 5) and the case of using NiCr / Ag (Comparative Example 6).
질화알루미늄 기판에 대한 각각의 밀착강도를 하기 표 2에 나타내었다.Each adhesion strength to the aluminum nitride substrate is shown in Table 2 below.
구분division 두께thickness 실시예 2Example 2 비교예 5Comparative Example 5 비교예 6Comparative Example 6
베이스 금속층 1 Base metal layer 1 0.2㎛0.2 μm NixCr1 -x(x=0.8)Ni x Cr 1 -x (x = 0.8) TiTi NixCr1 -x(x=0.8)Ni x Cr 1 -x (x = 0.8)
베이스금속층 2Base metal layer 2 0.1㎛0.1 μm CuCu CuCu AgAg
Cu전해 도금Cu Electroplating 50㎛50 μm
평균 밀착강도(N/mm)Average adhesion strength (N / mm) 20.120.1 15.215.2 6.06.0
에칭가능성Etchability OO OO OO
상기 표 2에서 보는 바와 같이, 본 발명의 NiCr/Cu를 베이스 금속층으로 사용한 세라믹 기판은 질화알루미늄 기판에 대해서도 밀착강도가 우수함을 알 수 있었다. 한편, 종래의 Ti/Cu 베이스 금속층을 사용한 경우에는 밀착강도가 15.2N/mm로 알루미나 기판에서의 밀착강도보다는 좀 더 향상되었음을 알 수 있었지만, 여전히 불충분한 수준에 불과하였으며, NiCr/Ag 베이스 금속층을 사용한 경우에는 6.0N/mm로 알루미나 기판에 대한 밀착강도의 경우와 마찬가지로 불량하게 나타났다.As shown in Table 2, it was found that the ceramic substrate using NiCr / Cu of the present invention as the base metal layer has excellent adhesion strength to the aluminum nitride substrate. On the other hand, in the case of using the conventional Ti / Cu base metal layer, it was found that the adhesion strength was 15.2 N / mm more than the adhesion strength on the alumina substrate, but was still insufficient level, NiCr / Ag base metal layer In case of use, 6.0 N / mm was poor as in the case of adhesion strength to alumina substrate.
실시예 3-6 및 비교예 7-8: NiCr 베이스 금속층에서의 Ni 함량별 밀착강도 비교 Example 3-6 and Comparative Example 7-8 : Comparison of adhesion strength by Ni content in NiCr base metal layer
실시예 1과 같은 알루미나 기판을 사용하는 경우에 있어서 NiCr 베이스 금속층의 Ni 함량이 변화함에 따라 밀착강도가 어떻게 달라지는지를 한번 실험해보았다.In the case of using the same alumina substrate as in Example 1, the experiment was performed once how the adhesion strength changes as the Ni content of the NiCr base metal layer changes.
Ni:Cr의 중량비(Ni:Cr)를 70:30 내지 95:5의 범위 내로 하여 각각의 경우에서의 상기 밀착강도 및 TCT와 에칭 가능성 정도를 측정하였는데, 그 결과를 하기 표 3에 나타내었다.The adhesion strength, the TCT and the degree of etching possibility in each case were measured in a weight ratio of Ni: Cr (Ni: Cr) in the range of 70:30 to 95: 5, and the results are shown in Table 3 below.
구분division 비교예 7Comparative Example 7 실시예 3Example 3 실시예 4Example 4 실시예 5Example 5 실시예 6Example 6 비교예 8Comparative Example 8
Ni 함량(%)Ni content (%) 9595 9090 8888 8080 7575 7070
Cr 함량(%)Cr content (%) 55 1010 1212 2020 2525 3030
평균 밀착강도(N/mm)Average adhesion strength (N / mm) 88 1818 23.523.5 25.825.8 3232 3535
에칭 가능Etchable ××
TCT(회)TCT (times) 1010 9090 100100 150150 155155 160160
상기 표 3에서 보는 바와 같이 NiCr 베이스 금속층에서의 Ni의 함량이 75 내지 90중량%인 경우에서 밀착강도 및 TCT 결과도 우수하며 에칭도 가능함을 알 수 있었다. 밀착강도는 Cr의 함량에 비례하여 높아짐을 확인할 수 있었는데, 상기 비교예 8의 경우처럼 Cr 함량이 30중량%인 경우에는 패턴 형성 후 에칭 공정에서 잔류물이 남아있는 것을 확인하였다.As shown in Table 3, when the Ni content in the NiCr base metal layer was 75 to 90% by weight, the adhesion strength and the TCT result were excellent and the etching was also possible. The adhesion strength was found to be increased in proportion to the content of Cr. When the Cr content was 30% by weight, as in the case of Comparative Example 8, it was confirmed that the residue remained in the etching process after the pattern formation.
[부호의 설명][Description of the code]
100, 200, 300 세라믹 회로 기판100, 200, 300 ceramic circuit board
101, 201, 301 세라믹 기판101, 201, 301 ceramic substrate
102, 202, 302 베이스 금속층102, 202, 302 base metal layer
103, 203, 303 전도층103, 203, 303 conductive layer
304 Cu 와이어(금속박)304 Cu wire (metal foil)

Claims (18)

  1. 세라믹 기판;Ceramic substrates;
    상기 세라믹 기판 위에 형성되고 NiCr을 포함하는 베이스 금속층; 및A base metal layer formed on the ceramic substrate and including NiCr; And
    상기 베이스 금속층 위에 형성되는 전도층을 포함하고,A conductive layer formed on the base metal layer,
    상기 베이스 금속층의 Ni:Cr의 중량비는 90:10 내지 75:25인 세라믹 회로기판.The weight ratio of Ni: Cr of the base metal layer is 90:10 to 75:25.
  2. 청구항 1에 있어서,The method according to claim 1,
    상기 베이스 금속층은 NiCr을 포함하는 제1 금속층과, 제1 금속층 위에 형성되는 제2 금속층을 포함하는 것인 세라믹 회로기판.The base metal layer is a ceramic circuit board comprising a first metal layer including NiCr, and a second metal layer formed on the first metal layer.
  3. 청구항 2에 있어서,The method according to claim 2,
    상기 제2 금속층은 Cu를 포함하는 것인 세라믹 회로기판.The second metal layer is a ceramic circuit board containing Cu.
  4. 청구항 1에 있어서,The method according to claim 1,
    상기 세라믹 기판은 알루미나(Al2O3), 질화알루미늄(AlN), 질화규소(Si3N4) 및 탄화규소(SiC)로 이루어진 군으로부터 선택되는 하나 이상의 화합물로 이루어진 것인 세라믹 회로기판.The ceramic substrate is one or more compounds selected from the group consisting of alumina (Al 2 O 3 ), aluminum nitride (AlN), silicon nitride (Si 3 N 4 ) and silicon carbide (SiC).
  5. 청구항 1에 있어서,The method according to claim 1,
    상기 세라믹 기판은 비아홀이 복수개 구비되어 있는 세라믹 회로기판.The ceramic substrate is a ceramic circuit board is provided with a plurality of via holes.
  6. 청구항 2에 있어서,The method according to claim 2,
    상기 제1 금속층의 두께는 0.015 내지 0.2㎛ 범위 내인 세라믹 회로기판.The thickness of the first metal layer is a ceramic circuit board in the range of 0.015 to 0.2㎛.
  7. 청구항 2에 있어서,The method according to claim 2,
    상기 제2 금속층의 두께는 0.05 내지 0.5㎛ 범위 내인 세라믹 회로기판.The thickness of the second metal layer is a ceramic circuit board in the range of 0.05 to 0.5㎛.
  8. 청구항 1에 있어서,The method according to claim 1,
    상기 전도층은 Cu, Au, Ni 또는 Ag인 세라믹 회로기판.The conductive layer is a ceramic circuit board of Cu, Au, Ni or Ag.
  9. 청구항 1 내지 청구항 8 중 어느 한 항에 있어서,The method according to any one of claims 1 to 8,
    상기 세라믹 회로기판 상에 전자부품이 탑재되는 세라믹 회로기판.Ceramic circuit board on which the electronic component is mounted on the ceramic circuit board.
  10. 청구항 9에 있어서,The method according to claim 9,
    상기 전자부품은 발광 다이오드(LED)인 세라믹 회로기판.The electronic component is a light emitting diode (LED) ceramic circuit board.
  11. (i) 세라믹 기판 위에 Ni:Cr의 중량비가 95:05 내지 75:25인 NiCr을 포함하는 제1 금속층을 형성하는 단계;(i) forming a first metal layer comprising NiCr having a weight ratio of Ni: Cr of 95:05 to 75:25 on the ceramic substrate;
    (ii) 상기 제1 금속층 위에 제2 금속층을 형성하는 단계; 및(ii) forming a second metal layer over the first metal layer; And
    (iii) 상기 제2 금속층 위에 전도층을 형성하는 단계(iii) forming a conductive layer over the second metal layer
    를 포함하는 것인 세라믹 회로기판의 제조방법.Method of manufacturing a ceramic circuit board comprising a.
  12. 청구항 11에 있어서,The method according to claim 11,
    상기 세라믹 기판은 알루미나(Al2O3), 질화알루미늄(AlN), 질화규소(Si3N4) 및 탄화규소(SiC)로 이루어진 군으로부터 선택되는 하나 이상의 화합물로 이루어진 것인 세라믹 회로기판의 제조방법.The ceramic substrate is a method of manufacturing a ceramic circuit board made of at least one compound selected from the group consisting of alumina (Al 2 O 3 ), aluminum nitride (AlN), silicon nitride (Si 3 N 4 ) and silicon carbide (SiC). .
  13. 청구항 11에 있어서,The method according to claim 11,
    상기 세라믹 기판은 복수개의 비아홀이 형성되어 있는 것인 세라믹 회로기판의 제조방법.The ceramic substrate is a method of manufacturing a ceramic circuit board is a plurality of via holes are formed.
  14. 청구항 11에 있어서,The method according to claim 11,
    상기 제2 금속층은 Cu를 포함하는 것인 세라믹 회로기판의 제조방법.The second metal layer is a method of manufacturing a ceramic circuit board containing Cu.
  15. 청구항 11에 있어서,The method according to claim 11,
    상기 전도층은 Cu, Au, Ni 및 Ag로 이루어진 군으로부터 선택되는 하나 이상의 금속을 포함하는 것인 세라믹 회로기판의 제조방법.The conductive layer is a method of manufacturing a ceramic circuit board comprising at least one metal selected from the group consisting of Cu, Au, Ni and Ag.
  16. 청구항 11에 있어서,The method according to claim 11,
    상기 제1 금속층 및 제2 금속층 중 적어도 어느 하나는 스퍼터링법, 인쇄법 및 화학도금법으로 이루어진 군으로부터 선택되는 방법에 의해서 형성되는 것인 세라믹 회로기판의 제조방법.At least one of the first metal layer and the second metal layer is formed by a method selected from the group consisting of a sputtering method, a printing method and a chemical plating method.
  17. 청구항 13에 있어서,The method according to claim 13,
    상기 제1 금속층 및 제2 금속층 중 적어도 어느 하나는 DC 스퍼터링법으로 형성되는 세라믹 회로기판의 제조방법.At least one of the first metal layer and the second metal layer is formed by a DC sputtering method.
  18. 청구항 11에 있어서,The method according to claim 11,
    상기 제1 금속층의 두께는 0.015 내지 0.2㎛ 범위 내이며, 상기 제2 금속층의 두께는 0.05 내지 0.5㎛ 범위 내인 세라믹 회로기판의 제조방법.The thickness of the first metal layer is in the range of 0.015 to 0.2㎛, the thickness of the second metal layer is a method of manufacturing a ceramic circuit board in the range of 0.05 to 0.5㎛.
PCT/KR2016/009704 2015-10-16 2016-08-31 Ceramic circuit board and manufacturing method therefor WO2017065407A1 (en)

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JPH08255973A (en) * 1995-03-17 1996-10-01 Toshiba Corp Ceramic circuit board
KR101101574B1 (en) * 2009-09-18 2012-01-02 삼성전기주식회사 Ceramic substrate and manufacturing method thereof
JP2012250284A (en) * 2011-05-31 2012-12-20 Ixys Semiconductor Gmbh Method for joining metal-ceramic substrate to metal body
JP2015030658A (en) * 2013-08-07 2015-02-16 京セラ株式会社 Joint body of ceramic body with metal body and method for joining ceramic body with metal body
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