WO2017033428A1 - Dispositif de conversion de puissance - Google Patents

Dispositif de conversion de puissance Download PDF

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Publication number
WO2017033428A1
WO2017033428A1 PCT/JP2016/003691 JP2016003691W WO2017033428A1 WO 2017033428 A1 WO2017033428 A1 WO 2017033428A1 JP 2016003691 W JP2016003691 W JP 2016003691W WO 2017033428 A1 WO2017033428 A1 WO 2017033428A1
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Prior art keywords
circuit
current
value
inverter circuit
voltage
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PCT/JP2016/003691
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English (en)
Japanese (ja)
Inventor
智規 伊藤
祐輔 岩松
後藤　周作
賢治 花村
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パナソニックＩｐマネジメント株式会社
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Publication of WO2017033428A1 publication Critical patent/WO2017033428A1/fr

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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode

Definitions

  • the present invention relates to a power conversion device that converts DC power into AC power.
  • an inverter circuit using a bridge circuit In many of the power conversion devices that convert DC power into AC power, an inverter circuit using a bridge circuit is used.
  • a bridge circuit two or three switching elements (arms) connected in series are connected in parallel to a high-side reference line and a low-side reference line connected to a DC power supply, and are operated in a complementary manner. Generate AC power.
  • the switching element for example, an IGBT (Insulated Gate Bipolar Transistor), a MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor), or the like is used (see, for example, Patent Document 1).
  • the dead time compensation methods are roughly classified into a feed forward compensation method based on current detection and a feedback compensation method based on voltage detection.
  • the polarity of the current that flows during the dead time period is detected from the phase of the output current, and the compensation value corresponding to the detected polarity is applied to the voltage command value for driving the inverter circuit. to add.
  • the size can be reduced.
  • the polarity detection unit easily malfunctions due to the current waveform and the offset of the current detector.
  • the output voltage of the inverter circuit is detected and compared with the drive signal of the inverter circuit to compensate the voltage command value.
  • this method can perform highly accurate compensation, a voltage detection unit that detects the output voltage of the inverter circuit is required.
  • the present invention has been made in view of such circumstances, and an object of the present invention is to provide a power conversion device capable of compensating for an error generated by power conversion using an inverter circuit with high accuracy while suppressing a circuit scale.
  • a power conversion device includes an inverter circuit that converts DC power into AC power and a reactor, and attenuates high-frequency components of AC power output from the inverter circuit.
  • a filter circuit ; a current detection circuit that detects a current flowing through the reactor; and a control circuit that generates a drive signal for the inverter circuit based on a voltage command value.
  • the control circuit estimates the output voltage of the inverter circuit before passing through the filter circuit based on the current detected by the current detection circuit, and the estimated output voltage of the inverter circuit is supplied to the inverter circuit.
  • the voltage command value is corrected based on the relationship with the drive signal.
  • FIG. 1 is a diagram for explaining a configuration of a power conversion device 20 according to Embodiment 1 of the present invention.
  • the power converter 20 converts the DC power supplied from the DC power supply 10 into AC power and causes the system 30 to reversely flow.
  • An AC load may be connected instead of the system 30.
  • the DC power supply 10 is, for example, a solar cell or a fuel cell.
  • the power conversion device 20 functions as a power conditioner that converts DC power generated by the solar cell or fuel cell into AC power.
  • the inverter circuit 22 converts DC power supplied from the DC power supply 10 into AC power.
  • FIG. 1 shows an example in which the inverter circuit 22 is configured by a full bridge circuit.
  • the full bridge circuit includes a first arm in which the first switching element S1 and the second switching element S2 are connected in series, and a second arm in which the third switching element S3 and the fourth switching element S4 are connected in series. The arm and the second arm are connected in parallel. AC power is output from the midpoint N1 of the first arm and the midpoint N2 of the second arm.
  • IGBTs can be used for the first switching element S1 to the fourth switching element S4.
  • the first free-wheeling diode D1 to the fourth free-wheeling diode D4 are respectively connected in parallel to the first switching element S1 to the fourth switching element S4 in the reverse direction.
  • MOSFETs Metal-Oxide-Semiconductor-Field-Effect-Transistors
  • the first free-wheeling diode D1 to the fourth free-wheeling diode D4 can use parasitic diodes formed in the direction from the source to the drain.
  • FIG. 2 is a diagram for explaining a dead time error generated in the inverter circuit 22.
  • the drive signal Vg PWM signal
  • the gate voltage Vs1 of the first switching element S1 is at a high level and the gate voltage Vs2 of the second switching element S2 is at a low level.
  • the drive signal Vg transitions from the high level to the low level, the first switching element S1 is immediately turned off, but the second switching element S2 is turned on after the dead time Td has elapsed.
  • Td a negative current flows through the first free-wheeling diode D1.
  • a component obtained by multiplying this current by half the voltage of the DC power supply 10 is an error component (see the hatched portion of the midpoint voltage Vn1 (negative current)). Since this error component acts in the direction of decreasing the output power of the inverter circuit 22, it is necessary to estimate the error component and add it to the input power of the inverter circuit 22 in order to compensate for the error component.
  • the gate voltage Vs1 of the first switching element S1 is at a low level
  • the gate voltage Vs2 of the second switching element S2 is at a high level.
  • the second switching element S2 is immediately turned off, but the first switching element S1 is turned on after the dead time Td has elapsed.
  • a current in the positive direction flows through the second free-wheeling diode D2 during the dead time Td.
  • a component obtained by multiplying this current by half the voltage of the DC power supply 10 is an error component (see the hatched portion of the midpoint voltage Vn1 (positive current)). Since this error component acts to increase the output power of the inverter circuit 22, in order to compensate for the error component, it is necessary to estimate the error component and remove it from the input power of the inverter circuit 22.
  • the filter circuit 23 includes a first reactor L1, a second reactor L2, and a second capacitor C2.
  • the filter circuit 23 attenuates the harmonic component of the AC power output from the inverter circuit 22, and the output voltage and output current of the inverter circuit 22 are reduced. Move closer to a sine wave. The AC power output from the filter circuit 23 flows backward to the system 30.
  • the DC voltage detection circuit 24 detects the input voltage of the inverter circuit 22 and outputs it to the control circuit 27.
  • the current detection circuit 25 detects the alternating current that flows from the inverter circuit 22 and flows through the first reactor L1 using the current sensor CT, and outputs the detected current to the control circuit 27.
  • the AC voltage detection circuit 26 detects the AC voltage output from the inverter circuit 22 and passed through the filter circuit 23 and outputs the AC voltage to the control circuit 27.
  • the control circuit 27 generates a drive signal for the inverter circuit 22 based on the voltage command value, and supplies the drive signal to the inverter circuit 22.
  • a PWM signal is generated as a drive signal and supplied to the gate terminals of the first switching element S1 to the fourth switching element S4.
  • the output power of the inverter circuit 22 can be increased by increasing the duty ratio of the PWM signal, and the output power of the inverter circuit 22 can be decreased by decreasing the duty ratio of the PWM signal.
  • control circuit 27 estimates the output voltage of the inverter circuit 22 before passing through the filter circuit 23 based on the current detected by the current detection circuit 25, and the estimated output voltage of the inverter circuit 22 and the inverter The voltage command value is corrected based on the relationship with the drive signal supplied to the circuit 22. This will be specifically described below.
  • the control circuit 27 includes a first subtractor 27a, a first compensator 27b, a first adder 27c, a second adder 27d, a drive signal generator 27e, a first multiplier 27f, a second subtractor 27g, and a first division. Part 27h and a third subtracting part 27i.
  • the configuration of the control circuit 27 can be realized by cooperation of hardware resources and software resources, or only by hardware resources.
  • hardware resources analog elements, microcomputers, DSPs, ROMs, RAMs, FPGAs, and other LSIs can be used.
  • Firmware and other programs can be used as software resources.
  • First subtracting unit 27a subtracts the current value I L that is detected by the current detecting circuit 25 from the target current value Iref.
  • First compensator 27b based on the deviation between the target current value Iref and the current value I L, and generates a voltage command value Vref by PI compensation or P compensation.
  • the first adder 27c adds the voltage obtained by dividing the AC voltage value Vout detected by the AC voltage detection circuit 26 by the DC voltage value Vdc detected by the DC voltage detection circuit 24 to the voltage command value Vref. Compensates for disturbance components due to system voltage.
  • the second adder 27d adds the dead time error component compensation value to the voltage command value Vref to generate a voltage command value Vref ′ after dead time error compensation.
  • the drive signal generator 27e generates a drive signal Vg for the inverter circuit 22 based on the voltage command value Vref ′ after dead time error compensation.
  • the drive signal generation unit 27e includes, for example, a comparator to which the voltage command value Vref 'and a triangular wave carrier signal are input.
  • the comparator outputs a PWM signal corresponding to the comparison result between the voltage command value Vref ′ and the carrier signal.
  • the PWM signal is input to the gate terminals of the first switching element S1 and the fourth switching element S4 of the inverter circuit 22, and the signal having the opposite phase to the phase of the PWM signal is the gate of the second switching element S2 and the third switching element S3. Input to the terminal.
  • the PWM signal is a signal that defines the duty ratio of the first switching element S1 to the fourth switching element S4, and is also output to the third subtraction unit 27i.
  • the first multiplication unit 27f is the current value I L that is detected by the current detection circuit 25, by multiplying the reactance of the first reactor L1, estimates the voltage across the first reactor L1.
  • the second subtraction unit 27g subtracts the voltage across the first reactor L1 from the AC voltage value Vout (output voltage of the first reactor L1) detected by the AC voltage detection circuit 26, and outputs the output voltage value of the inverter circuit 22. (Input voltage of the first reactor L1) is estimated.
  • the first multiplication unit 27f and the second subtraction unit 27g function as a voltage estimation unit that estimates the output voltage (including the dead time error component) of the inverter circuit 22.
  • the first divider 27h divides the estimated output voltage of the inverter circuit 22 (including the dead time error component) by the DC voltage value Vdc detected by the DC voltage detection circuit 24 to estimate the output voltage of the inverter circuit 22.
  • a duty value corresponding to the value (including the dead time error component) is calculated.
  • the third subtractor 27i subtracts the duty value including the dead time error component supplied from the first divider 27h from the duty value not including the dead time error component of the inverter circuit 22 supplied from the drive signal generator 27e. By doing so, the dead time error component compensation value is estimated.
  • the third subtractor 27i outputs the calculated dead time error component compensation value to the second adder 27d.
  • the second addition unit 27d corrects the voltage command value Vref ′ by adding the dead time error component compensation value to the voltage command value Vref.
  • FIG. 3 is a diagram for explaining the configuration of the power conversion device 20 according to the comparative example.
  • the comparative example is an example in which an actual measurement value is used for the output voltage value (including the dead time error component) of the inverter circuit 22.
  • an AC voltage detection circuit 28 that detects an output voltage value (including a dead time error component) of the inverter circuit 22 before passing through the filter circuit 23 is additionally provided.
  • the output voltage value (including the dead time error component) of inverter circuit 22 is estimated from the output current of inverter circuit 22 by calculation.
  • the AC voltage detection circuit 28 is not necessary.
  • the power conversion using the inverter circuit 22 is performed without providing the AC voltage detection circuit 28 for detecting the output voltage of the inverter circuit 22 before passing through the filter circuit 23.
  • the generated error component can be compensated by feedback control based on voltage detection.
  • the feedback compensation method based on voltage detection has higher compensation accuracy than the feedforward compensation method based on current detection, the power conversion device 20 according to the first embodiment has a highly accurate dead time while suppressing the circuit scale.
  • the error component can be compensated.
  • FIG. 4 is a diagram for explaining the configuration of the power conversion device 20 according to the second embodiment of the present invention.
  • a dead time error component compensation value is calculated by digital signal processing using a processor such as a microcomputer or DSP. Since digital signal processing is discretely performed according to the clock frequency, a control delay occurs. Specifically, the dead time error component compensation value is calculated based on the current value detected at time (n ⁇ 1), and the voltage command value at time n is corrected.
  • the current value detected by the current detection circuit 25 is an alternating current value, it changes in a sine wave shape. Therefore, strictly speaking, the current value detected at time (n ⁇ 1) is different from the current value detected at time n. The same argument applies to the voltage value detected by the AC voltage detection circuit 26.
  • a compensation method that takes into account an error due to a control delay caused by the digital signal processing is realized.
  • the control circuit 27 includes a first subtraction unit 27a, a first compensation unit 27b, a first addition unit 27c, a second addition unit 27d, a drive signal generation unit 27e, a predicted current calculation unit 27j, and an error component compensation.
  • a value calculation unit 27k is included.
  • the predicted current calculation unit 27j predicts a current value ahead of one control cycle (hereinafter referred to as “step”) from the current current value detected by the current detection circuit 25.
  • the prediction method is not particularly limited.
  • the current phase may be detected, the amplitude may be calculated from the current current value and phase, and the current value one step ahead may be estimated from the amplitude and the phase one step ahead.
  • the error component compensation value calculator 27k estimates the output voltage value (including the dead time error component) of the inverter circuit 22 one step ahead based on the output current estimated value of the inverter circuit 22 one step ahead. This estimation operation generates a delay time for one step.
  • the error component compensation value calculation unit 27k is based on the output voltage estimated value (including the dead time error component) of the inverter circuit 22 delayed by this one step time and the input voltage estimated value of the inverter circuit 22 at that time. An error component generated by power conversion using the inverter circuit 22 is estimated, and a compensation value thereof is calculated. Other processes are the same as those of the first embodiment.
  • FIG. 5 is a signal flow diagram of power conversion device 20 according to Embodiment 2 of the present invention.
  • the first subtraction unit 27a subtracts the current value I L (n ⁇ 1) detected by the current detection circuit 25 from the target current value Iref (n).
  • First compensator 27b based on the deviation between the target current value Iref (n) and the current value I L (n-1), and generates a voltage command value Vref by PI compensation or P compensation (n).
  • the AC voltage value Vout (n) detected by the AC voltage detection circuit 26 is delayed by a processing time for one step by the first delay unit 27l.
  • the second division unit 27m divides the AC voltage value Vout (n ⁇ 1) delayed by the processing time for one step by the first delay unit 27l by the DC voltage value Vdc detected by the DC voltage detection circuit 24. Generate a voltage value.
  • the first adder 27c adds a voltage value obtained by dividing the AC voltage value Vout (n ⁇ 1) by the DC voltage value Vdc to the voltage command value Vref [n] to compensate for a disturbance component due to the system voltage.
  • the fourth subtracting unit 27n subtracts an error compensation value ⁇ ⁇ Vnoise (n) / Vdc for compensating an error component generated in the inverter circuit 22 from the voltage command value Vref (n).
  • ⁇ ⁇ Vnoise (n ⁇ 1) indicates a predicted value of an error voltage component that is estimated at time (n ⁇ 1) and is generated in the inverter circuit 22 at time n.
  • the fourth subtractor 27n outputs the voltage command value after error component compensation to the second multiplier 22a and the error component compensation value calculator 27k as the duty value duty (n).
  • the second multiplier 22a multiplies the duty value duty (n) and the DC voltage value Vdc to calculate the output voltage value Vinv (n) of the inverter circuit 22 (not including the error component ⁇ Vnoise (n)).
  • the third adder 22b adds an error component ⁇ Vnoise (n) generated by power conversion using the inverter circuit 22 to the output voltage value Vinv (n) of the inverter circuit 22 calculated by the second multiplier 22a.
  • the processing of the second multiplier 22a and the third adder 22b represents power conversion by the inverter circuit 22 of FIG.
  • the second subtraction unit 27g subtracts the AC voltage value Vout (n) detected by the AC voltage detection circuit 26 from the output voltage value Vinv ′ (n) (including the error component ⁇ Vnoise (n)) of the inverter circuit 22. .
  • the third multiplier L1a multiplies the both-ends voltage V L (n) of the first reactor L1 by the reactance of the first reactor L1, and calculates the predicted current value I L (n) of the first reactor L1.
  • the second delay unit 27ka outputs the current value I L (n ⁇ 1) of the first reactor L1 obtained by delaying the current value I L (n) of the first reactor L1 by a processing time for one step.
  • the processing of the second delay unit 27ka represents an operation delay by the processor.
  • the reactance of the first reactor L1 is expressed as a function of the z conversion region.
  • the predicted current calculation unit 27j calculates a current value ⁇ I L (n) one step ahead from the current value I L (n-1) of the first reactor L1 by a prediction calculation.
  • the error component compensation value calculator 27k calculates an error compensation value ⁇ ⁇ Vnoise (n-1) / Vdc based on the current value ⁇ I L (n) and the duty value duty (n) one step ahead.
  • the current value I L (n) of the first reactor L1, which is the output current value of the inverter circuit 22, can be defined by the following (formula 1).
  • I L (n) (Vinv (n) + ⁇ Vnoise (n) ⁇ Vout (n)) ⁇ 1 / (z ⁇ 1) ⁇ Ts / L) (Equation 1)
  • the error component ⁇ Vnoise (n) generated in the inverter circuit 22 can be defined by the following (formula 2).
  • ⁇ Vnoise (n) (Vout (n) + (z ⁇ 1) ⁇ L / Ts ⁇ I L (n)) ⁇ Vinv (n) (Formula 2)
  • the predicted value ⁇ ⁇ Vnoise (n) of the error component is calculated by the following (Expression 3) using the predicted current value ⁇ I L (n) one step ahead from the above (Expression 2).
  • ⁇ ⁇ Vnoise (n) ( Vout (n-1) + L / Ts ( ⁇ I L (n) -I L (n-1))) - Vinv (n-1) ... ( Equation 3)
  • the output voltage value Vinv (n ⁇ 1) (not including the error component ⁇ Vnoise (n ⁇ 1)) of the inverter circuit 22 in the above (Equation 3) is the duty value duty (n ⁇ 1) and the DC voltage value Vdc (n ⁇ It can be calculated by multiplying by 1).
  • the error component ⁇ Vnoise (n) is compensated by previously subtracting the error component compensation value ⁇ Vnoise (n) / Vdc calculated by the error component compensation value calculating unit 27k from the duty value duty (n).
  • the current value before the delay is estimated by performing the prediction calculation in consideration of the control delay with respect to the current value delayed due to the control delay of the digital signal processing by the processor. .
  • the dead time error voltage is estimated and corrected to correct the drive signal.
  • FIG. 6 is a diagram for explaining the configuration of the power conversion device 20 according to the third embodiment of the present invention.
  • the power conversion device 20 according to the third embodiment has a configuration in which a clamp circuit 29 is added to the power conversion device 20 according to the second embodiment shown in FIG.
  • the clamp circuit 29 is provided between the inverter circuit 22 and the filter circuit 23, can short-circuit between the AC output terminals (N1, N2) of the inverter circuit 22, and can switch the conduction direction at the time of the short-circuit.
  • the clamp circuit 29 is connected between the AC output terminals (N1, N2) of the inverter circuit 22 with the fifth switching element S5 and the sixth switching element S6 connected in series in opposite directions.
  • IGBTs are used for the fifth switching element S5 and the sixth switching element S6, the emitter terminal of the fifth switching element S5 is connected to the first output line of the inverter circuit 22, and the sixth switching element S6 Are connected to the second output line of the inverter circuit 22.
  • the collector terminals of the fifth switching element S5 and the sixth switching element S6 are connected.
  • a fifth free-wheeling diode D5 is connected in parallel with the fifth switching element S5 in a direction in which current flows from the emitter to the collector, and in parallel with the sixth switching element S6, in the direction in which current flows in the direction from the emitter to the collector.
  • a 6-return diode D6 is connected. Therefore, when the fifth switching element S5 is in the on state and the sixth switching element S6 is in the off state, a current flows only in the direction from the second output line to the first output line, and the fifth switching element S5 is in the off state and the sixth switching element. When S6 is on, current flows only from the first output line to the second output line.
  • FIG. 7 is a diagram for explaining the operation of the power conversion device 20 according to the third embodiment of the present invention.
  • the PWM control in which the first switching element S1 and the fourth switching element S4 are repeatedly turned on and off is performed, the second switching element S2 and the fourth switching element S4 are controlled to be in the off state, and the fifth switching element S5 Is controlled to be in an on state, and the sixth switching element S6 is controlled to be in an off state.
  • the positive voltage + E is output to the filter circuit 23 while the first switching element S1 and the fourth switching element S4 are on. During the period when the first switching element S1 and the third switching element S3 are off, the current based on the energy accumulated in the filter circuit 23 circulates through the clamp circuit 29, so that the input voltage and the output voltage of the filter circuit 23 are both It becomes zero.
  • PWM control is performed in which the second switching element S2 and the third switching element S3 are repeatedly turned on and off, the first switching element S1 and the fourth switching element S4 are controlled to be in the off state, and the fifth switching element S5 Is controlled to be in the off state, and the sixth switching element S6 is controlled to be in the on state.
  • the negative voltage ⁇ E is output to the filter circuit 23 while the second switching element S2 and the third switching element S3 are on. During the period when the second switching element S2 and the third switching element S3 are off, the current based on the energy accumulated in the filter circuit 23 circulates through the clamp circuit 29, so that both the input voltage and the output voltage of the filter circuit 23 are It becomes zero.
  • the filter circuit 23 generates a sine wave (see dotted line) based on the three levels of positive voltage + E, zero, and negative voltage ⁇ E.
  • current distortion due to dead time increases near the zero crossing (see symbol R). Therefore, in the current method in which the current polarity is determined and the feed forward compensation is performed, the compensation accuracy is lowered.
  • the present invention is effective for application to a three-level inverter in which the absolute value of current becomes small near the zero cross and the erroneous determination of polarity is likely to occur. Similarly, it is also effective for application to a unipolar modulation system in which the absolute value of current becomes small near the zero cross of the system voltage. Further, current distortion caused by dead time that stands out in the vicinity of the zero crossing can be suppressed.
  • FIG. 8 is a diagram for explaining the configuration of the power conversion device 20 according to the fourth embodiment of the present invention.
  • Embodiment 4 is an example applied to current control of a single-phase grid-connected inverter using rotational coordinate transformation. Since the configuration other than the control circuit 27 of the power conversion device 20 according to the fourth embodiment is the same as that of the power conversion device 20 according to the first embodiment, the description thereof is omitted.
  • control circuit 27 includes a first rotation coordinate conversion unit 27o, a second rotation coordinate conversion unit 27p, a d-axis subtraction unit 27q, a q-axis subtraction unit 27r, a d-axis compensation unit 27s, a q-axis compensation unit 27t, A d-axis addition unit 27u, a q-axis addition unit 27v, a reverse rotation coordinate conversion unit 27w, a second addition unit 27d, a drive signal generation unit 27e, a predicted current calculation unit 27j, and an error component compensation value calculation unit 27k are included.
  • First rotating coordinate transformation unit 27o is the current value I L that is detected by the current detection circuit 25, by rotating the coordinate transformation the phase ⁇ of the system voltage as the rotation angle of the d-axis component current value Iout d and q-axis component
  • the current value Iout q (reactive current value) is calculated.
  • the second rotation coordinate conversion unit 27p converts the voltage value Vout detected by the AC voltage detection circuit 26 into rotation coordinates using the phase ⁇ of the system voltage as a rotation angle, and converts the voltage value Vout d of the d-axis component and the q-axis component.
  • the voltage value Vout q is calculated.
  • the d-axis subtraction unit 27q subtracts the d-axis component current value Iout d from the d-axis component target current value Iref d.
  • the q-axis subtractor 27r subtracts the q-axis component current value Iout q from the q-axis component target current value Iref q.
  • the d-axis compensation unit 27s generates a voltage command value Vrefd for the d-axis component by PI compensation or P-compensation based on the deviation between the target current value Iref d for the d-axis component and the current value Iout d for the d-axis component. To do.
  • the q-axis compensation unit 27t generates a voltage command value Vref q for the q-axis component by PI compensation or P-compensation based on the deviation between the target current value Iref q for the q-axis component and the current value Iout q for the q-axis component. To do.
  • the d-axis addition unit 27u adds the d-axis component voltage value Vout d to the d-axis component voltage command value Vref d.
  • the q-axis addition unit 27v adds the q-axis component voltage value Vout q to the q-axis component voltage command value Vref q.
  • the reverse rotation coordinate conversion unit 27w performs reverse rotation coordinate conversion of the voltage command value Vref d of the d-axis component and the voltage command value Vref q of the q-axis component after system voltage compensation to calculate the voltage command value Vref of the stationary coordinate system. To do.
  • the second adder 27d adds the dead time error component compensation value ⁇ ⁇ Vnoise (n) / Vdc to the voltage command value Vref to generate a voltage command value Vref ′ after dead time error compensation.
  • Other processes are the same as those described in the second embodiment.
  • power factor control and reactive power injection can be performed by independently controlling the d-axis component and the q-axis component.
  • the reverse rotation coordinate conversion is performed.
  • the compensation value is added to the subsequent voltage command value Vref. This simplifies the configuration and reduces the amount of calculation.
  • the PWM signal is assumed as the drive signal Vg of the first switching element S1 to the fourth switching element S4 included in the inverter circuit 22, but the duty ratio may be controlled using the phase shift signal.
  • the present compensation technique is a power that converts DC power into three-phase AC power. It can also be applied to a conversion device.
  • the control circuit (27) outputs the m (m is a natural number) step ahead of the inverter circuit (22) based on the current value (I L [nm]) detected by the current detection circuit (25).
  • the power converter (20) according to item 1, wherein the voltage (Vinv ′ [n]) is estimated and the voltage command value (Vref [n]) of m steps ahead is corrected. Thereby, it is possible to compensate for a control deviation between the current at the time of detection and the current at the time of error component compensation.
  • a clamp circuit (29) capable of short-circuiting between AC output terminals of the inverter circuit (22) is further provided between the inverter circuit (22) and the filter circuit (23), 3.
  • the control circuit (27) generates the voltage command value in accordance with a deviation between the current detected by the current detection circuit (25) and a target current. Power conversion device (20). According to this, the output current can be stabilized.
  • the control circuit (27) A rotational coordinate conversion unit (27o) for calculating a current value of a d-axis component and a current value of a q-axis component by performing rotational coordinate conversion on the current detected by the current detection circuit (25); A d-axis compensator (27s) that generates a d-axis component voltage command value based on a deviation between the d-axis component target current value and the d-axis component current value calculated by the rotating coordinate converter (27o).
  • a q-axis compensator (27t) that generates a voltage command value for the q-axis component based on the deviation between the q-axis component target current value and the q-axis component current value calculated by the rotating coordinate converter (27o).
  • a reverse rotation coordinate conversion unit (27w) that performs reverse rotation coordinate conversion of the voltage command value of the d-axis component and the voltage command value of the q-axis component to calculate a voltage command value of a stationary coordinate system
  • a compensation value adding unit (27d) for adding a compensation value of an error component generated in the inverter circuit (22) to the voltage command value of the stationary coordinate system; 5.
  • the power conversion device according to any one of items 1 to 4, wherein the power conversion device includes: According to this, the error component of the inverter using the rotation coordinate transformation can be compensated with high accuracy.
  • the present invention can be used for a solar cell power conditioner and the like.

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  • Inverter Devices (AREA)

Abstract

Cette invention concerne un circuit onduleur (22) qui convertit une puissance en CC en une puissance en CA. Un circuit filtrant (23) comprend une bobine réactive (L1), et atténue la composante haute fréquence de la puissance en CA délivrée en sortie par le circuit onduleur (22). Une unité de détection de courant (25) détecte le courant traversant la bobine réactive (L1). Un circuit de commande (27) génère un signal d'excitation du circuit onduleur (22) sur la base d'une valeur de commande de tension. Sur la base du courant détecté par le circuit de détection de courant (25), le circuit de commande (27) estime la tension de sortie du circuit onduleur (22) avant le passage à travers le circuit filtrant (23), et corrige la valeur de commande de tension sur la base de la relation entre la tension de sortie estimée du circuit onduleur (22) et le signal d'excitation fourni au circuit onduleur (22).
PCT/JP2016/003691 2015-08-27 2016-08-10 Dispositif de conversion de puissance WO2017033428A1 (fr)

Applications Claiming Priority (2)

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JP2015168210A JP2017046500A (ja) 2015-08-27 2015-08-27 電力変換装置
JP2015-168210 2015-08-27

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WO2017033428A1 true WO2017033428A1 (fr) 2017-03-02

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115776262A (zh) * 2023-02-13 2023-03-10 中国科学院宁波材料技术与工程研究所 轮缘电机死区动态补偿方法、补偿系统及轮缘电机系统

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6376239B1 (ja) * 2017-04-12 2018-08-22 株式会社明電舎 電力変換回路の制御装置
JP7237747B2 (ja) * 2019-06-18 2023-03-13 シャープ株式会社 インバータ装置

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010268583A (ja) * 2009-05-13 2010-11-25 Shindengen Electric Mfg Co Ltd インバータ
JP2014176253A (ja) * 2013-03-12 2014-09-22 Aisin Seiki Co Ltd 電力変換装置

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010268583A (ja) * 2009-05-13 2010-11-25 Shindengen Electric Mfg Co Ltd インバータ
JP2014176253A (ja) * 2013-03-12 2014-09-22 Aisin Seiki Co Ltd 電力変換装置

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115776262A (zh) * 2023-02-13 2023-03-10 中国科学院宁波材料技术与工程研究所 轮缘电机死区动态补偿方法、补偿系统及轮缘电机系统

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