WO2017033428A1

WO2017033428A1 - Power conversion device

Info

Publication number: WO2017033428A1
Application number: PCT/JP2016/003691
Authority: WO
Inventors: 智規伊藤; 祐輔岩松; 後藤　周作; 賢治花村
Original assignee: パナソニックＩｐマネジメント株式会社
Priority date: 2015-08-27
Filing date: 2016-08-10
Publication date: 2017-03-02
Also published as: JP2017046500A

Abstract

An inverter circuit 22 converts DC power into AC power. A filter circuit 23 has a reactor L1, and attenuates the high-frequency component of AC power outputted by the inverter circuit 22. A current detection circuit 25 detects the current flowing through the reactor L1. A control circuit 27 generates a drive signal of the inverter circuit 22 on the basis of a voltage command value. On the basis of the current detected by the current detection circuit 25, the control circuit 27 estimates the output voltage of the inverter circuit 22 prior to passage through the filter circuit 23, and corrects the voltage command value on the basis of the relation between the estimated output voltage of the inverter circuit 22 and the drive signal supplied to the inverter circuit 22.

Description

Power converter

The present invention relates to a power conversion device that converts DC power into AC power.

In many of the power conversion devices that convert DC power into AC power, an inverter circuit using a bridge circuit is used. In a bridge circuit, two or three switching elements (arms) connected in series are connected in parallel to a high-side reference line and a low-side reference line connected to a DC power supply, and are operated in a complementary manner. Generate AC power. As the switching element, for example, an IGBT (Insulated Gate Bipolar Transistor), a MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor), or the like is used (see, for example, Patent Document 1).

When the two switching elements composing the arm are simultaneously turned on, a through current flows and power consumption increases. Therefore, a dead time is inserted when the high-side switching element and the low-side switching element are switched on / off (see FIG. 2 described later). When the current is in the positive direction, the free-wheeling diode connected in parallel to the low-side switching element becomes conductive during the dead time period inserted when the high-side switching element is turned on. At that time, a negative voltage that is half the DC power supply voltage is output as a phase voltage. On the other hand, when the current is in the negative direction, the free-wheeling diode connected in parallel to the high-side switching element becomes conductive during the dead time period inserted when the low-side switching element is turned on. At that time, a positive voltage that is half the DC power supply voltage is output as a phase voltage.

Since dead time appears as an error component in the output voltage of the inverter circuit, it is necessary to compensate for the error component. The dead time compensation methods are roughly classified into a feed forward compensation method based on current detection and a feedback compensation method based on voltage detection.

Japanese Patent Laying-Open No. 2015-77061

In the feedforward compensation method based on current detection, the polarity of the current that flows during the dead time period is detected from the phase of the output current, and the compensation value corresponding to the detected polarity is applied to the voltage command value for driving the inverter circuit. to add. In this method, since it is easy to make software, the size can be reduced. However, there is a problem that the polarity detection unit easily malfunctions due to the current waveform and the offset of the current detector.

In the feedback compensation method based on voltage detection, the output voltage of the inverter circuit is detected and compared with the drive signal of the inverter circuit to compensate the voltage command value. Although this method can perform highly accurate compensation, a voltage detection unit that detects the output voltage of the inverter circuit is required.

The present invention has been made in view of such circumstances, and an object of the present invention is to provide a power conversion device capable of compensating for an error generated by power conversion using an inverter circuit with high accuracy while suppressing a circuit scale.

In order to solve the above-described problem, a power conversion device according to an aspect of the present invention includes an inverter circuit that converts DC power into AC power and a reactor, and attenuates high-frequency components of AC power output from the inverter circuit. A filter circuit; a current detection circuit that detects a current flowing through the reactor; and a control circuit that generates a drive signal for the inverter circuit based on a voltage command value. The control circuit estimates the output voltage of the inverter circuit before passing through the filter circuit based on the current detected by the current detection circuit, and the estimated output voltage of the inverter circuit is supplied to the inverter circuit. The voltage command value is corrected based on the relationship with the drive signal.

It should be noted that any combination of the above-described constituent elements and a representation obtained by converting the expression of the present invention between a method, an apparatus, a system, and the like are also effective as an aspect of the present invention.

According to the present invention, errors generated by power conversion using an inverter circuit can be compensated with high accuracy while suppressing the circuit scale.

It is a figure for demonstrating the structure of the power converter device which concerns on Embodiment 1 of this invention. It is a figure for demonstrating the dead time error which generate | occur | produces in an inverter circuit. It is a figure for demonstrating the structure of the power converter device which concerns on a comparative example. It is a figure for demonstrating the structure of the power converter device which concerns on Embodiment 2 of this invention. It is a signal flow figure of the power converter device which concerns on Embodiment 2 of this invention. It is a figure for demonstrating the structure of the power converter device which concerns on Embodiment 3 of this invention. It is a figure for demonstrating operation | movement of the power converter device which concerns on Embodiment 3 of this invention. It is a figure for demonstrating the structure of the power converter device which concerns on Embodiment 4 of this invention.

FIG. 1 is a diagram for explaining a configuration of a power conversion device 20 according to Embodiment 1 of the present invention. The power converter 20 converts the DC power supplied from the DC power supply 10 into AC power and causes the system 30 to reversely flow. An AC load may be connected instead of the system 30. The DC power supply 10 is, for example, a solar cell or a fuel cell. In this case, the power conversion device 20 functions as a power conditioner that converts DC power generated by the solar cell or fuel cell into AC power.

The inverter circuit 22 converts DC power supplied from the DC power supply 10 into AC power. FIG. 1 shows an example in which the inverter circuit 22 is configured by a full bridge circuit. The full bridge circuit includes a first arm in which the first switching element S1 and the second switching element S2 are connected in series, and a second arm in which the third switching element S3 and the fourth switching element S4 are connected in series. The arm and the second arm are connected in parallel. AC power is output from the midpoint N1 of the first arm and the midpoint N2 of the second arm.

For example, IGBTs can be used for the first switching element S1 to the fourth switching element S4. The first free-wheeling diode D1 to the fourth free-wheeling diode D4 are respectively connected in parallel to the first switching element S1 to the fourth switching element S4 in the reverse direction. Note that MOSFETs (Metal-Oxide-Semiconductor-Field-Effect-Transistors) may be used for the first switching element S1 to the fourth switching element S4. In this case, the first free-wheeling diode D1 to the fourth free-wheeling diode D4 can use parasitic diodes formed in the direction from the source to the drain.

FIG. 2 is a diagram for explaining a dead time error generated in the inverter circuit 22. When the drive signal Vg (PWM signal) generated by the control circuit 27 is at a high level, the gate voltage Vs1 of the first switching element S1 is at a high level and the gate voltage Vs2 of the second switching element S2 is at a low level. . When the drive signal Vg transitions from the high level to the low level, the first switching element S1 is immediately turned off, but the second switching element S2 is turned on after the dead time Td has elapsed. During the dead time Td, a negative current flows through the first free-wheeling diode D1. A component obtained by multiplying this current by half the voltage of the DC power supply 10 is an error component (see the hatched portion of the midpoint voltage Vn1 (negative current)). Since this error component acts in the direction of decreasing the output power of the inverter circuit 22, it is necessary to estimate the error component and add it to the input power of the inverter circuit 22 in order to compensate for the error component.

When the drive signal Vg is at a low level, the gate voltage Vs1 of the first switching element S1 is at a low level, and the gate voltage Vs2 of the second switching element S2 is at a high level. When the drive signal Vg transitions from the low level to the high level, the second switching element S2 is immediately turned off, but the first switching element S1 is turned on after the dead time Td has elapsed. A current in the positive direction flows through the second free-wheeling diode D2 during the dead time Td. A component obtained by multiplying this current by half the voltage of the DC power supply 10 is an error component (see the hatched portion of the midpoint voltage Vn1 (positive current)). Since this error component acts to increase the output power of the inverter circuit 22, in order to compensate for the error component, it is necessary to estimate the error component and remove it from the input power of the inverter circuit 22.

Return to Figure 1. The filter circuit 23 includes a first reactor L1, a second reactor L2, and a second capacitor C2. The filter circuit 23 attenuates the harmonic component of the AC power output from the inverter circuit 22, and the output voltage and output current of the inverter circuit 22 are reduced. Move closer to a sine wave. The AC power output from the filter circuit 23 flows backward to the system 30.

The DC voltage detection circuit 24 detects the input voltage of the inverter circuit 22 and outputs it to the control circuit 27. The current detection circuit 25 detects the alternating current that flows from the inverter circuit 22 and flows through the first reactor L1 using the current sensor CT, and outputs the detected current to the control circuit 27. The AC voltage detection circuit 26 detects the AC voltage output from the inverter circuit 22 and passed through the filter circuit 23 and outputs the AC voltage to the control circuit 27.

The control circuit 27 generates a drive signal for the inverter circuit 22 based on the voltage command value, and supplies the drive signal to the inverter circuit 22. In the present embodiment, a PWM signal is generated as a drive signal and supplied to the gate terminals of the first switching element S1 to the fourth switching element S4. The output power of the inverter circuit 22 can be increased by increasing the duty ratio of the PWM signal, and the output power of the inverter circuit 22 can be decreased by decreasing the duty ratio of the PWM signal.

In the present embodiment, the control circuit 27 estimates the output voltage of the inverter circuit 22 before passing through the filter circuit 23 based on the current detected by the current detection circuit 25, and the estimated output voltage of the inverter circuit 22 and the inverter The voltage command value is corrected based on the relationship with the drive signal supplied to the circuit 22. This will be specifically described below.

The control circuit 27 includes a first subtractor 27a, a first compensator 27b, a first adder 27c, a second adder 27d, a drive signal generator 27e, a first multiplier 27f, a second subtractor 27g, and a first division. Part 27h and a third subtracting part 27i.

The configuration of the control circuit 27 can be realized by cooperation of hardware resources and software resources, or only by hardware resources. As hardware resources, analog elements, microcomputers, DSPs, ROMs, RAMs, FPGAs, and other LSIs can be used. Firmware and other programs can be used as software resources.

First subtracting unit 27a subtracts the current value I _L that is detected by the current detecting circuit 25 from the target current value Iref. First compensator 27b, based on the deviation between the target current value Iref and the current value I _L, and generates a voltage command value Vref by PI compensation or P compensation. The first adder 27c adds the voltage obtained by dividing the AC voltage value Vout detected by the AC voltage detection circuit 26 by the DC voltage value Vdc detected by the DC voltage detection circuit 24 to the voltage command value Vref. Compensates for disturbance components due to system voltage. The second adder 27d adds the dead time error component compensation value to the voltage command value Vref to generate a voltage command value Vref ′ after dead time error compensation.

The drive signal generator 27e generates a drive signal Vg for the inverter circuit 22 based on the voltage command value Vref ′ after dead time error compensation. The drive signal generation unit 27e includes, for example, a comparator to which the voltage command value Vref 'and a triangular wave carrier signal are input. The comparator outputs a PWM signal corresponding to the comparison result between the voltage command value Vref ′ and the carrier signal. The PWM signal is input to the gate terminals of the first switching element S1 and the fourth switching element S4 of the inverter circuit 22, and the signal having the opposite phase to the phase of the PWM signal is the gate of the second switching element S2 and the third switching element S3. Input to the terminal. The PWM signal is a signal that defines the duty ratio of the first switching element S1 to the fourth switching element S4, and is also output to the third subtraction unit 27i.

The first multiplication unit 27f is the current value I _L that is detected by the current detection circuit 25, by multiplying the reactance of the first reactor L1, estimates the voltage across the first reactor L1. The second subtraction unit 27g subtracts the voltage across the first reactor L1 from the AC voltage value Vout (output voltage of the first reactor L1) detected by the AC voltage detection circuit 26, and outputs the output voltage value of the inverter circuit 22. (Input voltage of the first reactor L1) is estimated. Thus, the first multiplication unit 27f and the second subtraction unit 27g function as a voltage estimation unit that estimates the output voltage (including the dead time error component) of the inverter circuit 22.

The first divider 27h divides the estimated output voltage of the inverter circuit 22 (including the dead time error component) by the DC voltage value Vdc detected by the DC voltage detection circuit 24 to estimate the output voltage of the inverter circuit 22. A duty value corresponding to the value (including the dead time error component) is calculated. The third subtractor 27i subtracts the duty value including the dead time error component supplied from the first divider 27h from the duty value not including the dead time error component of the inverter circuit 22 supplied from the drive signal generator 27e. By doing so, the dead time error component compensation value is estimated. The third subtractor 27i outputs the calculated dead time error component compensation value to the second adder 27d. The second addition unit 27d corrects the voltage command value Vref ′ by adding the dead time error component compensation value to the voltage command value Vref.

FIG. 3 is a diagram for explaining the configuration of the power conversion device 20 according to the comparative example. The comparative example is an example in which an actual measurement value is used for the output voltage value (including the dead time error component) of the inverter circuit 22. In the comparative example, an AC voltage detection circuit 28 that detects an output voltage value (including a dead time error component) of the inverter circuit 22 before passing through the filter circuit 23 is additionally provided. In contrast, in power converter 20 according to the first embodiment shown in FIG. 1, the output voltage value (including the dead time error component) of inverter circuit 22 is estimated from the output current of inverter circuit 22 by calculation. The AC voltage detection circuit 28 is not necessary.

As described above, according to the first embodiment, power conversion using the inverter circuit 22 is performed without providing the AC voltage detection circuit 28 for detecting the output voltage of the inverter circuit 22 before passing through the filter circuit 23. The generated error component can be compensated by feedback control based on voltage detection. In general, since the feedback compensation method based on voltage detection has higher compensation accuracy than the feedforward compensation method based on current detection, the power conversion device 20 according to the first embodiment has a highly accurate dead time while suppressing the circuit scale. The error component can be compensated.

FIG. 4 is a diagram for explaining the configuration of the power conversion device 20 according to the second embodiment of the present invention. In the second embodiment, it is assumed that a dead time error component compensation value is calculated by digital signal processing using a processor such as a microcomputer or DSP. Since digital signal processing is discretely performed according to the clock frequency, a control delay occurs. Specifically, the dead time error component compensation value is calculated based on the current value detected at time (n−1), and the voltage command value at time n is corrected.

Since the current value detected by the current detection circuit 25 is an alternating current value, it changes in a sine wave shape. Therefore, strictly speaking, the current value detected at time (n−1) is different from the current value detected at time n. The same argument applies to the voltage value detected by the AC voltage detection circuit 26. In the second embodiment, a compensation method that takes into account an error due to a control delay caused by the digital signal processing is realized.

Configurations other than the control circuit 27 of the power conversion device 20 according to the second embodiment are the same as those of the power conversion device 20 according to the first embodiment, and thus description thereof is omitted. In the second embodiment, the control circuit 27 includes a first subtraction unit 27a, a first compensation unit 27b, a first addition unit 27c, a second addition unit 27d, a drive signal generation unit 27e, a predicted current calculation unit 27j, and an error component compensation. A value calculation unit 27k is included.

The predicted current calculation unit 27j predicts a current value ahead of one control cycle (hereinafter referred to as “step”) from the current current value detected by the current detection circuit 25. The prediction method is not particularly limited. For example, the current phase may be detected, the amplitude may be calculated from the current current value and phase, and the current value one step ahead may be estimated from the amplitude and the phase one step ahead.

The error component compensation value calculator 27k estimates the output voltage value (including the dead time error component) of the inverter circuit 22 one step ahead based on the output current estimated value of the inverter circuit 22 one step ahead. This estimation operation generates a delay time for one step. The error component compensation value calculation unit 27k is based on the output voltage estimated value (including the dead time error component) of the inverter circuit 22 delayed by this one step time and the input voltage estimated value of the inverter circuit 22 at that time. An error component generated by power conversion using the inverter circuit 22 is estimated, and a compensation value thereof is calculated. Other processes are the same as those of the first embodiment.

FIG. 5 is a signal flow diagram of power conversion device 20 according to Embodiment 2 of the present invention. The first subtraction unit 27a subtracts the current value I _L (n−1) detected by the current detection circuit 25 from the target current value Iref (n). First compensator 27b, based on the deviation between the target current value Iref (n) and the current value _I L (n-1), and generates a voltage command value Vref by PI compensation or P compensation (n).

The AC voltage value Vout (n) detected by the AC voltage detection circuit 26 is delayed by a processing time for one step by the first delay unit 27l. The second division unit 27m divides the AC voltage value Vout (n−1) delayed by the processing time for one step by the first delay unit 27l by the DC voltage value Vdc detected by the DC voltage detection circuit 24. Generate a voltage value. The first adder 27c adds a voltage value obtained by dividing the AC voltage value Vout (n−1) by the DC voltage value Vdc to the voltage command value Vref [n] to compensate for a disturbance component due to the system voltage.

The fourth subtracting unit 27n subtracts an error compensation value Δ ^ Vnoise (n) / Vdc for compensating an error component generated in the inverter circuit 22 from the voltage command value Vref (n). Δ ^ Vnoise (n−1) indicates a predicted value of an error voltage component that is estimated at time (n−1) and is generated in the inverter circuit 22 at time n. The fourth subtractor 27n outputs the voltage command value after error component compensation to the second multiplier 22a and the error component compensation value calculator 27k as the duty value duty (n).

The second multiplier 22a multiplies the duty value duty (n) and the DC voltage value Vdc to calculate the output voltage value Vinv (n) of the inverter circuit 22 (not including the error component ΔVnoise (n)). The third adder 22b adds an error component ΔVnoise (n) generated by power conversion using the inverter circuit 22 to the output voltage value Vinv (n) of the inverter circuit 22 calculated by the second multiplier 22a. The processing of the second multiplier 22a and the third adder 22b represents power conversion by the inverter circuit 22 of FIG.

The second subtraction unit 27g subtracts the AC voltage value Vout (n) detected by the AC voltage detection circuit 26 from the output voltage value Vinv ′ (n) (including the error component ΔVnoise (n)) of the inverter circuit 22. . The third multiplier L1a multiplies the both-ends voltage V _L (n) of the first reactor L1 by the reactance of the first reactor L1, and calculates the predicted current value I _L (n) of the first reactor L1. The second delay unit 27ka outputs the current value I _L (n−1) of the first reactor L1 obtained by delaying the current value I _L (n) of the first reactor L1 by a processing time for one step. The processing of the second delay unit 27ka represents an operation delay by the processor. In FIG. 5, the reactance of the first reactor L1 is expressed as a function of the z conversion region.

The predicted current calculation unit 27j calculates a current value ^ I _L (n) one step ahead from the current value I _L (n-1) of the first reactor L1 by a prediction calculation. The error component compensation value calculator 27k calculates an error compensation value Δ ^ Vnoise (n-1) / Vdc based on the current value ^ I _L (n) and the duty value duty (n) one step ahead.

The current value I _L (n) of the first reactor L1, which is the output current value of the inverter circuit 22, can be defined by the following (formula 1).
I _L (n) = (Vinv (n) + ΔVnoise (n) −Vout (n)) · 1 / (z−1) · Ts / L) (Equation 1)

From the above (formula 1), the error component ΔVnoise (n) generated in the inverter circuit 22 can be defined by the following (formula 2).
ΔVnoise (n) = (Vout (n) + (z−1) · L / Ts · I _L (n)) − Vinv (n) (Formula 2)

The predicted value Δ ^ Vnoise (n) of the error component is calculated by the following (Expression 3) using the predicted current value ^ I _L (n) one step ahead from the above (Expression 2).
Δ ^ Vnoise (n) = ( Vout (n-1) + L / Ts (^ I L (n) -I L (n-1))) - Vinv (n-1) ... ( Equation 3)

The output voltage value Vinv (n−1) (not including the error component ΔVnoise (n−1)) of the inverter circuit 22 in the above (Equation 3) is the duty value duty (n−1) and the DC voltage value Vdc (n− It can be calculated by multiplying by 1). The error component ΔVnoise (n) is compensated by previously subtracting the error component compensation value ΔΔVnoise (n) / Vdc calculated by the error component compensation value calculating unit 27k from the duty value duty (n).

As described above, in the second embodiment, the current value before the delay is estimated by performing the prediction calculation in consideration of the control delay with respect to the current value delayed due to the control delay of the digital signal processing by the processor. . Based on the estimated current value and the drive signal of the inverter circuit 22, the dead time error voltage is estimated and corrected to correct the drive signal. As a result, it is possible to realize compensation with excellent responsiveness and compensation accuracy as compared with feedforward compensation based on general current detection.

FIG. 6 is a diagram for explaining the configuration of the power conversion device 20 according to the third embodiment of the present invention. The power conversion device 20 according to the third embodiment has a configuration in which a clamp circuit 29 is added to the power conversion device 20 according to the second embodiment shown in FIG. The clamp circuit 29 is provided between the inverter circuit 22 and the filter circuit 23, can short-circuit between the AC output terminals (N1, N2) of the inverter circuit 22, and can switch the conduction direction at the time of the short-circuit.

The clamp circuit 29 is connected between the AC output terminals (N1, N2) of the inverter circuit 22 with the fifth switching element S5 and the sixth switching element S6 connected in series in opposite directions. In the example shown in FIG. 6, IGBTs are used for the fifth switching element S5 and the sixth switching element S6, the emitter terminal of the fifth switching element S5 is connected to the first output line of the inverter circuit 22, and the sixth switching element S6 Are connected to the second output line of the inverter circuit 22. The collector terminals of the fifth switching element S5 and the sixth switching element S6 are connected.

A fifth free-wheeling diode D5 is connected in parallel with the fifth switching element S5 in a direction in which current flows from the emitter to the collector, and in parallel with the sixth switching element S6, in the direction in which current flows in the direction from the emitter to the collector. A 6-return diode D6 is connected. Therefore, when the fifth switching element S5 is in the on state and the sixth switching element S6 is in the off state, a current flows only in the direction from the second output line to the first output line, and the fifth switching element S5 is in the off state and the sixth switching element. When S6 is on, current flows only from the first output line to the second output line.

FIG. 7 is a diagram for explaining the operation of the power conversion device 20 according to the third embodiment of the present invention. In the first half of one cycle, the PWM control in which the first switching element S1 and the fourth switching element S4 are repeatedly turned on and off is performed, the second switching element S2 and the fourth switching element S4 are controlled to be in the off state, and the fifth switching element S5 Is controlled to be in an on state, and the sixth switching element S6 is controlled to be in an off state.

The positive voltage + E is output to the filter circuit 23 while the first switching element S1 and the fourth switching element S4 are on. During the period when the first switching element S1 and the third switching element S3 are off, the current based on the energy accumulated in the filter circuit 23 circulates through the clamp circuit 29, so that the input voltage and the output voltage of the filter circuit 23 are both It becomes zero.

In the second half of one cycle, PWM control is performed in which the second switching element S2 and the third switching element S3 are repeatedly turned on and off, the first switching element S1 and the fourth switching element S4 are controlled to be in the off state, and the fifth switching element S5 Is controlled to be in the off state, and the sixth switching element S6 is controlled to be in the on state.

The negative voltage −E is output to the filter circuit 23 while the second switching element S2 and the third switching element S3 are on. During the period when the second switching element S2 and the third switching element S3 are off, the current based on the energy accumulated in the filter circuit 23 circulates through the clamp circuit 29, so that both the input voltage and the output voltage of the filter circuit 23 are It becomes zero.

The filter circuit 23 generates a sine wave (see dotted line) based on the three levels of positive voltage + E, zero, and negative voltage −E. In such a three-level inverter, current distortion due to dead time increases near the zero crossing (see symbol R). Therefore, in the current method in which the current polarity is determined and the feed forward compensation is performed, the compensation accuracy is lowered.

The configuration and operation other than those described above are the same as those described in the second embodiment. In addition, the structure by which the clamp circuit 29 was added to the power converter device 20 which concerns on Embodiment 1 shown in FIG. 1 may be sufficient.

As described above, according to the third embodiment, since a dead time error component is compensated without using polarity determination, malfunctions are unlikely to occur. Therefore, the present invention is effective for application to a three-level inverter in which the absolute value of current becomes small near the zero cross and the erroneous determination of polarity is likely to occur. Similarly, it is also effective for application to a unipolar modulation system in which the absolute value of current becomes small near the zero cross of the system voltage. Further, current distortion caused by dead time that stands out in the vicinity of the zero crossing can be suppressed.

FIG. 8 is a diagram for explaining the configuration of the power conversion device 20 according to the fourth embodiment of the present invention. Embodiment 4 is an example applied to current control of a single-phase grid-connected inverter using rotational coordinate transformation. Since the configuration other than the control circuit 27 of the power conversion device 20 according to the fourth embodiment is the same as that of the power conversion device 20 according to the first embodiment, the description thereof is omitted. In the fourth embodiment, the control circuit 27 includes a first rotation coordinate conversion unit 27o, a second rotation coordinate conversion unit 27p, a d-axis subtraction unit 27q, a q-axis subtraction unit 27r, a d-axis compensation unit 27s, a q-axis compensation unit 27t, A d-axis addition unit 27u, a q-axis addition unit 27v, a reverse rotation coordinate conversion unit 27w, a second addition unit 27d, a drive signal generation unit 27e, a predicted current calculation unit 27j, and an error component compensation value calculation unit 27k are included.

First rotating coordinate transformation unit 27o is the current value I _L that is detected by the current detection circuit 25, by rotating the coordinate transformation the phase θ of the system voltage as the rotation angle of the d-axis component current value Iout d and q-axis component The current value Iout q (reactive current value) is calculated. The second rotation coordinate conversion unit 27p converts the voltage value Vout detected by the AC voltage detection circuit 26 into rotation coordinates using the phase θ of the system voltage as a rotation angle, and converts the voltage value Vout d of the d-axis component and the q-axis component. The voltage value Vout q is calculated.

The d-axis subtraction unit 27q subtracts the d-axis component current value Iout d from the d-axis component target current value Iref d. The q-axis subtractor 27r subtracts the q-axis component current value Iout q from the q-axis component target current value Iref q. The d-axis compensation unit 27s generates a voltage command value Vrefd for the d-axis component by PI compensation or P-compensation based on the deviation between the target current value Iref d for the d-axis component and the current value Iout d for the d-axis component. To do. The q-axis compensation unit 27t generates a voltage command value Vref q for the q-axis component by PI compensation or P-compensation based on the deviation between the target current value Iref q for the q-axis component and the current value Iout q for the q-axis component. To do. The d-axis addition unit 27u adds the d-axis component voltage value Vout d to the d-axis component voltage command value Vref d. The q-axis addition unit 27v adds the q-axis component voltage value Vout q to the q-axis component voltage command value Vref q.

The reverse rotation coordinate conversion unit 27w performs reverse rotation coordinate conversion of the voltage command value Vref d of the d-axis component and the voltage command value Vref q of the q-axis component after system voltage compensation to calculate the voltage command value Vref of the stationary coordinate system. To do. The second adder 27d adds the dead time error component compensation value Δ ＾ Vnoise (n) / Vdc to the voltage command value Vref to generate a voltage command value Vref ′ after dead time error compensation. Other processes are the same as those described in the second embodiment. Thus, power factor control and reactive power injection can be performed by independently controlling the d-axis component and the q-axis component.

As described above, according to the fourth embodiment, instead of adding the respective compensation values to the voltage command value Vref d before the reverse rotation coordinate conversion and the voltage command value Vref 成分 q of the q-axis component, the reverse rotation coordinate conversion is performed. The compensation value is added to the subsequent voltage command value Vref. This simplifies the configuration and reduces the amount of calculation.

The present invention has been described based on the embodiments. The embodiments are exemplifications, and it will be understood by those skilled in the art that various modifications can be made to combinations of the respective constituent elements and processing processes, and such modifications are within the scope of the present invention. .

For example exemplary Embodiment 2 of, but predicted the detected current value _I L (n-1) from one step destination of the current value _{^ I} L (n), the detected current value _I L (n-m (m is 2 The current value ^ I _L (n) after m steps may be predicted from the above integer))). If the computation delay by the processor is the processing time for m steps, it is necessary to predict the current value ^ I _L (n) of m steps ahead.

In the above description, the PWM signal is assumed as the drive signal Vg of the first switching element S1 to the fourth switching element S4 included in the inverter circuit 22, but the duty ratio may be controlled using the phase shift signal.

In the above description, the example of compensating for the dead time generated in the power conversion device 20 that converts DC power into single-phase AC power has been described. However, the present compensation technique is a power that converts DC power into three-phase AC power. It can also be applied to a conversion device.

Note that the embodiment may be specified by the following items.

[Item 1]
An inverter circuit (22) for converting DC power into AC power;
A filter circuit (23) having a reactor (L1) for attenuating a high-frequency component of AC power output from the inverter circuit (22);
A current detection circuit (25) for detecting a current flowing through the reactor (L1);
A control circuit (27) for generating a drive signal for the inverter circuit (22) based on a voltage command value,
The control circuit (27) estimates the output voltage of the inverter circuit (22) before passing through the filter circuit (23) based on the current detected by the current detection circuit (25), and the estimated inverter The power converter (20), wherein the voltage command value is corrected based on a relationship between an output voltage of the circuit (22) and a drive signal supplied to the inverter circuit (22).
Thereby, an error component generated in the inverter circuit (22) can be estimated without actually measuring the output voltage of the inverter circuit (22), and the voltage command value can be corrected.
[Item 2]
The control circuit (27) outputs the m (m is a natural number) step ahead of the inverter circuit (22) based on the current value (I _L [nm]) detected by the current detection circuit (25). The power converter (20) according to item 1, wherein the voltage (Vinv ′ [n]) is estimated and the voltage command value (Vref [n]) of m steps ahead is corrected.
Thereby, it is possible to compensate for a control deviation between the current at the time of detection and the current at the time of error component compensation.
[Item 3]
A clamp circuit (29) capable of short-circuiting between AC output terminals of the inverter circuit (22) is further provided between the inverter circuit (22) and the filter circuit (23),
3. The power conversion device (20) according to item 1 or 2, wherein the current detection circuit (25) is provided downstream of the clamp circuit (29).
According to this, the error component of the three-level inverter can be compensated with high accuracy.
[Item 4]
The control circuit (27) generates the voltage command value in accordance with a deviation between the current detected by the current detection circuit (25) and a target current. Power conversion device (20).
According to this, the output current can be stabilized.
[Item 5]
The control circuit (27)
A rotational coordinate conversion unit (27o) for calculating a current value of a d-axis component and a current value of a q-axis component by performing rotational coordinate conversion on the current detected by the current detection circuit (25);
A d-axis compensator (27s) that generates a d-axis component voltage command value based on a deviation between the d-axis component target current value and the d-axis component current value calculated by the rotating coordinate converter (27o). When,
A q-axis compensator (27t) that generates a voltage command value for the q-axis component based on the deviation between the q-axis component target current value and the q-axis component current value calculated by the rotating coordinate converter (27o). When,
A reverse rotation coordinate conversion unit (27w) that performs reverse rotation coordinate conversion of the voltage command value of the d-axis component and the voltage command value of the q-axis component to calculate a voltage command value of a stationary coordinate system;
A compensation value adding unit (27d) for adding a compensation value of an error component generated in the inverter circuit (22) to the voltage command value of the stationary coordinate system;
5. The power conversion device according to any one of items 1 to 4, wherein the power conversion device includes:
According to this, the error component of the inverter using the rotation coordinate transformation can be compensated with high accuracy.

10 DC power supply, 20 power converter, 22 inverter circuit, S1 first switching element, S2 second switching element, S3 third switching element, S4 fourth switching element, S5 fifth switching element, S6 sixth switching element, D1 1st freewheeling diode, D2 2nd freewheeling diode, D3 3rd freewheeling diode, D4 4th freewheeling diode, D5 5th freewheeling diode, D6 6th freewheeling diode, C1 1st capacitor, C2 2nd capacitor, L1 1st reactor, L2 second reactor, L1a third multiplication unit, 23 filter circuit, 24 DC voltage detection circuit, 25 current detection circuit, 26 AC voltage detection circuit, 27 control circuit, 27a first subtraction unit, 27b first compensation unit, 27c first addition unit, 27d second addition unit, 27e drive signal generation unit, 27f first multiplication unit, 27g second subtraction unit, 27h first division unit, 27i third subtraction unit, 27j third subtraction unit, 27j prediction Current calculation unit, 27k error component compensation value calculation unit, 27ka second delay unit, 27l first delay unit, 27m second division unit, 27n fourth subtraction unit, 27o first rotation coordinate conversion unit, 27p second rotation coordinate conversion Unit, 27q d-axis subtraction unit, 27r q-axis subtraction unit, 27s d-axis compensation unit, 27t q-axis compensation unit, 27u d-axis addition unit, 27v q-axis addition unit, 27w reverse rotation coordinate conversion unit, 28 AC voltage detection circuit 29 clamp circuit, 30 systems.

The present invention can be used for a solar cell power conditioner and the like.

Claims

An inverter circuit for converting DC power into AC power;
A filter circuit that has a reactor and attenuates a high-frequency component of AC power output from the inverter circuit;
A current detection circuit for detecting a current flowing through the reactor;
A control circuit that generates a drive signal for the inverter circuit based on a voltage command value,
The control circuit estimates the output voltage of the inverter circuit before passing through the filter circuit based on the current detected by the current detection circuit, and the estimated output voltage of the inverter circuit is supplied to the inverter circuit. The power command device corrects the voltage command value based on the relationship with the drive signal.
The control circuit calculates an output voltage (Vinv ′ [n]) of m (m is a natural number) step ahead of the inverter circuit based on the current value (I L [nm]) detected by the current detection circuit. The power conversion device according to claim 1, wherein the power conversion device estimates and corrects the voltage command value (Vref [n]) ahead of m steps.
A clamp circuit capable of short-circuiting between the AC output terminals of the inverter circuit is further provided between the inverter circuit and the filter circuit,
The power converter according to claim 1, wherein the current detection circuit is provided at a stage subsequent to the clamp circuit.
4. The power conversion device according to claim 1, wherein the control circuit generates the voltage command value according to a deviation between a current detected by the current detection circuit and a target current.
The control circuit includes:
A rotational coordinate conversion unit for calculating a current value of a d-axis component and a current value of a q-axis component by performing rotational coordinate conversion on the current detected by the current detection circuit;
a d-axis compensator that generates a voltage command value for the d-axis component based on a deviation between the target current value of the d-axis component and the current value of the d-axis component calculated by the rotational coordinate converter;
a q-axis compensator that generates a voltage command value for the q-axis component based on the deviation between the target current value for the q-axis component and the current value for the q-axis component calculated by the rotating coordinate converter;
A reverse rotation coordinate conversion unit that performs reverse rotation coordinate conversion of the voltage command value of the d-axis component and the voltage command value of the q-axis component to calculate a voltage command value of a stationary coordinate system;
A compensation value adding unit that adds a compensation value of an error component generated in the inverter circuit to the voltage command value of the stationary coordinate system;
5. The power conversion device according to claim 1, comprising: