WO2017024675A1 - 一种硅穿孔结构的绝缘层底部开窗制造方法和硅穿孔结构 - Google Patents

一种硅穿孔结构的绝缘层底部开窗制造方法和硅穿孔结构 Download PDF

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WO2017024675A1
WO2017024675A1 PCT/CN2015/092701 CN2015092701W WO2017024675A1 WO 2017024675 A1 WO2017024675 A1 WO 2017024675A1 CN 2015092701 W CN2015092701 W CN 2015092701W WO 2017024675 A1 WO2017024675 A1 WO 2017024675A1
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silicon via
via structure
photoresist
insulating layer
silicon
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孙蓉
张国平
刘强
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Shenzhen Institute of Advanced Technology of CAS
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/081—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/093—Manufacture or treatment of dielectric parts thereof by modifying materials of the dielectric parts
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/093—Manufacture or treatment of dielectric parts thereof by modifying materials of the dielectric parts
    • H10W20/097—Manufacture or treatment of dielectric parts thereof by modifying materials of the dielectric parts by thermally treating
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/20—Interconnections within wafers or substrates, e.g. through-silicon vias [TSV]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages

Definitions

  • the present invention relates to the field of semiconductor integrated circuit manufacturing process technologies, and in particular, to a silicon via structure insulating layer bottom window manufacturing method and a silicon via structure.
  • the silicon perforation technology is an advanced packaging technology that realizes three-dimensional stack interconnection of chips. It has the characteristics of small package size, high frequency characteristics, low chip power consumption and high reliability. It is called advanced packaging technology that advances Moore's Law and even exceeds Moore's Law. solution.
  • Low aspect ratio (1:1) TSV structures fabricated using the through silicon via technology are currently in volume production applications in the field of CMOS (Complementary Metal-Oxide-Semiconductor) image sensors.
  • the TSV technology mainly includes key processes such as etching, insulation, deposition of copper seed layers, plating and hole filling.
  • the preparation of the insulating layer mainly comprises chemical vapor deposition of silicon oxide and spin coating to prepare a polymer insulating layer.
  • the existing bottom insulating layer etch window mainly includes two methods of plasma and laser ablation. Therefore, the etching window for the bottom silicon oxide insulating layer mainly adopts a plasma method, and the bottom etching window for the polymer insulating layer mainly adopts a laser ablation method.
  • the plasma etching is mainly directed to the silicon oxide insulating layer.
  • the deposition device of the silicon oxide insulating layer is expensive, the low-temperature deposition adhesion is poor, the reliability is low, and the dielectric constant of the silicon oxide insulating layer is high, which tends to cause RC delay and a slow plasma etching rate.
  • Laser ablation is mainly for polymer insulation layers, generally low precision, not suitable for small diameter silicon perforation process, while laser ablation will locally generate a large amount of heat and damage the device. It can be seen that there are certain limitations for the above materials and the supporting window opening process.
  • the object of the present invention is to provide a silicon-perforated structure insulating layer bottom window manufacturing method and a silicon via structure, and a semiconductor photolithography process is used to open the bottom of the insulating layer, thereby improving the conventional plasma etching silicon oxide insulating window opening.
  • the efficiency while also overcoming the damage caused by the high temperature generated by laser ablation of the non-photosensitive polymer insulation layer.
  • a method for manufacturing a bottom opening of an insulating layer of a silicon via structure including:
  • the remaining photoresist portion is cured to form an insulating layer having a fenestration structure at the bottom of the through hole of the through-silicon via structure.
  • the TSV structure is formed by etching by an anisotropic silicon etching process, and the flow ratio of CF 4 gas and SF 4 gas in the etching process is 2:1.
  • the wafer has a diameter of 8 inches or 12 inches, and the through-silicone structure has a pore size of 60 um and a pore depth of 120 um.
  • the surface of the through-silicon via structure is coated with a photoresist by a spin coating process, and the viscosity of the photoresist is less than 100 mPa*s;
  • the upper surface of the through-silicon via structure is coated with a photoresist having a thickness of 8-10 um, the upper corner coated photoresist of the through-silicon via structure has a thickness of 3-4 um, and the sidewall of the through-silicon via structure is coated.
  • the thickness of the photoresist is 7-9 um, and the thickness of the photoresist portion coated on the bottom of the through-silicon via structure is 6-8 um.
  • the spin coating process comprises:
  • the first step, spin coating at 200rpm-400rpm, duration is 20 seconds (s) -180s;
  • spin coating is performed at a speed of 700 rpm to 1000 rpm for a duration of 30 s to 180 s.
  • the method further includes: performing SC1 cleaning and nitrogen drying on the wafer forming the TSV structure.
  • the cleaning time of the SC1 cleaning was 5 minutes, and the drying time of the nitrogen drying was 2 minutes.
  • the exposure time of the exposure is 60 seconds
  • the development time of the development is 60-120 seconds.
  • the remaining photoresist portion is cured by a temperature rising process, and the heating process is:
  • the temperature is raised to 120 degrees Celsius at a temperature increase rate of 5 degrees Celsius per minute, and the temperature is maintained at 120 degrees Celsius for 60 minutes;
  • the temperature is raised to 150 degrees Celsius at the temperature increase rate, and the temperature is maintained at 150 degrees Celsius for 30 minutes;
  • the temperature was raised to 200 degrees Celsius at the temperature increase rate, and the temperature was maintained at 200 degrees Celsius for 60 minutes.
  • a through-silicon via structure is provided, the insulating layer of the TSV structure being fabricated using an insulating layer bottom fenestration manufacturing method of a TSV structure as described in the first aspect.
  • the invention has the beneficial effects of a silicon-perforated structure insulating layer bottom window manufacturing method and a silicon via structure, comprising: providing a wafer having a front surface and a back surface, and forming a TSV structure on the front surface,
  • the silicon via structure constitutes an array of silicon via structures; coating a photoresist on a surface of the through silicon via structure; exposing and developing a photoresist portion of the bottom of the through hole structure to form a pattern leakage hole bottom; The remaining photoresist portion is cured to form an insulating layer having a fenestration structure at the bottom of the through hole of the through-silicon via structure. It can be seen that the bottom of the insulating layer of the through-silicon structure is opened and the silicon is worn.
  • the hole structure uses a semiconductor photolithography process to open the bottom of the insulating layer, which improves the efficiency of the conventional plasma etching of the silicon oxide insulating layer, and also overcomes the high temperature generated by the laser ablation of the non-photosensitive polymer insulating layer.
  • the resulting device is damaged, high in stability, enforceable, and low in cost.
  • FIG. 1 is a cross-sectional view showing the structure of a through-wafer wafer in which a method of fabricating a bottom opening of an insulating layer using a through-silicon via structure provided by the present invention.
  • FIG. 2 is a cross-sectional view showing a structure in which a photoresist is coated on a surface of a TSV structure by a method for manufacturing a bottom opening of an insulating layer of a through-silicon via structure provided by the present invention.
  • FIG. 3 is a cross-sectional view showing a structure in which a photoresist on a surface of a TSV structure is exposed and developed by applying a method for manufacturing a bottom opening of an insulating layer of a through-silicon via structure provided by the present invention.
  • FIG. 4 is a cross-sectional view showing a structure in which a photoresist on a surface of a TSV structure is cured by applying a method for manufacturing a bottom opening of an insulating layer of a through-silicon via structure provided by the present invention.
  • FIG. 1 is a structural cross-sectional view of a silicon via wafer formed by a method for manufacturing a bottom opening of an insulating layer of a TSV structure provided by the present invention
  • FIG. 2 is a TSV structure provided by the present invention.
  • FIG. 3 is a cross-sectional view of a structure for applying a photoresist on a surface of a through-silicon via structure in a method for manufacturing a bottom opening of an insulating layer
  • FIG. 3 is a view showing a through-silicon via structure of a method for manufacturing a bottom opening of an insulating layer using a through-silicon via structure provided by the present invention;
  • FIG. 1 is a structural cross-sectional view of a silicon via wafer formed by a method for manufacturing a bottom opening of an insulating layer of a TSV structure provided by the present invention
  • FIG. 2 is a TSV structure provided by the present invention.
  • FIG. 3 is a cross-sectional view of a structure for applying a
  • FIG. 4 is a cross-sectional view showing a structure in which a photoresist of a surface is exposed and developed;
  • FIG. 4 is a structural cross section of a photoresist for curing a surface of a TSV structure by using a method for manufacturing a bottom opening of an insulating layer of a TSV structure provided by the present invention.
  • the oblique fill area represents the wafer 1
  • the blank area represents the coated photoresist
  • the fork fill area represents the cured photoresist.
  • a method for manufacturing a bottom opening of an insulating layer of a silicon perforated structure comprising:
  • the remaining photoresist portion is cured to form an insulating layer having a fenestration structure at the bottom of the through hole of the through-silicon via structure.
  • the method for manufacturing the bottom opening of the insulating layer of the through-silicon via structure selects a photoresist material capable of photolithography and solidification into a film, and adopts a spin coating process to prepare a conformal feature in the through-silicon via structure.
  • the photoresist film is then exposed and developed using a mask to realize fenestration of the bottom of the via of the TSV structure, and finally cured to form a film to complete the preparation of the insulating layer.
  • the manufacturing method realizes the first use of the photoresist 2 to prepare the insulating layer of the TSV structure and the first use of the photolithography process for the hole bottom of the TSV structure.
  • the edge layer performs low-cost, highly reliable windowing.
  • the bottom window manufacturing method of the insulating layer of the TSV structure provided by the embodiment of the invention adopts a semiconductor lithography process to open the window at the bottom of the insulating layer, thereby improving the efficiency of the conventional plasma etching of the silicon oxide insulating layer, and also overcoming the window.
  • the device is damaged by the high temperature generated by laser ablation of the non-photosensitive polymer insulating layer, and has high stability, high implementability and low cost.
  • the through-silicon via structure is formed by etching by an anisotropic silicon etching process, and the flow ratio of CF 4 gas to SF 6 gas during the etching is 2:1.
  • the non-isotropic silicon etch process is a widely used silicon etch process originating from Robert Bosch, Germany, known as the Bosch gas-switching technique or the Bosch process.
  • the anisotropic silicon etching process utilizes a plasma source having an anisotropic etching reaction and another plasma source that forms a polymeric passivation layer by reaction, and the method is repeated alternately to achieve Process requirements for silicon etching.
  • the commonly used gas selection in the silicon etching process is mostly SF 6 (sulfur hexafluoride), because it can decompose 6 fluorine atoms under the condition of energy of only 20 eV, and these fluorine atoms will continue to react with Si.
  • Volatile SiF4 silicon tetrafluoride
  • the wafer 1 has a diameter of 8 inches or 12 inches, and the through-silicone structure has a pore size of 60 um and a pore depth of 120 um.
  • the wafer 1 and the through-silicon via structure are not limited to the above structural parameters, and the silicon via structure having a pore diameter of more than 50 ⁇ m and an aspect ratio of less than 5:1 may be employed.
  • 8 inches or 12 inches is the more common wafer 1 specification on the market, and the 8 inch or 12 inch wafer 1 is selected, which greatly improves the method for manufacturing the bottom opening of the insulating layer of the silicon perforated structure provided by the embodiment of the present invention. It is practical and low cost.
  • the surface of the through-silicon via structure is coated with a package photoresist 2 by a spin coating process, and the photoresist 2 Viscosity less than 100mPa*s;
  • the spin coating process comprises:
  • the first step spin coating at 200rpm-400rpm, duration of 20s-180s;
  • spin coating is performed at a speed of 700 rpm to 1000 rpm for a duration of 30 s to 180 s.
  • the spin coating process consists of three steps: batching, high-speed rotation, and volatilization into a film.
  • the time, rotation speed, amount of liquid, concentration of the solution used, and viscosity of the homogenizer the light can be controlled.
  • the thickness of the film 2 is filmed.
  • Photoresist 2 also known as photoresist, is a light-sensitive mixed liquid composed of three main components of a photosensitive resin, a sensitizer and a solvent. After the photosensitive resin is irradiated, the photocuring reaction can be quickly performed in the exposed region, so that the physical properties of the material, particularly solubility, affinity, and the like are significantly changed. Further, by dissolving the soluble fraction by a suitable solvent treatment, a desired image can be obtained. Moreover, the packaged photoresist used in the embodiment of the present invention should have at least a curing agent in the composition compared with the conventional photoresist. After the patterning is completed, the remaining photoresist material can be processed by temperature programming. The film is cured to complete the preparation of the insulating layer.
  • the method further comprises: performing SC1 cleaning and nitrogen blowing on the wafer 1 forming the TSV structure. dry.
  • SC1 cleaning uses under-oxidation and micro-etching to undercut and remove surface particles. It also removes light organic contaminants and some metalized contaminants to improve the hydrophilicity of the surface of wafer 1.
  • the cleaning time of the SC1 cleaning is 5 minutes, and the drying time of nitrogen blowing is 2 minutes.
  • the process of the SC1 cleaning and the nitrogen drying process can make the insulating layer of the TSV structure prepared by the bottom opening manufacturing method of the insulating layer of the TSV structure provided by the embodiment of the present invention have higher yield and finer precision.
  • the exposure time of the exposure is 60 seconds
  • the development time of the development is 60-120 seconds.
  • the exposure process is to transfer the image on the original film to the photosensitive substrate (ie, wafer 1) by the light source.
  • the developing process is to wash away the photosensitive material portion (i.e., the photoresist 2) which has not undergone photopolymerization by the action of an alkali solution.
  • the bottom window manufacturing method of the insulating layer of the TSV structure provided by the embodiment of the invention mainly develops the photosensitive polymer insulating layer, which firstly maintains many advantages of the polymer insulating layer, and can adopt the standard photolithography process of the semiconductor, The bottom of the hole is subjected to exposure and development to realize window opening, and finally, the preparation of the insulating layer is completed by curing.
  • the silicon-perforated insulating layer of the photoresist 2 is prepared by a spin coating process, thereby overcoming the high equipment cost of the vapor-deposited inorganic silicon oxide insulating layer, and adopting the standard
  • the semiconductor lithography process opens the window at the bottom of the insulating layer, which improves the efficiency of the conventional plasma etching of the silicon oxide insulating layer, and also overcomes the damage of the device caused by the high temperature of the laser ablated non-photosensitive polymer insulating layer. .
  • the method for manufacturing the bottom opening of the insulating layer of the through-silicon via structure provided by the embodiment of the invention is a three-dimensional micro-nano
  • the conformal preparation of the insulating layer of the structure provides a new solution while providing a solution for the bottom patterning secondary processing of the three-dimensional micro-nano structure.
  • the remaining photoresist portion is cured by a temperature rising process, the heating process being:
  • the temperature is raised to 120 degrees Celsius at a temperature increase rate of 5 degrees Celsius per minute, and the temperature is maintained at 120 degrees Celsius for 60 minutes;
  • the temperature is raised to 150 degrees Celsius at the temperature increase rate, and the temperature is maintained at 150 degrees Celsius for 30 minutes;
  • the temperature was raised to 200 degrees Celsius at the temperature increase rate, and the temperature was maintained at 200 degrees Celsius for 60 minutes.
  • the curing process can obtain a good effect by curing the photoresist 2, and the properties of the pattern are stable and durable in the subsequent packaging process.
  • the wafer 1 Prior to the application of the photoresist 2, the wafer 1 was subjected to standard SC1 cleaning and nitrogen drying.
  • a photoresist coating layer having a conformal feature is prepared by a spin coating process.
  • a stepper exposure machine is used to expose and develop the photoresist portion of the bottom of the hole to achieve bottom opening.
  • the bottom-opening photoresist 2 is cured to form a film by a program controlled temperature rise method to realize the preparation of the insulating layer and the bottom windowing process.
  • the method for manufacturing the bottom opening of the insulating layer of the TSV structure provided by the embodiment of the present invention is a method for preparing the insulating layer in the process of the TSV packaging process and a new method for opening the bottom window, and the leakage pad is realized to realize the signal from the perforation.
  • the front side is turned to the back for the purpose.
  • the following is an embodiment of a TSV structure provided by an embodiment of the present invention.
  • the embodiment of the through-silicon via structure belongs to the same concept as the embodiment of the method for manufacturing the bottom opening of the insulating layer of the above-mentioned TSV structure, and the silicon perforation
  • the embodiment of the method for manufacturing the bottom opening of the insulating layer of the above-described TSV structure For details that are not described in detail in the embodiments of the structure, reference may be made to the embodiment of the method for manufacturing the bottom opening of the insulating layer of the above-described TSV structure.
  • a through-silicon via structure, the insulating layer of the through-silicon via structure is fabricated by using the above-described silicon-perforated structure insulating layer bottom window manufacturing method.
  • the silicon-perforated structure provided by the embodiment of the invention adopts a semiconductor photolithography process to open the bottom of the insulating layer, thereby improving the efficiency of the conventional plasma etching of the silicon oxide insulating layer, and also overcoming the non-photosensitive polymerization due to laser ablation.
  • the device is damaged by the high temperature generated by the insulating layer, and has high stability, high implementability, and low cost.
  • a silicon perforated structure insulating layer bottom window manufacturing method and a silicon via structure adopt a semiconductor photolithography process to open a window at the bottom of the insulating layer, thereby improving the efficiency of the conventional plasma etching silicon oxide insulating layer window opening, and also overcoming Damage to the device due to the high temperature generated by laser ablation of the non-photosensitive polymer insulating layer.

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Abstract

提供一种硅穿孔结构的绝缘层底部开窗制造方法和硅穿孔结构，包括：提供一晶圆（1），该晶圆具备正面和背面，在所述正面形成硅穿孔结构，若干个硅穿孔结构组成硅穿孔结构阵列；在所述硅穿孔结构的表面涂布封装光刻胶（2）；对所述硅穿孔结构的孔底的光刻胶部分进行曝光并显影，形成图形漏出孔底；固化剩余的光刻胶部分，以便在所述硅穿孔结构的孔底形成具备开窗结构的绝缘层。可见，该硅穿孔结构的绝缘层底部开窗制造方法和硅穿孔结构，采用半导体光刻工艺进行绝缘层底部开窗，提高了传统的等离子体刻蚀氧化硅绝缘层开窗的效率，同时也克服了因激光烧蚀非光敏聚合物绝缘层产生的高温而带来的器件受损，稳定性高、可实施性强且成本低廉。

Description

一种硅穿孔结构的绝缘层底部开窗制造方法和硅穿孔结构 技术领域
本发明涉及半导体集成电路制造工艺技术领域，尤其涉及一种硅穿孔结构的绝缘层底部开窗制造方法和硅穿孔结构。
背景技术
硅穿孔技术是实现芯片三维堆叠互联的先进封装技术，其具备封装尺寸小、高频特性出色、降低芯片功耗以及可靠性高等特点，被称作是推进摩尔定律甚至超越摩尔定律的先进封装技术解决方案。利用硅通孔技术工艺制得的低深宽比(1∶1)的硅穿孔结构目前在CMOS(Complementary Metal-Oxide-Semiconductor)图像传感器领域已经获得量产应用。硅穿孔技术工艺主要包括刻蚀、绝缘、沉积铜种子层、电镀和填孔等关键制程。其中，绝缘层的制备主要包括化学气相沉积氧化硅和旋涂制备聚合物绝缘层。在进行铜种子层沉积之前通常需要对孔底部的绝缘层进行蚀刻以漏出孔背面的金属焊盘(即开窗)，然后通过铜种子层沉积和电镀实现信号互联导通。现有的底部绝缘层蚀刻开窗主要包括等离子体和激光烧蚀两种方法。因此，针对底部氧化硅绝缘层的蚀刻开窗主要采用等离子体的方法，针对聚合物绝缘层的底部蚀刻开窗主要采用激光烧蚀的方法。等离子体蚀刻主要针对氧化硅绝缘层，氧化硅绝缘层的沉积设备昂贵、低温沉积粘结性差、可靠性低、氧化硅绝缘层介电常数高容易导致RC延迟且等离子体蚀刻速率较慢。激光烧蚀主要针对聚合物绝缘层，一般精度较低，不适宜较小直径的硅穿孔工艺，同时激光烧蚀会局部产生大量的热量而有损器件。可见，针对以上材料和配套开窗工艺均存在一定的局限性。
发明内容
本发明的目的在于提出一种硅穿孔结构的绝缘层底部开窗制造方法和硅穿孔结构，采用半导体光刻工艺进行绝缘层底部开窗，提高了传统的等离子体刻蚀氧化硅绝缘层开窗的效率，同时也克服了因激光烧蚀非光敏聚合物绝缘层产生的高温而带来的器件受损。
为达此目的，本发明采用以下技术方案：
第一方面，提供一种硅穿孔结构的绝缘层底部开窗制造方法，包括：
提供一晶圆，该晶圆具备正面和背面，在所述正面形成硅穿孔结构，若干个硅穿孔结构组成硅穿孔结构阵列；
在所述硅穿孔结构的表面涂布封装光刻胶；
对所述硅穿孔结构的孔底的光刻胶部分进行曝光并显影，形成图形漏出孔底；
固化剩余的光刻胶部分，以便在所述硅穿孔结构的孔底形成具备开窗结构的绝缘层。
其中，所述硅穿孔结构通过非等向性硅蚀刻工艺进行刻蚀而制成，刻蚀过程中CF4气体和SF4气体的流量比为2∶1。
其中，所述晶圆的直径为8英寸或12英寸，所述硅穿孔结构的孔径为60um，孔深为120um。
其中，所述硅穿孔结构的表面通过旋涂工艺涂布封装光刻胶，光刻胶的粘度小于100mPa*s；
所述硅穿孔结构的上表面涂布的光刻胶厚度为8-10um，所述硅穿孔结构的上拐角涂布的光刻胶厚度为3-4um，所述硅穿孔结构的侧壁涂布的光刻胶厚度为7-9um，所述硅穿孔结构的孔底涂布的光刻胶部分的厚度为6-8um。
其中，所述旋涂工艺包括：
第一步，以200rpm-400rpm的转速旋涂，持续时间为20秒(s)-180s；
第二步，以700rpm-1000rpm的转速旋涂，持续时间为30s-180s。
其中，所述在所述正面形成硅穿孔结构之后，在所述硅穿孔结构的表面涂布封装光刻胶之前，还包括：对形成硅穿孔结构的晶圆进行SC1清洗和氮气吹干。
其中，所述SC1清洗的清洗时间为5分钟，氮气吹干的吹干时间为2分钟。
其中，所述曝光的曝光时间为60秒，所述显影的显影时间为60-120秒。
其中，通过升温过程固化所述剩余的光刻胶部分，所述升温过程为：
从25摄氏度起，按每分钟升高5摄氏度的升温速度将温度升至120摄氏度，在120摄氏度保持恒温60分钟；
接着以所述升温速度将温度升至150摄氏度，在150摄氏度保持恒温30分钟；
再以所述升温速度将温度升至200摄氏度，在200摄氏度保持恒温60分钟。
第二方面，提供一种硅穿孔结构，所述硅穿孔结构的绝缘层应用如第一方面所述的硅穿孔结构的绝缘层底部开窗制造方法进行制造。
本发明的有益效果在于：一种硅穿孔结构的绝缘层底部开窗制造方法和硅穿孔结构，包括：提供一晶圆，该晶圆具备正面和背面，在所述正面形成硅穿孔结构，若干个硅穿孔结构组成硅穿孔结构阵列；在所述硅穿孔结构的表面涂布封装光刻胶；对所述硅穿孔结构的孔底的光刻胶部分进行曝光并显影，形成图形漏出孔底；固化剩余的光刻胶部分，以便在所述硅穿孔结构的孔底形成具备开窗结构的绝缘层。可见，该硅穿孔结构的绝缘层底部开窗制造方法和硅穿 孔结构，采用半导体光刻工艺进行绝缘层底部开窗，提高了传统的等离子体刻蚀氧化硅绝缘层开窗的效率，同时也克服了因激光烧蚀非光敏聚合物绝缘层产生的高温而带来的器件受损，稳定性高、可实施性强且成本低廉。
附图说明
为了更清楚地说明本发明实施例中的技术方案，下面将对本发明实施例描述中所需要使用的附图作简单的介绍，显而易见地，下面描述中的附图仅仅是本发明的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据本发明实施例的内容和这些附图获得其他的附图。
图1是应用本发明提供的硅穿孔结构的绝缘层底部开窗制造方法的形成了硅穿孔晶圆的结构截面图。
图2是应用本发明提供的硅穿孔结构的绝缘层底部开窗制造方法的在硅穿孔结构表面涂布光刻胶的结构截面图。
图3是应用本发明提供的硅穿孔结构的绝缘层底部开窗制造方法的对硅穿孔结构表面的光刻胶进行曝光并显影的结构截面图。
图4是应用本发明提供的硅穿孔结构的绝缘层底部开窗制造方法的对硅穿孔结构表面的光刻胶进行固化的结构截面图。
附图标记说明：1-晶圆；2-光刻胶。
具体实施方式
为使本发明解决的技术问题、采用的技术方案和达到的技术效果更加清楚，下面将结合附图对本发明实施例的技术方案作进一步的详细描述，显然，所描述的实施例仅仅是本发明一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域技术人员在没有作出创造性劳动前提下所获得的所有其他实施例，都属于本发明保护的范围。
请分别参考：图1，其是应用本发明提供的硅穿孔结构的绝缘层底部开窗制造方法的形成了硅穿孔晶圆的结构截面图；图2，其是应用本发明提供的硅穿孔结构的绝缘层底部开窗制造方法的在硅穿孔结构表面涂布光刻胶的结构截面图；图3，其是应用本发明提供的硅穿孔结构的绝缘层底部开窗制造方法的对硅穿孔结构表面的光刻胶进行曝光并显影的结构截面图；图4，其是应用本发明提供的硅穿孔结构的绝缘层底部开窗制造方法的对硅穿孔结构表面的光刻胶进行固化的结构截面图。图中，斜线填充区域代表晶圆1，空白区域代表涂布的光刻胶，叉形填充区域代表固化的光刻胶。
为使本发明的上述目的、特征和优点能够更为明显易懂，下面结合附图1至附图4对本发明的具体实施例做详细的说明。
一种硅穿孔结构的绝缘层底部开窗制造方法，包括：
提供一晶圆1，该晶圆1具备正面和背面，在所述正面形成硅穿孔结构，若干个硅穿孔结构组成硅穿孔结构阵列；
在所述硅穿孔结构的表面涂布封装光刻胶2；
对所述硅穿孔结构的孔底的光刻胶部分进行曝光并显影，形成图形漏出孔底；
固化剩余的光刻胶部分，以便在所述硅穿孔结构的孔底形成具备开窗结构的绝缘层。
本发明实施例提供的硅穿孔结构的绝缘层底部开窗制造方法，选择可光刻和固化成膜的光刻胶材料，采用旋转涂布的工艺，在硅穿孔结构内制备具备保形特点的光刻胶膜，然后采用掩膜进行曝光并显影实现硅穿孔结构的孔底的开窗，最后固化成膜完成绝缘层的制备。该制造方法实现了本技术领域首次采用光刻胶2制备硅穿孔结构的绝缘层和首次采用光刻工艺对硅穿孔结构的孔底绝 缘层进行低成本、高可靠的开窗。
本发明实施例提供的硅穿孔结构的绝缘层底部开窗制造方法，采用半导体光刻工艺进行绝缘层底部开窗，提高了传统的等离子体刻蚀氧化硅绝缘层开窗的效率，同时也克服了因激光烧蚀非光敏聚合物绝缘层产生的高温而带来的器件受损，稳定性高、可实施性强且成本低廉。
优选地，所述硅穿孔结构通过非等向性硅蚀刻工艺进行刻蚀而制成，刻蚀过程中CF4气体和SF6气体的流量比为2∶1。
非等向性硅蚀刻工艺为广泛应用的硅蚀刻工艺方法，起源于德国Robert Bosch公司，被称为Bosch气体交替技术(Bosch gas-switching technique)或Bosch工艺。非等向性硅蚀刻工艺利用具有非等向性蚀刻反应的等离子源，与通过反应形成高分子蔽覆层(polymeric passivation layer)的另一种等离子源，两者反复交替进行的方法，以达到硅蚀刻的工艺要求。常用的在硅蚀刻生产过程中的气体选择，多是采用SF6(六氟化硫)，因其可在能量只有20eV的条件下分解出6个氟原子，而这些氟原子会继续与Si反应形成挥发性SiF4(四氟化硅)。
优选地，所述晶圆1的直径为8英寸或12英寸，所述硅穿孔结构的孔径为60um，孔深为120um。
特别地，所述晶圆1和硅穿孔结构的不限于上述结构参数，一般孔径大于50um，深宽比小于5∶1的硅穿孔结构都可采用该技术方法。
8英寸或者12英寸是目前市场上较为常见的晶圆1规格，选择8英寸或者12英寸的晶圆1，大大提高了本发明实施例提供的硅穿孔结构的绝缘层底部开窗制造方法的可实施性，且成本低廉。
优选地，所述硅穿孔结构的表面通过旋涂工艺涂布封装光刻胶2，光刻胶2 的粘度小于100mPa*s；
所述硅穿孔结构的上表面涂布的光刻胶厚度为8-10um，所述硅穿孔结构的上拐角涂布的光刻胶厚度为3-4um，所述硅穿孔结构的侧壁涂布的光刻胶厚度为7-9um，所述硅穿孔结构的孔底涂布的光刻胶部分的厚度为6-8um。
其中，100mPa*s＝1gm/(cm*sec)。
优选地，所述旋涂工艺包括：
第一步，以200rpm-400rpm的转速旋涂，持续时间为20s-180s；
第二步，以700rpm-1000rpm的转速旋涂，持续时间为30s-180s。
一般情况下，旋涂工艺包括三个步骤，分别为：配料、高速旋转和挥发成膜，通过控制匀胶机匀胶的时间、转速、滴液量、所用溶液的浓度以及粘度，可以控制光刻胶2成膜的厚度。
光刻胶2，又称光致抗蚀剂，是由感光树脂、增感剂和溶剂三种主要成分组成的对光敏感的混合液体。感光树脂经光照后，在曝光区能很快地发生光固化反应，使得这种材料的物理性能，特别是溶解性、亲合性等发生明显变化。而且经适当的溶剂处理，溶去可溶性部分，可得到所需图像。且本发明实施例中用的封装光刻胶相比于传统的光刻胶而言，组成中至少还应该含有固化剂，在完成图形化后，采用程序升温可对剩余的光刻胶材料进行固化成膜，完成绝缘层的制备。
优选地，所述在所述正面形成硅穿孔结构之后，在所述硅穿孔结构的表面涂布封装光刻胶2之前，还包括：对形成硅穿孔结构的晶圆1进行SC1清洗和氮气吹干。
SC1清洗采用SC1清洗液进行清洗，其中SC1清洗液即APM(Ammonium hydroxide/hydrogen peroxide/DI water mixture、NH4OH/H2O2/H2O at 65～ 80℃)，其配方为：NH4OH∶H2O2∶H2O＝1∶1∶5～1∶2∶7。SC1清洗以氧化和微蚀刻来底切和去除表面颗粒，也可去除轻微有机污染物及部分金属化污染物，提高晶圆1表面的亲水性。
优选地，所述SC1清洗的清洗时间为5分钟，氮气吹干的吹干时间为2分钟。
SC1清洗和氮气吹干的过程，可以使得应用本发明实施例提供的硅穿孔结构的绝缘层底部开窗制造方法制备出的硅穿孔结构的绝缘层的良品率更高，精度更细。
优选地，所述曝光的曝光时间为60秒，所述显影的显影时间为60-120秒。
曝光过程为经光源作用将原始底片上的图像转移到感光底板(即晶圆1)上。显影过程为通过碱液作用，将未发生光聚合反应之感光材料部分(即光刻胶2)冲掉。
本发明实施例提供的硅穿孔结构的绝缘层底部开窗制造方法，主要发展光敏性的聚合物绝缘层，其首先保持聚合物绝缘层的诸多优势，同时可以采用半导体的标准光刻工艺，对孔底进行曝光显影实现开窗，最后采用固化完成绝缘层的制备。
本发明实施例提供的硅穿孔结构的绝缘层底部开窗制造方法，采用旋涂工艺制备光刻胶2的硅穿孔绝缘层，克服了气相沉积无机氧化硅绝缘层的高昂设备成本，同时采用标准半导体光刻工艺进行绝缘层底部开窗，提高了传统的等离子体刻蚀氧化硅绝缘层开窗的效率，也克服了激光烧蚀非光敏聚合物绝缘层开窗的高温带来的器件受损。
本发明实施例提供的硅穿孔结构的绝缘层底部开窗制造方法，为三维微纳 结构的绝缘层保形制备提供一种新的解决方案，同时为三维微纳结构的底部图形化二次加工提供解决方案。
优选地，通过升温过程固化所述剩余的光刻胶部分，所述升温过程为：
从25摄氏度起，按每分钟升高5摄氏度的升温速度将温度升至120摄氏度，在120摄氏度保持恒温60分钟；
接着以所述升温速度将温度升至150摄氏度，在150摄氏度保持恒温30分钟；
再以所述升温速度将温度升至200摄氏度，在200摄氏度保持恒温60分钟。
通过实验，该升温过程固化光刻胶2可以获得良好的效果，在后续的封装工艺中，该图形的性质稳定持久。
本发明实施例提供的硅穿孔结构的绝缘层底部开窗制造方法，在8英寸或者12英寸的晶圆1上，采用Bosch工艺刻蚀Ar＝2∶1，制得孔径60um，孔深120um的硅穿孔结构。在进行光刻胶2的涂布之前，晶圆1经过标准的SC1清洗、氮气吹干。然后采用旋涂的工艺制备具备保形特点的光刻胶绝缘层。接着采用步进(Stepper)曝光机对孔底的光刻胶部分材料进行曝光显影以实现底部开窗。最后，采用程序控制升温的方法对完成底部开窗的光刻胶2进行固化成膜，以实现绝缘层的制备和底部开窗工艺。
本发明实施例提供的硅穿孔结构的绝缘层底部开窗制造方法，是一种硅穿孔封装工艺制程中的绝缘层的制备以及底部开窗的新方法，达到了漏出焊盘以实现信号从穿孔的正面导通到背面的目的。
以下为本发明实施例提供的硅穿孔结构的实施例。硅穿孔结构的实施例与上述的硅穿孔结构的绝缘层底部开窗制造方法的实施例属于同一构思，硅穿孔 结构的实施例中未详尽描述的细节内容，可以参考上述硅穿孔结构的绝缘层底部开窗制造方法的实施例。
一种硅穿孔结构，该硅穿孔结构的绝缘层应用上述的硅穿孔结构的绝缘层底部开窗制造方法进行制造。
本发明实施例提供的硅穿孔结构，采用半导体光刻工艺进行绝缘层底部开窗，提高了传统的等离子体刻蚀氧化硅绝缘层开窗的效率，同时也克服了因激光烧蚀非光敏聚合物绝缘层产生的高温而带来的器件受损，稳定性高、可实施性强且成本低廉。
一种硅穿孔结构的绝缘层底部开窗制造方法和硅穿孔结构，采用半导体光刻工艺进行绝缘层底部开窗，提高了传统的等离子体刻蚀氧化硅绝缘层开窗的效率，同时也克服了因激光烧蚀非光敏聚合物绝缘层产生的高温而带来的器件受损。
以上内容仅为本发明的较佳实施例，对于本领域的普通技术人员，依据本发明的思想，在具体实施方式及应用范围上均会有改变之处，本说明书内容不应理解为对本发明的限制。

Claims (10)

  1. 一种硅穿孔结构的绝缘层底部开窗制造方法，其特征在于，包括：
    提供一晶圆，该晶圆具备正面和背面，在所述正面形成硅穿孔结构，若干个硅穿孔结构组成硅穿孔结构阵列；
    在所述硅穿孔结构的表面涂布封装光刻胶；
    对所述硅穿孔结构的孔底的光刻胶部分进行曝光并显影，形成图形漏出孔底；
    固化剩余的光刻胶部分，以便在所述硅穿孔结构的孔底形成具备开窗结构的绝缘层。
  2. 根据权利要求1所述的硅穿孔结构的绝缘层底部开窗制造方法，其特征在于，所述硅穿孔结构通过非等向性硅蚀刻工艺进行刻蚀而制成，刻蚀过程中CF4气体和SF6气体的流量比为2∶1。
  3. 根据权利要求1所述的硅穿孔结构的绝缘层底部开窗制造方法，其特征在于，所述晶圆的直径为8英寸或12英寸，所述硅穿孔结构的孔径为60um，孔深为120um。
  4. 根据权利要求1所述的硅穿孔结构的绝缘层底部开窗制造方法，其特征在于，所述硅穿孔结构的表面通过旋涂工艺涂布封装光刻胶，光刻胶的粘度小于100mPa*s；
    所述硅穿孔结构的上表面涂布的光刻胶厚度为8-10um，所述硅穿孔结构的上拐角涂布的光刻胶厚度为3-4um，所述硅穿孔结构的侧壁涂布的光刻胶厚度为7-9um，所述硅穿孔结构的孔底涂布的光刻胶部分的厚度为6-8um。
  5. 根据权利要求4所述的硅穿孔结构的绝缘层底部开窗制造方法，其特征在于，所述旋涂工艺包括：
    第一步，以200rpm-400rpm的转速旋涂，持续时间为20s-180s；
    第二步，以700rpm-1000rpm的转速旋涂，持续时间为30s-180s。
  6. 根据权利要求1所述的硅穿孔结构的绝缘层底部开窗制造方法，其特征在于，所述在所述正面形成硅穿孔结构之后，在所述硅穿孔结构的表面涂布封装光刻胶之前，还包括：对形成硅穿孔结构的晶圆进行SCl清洗和氮气吹干。
  7. 根据权利要求6所述的硅穿孔结构的绝缘层底部开窗制造方法，其特征在于，所述SCl清洗的清洗时间为5分钟，氮气吹干的吹干时间为2分钟。
  8. 根据权利要求1所述的硅穿孔结构的绝缘层底部开窗制造方法，其特征在于，所述曝光的曝光时间为60秒，所述显影的显影时间为60-120秒。
  9. 根据权利要求1所述的硅穿孔结构的绝缘层底部开窗制造方法，其特征在于，通过升温过程固化所述剩余的光刻胶部分，所述升温过程为：
    从25摄氏度起，按每分钟升高5摄氏度的升温速度将温度升至120摄氏度，在120摄氏度保持恒温60分钟；
    接着以所述升温速度将温度升至150摄氏度，在150摄氏度保持恒温30分钟；
    再以所述升温速度将温度升至200摄氏度，在200摄氏度保持恒温60分钟。
  10. 一种硅穿孔结构，其特征在于，所述硅穿孔结构的绝缘层应用如权利要求1至9任意一项所述的硅穿孔结构的绝缘层底部开窗制造方法进行制造。
PCT/CN2015/092701 2015-08-07 2015-10-23 一种硅穿孔结构的绝缘层底部开窗制造方法和硅穿孔结构 Ceased WO2017024675A1 (zh)

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