WO2017012164A1 - Boa型液晶显示面板及其制作方法 - Google Patents

Boa型液晶显示面板及其制作方法 Download PDF

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Publication number
WO2017012164A1
WO2017012164A1 PCT/CN2015/087724 CN2015087724W WO2017012164A1 WO 2017012164 A1 WO2017012164 A1 WO 2017012164A1 CN 2015087724 W CN2015087724 W CN 2015087724W WO 2017012164 A1 WO2017012164 A1 WO 2017012164A1
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Prior art keywords
black matrix
tft
substrate
liquid crystal
layer
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PCT/CN2015/087724
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English (en)
French (fr)
Inventor
曾勉
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深圳市华星光电技术有限公司
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Priority to US14/778,085 priority Critical patent/US10048553B2/en
Publication of WO2017012164A1 publication Critical patent/WO2017012164A1/zh

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    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136209—Light shielding layers, e.g. black matrix, incorporated in the active matrix substrate, e.g. structurally associated with the switching element
    • G—PHYSICS
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    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
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    • G02F1/1335—Structural association of cells with optical devices, e.g. polarisers or reflectors
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    • G02F1/133514—Colour filters
    • G02F1/133516—Methods for their manufacture, e.g. printing, electro-deposition or photolithography
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    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
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    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
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    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
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    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259—Multistep manufacturing methods
    • H01L27/1262—Multistep manufacturing methods with a particular formation, treatment or coating of the substrate
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    • H01—ELECTRIC ELEMENTS
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    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259—Multistep manufacturing methods
    • H01L27/1288—Multistep manufacturing methods employing particular masking sequences or specially adapted masks, e.g. half-tone mask
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    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
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    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
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    • H01L29/76—Unipolar devices, e.g. field effect transistors
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    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
    • H01L29/78633—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device with a light shield
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
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    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
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Definitions

  • the present invention relates to the field of display technologies, and in particular, to a BOA type liquid crystal display panel and a manufacturing method thereof.
  • LCDs liquid crystal displays
  • Various consumer electronic products such as digital assistants, digital cameras, notebook computers, and desktop computers have become mainstream in display devices.
  • liquid crystal displays which include a backlight module and a liquid crystal display panel combined with the backlight module.
  • a liquid crystal display panel in a Thin Film Transistor Liquid Crystal Display is generally a color filter substrate (CF), a thin film transistor array substrate (Thin Film Transistor Array Substrate, TFT Array Substrate), And a liquid crystal layer disposed between the two substrates, the working principle is that the rotation of the liquid crystal molecules of the liquid crystal layer is controlled by applying a driving voltage on the two substrates, and the light of the backlight module is refracted. Picture.
  • TFT thin film transistor
  • the active layer is very sensitive to light, and the light intensity is small.
  • the change also affects the characteristics of the TFT device, that is, when the TFT is turned on, even if it is irradiated with weak light, a light leakage current (Photo Ioff) is generated in the active layer between the source and the drain, with Photo With the increase of Ioff, the characteristics of the TFT device will be significantly degraded, causing problems such as cross talk, flicker and afterimage in the LCD display, which affect the display quality.
  • Photo Ioff light leakage current
  • a conventional liquid crystal display panel includes an array substrate 100 and a color filter substrate 200 disposed opposite to each other, and a liquid crystal layer 300 interposed therebetween.
  • a lower substrate 110, a gate electrode 120, a gate insulating layer 130, an active layer 140, a source/drain 150, a passivation protective layer 160, and a pixel electrode 170 are disposed in this order from the bottom to the top of the array substrate 100,
  • the gate electrode 120, the gate insulating layer 130, the active layer 140, and the source/drain 150 constitute a TFT; on the side of the color filter substrate 200, an upper substrate 210, a black matrix 220 (Black Matrix, BM), and a color are disposed.
  • Black Matrix, BM Black Matrix
  • the opaque BM220 is disposed on the side of the color filter substrate 200, that is, "BM On CF", and BM220 Corresponding to the TFT, Gate line and Data line, it is used to block the light leakage at the TFT, Gate Line, and Data Line positions to maintain display quality.
  • the "BM On CF” type liquid crystal display panel cannot block the light from the backlight module under the array substrate 100 to the active layer 140, thereby inevitably generating light leakage current, affecting the performance of the TFT device and The screen displays the quality.
  • the BM220 is difficult to accurately align with the TFT, the Gate Line, and the Data Line, and at the same time, the number of masks required for manufacturing the liquid crystal display panel is large, and the process is large. Longer time and higher production costs.
  • An object of the present invention is to provide a BOA type liquid crystal display panel, which can effectively solve the problem of light leakage current caused by backlight light being irradiated onto the active layer of the TFT, ensure stable performance of the TFT device, and improve picture display quality.
  • Another object of the present invention is to provide a method for fabricating a BOA liquid crystal display panel, which can effectively solve the problem of light leakage current caused by backlight light being irradiated onto the active layer of the TFT, ensure stable performance of the TFT device, and improve picture display. Quality, on the one hand, saves the mask, shortens the process time and improves production efficiency.
  • the present invention provides a BOA type liquid crystal display panel, comprising an array substrate and a color filter substrate disposed opposite to each other, and a liquid crystal layer interposed between the array substrate and the color filter substrate;
  • the array substrate includes a lower substrate, a first black matrix disposed on the lower substrate, a TFT integrally disposed on the first black matrix, a passivation protective layer covering the TFT, the first black matrix and the lower substrate, and a pixel electrode disposed on the passivation protective layer and in contact with a source/drain of the TFT;
  • the color filter substrate includes an upper substrate, a color resist layer disposed on a side of the upper substrate facing the array substrate, and a common electrode covering the color resist layer and the upper substrate.
  • a second black matrix disposed between the TFT and the passivation protective layer is further included, the second black matrix and the first black matrix completely surrounding the TFT.
  • the TFT is a top gate type structure, and includes a source/drain, an active layer, a gate insulating layer, and a gate which are sequentially disposed on the first black matrix from bottom to top.
  • the pixel electrode contacts the source/drain via a via extending through the passivation protective layer.
  • the pixel electrode contacts the source/drain via via holes penetrating the passivation protective layer and the second black matrix.
  • the present invention also provides a BOA type liquid crystal display panel, comprising an array substrate and a color filter substrate disposed opposite to each other, and a liquid crystal layer interposed between the array substrate and the color filter substrate;
  • the array substrate includes a lower substrate, a first black matrix disposed on the lower substrate, and an overall a TFT on the first black matrix, a passivation protective layer covering the TFT, a first black matrix and a lower substrate, and a pixel electrode disposed on the passivation protective layer and in contact with a source/drain of the TFT ;
  • the color filter substrate includes an upper substrate, a color resist layer disposed on a side of the upper substrate facing the array substrate, and a common electrode covering the color resist layer and the upper substrate;
  • a second black matrix disposed between the TFT and the passivation protective layer, the second black matrix and the first black matrix completely surrounding the TFT;
  • the TFT is a top gate type structure, and includes a source/drain, an active layer, a gate insulating layer, and a gate which are sequentially disposed on the first black matrix from bottom to top;
  • the pixel electrode contacts the source/drain via via holes penetrating the passivation protective layer and the second black matrix.
  • the present invention also provides a method for fabricating a BOA liquid crystal display panel. After a first black matrix is formed on a lower substrate on one side of the array substrate, a TFT entirely on the first black matrix is formed; A color resist layer and a common electrode are formed on the side.
  • a second black matrix is further fabricated on the TFT such that the second black matrix and the first black matrix completely surround the TFT; and the first black matrix and the second black matrix are formed using the same mask.
  • the manufacturing method of the BOA type liquid crystal display panel includes the following steps:
  • Step 1 providing a substrate, coating a black resin on the lower substrate, and patterning the black resin using a first mask to form a first black matrix;
  • Step 2 sputtering or evaporating a metal thin film on the first black matrix and the lower substrate, and patterning the metal thin film by using a second mask to form a source/drain on the first black matrix.
  • Step 3 continuously depositing a semiconductor film, an insulating film on the source/drain and the first black matrix by a chemical vapor deposition process, and then sputtering or vapor-depositing another metal film, using a third mask
  • the other metal film, the insulating film and the semiconductor film are simultaneously patterned to form an active layer, a gate insulating layer, and a gate sequentially located on the source/drain and the first black matrix;
  • the source/drain, the active layer, the gate insulating layer, and the gate constitute a TFT
  • Step 4 depositing a passivation protective layer on the TFT and the lower substrate by a chemical vapor deposition process, and patterning the passivation protective layer by using a fourth mask to form a via hole penetrating the passivation protective layer To expose part of the source/drain;
  • Step 5 depositing an ITO film on the passivation protective layer, patterning the ITO film by using a fifth mask to form a pixel electrode, and the pixel electrode contacts the source/drain via the via hole to complete Fabrication of an array substrate;
  • Step 6 Providing an upper substrate, and sequentially forming a color resist layer and a common electrode layer on the upper substrate. Finishing the production of the color film substrate;
  • the array substrate and the color filter substrate are paired, liquid crystal molecules are poured between the array substrate and the color filter substrate to form a liquid crystal layer, and the array substrate and the color filter substrate are packaged.
  • the manufacturing method of the BOA type liquid crystal display panel includes the following steps:
  • Step 1 providing a substrate, coating a black resin on the lower substrate, and patterning the black resin using a first mask to form a first black matrix;
  • Step 2 sputtering or evaporating a metal thin film on the first black matrix and the lower substrate, and patterning the metal thin film by using a second mask to form a source/drain on the first black matrix.
  • Step 3 continuously depositing a semiconductor film, an insulating film on the source/drain and the first black matrix by a chemical vapor deposition process, and then sputtering or vapor-depositing another metal film, using a third mask
  • the other metal film, the insulating film and the semiconductor film are simultaneously patterned to form an active layer, a gate insulating layer, and a gate sequentially located on the source/drain and the first black matrix;
  • the source/drain, the active layer, the gate insulating layer, and the gate constitute a TFT
  • Step 4 applying another layer of black resin on the TFT and the lower substrate, and still patterning the other layer of black resin using a first mask to form a second black matrix, so that the second The black matrix and the first black matrix completely surround the TFT;
  • Step 5 depositing a passivation protective layer on the second black matrix and the lower substrate by a chemical vapor deposition process, and patterning the passivation protective layer by using a fourth mask to form a passivation protective layer a via hole with the second black matrix to expose a portion of the source/drain;
  • Step 6 depositing an ITO film on the passivation protective layer, patterning the ITO film by using a fifth mask to form a pixel electrode, and the pixel electrode contacts the source/drain via the via hole to complete Fabrication of an array substrate;
  • Step 7 Providing an upper substrate, sequentially forming a color resist layer and a common electrode layer on the upper substrate, and completing the fabrication of the color filter substrate;
  • the array substrate and the color filter substrate are paired, liquid crystal molecules are poured between the array substrate and the color filter substrate to form a liquid crystal layer, and the array substrate and the color filter substrate are packaged.
  • the material of the gate and the source/drain is a combination of one or more of molybdenum, titanium, aluminum, copper, nickel, and the material of the gate insulating layer and the passivation protective layer is silicon oxide and nitrogen. Silicon or a combination of the two.
  • the invention provides a BOA type liquid crystal display panel, wherein the TFT is entirely located on the first black matrix, and the first black matrix can block the light from the backlight module under the array substrate to the active layer.
  • a second black matrix is disposed between the TFT and the passivation protection layer, and the second black matrix and the first black matrix completely surround the TFT, and can block the backlight module from under the array substrate.
  • the method for fabricating a BOA liquid crystal display panel according to the present invention after the first black matrix is formed on the lower substrate on the side of the array substrate, the TFTs integrally located on the first black matrix are formed, and the first black matrix can be Blocking the light from the backlight module under the array substrate to the active layer, effectively solving the problem of light leakage current caused by the light being irradiated onto the active layer of the TFT, and further, making a second black matrix on the TFT, so that The second black matrix and the first black matrix completely surround the TFT, and can block the light from the backlight module under the array substrate to the active layer and the reflected light from the side and above to the active layer, preferably Preventing light from being irradiated onto the active layer of the TFT, avoiding light leakage current, ensuring stable performance of the TFT device, and improving picture display quality; and simultaneously forming a TFT active layer, a gate insulating layer, and a gate using a mask The first black matrix and the second black matrix are formed
  • FIG. 1 is a schematic structural view of a conventional BM On CF type liquid crystal display panel
  • FIG. 2 is a schematic structural view of a first embodiment of a BOA type liquid crystal display panel of the present invention
  • FIG. 3 is a schematic structural view of a second embodiment of a BOA type liquid crystal display panel of the present invention.
  • FIG. 4 is a flow chart of a first embodiment of a method for fabricating a BOA type liquid crystal display panel of the present invention
  • step 1 is a schematic diagram of step 1 of a first embodiment of a method for fabricating a BOA type liquid crystal display panel of the present invention
  • step 2 is a schematic diagram of step 2 of the first embodiment of the method for fabricating a BOA type liquid crystal display panel of the present invention
  • FIG. 7 is a step of a first embodiment of a method for fabricating a BOA type liquid crystal display panel of the present invention. Schematic diagram of 3;
  • step 5 of the first embodiment of the method for fabricating a BOA type liquid crystal display panel of the present invention is a schematic diagram of step 5 of the first embodiment of the method for fabricating a BOA type liquid crystal display panel of the present invention.
  • step 6 is a schematic diagram of step 6 of the first embodiment of the method for fabricating a BOA type liquid crystal display panel of the present invention
  • FIG. 11 is a flow chart showing a second embodiment of a method for fabricating a BOA type liquid crystal display panel of the present invention.
  • step 4 is a schematic diagram of step 4 of a second embodiment of a method for fabricating a BOA type liquid crystal display panel of the present invention.
  • step 5 is a schematic diagram of step 5 of a second embodiment of a method for fabricating a BOA type liquid crystal display panel of the present invention.
  • FIG. 17 is a schematic view showing a step 6 of a second embodiment of a method for fabricating a BOA type liquid crystal display panel of the present invention.
  • Figure 18 is a schematic view showing the seventh step of the second embodiment of the method for fabricating a BOA type liquid crystal display panel of the present invention.
  • the present invention first provides a BOA type liquid crystal display panel.
  • the so-called BOA means that a black matrix is disposed on the side of the array substrate (BM On Array).
  • 2 is a first embodiment of a BOA liquid crystal display panel of the present invention, comprising an array substrate 1 and a color filter substrate 2 disposed opposite to each other, and a liquid crystal layer interposed between the array substrate 1 and the color filter substrate 2.
  • the array substrate 1 includes a lower substrate 11, a first black matrix 12 disposed on the lower substrate 11, a TFT T entirely on the first black matrix 12, covering the TFT T, the first black matrix 12 and the lower a passivation protective layer 18 of the substrate 11 and a passivation protective layer 18 disposed on The pixel electrode 19 where the source/drain 13 of the TFT T is in contact.
  • the color filter substrate 2 includes an upper substrate 21, a color resist layer 22 disposed on a side of the upper substrate 21 facing the array substrate 1, and a common electrode 23 covering the color resist layer 22 and the upper substrate 21.
  • the TFT T is a top gate structure, and includes a source/drain 13, an active layer 14, a gate insulating layer 15, and a gate 16 which are sequentially disposed on the first black matrix 12 from bottom to top. .
  • the pixel electrode 19 contacts the source/drain 13 via a via 181 penetrating the passivation protective layer 18.
  • the material of the gate 16 and the source/drain electrodes 13 is a stack of one or more of molybdenum (Mo), titanium (Ti), aluminum (Al), copper (Cu), and nickel (Ni).
  • Mo molybdenum
  • Ti titanium
  • Al aluminum
  • Cu copper
  • Ni nickel
  • the material of the gate insulating layer 15 and the passivation protective layer 18 is silicon oxide (SiOx), silicon nitride (SiNx) or a combination of the two
  • the material of the pixel electrode 19 is indium tin (Indium Tin). Oxide, ITO).
  • the TFT T is integrally disposed on the first black matrix 12, and the first black matrix 12 can block the light from the backlight module under the array substrate to the active layer 14 to effectively solve the problem of the light being irradiated to the TFT.
  • the active layer 14 of T generates a light leakage current problem, ensures stable performance of the TFT device, and improves picture display quality.
  • a second embodiment of a BOA type liquid crystal display panel of the present invention is different from the first embodiment in that a second black matrix 17 disposed between the TFT T and the passivation protective layer 18 is further included.
  • the second black matrix 17 and the first black matrix 12 completely surround the TFT T.
  • the pixel electrode 19 contacts the source/drain 13 via a via 871 penetrating the passivation protective layer 18 and the second black matrix 17.
  • the second embodiment further provides a second black matrix 17 between the TFT T and the passivation protective layer 18.
  • the second black matrix 17 and the first black matrix 12 completely surround the TFT T, and can block the array substrate.
  • the light from the lower backlight module that is directed toward the active layer 14 can block the reflected light from the side and the upper surface toward the active layer 14 to better prevent the light from being incident on the active layer 14 of the TFT T, thereby avoiding Light leakage current is generated to ensure stable performance of the TFT device and improve picture display quality.
  • the present invention also provides a method for fabricating a BOA type liquid crystal display panel.
  • FIG. 4 it is a flowchart of a first embodiment of a method for fabricating a BOA type liquid crystal display panel according to the present invention.
  • the BOA type liquid crystal display panel shown includes the following steps:
  • Step 1 as shown in FIG. 5, a substrate 11 is provided, a black resin is coated on the lower substrate 11, and a black resin is patterned using a first mask to form a first black matrix 12.
  • the lower substrate 11 is preferably a glass substrate.
  • the patterning process includes processes such as exposure, development, etching, and the like.
  • Step 2 as shown in FIG. 6, sputtering or steaming on the first black matrix 12 and the lower substrate 11 A metal film is plated, and the metal film is patterned using a second mask to form source/drain electrodes 13 on the first black matrix 12.
  • the metal thin film that is, the material of the source/drain electrodes 13 is a stacked combination of one or more of Mo, Ti, Al, Cu, and Ni.
  • the patterning process includes processes such as exposure, development, wet etching, and the like.
  • Step 3 as shown in FIG. 7, a semiconductor film, an insulating film is continuously deposited on the source/drain 13 and the first black matrix 12 by a chemical vapor deposition process, and another metal film is sputtered or evaporated, and used.
  • the third reticle performs simultaneous patterning on the other metal film, the insulating film and the semiconductor film to form an active layer 14 and a gate insulating layer which are sequentially disposed on the source/drain 13 and the first black matrix 12. 15, and the gate 16.
  • the source/drain electrodes 13, the active layer 14, the gate insulating layer 15, and the gate electrode 16 constitute a TFT T.
  • the insulating film that is, the material of the gate insulating layer 15 is SiOx, SiNx or a combination of the two; the material of the other metal film, that is, the gate 16 is Mo, Ti, Al, Cu, Ni.
  • the patterning process includes processes such as exposure, development, wet etching, dry etching, and the like.
  • Step 4 as shown in FIG. 8, a passivation protective layer 18 is deposited on the TFT T and the lower substrate 11 by a chemical vapor deposition process, and the passivation protective layer 18 is patterned using a fourth mask.
  • a via 181 is formed through the passivation protective layer 18 to expose a portion of the source/drain electrodes 13.
  • the material of the passivation protective layer 18 is SiOx, SiNx or a combination of the two.
  • the patterning process includes processes such as exposure, development, dry etching, and the like.
  • Step 5 depositing an ITO film on the passivation protective layer 18, patterning the ITO film using a fifth mask to form a pixel electrode 19, and the pixel electrode 19 is
  • the via 181 contacts the source/drain 13 to complete the fabrication of the array substrate 1.
  • the patterning process includes processes such as exposure, development, etching, and the like.
  • Step 6 as shown in FIG. 10, an upper substrate 21 is provided, a color resist layer 22 and a common electrode layer 23 are sequentially formed on the upper substrate 21, and a photoresist spacer is formed on the common electrode layer 23 (not shown). Finishing the coloring film substrate 2; then, the array substrate 1 and the color filter substrate 2 are paired, liquid crystal molecules are poured between the array substrate 1 and the color filter substrate 2, and the liquid crystal layer 3 is formed, and the array substrate 1 is The color filter substrate 2 is packaged.
  • the upper substrate 21 is preferably a glass substrate.
  • the TFT T entirely on the first black matrix 12 is formed.
  • the first black matrix 12 can block the light from the backlight module under the array substrate to the active layer 14 , and can effectively solve the active layer 14 irradiated to the TFT T by the light.
  • the problem of light leakage current is generated to ensure stable performance of the TFT device and improve the display quality of the screen.
  • the mask can be saved, the process time can be shortened, and the production efficiency can be improved.
  • FIG. 11 is a flowchart of a second embodiment of a method for fabricating a BOA liquid crystal display panel according to the present invention.
  • the second embodiment corresponds to the BOA liquid crystal display panel shown in FIG. 3, and includes the following steps:
  • Step 1 as shown in FIG. 12, a substrate 11 is provided, a black resin is coated on the lower substrate 11, and a black resin is patterned using a first mask to form a first black matrix 12.
  • the lower substrate 11 is preferably a glass substrate.
  • the patterning process includes processes such as exposure, development, etching, and the like.
  • Step 2 As shown in FIG. 13, a metal film is sputtered or vapor-deposited on the first black matrix 12 and the lower substrate 11, and the metal film is patterned by using a second mask to form a first film. Source/drain 13 on black matrix 12.
  • the metal thin film that is, the material of the source/drain electrodes 13 is a stacked combination of one or more of Mo, Ti, Al, Cu, and Ni.
  • the patterning process includes processes such as exposure, development, wet etching, and the like.
  • Step 3 as shown in FIG. 14, a semiconductor film, an insulating film is continuously deposited on the source/drain 13 and the first black matrix 12 by a chemical vapor deposition process, and another metal film is sputtered or evaporated, and used.
  • the third reticle performs simultaneous patterning on the other metal film, the insulating film and the semiconductor film to form an active layer 14 and a gate insulating layer which are sequentially disposed on the source/drain 13 and the first black matrix 12. 15, and the gate 16.
  • the source/drain electrodes 13, the active layer 14, the gate insulating layer 15, and the gate electrode 16 constitute a TFT T.
  • the insulating film that is, the material of the gate insulating layer 15 is SiOx, SiNx or a combination of the two; the material of the other metal thin film gate 16 is one of Mo, Ti, Al, Cu, Ni.
  • the patterning process includes processes such as exposure, development, wet etching, dry etching, and the like.
  • Step 4 as shown in FIG. 15, another black resin is coated on the TFT T and the lower substrate 11, and the other black resin is still patterned by using a first mask to form a second
  • the black matrix 17 is such that the second black matrix 17 and the first black matrix 12 completely surround the TFT T.
  • Step 5 as shown in FIG. 16, a passivation protective layer 18 is deposited on the second black matrix 17 and the lower substrate 11 by a chemical vapor deposition process, and the passivation protective layer 18 is patterned using a fourth mask. Processing to form a via hole penetrating the passivation protective layer 18 and the second black matrix 17 871 to expose a portion of the source/drain electrodes 13.
  • the material of the passivation protective layer 18 is SiOx, SiNx or a combination of the two.
  • the patterning process includes processes such as exposure, development, dry etching, and the like.
  • Step 6 depositing an ITO film on the passivation protective layer 18, patterning the ITO film using a fifth mask to form a pixel electrode 19, and the pixel electrode 19 is
  • the via 871 contacts the source/drain 13 to complete the fabrication of the array substrate 1.
  • the patterning process includes processes such as exposure, development, etching, and the like.
  • Step 7 as shown in FIG. 18, an upper substrate 21 is provided, a color resist layer 22 and a common electrode layer 23 are sequentially formed on the upper substrate 21, and a photoresist spacer is formed on the common electrode layer 23 (not shown). Finishing the coloring film substrate 2; then, the array substrate 1 and the color filter substrate 2 are paired, liquid crystal molecules are poured between the array substrate 1 and the color filter substrate 2, and the liquid crystal layer 3 is formed, and the array substrate 1 is The color filter substrate 2 is packaged.
  • the upper substrate 21 is preferably a glass substrate.
  • the TFT T entirely on the first black matrix 12 is formed.
  • the second black matrix 17 is further formed on the TFT T, so that the second black matrix 17 and the first black matrix 12 completely surround the TFT T, and the light from the backlight module under the array substrate 1 to the active layer 14 can be blocked.
  • the reflected light from the side and the upper surface of the active layer 14 is better to prevent the light from being irradiated onto the active layer 14 of the TFT T, thereby avoiding light leakage current, ensuring stable performance of the TFT device, and improving picture display quality;
  • the active layer 14 , the gate insulating layer 15 , and the gate electrode 16 of the TFT are simultaneously formed using a mask, and the first black matrix 12 and the second black matrix 17 are formed using the same mask, thereby saving the mask and shortening the process. Time to improve production efficiency.
  • the TFT is entirely located on the first black matrix, and the first black matrix can block the light from the backlight module under the array substrate to the active layer, thereby effectively solving the light. Irradiating the active layer of the TFT to generate a light leakage current problem, further, providing a second black matrix between the TFT and the passivation protective layer, the second black matrix and the first black matrix completely surrounding the TFT, capable of blocking
  • the light from the backlight module under the array substrate is directed to the active layer and the reflected light from the side and above to the active layer to better prevent light from being irradiated onto the active layer of the TFT to avoid light leakage current. Ensure stable performance of TFT devices and improve picture display quality.
  • a TFT entirely on the first black matrix is formed, and the first black matrix can block the The backlight module under the array substrate emits light to the active layer, effectively solving the light leakage caused by the light being irradiated to the active layer of the TFT.
  • the second black matrix is further fabricated on the TFT, so that the second black matrix and the first black matrix completely surround the TFT, which can block the light from the backlight module under the array substrate from being incident on the active layer and from Reflecting light directed to the active layer on the side and above, to better prevent light from being irradiated onto the active layer of the TFT, avoiding light leakage current, ensuring stable performance of the TFT device, and improving picture display quality;
  • the template simultaneously forms the active layer, the gate insulating layer, and the gate of the TFT, and the first black matrix and the second black matrix are formed by using the same mask, which can save the mask, shorten the processing time, and improve the production efficiency.

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Abstract

一种BOA型液晶显示面板及其制作方法。该BOA型液晶显示面板设置TFT(T)整体位于第一黑色矩阵(12)上，进一步地，在TFT(T)与钝化保护层(18)之间设置第二黑色矩阵(17)，所述第二黑色矩阵(17)与第一黑色矩阵(12)完全包围TFT(T)，能够遮挡来自于阵列基板(1)下方的背光模组射向有源层(14)的光线以及来自于侧面及上方的射向有源层(14)的反射光线，更好地防止光线照射到TFT（T）的有源层（14），避免产生光漏电流，保证TFT（T）器件的性能稳定，改善画面显示品质。该BOA型液晶显示面板的制作方法，一方面能够有效解决因背光光线照射到TFT（T）的有源层（14）而产生光漏电流问题，一方面节省掩模板，缩短制程时间，提高生产效率。

Description

BOA型液晶显示面板及其制作方法 技术领域
本发明涉及显示技术领域，尤其涉及一种BOA型液晶显示面板及其制作方法。
背景技术
随着显示技术的发展，液晶显示器(Liquid Crystal Display，LCD)等平面显示装置因具有高画质、省电、机身薄及应用范围广等优点，而被广泛的应用于手机、电视、个人数字助理、数字相机、笔记本电脑、台式计算机等各种消费性电子产品，成为显示装置中的主流。
现有市场上的液晶显示器大部分为背光型液晶显示器，其包括背光模组(backlight module)及结合与背光模组上的液晶显示面板。
薄膜晶体管液晶显示器(Thin Film Transistor Liquid Crystal Display，TFT-LCD)中的液晶显示面板一般是由彩膜基板(Color Filter，CF)、薄膜晶体管阵列基板(Thin Film Transistor Array Substrate，TFT Array Substrate)、以及一配置于两基板间的液晶层(Liquid Crystal Layer)所构成，其工作原理是通过在两片基板上施加驱动电压来控制液晶层的液晶分子的旋转，将背光模组的光线折射出来产生画面。
阵列基板中的重要组成部分薄膜晶体管(Thin Film Transistor，TFT)是一种由半导体薄膜材料制成的绝缘栅场效应晶体管，其中的有源层(Active Layer)对光线非常敏感，微小的光强变化也会影响TFT器件的特性，即在TFT导通时，即使受到微弱光线的照射，对应于源极与漏极之间的有源层中会产生光漏电流(Photo Ioff)，随着Photo Ioff的增加，TFT器件的特性会显著下降，导致LCD显示时出现图像串扰(Cross talk)、闪烁(Flicker)以及残像等问题，影响显示画面质量。
如图1所示，传统的液晶显示面板包括相对设置的阵列基板100与彩膜基板200、及夹设于二者之间的液晶层300。在阵列基板100一侧自下而上依次设置有下基板110、栅极120、栅极绝缘层130、有源层140、源/漏极150、钝化保护层160、及像素电极170等，所述栅极120、栅极绝缘层130、有源层140、及源/漏极150构成TFT；在彩膜基板200一侧则设置上基板210、黑色矩阵220(Black Matrix，BM)、色阻层230、及公共电极240等。不透光的BM220设置于彩膜基板200一侧，即“BM On CF”，且BM220 对应位于TFT、栅线(Gate line)以及数据线(Data line)上方，用来遮挡TFT、Gate Line、以及Data Line位置处的的漏光，保持显示品质。
然而这种“BM On CF”型的液晶显示面板无法遮挡来自于阵列基板100下方的背光模组射向有源层140的光线，从而不可避免的会产生光漏电流，影响TFT器件的性能及画面显示品质。另外，在将阵列基板100与彩膜基板200对组的工艺中，BM220很难与TFT、Gate Line、以及Data Line精准对位，同时，制作液晶显示面板所需的掩模板数量较多，制程时间较长，生产成本较高。
发明内容
本发明的目的在于提供一种BOA型液晶显示面板，能够有效解决因背光光线照射到TFT的有源层而产生光漏电流问题，保证TFT器件的性能稳定，改善画面显示品质。
本发明的目的还在于提供一种BOA型液晶显示面板的制作方法，一方面能够有效解决因背光光线照射到TFT的有源层而产生光漏电流问题，保证TFT器件的性能稳定，改善画面显示品质，一方面节省掩模板，缩短制程时间，提高生产效率。
为实现上述目的，本发明提供了一种BOA型液晶显示面板，包括相对设置的阵列基板与彩膜基板、及夹设于阵列基板与彩膜基板之间的液晶层；
所述阵列基板包括下基板、设于下基板上的第一黑色矩阵、整体位于所述第一黑色矩阵上的TFT、覆盖所述TFT、第一黑色矩阵与下基板的钝化保护层、以及设于所述钝化保护层上且与TFT的源/漏极接触的像素电极；
所述彩膜基板包括上基板、设于所述上基板面向阵列基板一侧的色阻层、及覆盖所述色阻层与上基板的公共电极。
还包括设于TFT与钝化保护层之间的第二黑色矩阵，所述第二黑色矩阵与第一黑色矩阵完全包围TFT。
所述TFT为顶栅型结构，包括自下而上依次设于所述第一黑色矩阵上的源/漏极、有源层、栅极绝缘层、及栅极。
可选的，所述像素电极经由贯穿所述钝化保护层的过孔接触源/漏极。
可选的，所述像素电极经由贯穿所述钝化保护层与第二黑色矩阵的过孔接触源/漏极。
本发明还提供一种BOA型液晶显示面板，包括相对设置的阵列基板与彩膜基板、及夹设于阵列基板与彩膜基板之间的液晶层；
所述阵列基板包括下基板、设于下基板上的第一黑色矩阵、整体位于 所述第一黑色矩阵上的TFT、覆盖所述TFT、第一黑色矩阵与下基板的钝化保护层、以及设于所述钝化保护层上且与TFT的源/漏极接触的像素电极；
所述彩膜基板包括上基板、设于所述上基板面向阵列基板一侧的色阻层、及覆盖所述色阻层与上基板的公共电极；
还包括设于TFT与钝化保护层之间的第二黑色矩阵，所述第二黑色矩阵与第一黑色矩阵完全包围TFT；
其中，所述TFT为顶栅型结构，包括自下而上依次设于所述第一黑色矩阵上的源/漏极、有源层、栅极绝缘层、及栅极；
其中，所述像素电极经由贯穿所述钝化保护层与第二黑色矩阵的过孔接触源/漏极。
本发明还提供一种BOA型液晶显示面板的制作方法，在阵列基板一侧的下基板上制作出第一黑色矩阵后，制作整体位于所述第一黑色矩阵上的TFT；在彩膜基板一侧制作色阻层与公共电极。
在TFT上再制作第二黑色矩阵，使得第二黑色矩阵与第一黑色矩阵完全包围TFT；且制作所述第一黑色矩阵与第二黑色矩阵使用同一掩模板。
可选的，所述BOA型液晶显示面板的制作方法包括如下步骤：
步骤1、提供一下基板，在所述下基板上涂覆一层黑色树脂，使用第一道掩模板对黑色树脂进行图案化处理，形成第一黑色矩阵；
步骤2、在所述第一黑色矩阵与下基板上溅射或蒸镀一层金属薄膜，使用第二道掩模板对金属薄膜进行图案化处理，形成位于第一黑色矩阵上的源/漏极；
步骤3、通过化学气相沉积工艺在所述源/漏极与第一黑色矩阵上连续沉积半导体薄膜、绝缘薄膜，再溅射或蒸镀另一层金属薄膜，使用第三道掩模板对所述另一层金属薄膜、绝缘薄膜和半导体薄膜同时进行图案化处理，形成依次位于源/漏极与第一黑色矩阵上的有源层、栅极绝缘层、及栅极；
所述源/漏极、有源层、栅极绝缘层、及栅极构成TFT；
步骤4、通过化学气相沉积工艺在所述TFT与下基板上沉积钝化保护层，使用第四道掩模板对所述钝化保护层进行图案化处理，形成贯穿该钝化保护层的过孔，以暴露出部分源/漏极；
步骤5、在所述钝化保护层上沉积一层ITO薄膜，使用第五道掩模板对ITO薄膜进行图案化处理，形成像素电极，且像素电极经由所述过孔接触源/漏极，完成阵列基板的制作；
步骤6、提供一上基板，在所述上基板上依次制作色阻层、公共电极层， 完成彩膜基板的制作；
然后将阵列基板与彩膜基板进行对组，在阵列基板与彩膜基板之间灌注液晶分子，形成液晶层，并对阵列基板与彩膜基板进行封装。
可选的，所述的BOA型液晶显示面板的制作方法包括如下步骤：
步骤1、提供一下基板，在所述下基板上涂覆一层黑色树脂，使用第一道掩模板对黑色树脂进行图案化处理，形成第一黑色矩阵；
步骤2、在所述第一黑色矩阵与下基板上溅射或蒸镀一层金属薄膜，使用第二道掩模板对金属薄膜进行图案化处理，形成位于第一黑色矩阵上的源/漏极；
步骤3、通过化学气相沉积工艺在所述源/漏极与第一黑色矩阵上连续沉积半导体薄膜、绝缘薄膜，再溅射或蒸镀另一层金属薄膜，使用第三道掩模板对所述另一层金属薄膜、绝缘薄膜和半导体薄膜同时进行图案化处理，形成依次位于源/漏极与第一黑色矩阵上的有源层、栅极绝缘层、及栅极；
所述源/漏极、有源层、栅极绝缘层、及栅极构成TFT；
步骤4、在所述TFT与下基板上涂覆另一层黑色树脂，仍使用第一道掩模板对所述另一层黑色树脂进行图案化处理，形成第二黑色矩阵，使得所述第二黑色矩阵与第一黑色矩阵完全包围TFT；
步骤5、通过化学气相沉积工艺在所述第二黑色矩阵与下基板上沉积钝化保护层，使用第四道掩模板对所述钝化保护层进行图案化处理，形成贯穿该钝化保护层与第二黑色矩阵的过孔，以暴露出部分源/漏极；
步骤6、在所述钝化保护层上沉积一层ITO薄膜，使用第五道掩模板对ITO薄膜进行图案化处理，形成像素电极，且像素电极经由所述过孔接触源/漏极，完成阵列基板的制作；
步骤7、提供一上基板，在所述上基板上依次制作色阻层、公共电极层，完成彩膜基板的制作；
然后将阵列基板与彩膜基板进行对组，在阵列基板与彩膜基板之间灌注液晶分子，形成液晶层，并对阵列基板与彩膜基板进行封装。
所述栅极与源/漏极的材料为钼、钛、铝、铜、镍中的一种或多种的堆栈组合，所述栅极绝缘层与钝化保护层的材料为氧化硅、氮化硅或二者的组合。
本发明的有益效果：本发明提供的一种BOA型液晶显示面板，TFT整体位于第一黑色矩阵上，第一黑色矩阵能够遮挡来自于阵列基板下方的背光模组射向有源层的光线，有效解决因光线照射到TFT的有源层而产生光 漏电流问题，进一步地，在TFT与钝化保护层之间设置第二黑色矩阵，所述第二黑色矩阵与第一黑色矩阵完全包围TFT，能够遮挡来自于阵列基板下方的背光模组射向有源层的光线以及来自于侧面及上方的射向有源层的反射光线，更好地防止光线照射到TFT的有源层，避免产生光漏电流，保证TFT器件的性能稳定，改善画面显示品质。本发明提供的一种BOA型液晶显示面板的制作方法，在阵列基板一侧的下基板上制作出第一黑色矩阵后，制作整体位于所述第一黑色矩阵上的TFT，第一黑色矩阵能够遮挡来自于阵列基板下方的背光模组射向有源层的光线，有效解决因光线照射到TFT的有源层而产生光漏电流问题，进一步地，在TFT上再制作第二黑色矩阵，使得第二黑色矩阵与第一黑色矩阵完全包围TFT，能够遮挡来自于阵列基板下方的背光模组射向有源层的光线以及来自于侧面及上方的射向有源层的反射光线，更好地防止光线照射到TFT的有源层，避免产生光漏电流，保证TFT器件的性能稳定，改善画面显示品质；另外，使用一掩模板同时制作TFT的有源层、栅极绝缘层、及栅极，使用同一掩模板制作第一黑色矩阵与第二黑色矩阵，能够节省掩模板，缩短制程时间，提高生产效率。
为了能更进一步了解本发明的特征以及技术内容，请参阅以下有关本发明的详细说明与附图，然而附图仅提供参考与说明用，并非用来对本发明加以限制。
附图说明
下面结合附图，通过对本发明的具体实施方式详细描述，将使本发明的技术方案及其它有益效果显而易见。
附图中，
图1为传统的BM On CF型液晶显示面板的结构示意图；
图2为本发明的BOA型液晶显示面板第一实施例的结构示意图；
图3为本发明的BOA型液晶显示面板第二实施例的结构示意图；
图4为本发明的BOA型液晶显示面板的制作方法的第一实施例的流程图；
图5为本发明的BOA型液晶显示面板的制作方法的第一实施例的步骤1的示意图；
图6为本发明的BOA型液晶显示面板的制作方法的第一实施例的步骤2的示意图；
图7为本发明的BOA型液晶显示面板的制作方法的第一实施例的步骤 3的示意图；
图8为本发明的BOA型液晶显示面板的制作方法的第一实施例的步骤4的示意图；
图9为本发明的BOA型液晶显示面板的制作方法的第一实施例的步骤5的示意图；
图10为本发明的BOA型液晶显示面板的制作方法的第一实施例的步骤6的示意图；
图11为本发明的BOA型液晶显示面板的制作方法的第二实施例的流程图；
图12为本发明的BOA型液晶显示面板的制作方法的第二实施例的步骤1的示意图；
图13为本发明的BOA型液晶显示面板的制作方法的第二实施例的步骤2的示意图；
图14为本发明的BOA型液晶显示面板的制作方法的第二实施例的步骤3的示意图；
图15为本发明的BOA型液晶显示面板的制作方法的第二实施例的步骤4的示意图；
图16为本发明的BOA型液晶显示面板的制作方法的第二实施例的步骤5的示意图；
图17为本发明的BOA型液晶显示面板的制作方法的第二实施例的步骤6的示意图；
图18为本发明的BOA型液晶显示面板的制作方法的第二实施例的步骤7的示意图。
具体实施方式
为更进一步阐述本发明所采取的技术手段及其效果，以下结合本发明的优选实施例及其附图进行详细描述。
本发明首先提供一种BOA型液晶显示面板，所谓BOA是指将黑色矩阵设置于阵列基板(BM On Array)一侧。请参阅图2，为本发明的BOA型液晶显示面板的第一实施例，包括相对设置的阵列基板1与彩膜基板2、及夹设于阵列基板1与彩膜基板2之间的液晶层3。
所述阵列基板1包括下基板11、设于下基板11上的第一黑色矩阵12、整体位于所述第一黑色矩阵12上的TFT T、覆盖所述TFT T、第一黑色矩阵12与下基板11的钝化保护层18、以及设于所述钝化保护层18上且与 TFT T的源/漏极13接触的像素电极19。所述彩膜基板2包括上基板21、设于所述上基板21面向阵列基板1一侧的色阻层22、及覆盖所述色阻层22与上基板21的公共电极23。
优选的，所述TFT T为顶栅结构，包括自下而上依次设于所述第一黑色矩阵12上的源/漏极13、有源层14、栅极绝缘层15、及栅极16。所述像素电极19经由贯穿所述钝化保护层18的过孔181接触源/漏极13。
具体地，所述栅极16与源/漏极13的材料为钼(Mo)、钛(Ti)、铝(Al)、铜(Cu)、镍(Ni)中的一种或多种的堆栈组合，所述栅极绝缘层15与钝化保护层18的材料为氧化硅(SiOx)、氮化硅(SiNx)或二者的组合，所述像素电极19的材料为氧化铟锡(Indium Tin Oxide，ITO)。
该第一实施例将TFT T整体设于第一黑色矩阵12上，第一黑色矩阵12能够遮挡来自于阵列基板下方的背光模组射向有源层14的光线，有效解决因光线照射到TFT T的有源层14而产生光漏电流问题，保证TFT器件的性能稳定，改善画面显示品质。
请参阅图3，为本发明的BOA型液晶显示面板的第二实施例，其与第一实施例的区别在于还包括设于TFT T与钝化保护层18之间的第二黑色矩阵17，所述第二黑色矩阵17与第一黑色矩阵12完全包围TFT T。所述像素电极19经由贯穿所述钝化保护层18与第二黑色矩阵17的过孔871接触源/漏极13。
该第二实施例进一步地在TFT T与钝化保护层18之间设置第二黑色矩阵17，所述第二黑色矩阵17与第一黑色矩阵12完全包围TFT T，既能够遮挡来自于阵列基板下方的背光模组射向有源层14的光线，又能够遮挡来自于侧面及上方的射向有源层14的反射光线，以更好地防止光线照射到TFT T的有源层14，避免产生光漏电流，保证TFT器件的性能稳定，改善画面显示品质。
本发明还提供一种BOA型液晶显示面板的制作方法，请参阅图4，为本发明的BOA型液晶显示面板的制作方法的第一实施例的流程图，该第一实施例对应制作图2所示的BOA型液晶显示面板，包括如下步骤：
步骤1、如图5所示，提供一下基板11，在所述下基板11上涂覆一层黑色树脂，使用第一道掩模板对黑色树脂进行图案化处理，形成第一黑色矩阵12。
具体地，所述下基板11优选为玻璃基板。所述图案化处理先后包括曝光、显影、蚀刻等工艺过程。
步骤2、如图6所示，在所述第一黑色矩阵12与下基板11上溅射或蒸 镀一层金属薄膜，使用第二道掩模板对金属薄膜进行图案化处理，形成位于第一黑色矩阵12上的源/漏极13。
具体地，所述金属薄膜即所述源/漏极13的材料为Mo、Ti、Al、Cu、Ni中的一种或多种的堆栈组合。所述图案化处理先后包括曝光、显影、湿蚀刻等工艺过程。
步骤3、如图7所示，通过化学气相沉积工艺在所述源/漏极13与第一黑色矩阵12上连续沉积半导体薄膜、绝缘薄膜，再溅射或蒸镀另一层金属薄膜，使用第三道掩模板对所述另一层金属薄膜、绝缘薄膜和半导体薄膜同时进行图案化处理，形成依次位于源/漏极13与第一黑色矩阵12上的有源层14、栅极绝缘层15、及栅极16。所述源/漏极13、有源层14、栅极绝缘层15、及栅极16构成TFT T。
具体地，所述绝缘薄膜即栅极绝缘层15的材料为SiOx、SiNx或二者的组合；所述另一层金属薄膜即栅极16的材料为Mo、Ti、Al、Cu、Ni中的一种或多种的堆栈组合。所述图案化处理先后包括曝光、显影、湿蚀刻、干蚀刻等工艺过程。
步骤4、如图8所示，通过化学气相沉积工艺在所述TFT T与下基板11上沉积钝化保护层18，使用第四道掩模板对所述钝化保护层18进行图案化处理，形成贯穿该钝化保护层18的过孔181，以暴露出部分源/漏极13。
具体地，所述钝化保护层18的材料为SiOx、SiNx或二者的组合。所述图案化处理先后包括曝光、显影、干蚀刻等工艺过程。
步骤5、如图9所示，在所述钝化保护层18上沉积一层ITO薄膜，使用第五道掩模板对ITO薄膜进行图案化处理，形成像素电极19，且像素电极19经由所述过孔181接触源/漏极13，完成阵列基板1的制作。
具体地，所述图案化处理先后包括曝光、显影、蚀刻等工艺过程。
步骤6、如图10所示，提供一上基板21，在所述上基板21上依次制作色阻层22、公共电极层23，并在公共电极层23上形成光阻间隔物(未图示)，完成彩膜基板2的制作；然后将阵列基板1与彩膜基板2进行对组，在阵列基板1与彩膜基板2之间灌注液晶分子，形成液晶层3，并对阵列基板1与彩膜基板2进行封装。
具体地，所述上基板21优选为玻璃基板。
上述BOA型液晶显示面板的制作方法的第一实施例，在阵列基板1一侧的下基板11上制作出第一黑色矩阵12后，制作整体位于所述第一黑色矩阵12上的TFT T，第一黑色矩阵12能够遮挡来自于阵列基板下方的背光模组射向有源层14的光线，能够有效解决因光线照射到TFT T的有源层14 而产生光漏电流问题，保证TFT器件的性能稳定，改善画面显示品质。另外，使用一掩模板同时制作TFT T的有源层14、栅极绝缘层15、及栅极16，能够节省掩模板，缩短制程时间，提高生产效率。
请参阅图11，为本发明的BOA型液晶显示面板的制作方法的第二实施例的流程图，该第二实施例对应制作图3所示的BOA型液晶显示面板，包括如下步骤：
步骤1、如图12所示，提供一下基板11，在所述下基板11上涂覆一层黑色树脂，使用第一道掩模板对黑色树脂进行图案化处理，形成第一黑色矩阵12。
具体地，所述下基板11优选为玻璃基板。所述图案化处理先后包括曝光、显影、蚀刻等工艺过程。
步骤2、如图13所示，在所述第一黑色矩阵12与下基板11上溅射或蒸镀一层金属薄膜，使用第二道掩模板对金属薄膜进行图案化处理，形成位于第一黑色矩阵12上的源/漏极13。
具体地，所述金属薄膜即所述源/漏极13的材料为Mo、Ti、Al、Cu、Ni中的一种或多种的堆栈组合。所述图案化处理先后包括曝光、显影、湿蚀刻等工艺过程。
步骤3、如图14所示，通过化学气相沉积工艺在所述源/漏极13与第一黑色矩阵12上连续沉积半导体薄膜、绝缘薄膜，再溅射或蒸镀另一层金属薄膜，使用第三道掩模板对所述另一层金属薄膜、绝缘薄膜和半导体薄膜同时进行图案化处理，形成依次位于源/漏极13与第一黑色矩阵12上的有源层14、栅极绝缘层15、及栅极16。所述源/漏极13、有源层14、栅极绝缘层15、及栅极16构成TFT T。
具体地，所述绝缘薄膜即栅极绝缘层15的材料为SiOx、SiNx或二者的组合；所述另一层金属薄膜栅极16的材料为Mo、Ti、Al、Cu、Ni中的一种或多种的堆栈组合。所述图案化处理先后包括曝光、显影、湿蚀刻、干蚀刻等工艺过程。
步骤4、如图15所示，在所述TFT T与下基板11上涂覆另一层黑色树脂，仍使用第一道掩模板对所述另一层黑色树脂进行图案化处理，形成第二黑色矩阵17，使得所述第二黑色矩阵17与第一黑色矩阵12完全包围TFT T。
步骤5、如图16所示，通过化学气相沉积工艺在所述第二黑色矩阵17与下基板11上沉积钝化保护层18，使用第四道掩模板对所述钝化保护层18进行图案化处理，形成贯穿该钝化保护层18与第二黑色矩阵17的过孔 871，以暴露出部分源/漏极13。
具体地，所述钝化保护层18的材料为SiOx、SiNx或二者的组合。所述图案化处理先后包括曝光、显影、干蚀刻等工艺过程。
步骤6、如图17所示，在所述钝化保护层18上沉积一层ITO薄膜，使用第五道掩模板对ITO薄膜进行图案化处理，形成像素电极19，且像素电极19经由所述过孔871接触源/漏极13，完成阵列基板1的制作。
具体地，所述图案化处理先后包括曝光、显影、蚀刻等工艺过程。
步骤7、如图18所示，提供一上基板21，在所述上基板21上依次制作色阻层22、公共电极层23，并在公共电极层23上形成光阻间隔物(未图示)，完成彩膜基板2的制作；然后将阵列基板1与彩膜基板2进行对组，在阵列基板1与彩膜基板2之间灌注液晶分子，形成液晶层3，并对阵列基板1与彩膜基板2进行封装。
具体地，所述上基板21优选为玻璃基板。
上述BOA型液晶显示面板的制作方法的第二实施例，在阵列基板1一侧的下基板11上制作出第一黑色矩阵12后，制作整体位于所述第一黑色矩阵12上的TFT T，再在TFT T上再制作第二黑色矩阵17，使得第二黑色矩阵17与第一黑色矩阵12完全包围TFT T，能够遮挡来自于阵列基板1下方的背光模组射向有源层14的光线以及来自于侧面及上方的射向有源层14的反射光线，更好地防止光线照射到TFT T的有源层14，避免产生光漏电流，保证TFT器件的性能稳定，改善画面显示品质；另外，使用一掩模板同时制作TFT的有源层14、栅极绝缘层15、及栅极16，使用同一掩模板制作第一黑色矩阵12与第二黑色矩阵17，能够节省掩模板，缩短制程时间，提高生产效率。
综上所述，本发明的BOA型液晶显示面板，TFT整体位于第一黑色矩阵上，第一黑色矩阵能够遮挡来自于阵列基板下方的背光模组射向有源层的光线，有效解决因光线照射到TFT的有源层而产生光漏电流问题，进一步地，在TFT与钝化保护层之间设置第二黑色矩阵，所述第二黑色矩阵与第一黑色矩阵完全包围TFT，能够遮挡来自于阵列基板下方的背光模组射向有源层的光线以及来自于侧面及上方的射向有源层的反射光线，更好地防止光线照射到TFT的有源层，避免产生光漏电流，保证TFT器件的性能稳定，改善画面显示品质。本发明的BOA型液晶显示面板的制作方法，在阵列基板一侧的下基板上制作出第一黑色矩阵后，制作整体位于所述第一黑色矩阵上的TFT，第一黑色矩阵能够遮挡来自于阵列基板下方的背光模组射向有源层的光线，有效解决因光线照射到TFT的有源层而产生光漏电 流问题，进一步地，在TFT上再制作第二黑色矩阵，使得第二黑色矩阵与第一黑色矩阵完全包围TFT，能够遮挡来自于阵列基板下方的背光模组射向有源层的光线以及来自于侧面及上方的射向有源层的反射光线，更好地防止光线照射到TFT的有源层，避免产生光漏电流，保证TFT器件的性能稳定，改善画面显示品质；另外，使用一掩模板同时制作TFT的有源层、栅极绝缘层、及栅极，使用同一掩模板制作第一黑色矩阵与第二黑色矩阵，能够节省掩模板，缩短制程时间，提高生产效率。
以上所述，对于本领域的普通技术人员来说，可以根据本发明的技术方案和技术构思作出其他各种相应的改变和变形，而所有这些改变和变形都应属于本发明权利要求的保护范围。

Claims (13)

  1. 一种BOA型液晶显示面板，包括相对设置的阵列基板与彩膜基板、及夹设于阵列基板与彩膜基板之间的液晶层；
    所述阵列基板包括下基板、设于下基板上的第一黑色矩阵、整体位于所述第一黑色矩阵上的TFT、覆盖所述TFT、第一黑色矩阵与下基板的钝化保护层、以及设于所述钝化保护层上且与TFT的源/漏极接触的像素电极；
    所述彩膜基板包括上基板、设于所述上基板面向阵列基板一侧的色阻层、及覆盖所述色阻层与上基板的公共电极。
  2. 如权利要求1所述的BOA型液晶显示面板，还包括设于TFT与钝化保护层之间的第二黑色矩阵，所述第二黑色矩阵与第一黑色矩阵完全包围TFT。
  3. 如权利要求1所述的BOA型液晶显示面板，其中，所述TFT为顶栅型结构，包括自下而上依次设于所述第一黑色矩阵上的源/漏极、有源层、栅极绝缘层、及栅极。
  4. 如权利要求2所述的BOA型液晶显示面板，其中，所述TFT为顶栅型结构，包括自下而上依次设于所述第一黑色矩阵上的源/漏极、有源层、栅极绝缘层、及栅极。
  5. 如权利要求3所述的BOA型液晶显示面板，其中，所述像素电极经由贯穿所述钝化保护层的过孔接触源/漏极。
  6. 如权利要求4所述的BOA型液晶显示面板，其中，所述像素电极经由贯穿所述钝化保护层与第二黑色矩阵的过孔接触源/漏极。
  7. 一种BOA型液晶显示面板，包括相对设置的阵列基板与彩膜基板、及夹设于阵列基板与彩膜基板之间的液晶层；
    所述阵列基板包括下基板、设于下基板上的第一黑色矩阵、整体位于所述第一黑色矩阵上的TFT、覆盖所述TFT、第一黑色矩阵与下基板的钝化保护层、以及设于所述钝化保护层上且与TFT的源/漏极接触的像素电极；
    所述彩膜基板包括上基板、设于所述上基板面向阵列基板一侧的色阻层、及覆盖所述色阻层与上基板的公共电极；
    还包括设于TFT与钝化保护层之间的第二黑色矩阵，所述第二黑色矩阵与第一黑色矩阵完全包围TFT；
    其中，所述TFT为顶栅型结构，包括自下而上依次设于所述第一黑色矩阵上的源/漏极、有源层、栅极绝缘层、及栅极；
    其中，所述像素电极经由贯穿所述钝化保护层与第二黑色矩阵的过孔接触源/漏极。
  8. 一种BOA型液晶显示面板的制作方法，在阵列基板一侧的下基板上制作出第一黑色矩阵后，制作整体位于所述第一黑色矩阵上的TFT；在彩膜基板一侧制作色阻层与公共电极。
  9. 如权利要求8所述的BOA型液晶显示面板的制作方法，其中，在TFT上再制作第二黑色矩阵，使得第二黑色矩阵与第一黑色矩阵完全包围TFT；且制作所述第一黑色矩阵与第二黑色矩阵使用同一掩模板。
  10. 如权利要求8所述的BOA型液晶显示面板的制作方法，其中，包括如下步骤：
    步骤1、提供一下基板，在所述下基板上涂覆一层黑色树脂，使用第一道掩模板对黑色树脂进行图案化处理，形成第一黑色矩阵；
    步骤2、在所述第一黑色矩阵与下基板上溅射或蒸镀一层金属薄膜，使用第二道掩模板对金属薄膜进行图案化处理，形成位于第一黑色矩阵上的源/漏极；
    步骤3、通过化学气相沉积工艺在所述源/漏极与第一黑色矩阵上连续沉积半导体薄膜、绝缘薄膜，再溅射或蒸镀另一层金属薄膜，使用第三道掩模板对所述另一层金属薄膜、绝缘薄膜和半导体薄膜同时进行图案化处理，形成依次位于源/漏极与第一黑色矩阵上的有源层、栅极绝缘层、及栅极；
    所述源/漏极、有源层、栅极绝缘层、及栅极构成TFT；
    步骤4、通过化学气相沉积工艺在所述TFT与下基板上沉积钝化保护层，使用第四道掩模板对所述钝化保护层进行图案化处理，形成贯穿该钝化保护层的过孔，以暴露出部分源/漏极；
    步骤5、在所述钝化保护层上沉积一层ITO薄膜，使用第五道掩模板对ITO薄膜进行图案化处理，形成像素电极，且像素电极经由所述过孔接触源/漏极，完成阵列基板的制作；
    步骤6、提供一上基板，在所述上基板上依次制作色阻层、公共电极层，完成彩膜基板的制作；
    然后将阵列基板与彩膜基板进行对组，在阵列基板与彩膜基板之间灌注液晶分子，形成液晶层，并对阵列基板与彩膜基板进行封装。
  11. 如权利要求9所述的BOA型液晶显示面板的制作方法，其中，包括如下步骤：
    步骤1、提供一下基板，在所述下基板上涂覆一层黑色树脂，使用第一 道掩模板对黑色树脂进行图案化处理，形成第一黑色矩阵；
    步骤2、在所述第一黑色矩阵与下基板上溅射或蒸镀一层金属薄膜，使用第二道掩模板对金属薄膜进行图案化处理，形成位于第一黑色矩阵上的源/漏极；
    步骤3、通过化学气相沉积工艺在所述源/漏极与第一黑色矩阵上连续沉积半导体薄膜、绝缘薄膜，再溅射或蒸镀另一层金属薄膜，使用第三道掩模板对所述另一层金属薄膜、绝缘薄膜和半导体薄膜同时进行图案化处理，形成依次位于源/漏极与第一黑色矩阵上的有源层、栅极绝缘层、及栅极；
    所述源/漏极、有源层、栅极绝缘层、及栅极构成TFT；
    步骤4、在所述TFT与下基板上涂覆另一层黑色树脂，仍使用第一道掩模板对所述另一层黑色树脂进行图案化处理，形成第二黑色矩阵，使得所述第二黑色矩阵与第一黑色矩阵完全包围TFT；
    步骤5、通过化学气相沉积工艺在所述第二黑色矩阵与下基板上沉积钝化保护层，使用第四道掩模板对所述钝化保护层进行图案化处理，形成贯穿该钝化保护层与第二黑色矩阵的过孔，以暴露出部分源/漏极；
    步骤6、在所述钝化保护层上沉积一层ITO薄膜，使用第五道掩模板对ITO薄膜进行图案化处理，形成像素电极，且像素电极经由所述过孔接触源/漏极，完成阵列基板的制作；
    步骤7、提供一上基板，在所述上基板上依次制作色阻层、公共电极层，完成彩膜基板的制作；
    然后将阵列基板与彩膜基板进行对组，在阵列基板与彩膜基板之间灌注液晶分子，形成液晶层，并对阵列基板与彩膜基板进行封装。
  12. 如权利要求10所述的BOA型液晶显示面板的制作方法，其中，所述栅极与源/漏极的材料为钼、钛、铝、铜、镍中的一种或多种的堆栈组合，所述栅极绝缘层与钝化保护层的材料为氧化硅、氮化硅或二者的组合。
  13. 如权利要求11所述的BOA型液晶显示面板的制作方法，其中，所述栅极与源/漏极的材料为钼、钛、铝、铜、镍中的一种或多种的堆栈组合，所述栅极绝缘层与钝化保护层的材料为氧化硅、氮化硅或二者的组合。
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