WO2017008312A1 - 液晶显示装置及其阵列基板 - Google Patents

液晶显示装置及其阵列基板 Download PDF

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WO2017008312A1
WO2017008312A1 PCT/CN2015/084312 CN2015084312W WO2017008312A1 WO 2017008312 A1 WO2017008312 A1 WO 2017008312A1 CN 2015084312 W CN2015084312 W CN 2015084312W WO 2017008312 A1 WO2017008312 A1 WO 2017008312A1
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pixel electrodes
row
adjacent
column
same
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PCT/CN2015/084312
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English (en)
French (fr)
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王聪
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深圳市华星光电技术有限公司
武汉华星光电技术有限公司
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Priority to US14/765,834 priority Critical patent/US9618804B2/en
Publication of WO2017008312A1 publication Critical patent/WO2017008312A1/zh

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    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136286—Wiring, e.g. gate line, drain line
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G02F1/134309—Electrodes characterised by their geometrical arrangement
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F2201/00—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00
    • G02F2201/12—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode
    • G02F2201/123—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode pixel

Definitions

  • the present invention relates to the field of display technologies, and in particular, to a liquid crystal display device and an array substrate thereof.
  • the display panel is a main component of the liquid crystal display.
  • the main structure includes an array substrate and a color filter substrate disposed opposite to each other and a liquid crystal layer disposed therebetween.
  • the liquid crystal display mainly displays a color image through color resistance in the color filter substrate.
  • FIG. 1 which is a Pen-tile arrangement manner
  • a plurality of gate lines G and a plurality of data lines D are vertically intersected, and the pixel electrodes P are located on the gate lines G and the data lines.
  • the color resistance on the color filter substrate is in one-to-one correspondence with the position of the pixel electrode P.
  • the color resistance on the color filter substrate is generally formed by mask exposure, and an opening corresponding to each color resistance is disposed on the mask (corresponding to the region where each pixel electrode is shown in FIG. 1). There is occlusion between the adjacent two openings (corresponding to the area between two adjacent pixel electrodes shown in FIG.
  • embodiments of the present invention provide a liquid crystal display device and an array substrate thereof to improve light leakage during display of the liquid crystal display panel.
  • An embodiment of the present invention provides an array substrate including a gate line, a data line, and a plurality of pixel electrodes arranged in an array, wherein the plurality of pixel electrodes sequentially allow four colors of white, green, red, and blue in the row direction.
  • the light passes through and circulates, and the sum of the sizes of the adjacent two pixel electrodes in the row direction is equal to the size of each pixel electrode in the column direction, and the pixel electrodes of the same column allow the light of the same color to pass through, and the adjacent two rows of pixels
  • the two rows of pixel electrodes adjacent to one column of pixel electrodes are sequentially connected in the column direction, and each of the data lines is opposite in the direction of opening around the adjacent two rows of pixel electrodes, and the pixel electrodes of the odd rows in the same column are connected to the same data line.
  • the pixel electrodes of the even rows of the same column are connected to the same data line, and the pixel electrodes of the odd row and the even row are respectively connected to different data lines.
  • the array substrate further includes a plurality of TFTs, the gate of each TFT is connected to an adjacent gate line, the source is connected to an adjacent data line, and the drain is connected to an adjacent pixel electrode.
  • Another embodiment of the present invention provides an array substrate including a gate line, a data line, and a plurality of pixel electrodes arranged in an array.
  • the same column of pixel electrodes allows light of the same color to pass through, and between adjacent rows of pixel electrodes Having one gate line, and the same row of pixel electrodes are connected to the same gate line, each data line surrounds at least one column of pixel electrodes row by row, and each data line has an opposite opening direction when surrounding two adjacent rows of pixel electrodes, the same
  • the pixel electrodes of the odd-numbered rows of the column are connected to the same data line
  • the pixel electrodes of the even-numbered rows of the same column are connected to the same data line
  • the pixel electrodes of the odd-numbered rows and the even-numbered rows are respectively connected to different data lines.
  • the plurality of pixel electrodes respectively allow light of four colors of red, green, blue and white to pass through.
  • each of the data lines surrounds two adjacent columns of pixel electrodes row by row, and each of the data lines is respectively adjacent to one of the two rows of pixel electrodes and the next row and the adjacent one of the adjacent pixel electrodes
  • the column directions are connected in order.
  • the plurality of pixel electrodes sequentially allow the red light, the green light, the blue light, and the white light to pass through in the row direction, and circulate.
  • Each of the data lines surrounds one column of pixel electrodes row by row, and each of the data lines is sequentially connected in a column direction by two columns of pixel electrodes adjacent to a column of the pixel electrodes.
  • the plurality of pixel electrodes sequentially allow the white light, the green light, the red light, and the blue light to pass through in the row direction, and circulate.
  • the sum of the sizes of the adjacent two pixel electrodes in the row direction is equal to the size of each of the pixel electrodes in the column direction.
  • the array substrate further includes a plurality of TFTs, the gate of each TFT is connected to an adjacent gate line, the source is connected to an adjacent data line, and the drain is connected to an adjacent pixel electrode.
  • Another embodiment of the present invention provides a liquid crystal display device, wherein the array substrate includes a gate line, a data line, and a plurality of pixel electrodes arranged in an array, and the same column of pixel electrodes allows light of the same color to pass through, adjacent to two rows.
  • each of the data lines surrounds at least one column of pixel electrodes row by row, and each of the data lines has an opposite opening direction when surrounding the adjacent two rows of pixel electrodes, and the pixel electrodes of the odd rows of the same column are connected to the same data line, The pixel electrodes of the even rows of the same column are connected to the same data line, and the pixel electrodes of the odd row and the even row are respectively connected to different data lines.
  • the plurality of pixel electrodes respectively allow light of four colors of red, green, blue and white to pass through.
  • each of the data lines surrounds two adjacent columns of pixel electrodes row by row, and each of the data lines is respectively adjacent to one of the two rows of pixel electrodes and the next row and the adjacent one of the adjacent pixel electrodes
  • the column directions are connected in order.
  • the plurality of pixel electrodes sequentially allow the red light, the green light, the blue light, and the white light to pass through in the row direction, and circulate.
  • Each of the data lines surrounds one column of pixel electrodes row by row, and each of the data lines is sequentially connected in a column direction by two columns of pixel electrodes adjacent to a column of the pixel electrodes.
  • the plurality of pixel electrodes sequentially allow the white light, the green light, the red light, and the blue light to pass through in the row direction, and circulate.
  • the sum of the sizes of the adjacent two pixel electrodes in the row direction is equal to the size of each of the pixel electrodes in the column direction.
  • the array substrate further includes a plurality of TFTs, the gate of each TFT is connected to an adjacent gate line, the source is connected to an adjacent data line, and the drain is connected to an adjacent pixel electrode.
  • the liquid crystal display device and the array substrate thereof improve the layout and connection manner of the data lines of the array substrate, and can increase the area between two adjacent pixel electrodes without affecting the aperture ratio.
  • Corresponding to increasing the area between two adjacent color resists on the color filter substrate improving the slit diffraction phenomenon when the color resist is formed by exposure, thereby reducing the deviation of the color resistance at the corners, and improving the light leakage during display. phenomenon.
  • FIG. 1 is a schematic diagram of a pixel structure of an embodiment of a conventional array substrate
  • FIG. 2 is a schematic diagram of a pixel structure of an embodiment of an array substrate of the present invention.
  • FIG 3 is a schematic view showing the structure of a pixel of another embodiment of the array substrate of the present invention.
  • the array substrate 21 includes a plurality of gate lines, a plurality of data lines 22 and a plurality of pixel electrodes arranged in an array arranged P 1, P 2, P 3, P 4.
  • the pixel electrodes in the same column allow light of the same color to pass through, for example, from right to left in the figure, the sub-pixels including the first column of pixel electrodes P 1 are used as transparent sub-pixels (W, White) of the array substrate, allowing White light is transmitted; the sub-pixel including the second column of pixel electrodes P 2 serves as a green sub-pixel (G, Green) of the array substrate, allowing green light to pass through; and the sub-pixel including the third column of pixel electrodes P 3 is used as an array substrate
  • the red sub-pixel (R, Red) allows red light to pass through;
  • the sub-pixel including the fourth column of pixel electrodes P 4 serves as a blue sub-pixel (B, Blue) of the array substrate, allowing blue light to pass therethrough.
  • the arrangement of the sub-pixels is sequentially cycled in a row direction parallel to the gate line 21.
  • the sum of the sizes of any two adjacent pixel electrodes in the row direction is equal to the size of each pixel electrode in the column direction, that is, the adjacent two pixel electrodes may form a square, and the sides of the square The length is equal to the length of each pixel electrode.
  • each data line 22 surrounds one column of pixel electrodes row by row, each data line
  • the surrounding shape of 22 is substantially arcuate, and each of the data lines 22 is opposite in the direction of opening around each adjacent two rows of pixel electrodes and is in the same manner.
  • the first data line 22 on the right side of FIG. 2 is surrounded by lines.
  • the data line 22 is surrounded by the n + 1 row direction of the opening 3 to the right of the pixel electrodes P, 3 surround n + 2 th row of the pixel electrodes P
  • the opening direction is to the left, where m and n are positive integers.
  • each of the data lines is sequentially connected to the two columns of pixel electrodes adjacent to the column of the pixel electrodes in the column direction.
  • the m+1th column pixel electrode P 3 and the mth column pixel electrode P 4 and the m+th respectively
  • the two columns of pixel electrodes P 2 are adjacent to each other, and the first data line 22 on the right side shown in FIG. 2 of the m+1th column pixel electrode P 3 is wound row by row, and is connected to the pixel electrode P 4 of the nth row and the mth column.
  • each data line 22 and the surrounding manner of each column of pixel electrodes are not necessarily the same, and may also be an irregular layout shape, for example:
  • the sub-pixel including the first column of pixel electrodes P 5 serves as a red sub-pixel of the array substrate, allowing red light to pass through;
  • the sub-pixels of the second column of pixel electrodes P 6 serve as green sub-pixels of the array substrate, allowing green light to pass through;
  • the sub-pixels including the third column of pixel electrodes P 7 serve as blue sub-pixels of the array substrate, allowing blue light to pass through;
  • the sub-pixel including the fourth column of pixel electrodes P 8 serves as a white sub-pixel of the array substrate, allowing white light to pass therethrough.
  • the arrangement of the sub-pixels is sequentially cycled in a row direction parallel to the gate line 21.
  • Each of the data lines 22 of the embodiment shown in FIG. 3 surrounds the pixel electrodes of the corresponding adjacent two columns row by row, and each of the data lines 22 and the two rows of pixel electrodes surrounding the array are separated from the one of the two rows of pixels and the next row. And the adjacent pixel electrodes are sequentially connected in the column direction.
  • the first data line 22 surrounds the adjacent first column of pixel electrodes P 5 and 2 in a row.
  • the pixel electrode P. 6, the data line 22 in the first row surrounding the pixel electrode P. 5, P 6 is the direction of the opening rightward in the row around the second pixel electrode P.
  • the opening 6 o'clock direction P is left, wherein The first row and the first column of pixel electrodes P 5 are away from the opening direction, the data line 22 is connected to the first row and the first column of pixel electrodes P 5 ; the second row and the second column of pixel electrodes P 6 are far from the opening In the direction, and the pixel electrode adjacent thereto is the second row and the third column of pixel electrodes P 7 , the data line 22 is connected to the second row and the third column of pixel electrodes P 7 ; the third row and the first column of pixel electrodes P 5 away from the opening direction of the data line 22 and the third row and first column pixel electrode connected to P 5; row 4 and the second column of pixel electrodes P 6 From the opening direction of the pixel electrode and the adjacent row and the fourth pixel electrode and the first 3 P 7, the data line 22 and the fourth row and the first pixel electrode 3 P 7; said column direction Subsequent connection methods and so on.
  • each data line 22 surrounds adjacent adjacent at least one column of pixel electrodes row by row, and each data line 22 surrounds each adjacent two rows of pixel electrodes.
  • the openings are opposite in direction, so that the pixel electrodes of the odd rows of the same column are connected to the same data line 22, the pixel electrodes of the even rows of the same column are connected to the same data line 22, and the pixel electrodes of the odd row and the even row are respectively connected differently.
  • section 8 is connected to the second pixel electrode P 22, for example, the second and fourth row of the pixel electrodes P line shown in FIG. 1, 3, 4 of the 38 data line 4 connecting bar 22, the data line 4 Data line 22.
  • each of the pixel electrodes is connected to the adjacent data line 22 in the column direction of the pixel electrode, and is specifically implemented by m*n Thin Film Transistors (TFTs) T on the array substrate.
  • TFTs Thin Film Transistors
  • the gate g of each thin film transistor T is connected to adjacent gate lines 21, and the source s of each thin film transistor T is connected to adjacent data lines 22, and the drain d of each thin film transistor T is connected to adjacent ones.
  • the embodiment of the present invention improves the layout and connection manner of the data lines 22 of the array substrate, and does not need to change the area between adjacent two pixel electrodes in the prior art, that is, without affecting the aperture ratio.
  • Increasing the area between the adjacent two rows of pixel electrodes correspondingly, increasing the area between two adjacent color resists on the color filter substrate (Color Filter, CF substrate or color filter substrate), minus Small or eliminate the slit diffraction phenomenon which occurs when the color resist is obtained by the mask exposure, thereby reducing the deviation of the color resistance at the corners, which is located between two adjacent color resists on the color filter substrate when the screen is displayed.
  • the black matrix can maximize or completely block light from the pixel electrodes of the array substrate, improving or eliminating light leakage.
  • the present invention also provides a liquid crystal display device, such as a liquid crystal display panel, a liquid crystal display, including an array substrate having the above pixel structure.

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Abstract

一种液晶显示装置及其阵列基板。同一列像素电极允许相同颜色的光透过，每条数据线逐行环绕至少一列像素电极，且在环绕每相邻两行像素电极时的开口方向相反，同一列的奇数行的像素电极连接同一条数据线(22)，同一列的偶数行的像素电极连接同一条数据线(22)，且奇数行和偶数行的像素电极分别连接不同的数据线(22)。能够减小彩膜基板上的色阻在边角处出现的偏差，改善显示时的漏光现象。

Description

液晶显示装置及其阵列基板 【技术领域】
本发明涉及显示技术领域，具体涉及一种液晶显示装置及其阵列基板。
【背景技术】
显示面板是液晶显示器的主要组成部分，其主要结构包括相对设置的阵列基板和彩膜基板以及设置于两者之间的液晶层，其中液晶显示器主要通过彩膜基板中的色阻呈现彩色影像。
参阅图1所示现有的阵列基板的一种像素结构，其为Pen-tile排列方式，多条栅极线G和多条数据线D垂直交叉，像素电极P位于栅极线G和数据线D交叉定义出的区域之中，对应地，彩膜基板上的色阻与像素电极P的位置一一对应。当前普遍通过掩膜板(mask)曝光的方式形成彩膜基板上的色阻，掩膜板上设置有与每一色阻对应的开口(相当于图1所示每一像素电极所在区域)，相邻两个开口之间具有遮挡(相当于图1所示相邻两个像素电极之间的区域)，在曝光的过程中，光线在透过掩膜板的相邻两个开口时会在遮挡部位出现狭缝衍射现象，导致色阻的边角处因被曝光而出现偏差(bias)，从而导致显示面板在显示时位于相邻两个色阻之间的黑矩阵(Black Matrix，BM)无法全部遮挡来自阵列基板的像素电极的光，不可避免的出现漏光现象。
【发明内容】
有鉴于此，本发明实施例提供一种液晶显示装置及其阵列基板，以改善液晶显示面板在显示时的漏光现象。
本发明一实施例提供一种阵列基板，包括栅极线、数据线和呈阵列排布的多个像素电极，所述多个像素电极在行方向上依次允许白、绿、红、蓝四种颜色的光透过，并循环，且相邻两个像素电极沿行方向的尺寸之和等于每个像素电极沿列方向的尺寸，同一列像素电极允许相同颜色的光透过，相邻两行像素电极之间具有一条栅极线，且同一行像素电极连接同一条栅极线，每条数据线逐行环绕一列像素电极，每条数据线分别与其环绕 的一列像素电极相邻的两列像素电极沿列方向依次连接，且每条数据线在环绕相邻两行像素电极时的开口方向相反，同一列的奇数行的像素电极连接同一条数据线，同一列的偶数行的像素电极连接同一条数据线，且奇数行和偶数行的像素电极分别连接不同的数据线。
其中，阵列基板还包括多个TFT，每个TFT的栅极连接相邻的栅极线、源极连接相邻的数据线、漏极连接相邻的像素电极。
本发明另一实施例提供一种阵列基板，包括栅极线、数据线和呈阵列排布的多个像素电极，同一列像素电极允许相同颜色的光透过，相邻两行像素电极之间具有一条栅极线，且同一行像素电极连接同一条栅极线，每条数据线逐行环绕至少一列像素电极，且每条数据线在环绕相邻两行像素电极时的开口方向相反，同一列的奇数行的像素电极连接同一条数据线，同一列的偶数行的像素电极连接同一条数据线，且奇数行和偶数行的像素电极分别连接不同的数据线。
其中，多个像素电极分别允许红、绿、蓝、白四种颜色的光透过。
其中，每条数据线逐行环绕相邻两列像素电极，每条数据线分别与其环绕的两列像素电极中远离所述开口方向的一个以及下一行且和所述一个相邻的像素电极沿列方向依次连接。
其中，多个像素电极在行方向上依次允许所述红色光、所述绿色光、所述蓝色光、所述白色光透过，并循环。
其中，每条数据线逐行环绕一列像素电极，每条数据线分别与其环绕的一列像素电极相邻的两列像素电极沿列方向依次连接。
其中，多个像素电极在行方向上依次允许所述白色光、所述绿色光、所述红色光、所述蓝色光透过，并循环。
其中，相邻两个像素电极沿行方向的尺寸之和等于每个像素电极沿列方向的尺寸。
其中，阵列基板还包括多个TFT，每个TFT的栅极连接相邻的栅极线、源极连接相邻的数据线、漏极连接相邻的像素电极。
本发明又一实施例提供一种液晶显示装置，其阵列基板包括栅极线、数据线和呈阵列排布的多个像素电极，同一列像素电极允许相同颜色的光透过，相邻两行像素电极之间具有一条栅极线，且同一行像素电极连接同 一条栅极线，每条数据线逐行环绕至少一列像素电极，且每条数据线在环绕相邻两行像素电极时的开口方向相反，同一列的奇数行的像素电极连接同一条数据线，同一列的偶数行的像素电极连接同一条数据线，且奇数行和偶数行的像素电极分别连接不同的数据线。
其中，多个像素电极分别允许红、绿、蓝、白四种颜色的光透过。
其中，每条数据线逐行环绕相邻两列像素电极，每条数据线分别与其环绕的两列像素电极中远离所述开口方向的一个以及下一行且和所述一个相邻的像素电极沿列方向依次连接。
其中，多个像素电极在行方向上依次允许所述红色光、所述绿色光、所述蓝色光、所述白色光透过，并循环。
其中，每条数据线逐行环绕一列像素电极，每条数据线分别与其环绕的一列像素电极相邻的两列像素电极沿列方向依次连接。
其中，多个像素电极在行方向上依次允许所述白色光、所述绿色光、所述红色光、所述蓝色光透过，并循环。
其中，相邻两个像素电极沿行方向的尺寸之和等于每个像素电极沿列方向的尺寸。
其中，阵列基板还包括多个TFT，每个TFT的栅极连接相邻的栅极线、源极连接相邻的数据线、漏极连接相邻的像素电极。
本发明实施例的液晶显示装置及其阵列基板，通过对阵列基板的数据线的布局和连接方式进行改进，在不影响开口率的情况下，能够增大两个相邻像素电极之间的区域，对应增大彩膜基板上两个相邻色阻之间的区域，改善曝光制得色阻时的狭缝衍射现象，从而减小色阻在边角处出现的偏差，改善显示时的漏光现象。
【附图说明】
图1是现有的阵列基板一实施例的像素结构示意图；
图2是本发明的阵列基板一实施例的像素结构示意图；
图3是本发明的阵列基板另一实施例的像素结构示意图。
【具体实施方式】
下面将结合本发明实施例中的附图，对本发明所提供的示例性的实施例的技术方案进行清楚、完整地描述。
图2是本发明的阵列基板一实施例的像素结构示意图。如图2所示，所述阵列基板包括多条栅极线21、多条数据线22以及多个呈阵列排布的像素电极P1、P2、P3、P4。其中，位于同一列的像素电极允许相同颜色的光透过，例如，图中从右至左，包括第一列像素电极P1的子像素作为阵列基板的透明子像素(W，White)，允许白色光透过；包括第二列像素电极P2的子像素作为阵列基板的绿色子像素(G，Green)，允许绿色光透过；包括第三列像素电极P3的子像素作为阵列基板的红色子像素(R，Red)，允许红色光透过；包括第四列像素电极P4的子像素作为阵列基板的蓝色子像素(B，Blue)，允许蓝色光透过。并且，所述子像素的排布沿平行于栅极线21的行方向依次循环。
另外可选地，任意相邻两个像素电极在所述行方向上的尺寸之和等于每个像素电极在列方向上的尺寸，即，相邻两个像素电极可构成正方形，且该正方形的边长等于每一像素电极的长度。
在本实施例中，相邻两行像素电极之间具有一条栅极线21，且同一行像素电极连接同一条栅极线21，每条数据线22逐行环绕一列像素电极，每条数据线22的环绕形状大致为弓形，且每条数据线22在环绕每相邻两行像素电极时的开口方向相反且环绕方式相同，例如，图2所示右方第一条数据线22逐行环绕与其相邻的第m+1列像素电极P3，该数据线22在环绕第n+1行像素电极P3时的开口方向为朝右、在环绕第n+2行像素电极P3时的开口方向为朝左，其中m、n为正整数。
另外，每条数据线分别与其环绕的一列像素电极相邻的两列像素电极沿列方向依次连接，例如，第m+1列像素电极P3分别与第m列像素电极P4、第m+2列像素电极P2相邻，逐行环绕第m+1列像素电极P3的图2所示的右方第一条数据线22，与第n行且第m列的像素电极P4连接、与第n+1行且第m+2列的像素电极P2连接、与第n+2行且第m列的像素电极P4连接、与第n+3行且第m+2列的像素电极P2连接，沿所述列方向后续连接方式依此类推。
应该理解到，弓形数据线22的布局仅是本发明的一种实施例，在实际 应用中，各条数据线22的布局形状以及对每一列像素电极的环绕方式不一定相同，还可能是不规则的布局形状，例如：
参阅图3所示的本发明的阵列基板另一实施例的像素结构，从左至右，包括第一列像素电极P5的子像素作为阵列基板的红色子像素，允许红色光透过；包括第二列像素电极P6的子像素作为阵列基板的绿色子像素，允许绿色光透过；包括第三列像素电极P7的子像素作为阵列基板的蓝色子像素，允许蓝色光透过；包括第四列像素电极P8的子像素作为阵列基板的白色子像素，允许白色光透过。并且，所述子像素的排布沿平行于栅极线21的行方向依次循环。
图3所示实施例的每条数据线22逐行环绕对应的相邻两列的像素电极，每条数据线22分别与其环绕的两列像素电极中远离所述开口方向的一个以及下一行且和所述一个相邻的像素电极沿列方向依次连接，例如图3所示，从左至右，第1条数据线22逐行环绕其相邻的第1列像素电极P5和第2列像素电极P6，该数据线22在环绕第1行像素电极P5、P6时的开口方向为朝右、在环绕第2行像素电极P5、P6时的开口方向为朝左，其中第1行且第1列像素电极P5远离所述开口方向，该数据线22与第1行且第1列像素电极P5连接；第2行且第2列像素电极P6远离所述开口方向，且和其相邻的像素电极为第2行且第3列像素电极P7，则数据线22与第2行且第3列像素电极P7连接；第3行且第1列像素电极P5远离所述开口方向，该数据线22与第3行且第1列像素电极P5连接；第4行且第2列像素电极P6远离所述开口方向，且和其相邻的像素电极为第4行且第3列像素电极P7，则数据线22与第4行且第3列像素电极P7连接；沿所述列方向后续连接方式依此类推。
但是无论采用何种布局形状，本发明实施例都需要满足条件：每条数据线22逐行环绕相邻的至少一列像素电极，且每条数据线22在环绕每相邻两行像素电极时的开口方向相反，以此使得同一列的奇数行的像素电极连接同一条数据线22，同一列的偶数行的像素电极连接同一条数据线22，且奇数行和偶数行的像素电极分别连接不同的数据线22，例如图3所示，第4列的第1、3行的像素电极P8连接第4条数据线22，第4列的第2、4行的像素电极P8连接第2条数据线22。
在上述实施例中，每个像素电极与该像素电极所在的列方向上的相邻的数据线22连接，并具体通过阵列基板上的m*n个薄膜晶体管(Thin Film Transistor，TFT)T实现，其中每个薄膜晶体管T的栅极g连接相邻的栅极线21，每个薄膜晶体管T的源极s连接相邻的数据线22，每个薄膜晶体管T的漏极d连接相邻的像素电极。
由上述可知，本发明实施例通过对阵列基板的数据线22的布局和连接方式进行改进，无需改变现有技术中相邻两个像素电极之间的区域，即在不影响开口率的情况下，增大相邻两行像素电极之间的走线区域，对应地，增大彩膜基板(Color Filter，CF基板或彩色滤光片基板)上两个相邻色阻之间的区域，减小或消除通过掩膜板曝光制得色阻时出现的狭缝衍射现象，从而减小色阻在边角处出现的偏差，在画面显示时位于彩膜基板上相邻两个色阻之间的黑矩阵可以最大程度或全部遮挡来自阵列基板的像素电极的光，改善或消除漏光现象。
本发明还提供一种液晶显示装置，例如液晶显示面板、液晶显示器，包括具有上述像素结构的阵列基板。
在此基础上，以上所述仅为本发明的实施例，并非因此限制本发明的专利范围，凡是利用本发明说明书及附图内容所作的等效结构或等效流程变换，例如各实施例之间技术特征的相互结合，或直接或间接运用在其他相关的技术领域，均同理包括在本发明的专利保护范围内。

Claims (18)

  1. 一种阵列基板，包括栅极线、数据线和呈阵列排布的多个像素电极，其中，所述多个像素电极在行方向上依次允许白、绿、红、蓝四种颜色的光透过，并循环，且相邻两个所述像素电极沿行方向的尺寸之和等于每个所述像素电极沿列方向的尺寸，同一列所述像素电极允许相同颜色的光透过，相邻两行所述像素电极之间具有一条所述栅极线，且同一行所述像素电极连接同一条所述栅极线，每条所述数据线逐行环绕一列所述像素电极，每条所述数据线分别与其环绕的一列所述像素电极相邻的两列所述像素电极沿列方向依次连接，且每条所述数据线在环绕相邻两行所述像素电极时的开口方向相反，同一列的奇数行的所述像素电极连接同一条所述数据线，同一列的偶数行的所述像素电极连接同一条所述数据线，且所述奇数行和所述偶数行的所述像素电极分别连接不同的所述数据线。
  2. 根据权利要求1所述的阵列基板，其中，所述阵列基板还包括多个TFT，每个所述TFT的栅极连接相邻的所述栅极线、源极连接相邻的所述数据线、漏极连接相邻的所述像素电极。
  3. 一种阵列基板，包括栅极线、数据线和呈阵列排布的多个像素电极，其中，同一列所述像素电极允许相同颜色的光透过，相邻两行所述像素电极之间具有一条所述栅极线，且同一行所述像素电极连接同一条所述栅极线，每条所述数据线逐行环绕至少一列所述像素电极，且每条所述数据线在环绕相邻两行所述像素电极时的开口方向相反，同一列的奇数行的所述像素电极连接同一条所述数据线，同一列的偶数行的所述像素电极连接同一条所述数据线，且所述奇数行和所述偶数行的所述像素电极分别连接不同的所述数据线。
  4. 根据权利要求3所述的阵列基板，其中，所述多个像素电极分别允许红、绿、蓝、白四种颜色的光透过。
  5. 根据权利要求4所述的阵列基板，其中，每条所述数据线逐行环绕相邻两列所述像素电极，每条所述数据线分别与其环绕的两列所述像素电极中远离所述开口方向的一个以及下一行且和所述一个相邻的所述像素电极沿列方向依次连接。
  6. 根据权利要求5所述的阵列基板，其中，所述多个像素电极在行方向上依次允许所述红色光、所述绿色光、所述蓝色光、所述白色光透过，并循环。
  7. 根据权利要求4所述的阵列基板，其中，每条所述数据线逐行环绕一列所述像素电极，每条所述数据线分别与其环绕的一列所述像素电极相邻的两列所述像素电极沿列方向依次连接。
  8. 根据权利要求7所述的阵列基板，其中，所述多个像素电极在行方向上依次允许所述白色光、所述绿色光、所述红色光、所述蓝色光透过，并循环。
  9. 根据权利要求3所述的阵列基板，其中，相邻两个所述像素电极沿行方向的尺寸之和等于每个所述像素电极沿列方向的尺寸。
  10. 根据权利要求3所述的阵列基板，其中，所述阵列基板还包括多个TFT，每个所述TFT的栅极连接相邻的所述栅极线、源极连接相邻的所述数据线、漏极连接相邻的所述像素电极。
  11. 一种液晶显示装置，其中，所述液晶显示装置的阵列基板包括栅极线、数据线和呈阵列排布的多个像素电极，同一列所述像素电极允许相同颜色的光透过，相邻两行所述像素电极之间具有一条所述栅极线，且同一行所述像素电极连接同一条所述栅极线，每条所述数据线逐行环绕至少一列所述像素电极，且每条所述数据线在环绕相邻两行所述像素电极时的开口方向相反，同一列的奇数行的所述像素电极连接同一条所述数据线，同一列的偶数行的所述像素电极连接同一条所述数据线，且所述奇数行和所述偶数行的所述像素电极分别连接不同的所述数据线。
  12. 根据权利要求11所述的液晶显示装置，其中，所述多个像素电极分别允许红、绿、蓝、白四种颜色的光透过。
  13. 根据权利要求12所述的液晶显示装置，其中，每条所述数据线逐行环绕相邻两列所述像素电极，每条所述数据线分别与其环绕的两列所述像素电极中远离所述开口方向的一个以及下一行且和所述一个相邻的所述像素电极沿列方向依次连接。
  14. 根据权利要求13所述的液晶显示装置，其中，所述多个像素电极在行方向上依次允许所述红色光、所述绿色光、所述蓝色光、所述白色光 透过，并循环。
  15. 根据权利要求12所述的液晶显示装置，其中，每条所述数据线逐行环绕一列所述像素电极，每条所述数据线分别与其环绕的一列所述像素电极相邻的两列所述像素电极沿列方向依次连接。
  16. 根据权利要求15所述的液晶显示装置，其中，所述多个像素电极在行方向上依次允许所述白色光、所述绿色光、所述红色光、所述蓝色光透过，并循环。
  17. 根据权利要求11所述的液晶显示装置，其中，相邻两个所述像素电极沿行方向的尺寸之和等于每个所述像素电极沿列方向的尺寸。
  18. 根据权利要求11所述的液晶显示装置，其中，所述阵列基板还包括多个TFT，每个所述TFT的栅极连接相邻的所述栅极线、源极连接相邻的所述数据线、漏极连接相邻的所述像素电极。
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CN111091763B (zh) * 2020-03-22 2020-06-19 深圳市华星光电半导体显示技术有限公司 一种显示面板
CN115113428B (zh) * 2022-06-28 2024-01-30 武汉华星光电半导体显示技术有限公司 显示面板及显示终端

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2000020918A1 (fr) * 1998-10-07 2000-04-13 Seiko Epson Corporation Dispositif a cristaux liquides et appareil electronique
JP2000221524A (ja) * 1999-01-29 2000-08-11 Sanyo Electric Co Ltd カラー液晶表示装置
CN1705007A (zh) * 2004-05-31 2005-12-07 三星电子株式会社 液晶显示装置及其驱动方法
CN103926766A (zh) * 2013-08-07 2014-07-16 上海中航光电子有限公司 像素阵列及液晶显示装置
CN103926757A (zh) * 2014-01-10 2014-07-16 厦门天马微电子有限公司 Tft阵列基板、显示面板及显示装置
CN104698672A (zh) * 2015-03-03 2015-06-10 厦门天马微电子有限公司 滤色片及其制备方法

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102455552B (zh) * 2010-10-19 2015-02-18 京东方科技集团股份有限公司 液晶显示器
JP6078946B2 (ja) * 2011-11-08 2017-02-15 セイコーエプソン株式会社 電気光学装置および電子機器
CN202948235U (zh) * 2012-11-09 2013-05-22 北京京东方光电科技有限公司 一种阵列基板、显示面板和显示装置
CN103000156B (zh) * 2012-12-11 2015-04-08 京东方科技集团股份有限公司 液晶面板驱动方法及闪烁测试方法、液晶显示装置
KR102105285B1 (ko) * 2013-09-03 2020-06-01 삼성디스플레이 주식회사 액정 표시 장치
KR102039091B1 (ko) * 2013-09-05 2019-11-01 삼성디스플레이 주식회사 액정 표시 장치
TWI537928B (zh) * 2014-01-27 2016-06-11 友達光電股份有限公司 顯示面板及其驅動方法
CN104200786A (zh) * 2014-07-31 2014-12-10 京东方科技集团股份有限公司 一种阵列基板及其驱动方法、显示面板、显示装置
CN104317124B (zh) * 2014-11-05 2017-07-18 京东方科技集团股份有限公司 阵列基板、像素驱动方法和显示装置

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2000020918A1 (fr) * 1998-10-07 2000-04-13 Seiko Epson Corporation Dispositif a cristaux liquides et appareil electronique
JP2000221524A (ja) * 1999-01-29 2000-08-11 Sanyo Electric Co Ltd カラー液晶表示装置
CN1705007A (zh) * 2004-05-31 2005-12-07 三星电子株式会社 液晶显示装置及其驱动方法
CN103926766A (zh) * 2013-08-07 2014-07-16 上海中航光电子有限公司 像素阵列及液晶显示装置
CN103926757A (zh) * 2014-01-10 2014-07-16 厦门天马微电子有限公司 Tft阵列基板、显示面板及显示装置
CN104698672A (zh) * 2015-03-03 2015-06-10 厦门天马微电子有限公司 滤色片及其制备方法

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