WO2016202039A1 - 发光二极管及其制备方法 - Google Patents

发光二极管及其制备方法 Download PDF

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Publication number
WO2016202039A1
WO2016202039A1 PCT/CN2016/077839 CN2016077839W WO2016202039A1 WO 2016202039 A1 WO2016202039 A1 WO 2016202039A1 CN 2016077839 W CN2016077839 W CN 2016077839W WO 2016202039 A1 WO2016202039 A1 WO 2016202039A1
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Prior art keywords
substrate
light emitting
emitting diode
laser
impurity
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PCT/CN2016/077839
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English (en)
French (fr)
Inventor
张家宏
陈功
林素慧
彭康伟
许圣贤
刘传桂
林潇雄
周瑜
韦静静
黄静
Original Assignee
厦门市三安光电科技有限公司
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Priority claimed from CN201510335626.2A external-priority patent/CN105185744B/zh
Priority claimed from CN201510335543.3A external-priority patent/CN105023977B/zh
Application filed by 厦门市三安光电科技有限公司 filed Critical 厦门市三安光电科技有限公司
Publication of WO2016202039A1 publication Critical patent/WO2016202039A1/zh
Priority to US15/607,461 priority Critical patent/US10211367B2/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/025—Physical imperfections, e.g. particular concentration or distribution of impurities
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/15—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005—Processes
    • H01L33/0062—Processes for devices with an active region comprising only III-V compounds
    • H01L33/0066—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
    • H01L33/007—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound comprising nitride compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005—Processes
    • H01L33/0062—Processes for devices with an active region comprising only III-V compounds
    • H01L33/0075—Processes for devices with an active region comprising only III-V compounds comprising nitride compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005—Processes
    • H01L33/0095—Post-treatment of devices, e.g. annealing, recrystallisation or short-circuit elimination
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/10—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a light reflecting structure, e.g. semiconductor Bragg reflector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/58—Optical field-shaping elements
    • H01L33/60—Reflective elements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/20—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate

Definitions

  • the present invention belongs to the field of semiconductor fabrication, and in particular, to a light emitting diode and a method for forming the same.
  • the cutting technology of light-emitting diodes has gradually evolved from diamond knife cutting to ordinary laser cutting.
  • the wavelength of the laser is 355 nm or 266 nm, which is characterized in that it can draw both sapphire substrates and various films.
  • a light-emitting diode cutting technique that has emerged and developed in recent years is a stealth laser cutting
  • the present invention provides a back shaving method in an LED process and a forming structure thereof.
  • a plurality of impurity releasing holes are formed on a back surface of a substrate by laser focusing, and then further utilized along the position of the impurity releasing holes.
  • the laser stealth cutting technology forms a plurality of invisible cutting blast points, so that the impurities generated in the stealth cutting process are discharged into the substrate through the impurity releasing holes, thereby reducing the adverse effect of the ablation impurities adhering to the side wall of the stealth cutting blasting point and improving the brightness.
  • the external quantum efficiency of the LED is provided.
  • a back shaving method in an LED process includes the following steps: 1) providing a substrate, growing an epitaxial layer on the surface of the substrate, and fabricating a plurality of LED units 2) focusing on the back surface of the substrate by using a laser to form a plurality of impurity releasing holes; 3) focusing on the inside of the substrate by a laser at a position corresponding to the impurity releasing hole to form a stealth cutting blast point, Make the miscellaneous
  • the quality release hole is connected with the stealth cutting blast point to discharge impurities generated during the formation of the stealth cutting blast point through the impurity releasing hole to prevent the impurities from adhering to the sidewall of the stealth cutting blasting point and reducing the external quantum of the LED unit. effectiveness.
  • the impurity-releasing holes formed in the step 2) are located between the adjacent LED units with a vertical extension line toward the epitaxial layer.
  • the impurity release hole in the step 3) is on the same axis as the stealth cutting explosion point.
  • the substrate is any one of a sapphire flat substrate, a patterned sapphire substrate, a silicon substrate, a silicon carbide substrate, a gallium nitride substrate, and a glass substrate.
  • the back surface of the substrate further has a reflective layer
  • the reflective layer is a multilayer structure composed of a metal reflective layer, a distributed Bragg reflection layer or a metal reflective layer and a distributed Bragg reflection layer.
  • the metal reflective layer is an A1 layer, an Ag layer, and an Au layer.
  • a light emitting diode structure using the above-described cutting method, including a substrate, the structure including a plurality of impurity releasing holes on a back surface of the substrate and a stealth cutting blast point located inside thereof, the impurity releasing hole and The stealth cutting blast points are located on the same axis and are in communication with each other, and the impurities released during the formation of the stealth cutting blast point are discharged through the impurity releasing holes.
  • the substrate is any one of a sapphire flat substrate, a sapphire patterned substrate, a silicon substrate, a silicon carbide substrate, a gallium nitride substrate, and a glass substrate.
  • the impurity release hole is located between adjacent LED units along a vertical extension line of the epitaxial layer.
  • the present invention also provides a gallium nitride-based light-emitting diode chip and a preparation method thereof, which can fully utilize the advantages of stealth cutting, and effectively discharge by-products such as burn marks and debris left after laser stealth cutting. , reduce the light absorption of by-products, increase the light output of the side wall of the light-emitting diode, and improve the light-emitting efficiency.
  • a method for preparing a gallium nitride based light emitting diode chip comprising the steps of: (1) providing a substrate;
  • the LED chip is prepared; wherein the step (3) of the laser stealth cutting is focused at a position of 10 ⁇ to 40 ⁇ from the back of the substrate, and the laser energy is adjusted to 0.32 W to 0.6 W, and the laser frequency is adjusted. 15KHz ⁇ 4 ⁇ , so that the laser stealth cutting ablate in the substrate to form a hole penetrates to the back of the exposed substrate, which is good for burning Traces, debris by-products are discharged, reducing light absorption.
  • the epitaxial layer comprises an N-GaN layer, a light emitting layer and a P-GaN layer.
  • the epitaxial layer is provided with a dicing channel of a network structure.
  • the cutting lane is composed of a longitudinal straight cutting channel and a transverse straight cutting channel.
  • the laser invisible cutting is consistent with the position of the cutting track in the vertical direction in the substrate.
  • the pitch of the holes is 8 ⁇ m to 20 ⁇ m, and the size of the holes is 1 ⁇ m to 4 ⁇ m.
  • the back surface of the substrate is provided with a distributed Bragg reflection layer.
  • an impurity release hole is first formed on a back surface of a substrate having a plurality of LED units, and then a laser is focused on the inside of the substrate at a position corresponding to the impurity release hole to form an invisible shape.
  • Cutting a blast point connecting the impurity release hole and the stealth cutting blast point to discharge impurities generated during the formation of the stealth cutting blast point through the impurity releasing hole to prevent the impurity from adhering to the sidewall of the stealth cutting blasting point.
  • the invention utilizes the contact stealing blasting point and the impurity releasing hole on the back surface of the substrate to further reduce the substrate non- Anomalous phenomena such as oblique cracks generated in the subsequent rupture process of the blasting point region improve product yield.
  • FIG. 1 is a side view of an LED wafer after the formation of a stealth cutting burst in the prior art.
  • FIGS. 2 to 3 are schematic flowcharts of a back shading method according to Embodiment 1 of the present invention.
  • FIG. 4 is a back view of a substrate according to Embodiment 1 of the present invention.
  • 5 to 7 are schematic cross-sectional views showing the back shaving method of Embodiment 2 of the present invention.
  • FIG. 8 to FIG. 11 are schematic cross-sectional views showing a process of fabricating a gallium nitride-based light-emitting diode chip according to Embodiment 3 of the present invention.
  • FIG. 12 is a schematic structural view of a gallium nitride-based light-emitting diode chip of Embodiment 4.
  • 10 substrate; 11: stealth cutting blast point; 12: impurity releasing hole; 20: epitaxial layer; 30: reflective layer; 31: impurity releasing hole two; 101: patterned sapphire substrate; : N-GaN layer; 103: light-emitting layer; 104: P-GaN layer; 105: hole; 106: P electrode; 107: N electrode; 108: distributed Bragg reflection layer; A: transverse straight line cutting; B: longitudinal straight line cutting line.
  • a back-wiping method for an LED process specifically includes the following steps. First, a substrate 10 is provided, an epitaxial layer is grown on the upper surface of the substrate 10, and a plurality of LED units are fabricated. 20.
  • the substrate 10 may be any one of a sapphire flat substrate, a sapphire patterned substrate, a silicon substrate, a silicon carbide substrate, a gallium nitride substrate, and a glass substrate, during mass production of the LED.
  • the sapphire substrate is patterned; then, a laser is used to focus on the back surface of the substrate 10 to form a plurality of impurity releasing holes 12, wherein the impurity releasing holes 12 preferably have a pore diameter range of 1 to 6 ⁇ m, and the impurity releasing holes 12 face the epitaxial layer.
  • the vertical extension line is located between the adjacent LED units 20; then, at a corresponding position with the impurity release hole 12, a laser is focused on the inside of the substrate 10 to form a stealth cutting blast point 11, the impurity releasing hole 12 and the stealth cutting blast Point 11 is connected to discharge impurities generated during the formation of the stealth cutting blast point 11 through the impurity releasing hole 12 to prevent the impurities from adhering to the sidewall of the stealth cutting blasting point 11 to reduce the external quantum efficiency of the LED unit; and invisible cutting Burst point 11
  • a plurality of mutually independent LED units can be separated along the vertical straight position where the impurity releasing hole 12 and the stealth cutting blast point 11 are located.
  • the present invention forms an impurity releasing hole 12 penetrating between the back surface of the substrate 10 and the invisible cutting blast point 11 before the formation of the stealth cutting blast point 11, and the impurity releasing hole 12 is directly used to release the invisible cutting blast point 11 during formation.
  • Impurity this method only increases the formation of impurity release holes 12 in the back-draw process, reducing the probability of damage to the LED surface, saving labor costs; meanwhile, forming a stealth cutting blast point only inside the substrate 10 in the prior art
  • the present invention utilizes the invisible cut blasting point 11 and the impurity releasing hole 12 on the back surface of the substrate, thereby further reducing the abnormal phenomenon such as the oblique crack generated in the non-cutting blasting area of the substrate 10 in the subsequent splicing process, and improving the product. Yield.
  • the difference between this embodiment and Embodiment 1 is that a reflective layer 30 is deposited on the back side of the substrate 10, and then the reflective layer 30 corresponding to the gap position of each LED unit 20 is removed to form The impurity releasing hole 23 in the reflective layer 30, the reflective layer 30 is a multilayer structure composed of a metal reflective layer, a distributed Bragg reflection layer or a metal reflective layer and a distributed Bragg reflection layer, wherein the metal reflective layer is an A1 layer, an Ag layer or an Au layer.
  • a distributed Bragg reflection layer having a high reflectance is preferred; subsequently, an impurity release hole 12 is formed on the surface of the substrate 10 by laser focusing on the corresponding positions of the impurity release holes 31, and a stealth cut point 11 is formed by stealth cutting.
  • a plurality of mutually independent LED units 20 can be separated along the vertical straight position where the impurity releasing holes 31, the impurity releasing holes 12 and the stealth cutting blast points 11 are located.
  • the embodiment provides a method for fabricating a gallium nitride light emitting diode chip, and the manufacturing steps thereof include: [0040] As shown in FIG. 8, metal organic chemical vapor deposition (MOCVD) is performed on the patterned sapphire substrate 101. Epitaxial growth is sequentially performed: an N-GaN layer 102, a light-emitting layer 103, and a P-GaN layer 104.
  • MOCVD metal organic chemical vapor deposition
  • the laser is drawn along the surface of the epitaxial layer, the longitudinal straight scribe line B is formed in a direction perpendicular to the flat side, and the transverse straight scribe line A is formed in a direction parallel to the flat side, and the scribe lines A and B are formed.
  • the cutting path of the network structure As shown in FIG. 10, the laser stealth cutting is performed at a position of 10 ⁇ m to 40 ⁇ m from the back surface of the substrate, and the laser energy is adjusted to 0.32 W to 0.6 W, and the laser frequency is adjusted from 15 kHz to 40 kHz, and the laser stealth cutting ablation is performed.
  • the position is vertically aligned with the position of the dicing line, so that the laser stealth cutting is ablated in the substrate to form the hole 105 to penetrate the back surface of the substrate, which is favorable for burn marks, waste by-product discharge, and reduced light absorption;
  • the hole 105 has a pitch of 8 ⁇ m to 20 ⁇ m, and the hole has a size of 1 ⁇ m to 4 ⁇ m.
  • the refractive index of the substrate 101 and the ablation hole 105 are different, and the laser ablation scratch is similar to the surface of the LED chip, which is increased.
  • the angle of light extraction thereby achieving the purpose of increasing axial light, thus improving the overall luminous efficiency of the LED chip; effectively eliminating the by-products left after the laser stealth cutting, eliminating the subsequent chemical solution removal process, and effectively saving manufacturing costs .
  • a P electrode 106 and an N electrode 107 are formed on the P-GaN layer 104 and the exposed N-GaN layer 102 by a mask and an etching process; and are obtained by a grinding and cleaving process. LED chip.
  • the GaN-based light-emitting diode chip prepared in this embodiment has high luminous efficiency and excellent quality compared with a chip prepared by a conventional process.
  • the present embodiment provides a distributed Bragg reflection layer 108 on the back surface of the substrate, so that the light extraction efficiency of the LED chip is further improved.
  • the distribution Bragg reflection layer 108 may be prepared before laser invisible cutting inside the substrate, or after ablation holes are obtained by laser invisible cutting inside the substrate.

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Abstract

一种发光二极管及其制备方法。在一些实施例中，先利用激光聚焦在具有多个LED单元（20）的衬底（10）背面形成多个杂质释放孔（12），再在与多个杂质释放孔对应位置，利用激光聚焦在衬底内部，形成多个隐形切割爆点（11），使杂质释放孔和隐形切割爆点连通，以将隐形切割爆点形成过程中的杂质通过杂质释放孔排出衬底内部，避免杂质附着于隐形切割爆点而降低LED单元的外量子效率。在另一些实施例中，通过在距衬底（101）背面向内10μm~40μm位置处聚焦，增加激光能量，调整激光频率，使得激光隐形切割在衬底内烧蚀形成孔洞（105）贯穿至露出衬底背面，有效地排出激光隐形切割后留下的烧痕、碎屑等副产品，减少副产品的光吸收，增加发光二极管的侧壁出光，提升出光效率。

Description

发光二极管及其制备方法
技术领域
[0001] 本发明属于半导体制备领域， 特别涉及发光二极管及其形成制备方法。
背景技术
[0002] 发光二极管的切割技术由金刚石刀切割逐渐发展为普通激光切割， 一般来说， 激光的波长为 355nm或者 266nm， 其特点在于它既能划幵蓝宝石衬底， 也能划幵 各种膜层， 比如氮化镓层， 布拉格反射层、 金属层等。
[0003] 参看附图 1， 近年来出现并得到快速发展的发光二极管切割技术为隐形激光切 害 |J， 其特点在于它能穿透蓝宝石衬底 10， 在蓝宝石衬底 10内形成具有能量的爆 点 11， 爆点 11爆幵而达到切割的目的。 相较于普通激光切割或金刚石切割， 它 减少了晶片侧面的激光灼伤面积或晶片表面的损伤面积， 从而减少晶片的出光 损失； 但因为爆点 11是在衬底 10内部形成， 其形成过程中爆点 11区域的材质被 激光烧蚀后附着于该爆点 11侧壁， 从而阻挡光的出射， 影响发光二极管的外量 子效率。
技术问题
问题的解决方案
技术解决方案
[0004] 针对上述问题， 本发明提出了一种 LED制程中的背划方法及其形成结构， 首先 利用激光聚焦在衬底背面表面形成多个杂质释放孔， 然后沿着杂质释放孔位置 进一步利用激光隐形切割技术形成多个隐形切割爆点， 使隐形切割过程中产生 的杂质通过杂质释放孔排出衬底内部， 减少烧蚀杂质附着于隐形切割爆点侧壁 而对亮度产生的不良影响， 提升发光二极管的外量子效率。
[0005] 本发明解决上述问题的技术方案为： 一种 LED制程中的背划方法， 包括如下步 骤： 1) 提供一衬底， 在所述衬底上表面生长外延层并制作多个 LED单元； 2) 利 用激光聚焦在所述衬底的背面表面， 形成多个杂质释放孔； 3) 在与所述杂质释 放孔对应位置， 利用激光聚焦在所述衬底内部， 形成隐形切割爆点， 使所述杂 质释放孔和所述隐形切割爆点连通， 以将隐形切割爆点形成过程中产生的杂质 通过杂质释放孔排出衬底内部， 避免杂质附着于隐形切割爆点侧壁而降低 LED单 元的外量子效率。
优选的， 所述步骤 2) 中形成的杂质释放孔朝向外延层面的竖直延伸线位于相 邻的 LED单元之间。
[0007] 优选的， 所述步骤 3) 中杂质释放孔与隐形切割爆点在同一轴线上。
[0008] 优选的， 所述衬底为蓝宝石平片衬底、 图形化蓝宝石衬底、 硅衬底、 碳化硅衬 底、 氮化镓衬底、 玻璃衬底中的任意一种。
[0009] 优选的， 所述衬底背面还具有反射层， 所述反射层为金属反射层、 分布布拉格 反射层或金属反射层和分布布拉格反射层组成的多层结构。
[0010] 优选的， 所述金属反射层为 A1层、 Ag层、 Au层。
[0011] 利用上述切割方法而形成发光二极管结构， 包括衬底， 所述结构包括多个位于 所述衬底背面表面的杂质释放孔和位于其内部的隐形切割爆点， 所述杂质释放 孔和隐形切割爆点位于同一轴线上， 并且相互连通， 隐形切割爆点形成过程中 释放的杂质通过杂质释放孔排出衬底内部。
[0012] 优选的， 所述衬底为蓝宝石平片衬底、 蓝宝石图形化衬底、 硅衬底、 碳化硅衬 底、 氮化镓衬底、 玻璃衬底中的任意一种。
[0013] 优选的， 所述杂质释放孔朝向外延层面的竖直延伸线位于相邻的 LED单元之间
[0014] 本发明还提供了提供一种氮化镓基发光二极管芯片及其制备方法， 其可以充分 发挥隐形切割的优点， 有效地排出激光隐形切割后留下的烧痕、 碎屑等副产物 ， 减少副产物的光吸收， 增加发光二极管的侧壁出光， 提升出光效率。
[0015] 一种氮化镓基发光二极管芯片的制备方法， 包括步骤： （1) 提供一种衬底；
(2) 在所述衬底上形成外延层； （3) 在衬底内部通过激光隐形切割得到烧蚀 孔洞； （4) 通过光罩、 蚀刻工艺， 制作 P、 N电极； （5) 经过研磨、 劈裂工艺 ， 制得发光二极管芯片； 其中步骤 （3) 所述激光隐形切割在距衬底背面向内 10 μηι~40μιη位置处聚焦， 调整激光能量到 0.32W~0.6W， 调整激光频率在 15KHz~4 ΟΚΗζ, 使得激光隐形切割在衬底内烧蚀形成孔洞贯穿至露出衬底背面， 利于烧 痕、 碎屑副产物排出， 减少吸光。
[0016] 优选的， 所述外延层包括 N-GaN层、 发光层和 P-GaN层。
[0017] 优选的， 所述外延层设有网络状结构的切割道。
[0018] 优选的， 所述切割道由纵向直线切割道和横向直线切割道构成。
[0019] 优选的， 所述激光隐形切割在衬底内烧蚀位置在垂直方向上与切割道位置上下 一致。
[0020] 优选的， 所述孔洞的间距为 8μηι~20μιη， 孔洞的大小为 1μηι~4μιη。
[0021] 优选的， 所述衬底背面设有分布布拉格反射层。
发明的有益效果
有益效果
[0022] 在前述 LED制程中的背划方法， 先在具有多个 LED单元的衬底背面形成杂质释 放孔， 再在与杂质释放孔对应位置， 利用激光聚焦在所述衬底内部， 形成隐形 切割爆点， 使所述杂质释放孔和所述隐形切割爆点连通， 以将隐形切割爆点形 成过程中产生的杂质通过杂质释放孔排出衬底内部， 避免杂质附着于隐形切割 爆点侧壁而降低 LED单元的外量子效率； 与现有技术中仅仅在衬底内部形成隐形 切割爆点相比， 本发明利用连通隐形切割爆点与衬底背面的杂质释放孔， 进一 步减小衬底非切割爆点区域在随后的裂片制程中产生的斜裂等异常现象， 提升 产品良率。
[0023] 前述氮化镓基发光二极管芯片制备方法中， 通过在距衬底背面向内 10μηι~50μιη 位置处聚焦， 增加激光能量， 调整激光频率， 使得激光隐形切割在衬底内烧蚀 形成孔洞贯穿至露出衬底背面， 有效地排出激光隐形切割后留下的烧痕、 碎屑 等副产物， 减少副产物对光的吸收， 增加发光二极管的侧壁出光， 提升出光效 率； 此外， 由于衬底与孔洞折射率不同， 同吋激光烧蚀划痕类似将 LED芯片侧面 粗化， 增大了光取出的角度， 从而达到增加轴向光的目的， 如此提高了 LED芯片 的整体发光效率； 再者， 由于有效排出激光隐形切割后留下的副产物， 省去后 续的化学溶液去除工序， 有效节省制造成本。
对附图的简要说明
附图说明 [0024] 附图用来提供对本发明的进一步理解， 并且构成说明书的一部分， 与本发明的 实施例一起用于解释本发明， 并不构成对本发明的限制。 此外， 附图数据是描 述概要， 不是按比例绘制。
[0025] 图 1为现有技术之隐形切割爆点形成后的 LED晶圆侧视图。
[0026] 图 2 ~3为本发明实施例 1之背划方法的流程示意图。
[0027] 图 4为本发明实施例 1之衬底背视图。
[0028] 图 5~7为本发明实施例 2之背划方法的流程示意剖面图。
[0029] 图 8〜图 11是本发明实施例 3之制备氮化镓基发光二极管芯片的流程示意剖面图 [0030] 图 12是实施例 4氮化镓基发光二极管芯片的结构示意图。
[0031] 图中： 10: 衬底； 11 : 隐形切割爆点； 12: 杂质释放孔； 20: 外延层； 30: 反 射层； 31 : 杂质释放孔二； 101 : 图形化蓝宝石衬底； 102: N-GaN层； 103: 发 光层； 104： P-GaN层; 105： 孔洞； 106： P电极； 107： N电极； 108： 分布布拉 格反射层； A: 横向直线切割道； B: 纵向直线切割道。
本发明的实施方式
[0032] 下面结合附图和实施例对本发明的具体实施方式进行详细说明。
[0033] 实施例 1
[0034] 参看附图 2~4， 本发明中的一种 LED制程的背划方法， 具体包括以下步骤， 首 先提供一衬底 10， 于衬底 10上表面生长外延层并制作多个 LED单元 20。 该衬底 10 可为蓝宝石平片衬底、 蓝宝石图形化衬底、 硅衬底、 碳化硅衬底、 氮化镓衬底 、 玻璃衬底中的任意一种， 在 LED的量产过程中， 优选图形化蓝宝石衬底； 然后 利用激光聚焦在衬底 10的背面表面， 形成多个杂质释放孔 12， 所述杂质释放孔 1 2孔径范围优选为 1〜6μηι， 杂质释放孔 12朝向外延层面的竖直延伸线位于相邻的 LED单元 20之间； 随后在与杂质释放孔 12的对应位置， 利用激光聚焦在衬底 10内 部， 形成隐形切割爆点 11， 使杂质释放孔 12和隐形切割爆点 11连通， 以将隐形 切割爆点 11形成过程中产生的杂质通过杂质释放孔 12排出衬底内部， 避免杂质 附着于隐形切割爆点 11侧壁而降低 LED单元的外量子效率； 并且隐形切割爆点 11 与杂质释放孔 12位于同一轴线上， 在随后的 LED的正面裂片的制程中， 可沿杂质 释放孔 12和隐形切割爆点 11所在的竖直直线位置分离得到相互独立的多个 LED单 元。
[0035] 现有技术中， 部分技术人员通过刀片或其他工具去除侧壁附着的烧蚀杂质， 在 去除过程中不仅需要大量的人力， 同吋操作工具易损伤 LED外延层表面， 降低发 光二极管质量， 且不适用于大规模生产需要。 而本发明在隐形切割爆点 11形成 前先形成贯穿于衬底 10背面与隐形切割爆点 11之间的杂质释放孔 12， 利用此杂 质释放孔 12直接释放隐形切割爆点 11形成过程中产生的杂质， 此法仅在背划制 程中增加形成杂质释放孔 12步骤， 降低对 LED表面的损坏几率， 节省人力成本； 同吋， 与现有技术中仅仅在衬底 10内部形成隐形切割爆点 11相比， 本发明利用 连通隐形切割爆点 11与衬底背面的杂质释放孔 12， 进一步减小衬底 10非切割爆 点区域在随后的裂片制程中产生的斜裂等异常现象， 提升产品良率。
[0036] 实施例 2
[0037] 参看附图 5~7， 本实施例与实施例 1的区别在于： 先于衬底 10背面沉积一反射层 30， 然后去除对应于各 LED单元 20间隙位置处的反射层 30， 形成反射层 30内杂质 释放孔二 31， 反射层 30为金属反射层、 分布布拉格反射层或金属反射层和分布 布拉格反射层组成的多层结构， 其中， 金属反射层为 A1层、 Ag层或 Au层， 本实 施例优选反射率高的分布布拉格反射层； 随后再沿杂质释放孔二 31对应位置分 别利用激光聚焦在衬底 10表面制作杂质释放孔 12和利用隐形切割制作隐形切割 爆点 11。 在随后的 LED的正面裂片的制程中， 可沿杂质释放孔二 31、 杂质释放孔 12和隐形切割爆点 11所在的竖直直线位置分离得到相互独立的多个 LED单元 20。
[0038] 实施例 3
[0039] 本实施例提供一种氮化镓发光二极管芯片的制备方法， 其制作步骤包括： [0040] 如图 8所示， 在图形化蓝宝石衬底 101上采用金属有机化学气相沉积 （MOCVD ) 依次外延生长： N-GaN层 102、 发光层 103和 P-GaN层 104。
如图 9所示， 沿外延层表面进行激光正划， 在垂直于平边的方向形成纵向直线 切割道 B， 在平行于平边的方向上形成横向直线切割道 A， 切割道 A和 B构成网络 状结构的切割道。 [0042] 如图 10所示， 采用激光隐形切割在距衬底背面向内 10μηι~40μιη位置处聚焦， 调 整激光能量到 0.32W~0.6W， 调整激光频率在 15KHz~40KHz， 激光隐形切割烧蚀 位置在垂直方向上与切割道位置上下一致， 使得激光隐形切割在衬底内烧蚀形 成孔洞 105贯穿至露出衬底背面， 利于烧痕、 碎屑副产物排出， 减少吸光； 本实 施例烧蚀孔洞 105的间距为 8μηι~20μιη， 孔洞的大小为 1μηι~4μιη， 藉由衬底 101与 烧蚀孔洞 105的折射率不同， 同吋激光烧蚀划痕类似将 LED芯片侧面粗化， 增大 了光取出的角度， 从而达到增加轴向光的目的， 如此提高了 LED芯片的整体发光 效率； 由于有效排出激光隐形切割后留下的副产物， 省去后续的化学溶液去除 工序， 有效节省制造成本。
[0043] 如图 11所示， 通过光罩、 蚀刻工艺， 分布在 P-GaN层 104和暴露的 N-GaN层 102 上制作 P电极 106和 N电极 107 ; 经过研磨、 劈裂工艺， 制得发光二极管芯片。
[0044] 本实施例制备的 GaN基发光二极管芯片， 与常规工艺制备的芯片相比， 发光效 率高， 品质优良。
[0045] 实施例 4
[0046] 如图 12所示， 与实施例 3不同的是， 本实施例在衬底背面设有分布布拉格反射 层 108， 如此发光二极管芯片的取光效率得到更进一步提升。 需要指出的是， 分 布布拉格反射层 108可以在衬底内部通过激光隐形切割之前制备， 也可以在衬底 内部通过激光隐形切割得到烧蚀孔洞之后形成。
[0047] 应当理解的是， 上述具体实施方案为本发明的优选实施例， 本发明的范围不限 于该实施例， 凡依本发明所做的任何变更， 皆属本发明的保护范围之内。

Claims

权利要求书
[权利要求 1] 发光二极管的制备方法， 包括如下步骤：
1) 提供一衬底， 在所述衬底上表面生长外延层并制作多个 LED单元
2) 利用激光聚焦在所述衬底的背面表面， 形成多个杂质释放孔;
3) 在与所述多个杂质释放孔对应位置， 利用激光聚焦在所述衬底内 部， 形成多个隐形切割爆点， 使所述杂质释放孔和所述隐形切割爆点 连通， 以将隐形切割爆点形成过程中产生的杂质通过杂质释放孔排出 衬底内部， 避免杂质附着于隐形切割爆点侧壁而降低 LED单元的外量 子效率。
[权利要求 2] 根据权利要求 1所述的发光二极管的制备方法， 其特征在于： 所述步 骤 2) 中形成的杂质释放孔朝向外延层面的竖直延伸线位于相邻的 LE D单元之间。
[权利要求 3] 根据权利要求 1所述的发光二极管的制备方法， 其特征在于： 所述步 骤 3) 中杂质释放孔与隐形切割爆点位于同一轴线上。
[权利要求 4] 根据权利要求 1所述的发光二极管的制备方法， 其特征在于： 所述衬 底为蓝宝石平片衬底、 图形化蓝宝石衬底、 硅衬底、 碳化硅衬底、 氮 化镓衬底、 玻璃衬底中的任意一种。
[权利要求 5] 根据权利要求 1所述的发光二极管的制备方法， 其特征在于： 所述衬 底背面还具有反射层， 所述反射层为金属反射层、 分布布拉格反射层 或金属反射层和分布布拉格反射层组成的多层结构。
[权利要求 6] 根据权利要求 5所述的发光二极管的制备方法， 其特征在于： 所述金 属反射层为 A1层、 Ag层或 Au层。
[权利要求 7] 发光二极管， 包括衬底， 其特征在于： 所述结构利用权利要求 1~6所 述的方法制备。
[权利要求 8] 根据权利要求 7所述的发光二极管， 其特征在于： 所述结构包括多个 位于所述衬底背面表面的杂质释放孔和位于衬底内部的隐形切割爆点 ， 所述杂质释放孔和隐形切割爆点位于同一轴线上， 并且相互连通， 隐形切割爆点形成过程中释放的杂质通过杂质释放孔排出衬底内部。
[权利要求 9] 根据权利要求 7所述的一发光二极管， 其特征在于： 所述衬底为蓝宝 石平片衬底、 蓝宝石图形化衬底、 硅衬底、 碳化硅衬底、 氮化镓衬底 、 玻璃衬底中的任意一种。
[权利要求 10] 根据权利要求 7所述的发光二极管， 其特征在于： 所述杂质释放孔朝 向外延层面的竖直延伸线位于相邻的 LED单元之间。
[权利要求 11] 发光二极管的制备方法， 包括步骤：
(1) 提供一种衬底；
(2) 在所述衬底上形成外延层；
(3) 在衬底内部通过激光隐形切割得到烧蚀孔洞；
(4) 通过光罩、 蚀刻工艺， 制作 P、 N电极；
(5) 经过研磨、 劈裂工艺， 制得发光二极管芯片；
其特征在于： 步骤 （3) 所述激光隐形切割在距衬底背面向内 10μηι~4 Ομηι位置处聚焦， 调整激光能量到 0.32W~0.6W， 调整激光频率在 15K Hz~40KHz, 使得激光隐形切割在衬底内烧蚀形成孔洞贯穿至露出衬 底背面， 利于烧痕、 碎屑副产物排出， 减少吸光。
[权利要求 12] 根据权利 11所述的发光二极管的制备方法， 其特征在于： 所述外延层 包括 N-GaN层、 发光层和 P-GaN层。
[权利要求 13] 根据权利 11所述的发光二极管的制备方法， 其特征在于： 所述外延层 设有网络状结构的切割道。
[权利要求 14] 根据权利 13所述的发光二极管的制备方法， 其特征在于： 所述切割道 由纵向直线切割道和横向直线切割道构成。
[权利要求 15] 根据权利 13所述的发光二极管的制备方法， 其特征在于： 所述激光隐 形切割在衬底内烧蚀位置在垂直方向上与切割道位置上下一致。
[权利要求 16] 根据权利 11所述的发光二极管的制备方法， 其特征在于： 所述孔洞的 间距为 8μηι~20μιηο
[权利要求 17] 根据权利 11所述的发光二极管的制备方法， 其特征在于： 所述孔洞的 大小为 1μηι~4μηι。
[权利要求 18] 根据权利 11所述的发光二极管的制备方法， 其特征在于： 所述衬底背 面设有分布布拉格反射层。
[权利要求 19] 发光二极管， 其特征在于： 通过上述权利要求 11至 18中任一项所述的 制备方法制得。
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