WO2016197966A1 - 一种具备散热特性的高光效垂直led结构芯片及其制作方法 - Google Patents

一种具备散热特性的高光效垂直led结构芯片及其制作方法 Download PDF

Info

Publication number
WO2016197966A1
WO2016197966A1 PCT/CN2016/085390 CN2016085390W WO2016197966A1 WO 2016197966 A1 WO2016197966 A1 WO 2016197966A1 CN 2016085390 W CN2016085390 W CN 2016085390W WO 2016197966 A1 WO2016197966 A1 WO 2016197966A1
Authority
WO
WIPO (PCT)
Prior art keywords
layer
heat dissipation
transparent
type semiconductor
semiconductor layer
Prior art date
Application number
PCT/CN2016/085390
Other languages
English (en)
French (fr)
Inventor
蔡鸿
Original Assignee
蔡鸿
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 蔡鸿 filed Critical 蔡鸿
Publication of WO2016197966A1 publication Critical patent/WO2016197966A1/zh

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005—Processes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/64—Heat extraction or cooling elements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/64—Heat extraction or cooling elements
    • H01L33/641—Heat extraction or cooling elements characterized by the materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/64—Heat extraction or cooling elements
    • H01L33/647—Heat extraction or cooling elements the elements conducting electric current to or from the semiconductor body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008—Processes
    • H01L2933/0033—Processes relating to semiconductor body packages
    • H01L2933/0066—Processes relating to semiconductor body packages relating to arrangements for conducting electric current to or from the semiconductor body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008—Processes
    • H01L2933/0033—Processes relating to semiconductor body packages
    • H01L2933/0075—Processes relating to semiconductor body packages relating to heat extraction or cooling elements

Definitions

  • the invention relates to an LED chip structure and a manufacturing method thereof, in particular to an N-type semiconductor layer, a P-type semiconductor layer and an active layer, and a first transparent heat dissipation layer is disposed on a top surface of the N-type semiconductor layer.
  • An LED chip structure in which a second transparent heat dissipation layer is provided on a bottom surface of the P-type semiconductor layer and a method of fabricating the same.
  • the luminous efficacy of LEDs is currently only 160lm/W, and its electro-optical conversion efficiency is only about 40-50%. That is to say, about 50% of the electrical energy becomes heat.
  • the LED junction temperature is caused by two factors.
  • the internal quantum efficiency is not high, that is, when electrons and holes recombine, photons cannot be generated 100%, and it is generally called "current leakage" to reduce the recombination rate of carriers in the PN region. Multiplying the leakage current by the voltage is the power of this part, that is, it is converted into heat, but this part is not the main component, because the internal photon efficiency is now close to 90%.
  • the internally generated photons cannot be completely emitted to the outside of the chip and finally converted into heat. This part is mainly because the current external quantum efficiency is only about 30%, and most of them are converted into heat.
  • the vertical structure has no lateral flow current compared to the horizontal structure chip, so the resistance is reduced, there is no current congestion, the current distribution is relatively uniform, and the material of the light-emitting layer is fully utilized, and the heat generated by the current is reduced.
  • the vertical structure has obvious advantages over the horizontal structure, the conductivity of the P-type GaN and the N-type GaN, particularly the conductivity of the P-type GaN, is significantly reduced due to the gallium nitride doping, so a transparent conductive diffusion layer is required.
  • ITO has not achieved good results in terms of electrical conductivity and transmittance, which seriously affects the external extraction efficiency of LED.
  • Graphene has such excellent electrical and optical properties, how to apply it to the production of LED chips is the direction we have been researching.
  • the invention provides a high-efficiency vertical LED structure chip with heat dissipation characteristics and a manufacturing method thereof, how to improve the off-chip quantum efficiency and timely release the heat generated by the part of the electric power that cannot be converted into light energy is the invention Heavy Point, only improve the luminous efficiency and improve the heat dissipation performance go hand in hand, forming a virtuous cycle to improve heat dissipation performance - improve luminous efficiency - improve heat dissipation performance.
  • Graphene has high electrical and thermal conductivity and light transmission properties. The most important point is that its refractive index and work function are well matched with N-GaN of PN junction, which makes it have good light transmission between graphene and gallium nitride. Sexual and good ohmic contact performance. Since the work function of P-GaN (7.2/eV) is higher than that of graphene (5/eV), ITO, etc., which can only be matured and has good ohmic contact, can be used as a transition layer to regenerate graphene on the transition layer. To compensate for the low conductivity of ITO.
  • a high-efficiency vertical LED structure chip having heat dissipation characteristics comprising an N-type semiconductor layer, a P-type semiconductor layer and an active layer, wherein the active layer is disposed on the N-type semiconductor Between the layer and the P-type semiconductor layer, a PN junction is formed by the N-type semiconductor layer, the P-type semiconductor layer and the active layer, and a first transparent heat dissipation layer is disposed on a top surface of the N-type semiconductor layer.
  • a second transparent heat dissipation layer is disposed on a bottom surface of the P-type semiconductor layer, and a first transparent conductive layer is disposed between the N-type semiconductor layer and the first transparent heat dissipation layer, and the P-type semiconductor layer and the second transparent heat dissipation layer are disposed
  • a second transparent conductive layer is disposed between the layers, and the first transparent conductive layer is electrically connected to the first electrode, and the second transparent conductive layer is electrically connected to the second electrode.
  • the first electrode and the second electrode are respectively connected to the positive and negative lines of the external circuit, and the current flows from the first electrode and the second electrode into the first transparent conductive layer and the second transparent conductive layer and further flows into the N-type
  • the PN junction light emitted by the N-type semiconductor layer, the P-type semiconductor layer, and the active layer is excited in the semiconductor layer and the P-type semiconductor layer, and the heat generated by the PN junction is emitted while the PN junction emits light.
  • the first transparent conductive layer and the second transparent conductive layer are emitted outward.
  • the first transparent heat dissipation layer and the second transparent heat dissipation layer are made of a material having excellent heat dissipation and light transmission properties, for example, high heat radiation glass, fluorescent glass, transparent high heat radiation ceramic, fluorescent ceramic, transparent high heat radiation crystal, ytterbium-doped YAG Crystals, etc.
  • a material having excellent heat dissipation and light transmission properties for example, high heat radiation glass, fluorescent glass, transparent high heat radiation ceramic, fluorescent ceramic, transparent high heat radiation crystal, ytterbium-doped YAG Crystals, etc.
  • quartz glass with an infrared thermal radiation coefficient of 0.94 is the best choice.
  • a plurality of wires are respectively disposed in the first transparent conductive layer and the second transparent conductive layer, and some of the first transparent conductive layers are disposed.
  • One end of the wire is connected to the first electrode, and the other end is connected to the N-type semiconductor layer, and one end of the wire disposed in the second transparent conductive layer is connected to the second electrode, and the other end is connected Connected to the P-type semiconductor layer.
  • the first transparent conductive layer and the second transparent conductive layer are respectively electrically connected to a plurality of wires, and the plurality of wires are electrically connected.
  • Attached to the conductive film, the wire described above may be made of a material such as gold or silver.
  • the first transparent heat dissipation layer is formed with a first protrusion protruding from the N-type semiconductor layer, the first electrode is located on the first protrusion, and the second transparent heat dissipation layer is opposite to the a P-type semiconductor layer is formed to extend a second protrusion, the second electrode is located on the second protrusion, and the first protrusion and the second protrusion are respectively located at different side ends of the PN junction.
  • electrode holes are respectively disposed on the first transparent heat dissipation layer and the second transparent heat dissipation layer, the first electrode is disposed in the electrode hole of the first transparent heat dissipation layer, and the second electrode is disposed on the second electrode In the electrode hole of the second transparent heat dissipation layer, the layers of the second structure are neatly stacked to facilitate production and processing.
  • the red, green, and blue chip light sources can be separately fabricated by the above technical solutions, and then only the red, green, and blue chip light sources are set together to perform light mixing to obtain a white chip light source.
  • the top surface of the first transparent heat dissipation layer and the bottom surface of the second transparent heat dissipation layer are respectively roughened to enhance the light emitting effect.
  • the type semiconductor layer, the P-type semiconductor layer, and the active layer form a PN junction.
  • a first transparent conductive layer is disposed on the top surface of the N-type semiconductor layer, and then a first transparent heat dissipation layer is bonded on the top surface of the N-type semiconductor layer, and the first transparent conductive layer is located at the N
  • a conductive film is disposed on a bottom surface of the first transparent heat dissipation layer, and a plurality of wires are disposed on the conductive film, and the first transparent conductive layer is electrically connected to the first electrode.
  • the first electrode is electrically connected to the N-type semiconductor layer through the conductive film, a plurality of the wires, and the first transparent conductive layer.
  • the sapphire substrate on the bottom surface of the P-type semiconductor layer is peeled off, and in the specific implementation, the peeling is performed by a laser lift-off method.
  • a second transparent conductive layer is disposed on the bottom surface of the P-type semiconductor layer, and then a second transparent heat dissipation layer is bonded on the bottom surface of the P-type semiconductor layer, and the second transparent conductive layer is located on the P-type semiconductor layer.
  • a conductive film is disposed on the bottom surface of the second transparent heat dissipation layer, the conductive film is provided with a plurality of wires, and the second transparent conductive layer is electrically connected to the second electrode.
  • the two electrodes are electrically connected to the bottom surface of the P-type semiconductor layer through the conductive film, the plurality of wires, and the second transparent conductive layer.
  • the first transparent heat dissipation layer and the second transparent heat dissipation layer in the second and fourth steps are made of heat-dissipating and transparent glass, and the top surface of the first transparent heat dissipation layer and the bottom surface of the second transparent heat dissipation layer are respectively roughened. Processing to enhance the luminous effect.
  • a high-efficiency vertical LED structure chip having heat dissipation characteristics comprising an N-type semiconductor layer, a P-type semiconductor layer and an active layer, wherein the active layer is disposed between the N-type semiconductor layer and the P-type semiconductor layer Forming a PN junction from the N-type semiconductor layer, the P-type semiconductor layer, and the active layer, and providing a first transparent heat dissipation layer on a top surface of the N-type semiconductor layer, and a bottom surface of the P-type semiconductor layer is disposed on the bottom surface of the P-type semiconductor layer a second transparent heat dissipation layer, a first transparent conductive heat conduction layer is disposed between the N-type semiconductor layer and the first transparent heat dissipation layer, and a second transparent layer is disposed between the P-type semiconductor layer and the second transparent heat dissipation layer
  • the first transparent conductive heat conductive layer and the second transparent conductive heat conductive layer are graphene layers, and a transparent heat dissipation layer is respectively grown on the bottom surface
  • a method for fabricating a high-efficiency vertical LED structure chip having heat dissipation characteristics comprising the steps of: step A, growing a sacrificial layer on a substrate, and a PN junction, wherein the sacrificial layer is disposed on top of the substrate, the PN a junction disposed on top of the sacrificial layer, the PN junction including an N-type semiconductor layer, a P-type semiconductor layer, and an active layer, wherein the active layer is disposed between the N-type semiconductor layer and the P-type semiconductor layer, B Step, in situ growing a first transparent conductive heat conductive layer on top of the PN junction, the first transparent conductive heat conductive layer is a graphene layer, C step, peeling off the substrate under the PN junction and the sacrificial layer, step D Forming a second transparent conductive and thermally conductive layer in situ at the bottom of the PN junction, the second transparent conductive and thermally conductive layer being a graphene layer, and the E step, the upper and
  • a high-efficiency vertical LED structure chip having heat dissipation characteristics comprising an N-type semiconductor layer, a P-type semiconductor layer and an active layer, wherein the active layer is disposed between the N-type semiconductor layer and the P-type semiconductor layer Forming a PN junction from the N-type semiconductor layer, the P-type semiconductor layer, and the active layer, and providing a first transparent heat dissipation layer on a top surface of the N-type semiconductor layer, and a bottom surface of the P-type semiconductor layer is disposed on the bottom surface of the P-type semiconductor layer a second transparent heat sink,
  • a first transparent conductive heat conduction layer is disposed between the N-type semiconductor layer and the first transparent heat dissipation layer
  • a second transparent conductive heat conduction layer is disposed between the P-type semiconductor layer and the second transparent heat dissipation layer.
  • a transparent conductive and thermally conductive layer and the second transparent conductive and thermally conductive layer are graphene layers
  • a transition ITO layer is disposed between the P-type semiconductor layer and the second transparent conductive and thermally conductive layer.
  • a transparent heat dissipation layer graphene layer is respectively grown on the bottom surface of the first transparent heat dissipation layer and the top surface of the second transparent heat dissipation layer.
  • the transparent heat dissipation layer graphene layer on the bottom surface of the first transparent heat dissipation layer and the top surface of the second transparent heat dissipation layer are respectively bonded to the first transparent conductive heat conduction layer and the second transparent conductive heat conduction layer.
  • the first electrode and the second electrode are respectively connected to the positive and negative lines of the external circuit, and the current flows from the first electrode and the second electrode into the first transparent conductive heat conductive layer and the second transparent conductive heat conductive layer and further flows into the current
  • the N-type semiconductor layer and the P-type semiconductor layer excite the PN junction luminescence formed by the N-type semiconductor layer, the P-type semiconductor layer, and the active layer, and the PN junction emits light while emitting heat
  • the first transparent conductive heat conductive layer and the second transparent conductive heat conductive layer are emitted outward.
  • a step of growing a sacrificial layer on the substrate and a PN junction wherein the sacrificial layer is disposed on top of the substrate, the PN junction is disposed on top of the sacrificial layer, and the PN junction includes an N-type semiconductor layer, a P-type semiconductor And an active layer, wherein the active layer is disposed between the N-type semiconductor layer and the P-type semiconductor layer, and each of the insulating trenches is filled with an insulating layer,
  • Step B growing an excessive layer on the P-type semiconductor layer on top of the PN junction, and then growing a second transparent conductive and thermally conductive layer in situ on the excessive layer, the second transparent conductive heat conductive layer being a graphene layer, and the excessive layer is
  • the ITO layer is subjected to the B1 step after the completion of the step B, and the heat balance stabilizing device is disposed on the top of the PN junction through the high temperature solid crystal adhesive layer on the top of the PN junction of the step A, and the thermal balance stabilizing device can eliminate the thermal stress of the PN junction.
  • step C the substrate under the PN junction and the sacrificial layer are peeled off, and after the step C is completed, the C1 step is performed, the heat balance stabilizing device is removed from the PN junction, and then the high temperature solid crystal adhesive layer is melted at a high temperature.
  • a first transparent conductive heat conductive layer is grown in situ on the bottom surface of the N-type semiconductor layer at the bottom of the PN junction, and the first transparent conductive heat conductive layer is a graphene layer.
  • the first transparent heat dissipation layer and the second transparent heat dissipation layer are respectively bonded to the upper and lower sides of the PN junction on which the graphene layer is grown at the top and the bottom, and the first transparent heat dissipation layer and the second transparent heat dissipation layer are cooled by heat dissipation.
  • a transparent heat dissipation layer graphene layer is formed on the bottom surface of the first transparent heat dissipation layer and the top surface of the second transparent heat dissipation layer, and the first transparent heat dissipation layer is on the bottom surface and the first surface
  • the transparent heat dissipation layer graphene layer on the top surface of the two transparent heat dissipation layers is respectively bonded to the top and bottom graphene layers of the PN junction.
  • step F the first electrode and the second electrode are respectively connected to the transparent heat dissipation layer graphene layer on the first transparent heat dissipation layer and the second transparent heat dissipation layer.
  • the first electrode and the second electrode of the present invention are respectively connected to the positive and negative lines of the external circuit, and the current flows from the first electrode and the second electrode into the first transparent conductive layer and the first a transparent conductive layer further flowing into the N-type semiconductor layer and the P-type semiconductor layer and exciting the PN junction light formed by the N-type semiconductor layer, the P-type semiconductor layer, and the active layer, and emitting light at the PN junction
  • the heat generated by the light is diffused outward by the first transparent conductive layer and the second transparent conductive layer, and is emitted through the first transparent heat dissipation layer and the second transparent heat dissipation layer.
  • Figure 1 is a schematic view of the structure of the present invention.
  • Figure 2 is a schematic view showing the structure of the first structure of the present invention.
  • Figure 3 is a schematic view showing the structure of the second structure of the present invention.
  • FIG. 5 is a structural diagram of the present invention simultaneously bonding a plurality of PN junctions or a plurality of sub-unit PN junctions between a first transparent heat dissipation layer and a second transparent heat dissipation layer.
  • FIG. 6 is a flow chart of another method of fabricating the present invention.
  • FIG. 7 is a schematic view showing the use of laser etching to break a conductive film to form a plurality of red, green, and blue PN junction light blocks.
  • a high-efficiency vertical LED structure chip having heat dissipation characteristics includes an N-type semiconductor layer 10, a P-type semiconductor layer 20, and an active layer 30, wherein the active layer 30 is disposed thereon. Between the N-type semiconductor layer 10 and the P-type semiconductor layer 20, a PN junction 100 is formed by the N-type semiconductor layer 10, the P-type semiconductor layer 20, and the active layer 30.
  • a first transparent heat dissipation layer 40 is disposed on a top surface of the N-type semiconductor layer 10, and a second transparent heat dissipation layer 50 is disposed on a bottom surface of the P-type semiconductor layer 20.
  • a first transparent conductive layer 41 is disposed between the N-type semiconductor layer 10 and the first transparent heat dissipation layer 40, and a second transparent conductive layer is disposed between the P-type semiconductor layer 20 and the second transparent heat dissipation layer 50. 51.
  • a first electrode 42 is electrically connected to the first transparent conductive layer 41, and a second electrode 52 is electrically connected to the second transparent conductive layer 51.
  • the first electrode 42 and the second electrode 52 are respectively connected to the positive and negative lines of the external circuit, and the current flows from the first electrode 42 and the second electrode 52 into the first transparent conductive layer 41 and the second transparent conductive layer 51. And further flowing into the N-type semiconductor layer 10 and the P-type semiconductor layer 20 and exciting the PN junction light formed by the N-type semiconductor layer 10, the P-type semiconductor layer 20, and the active layer 30, at the PN junction The heat generated by the illuminating light is emitted from the first transparent conductive layer 41 and the second transparent conductive layer 51 outward.
  • the first transparent heat dissipation layer 40 and the second transparent heat dissipation layer 50 are made of materials with high heat radiation and excellent light transmission properties, such as high heat radiation glass, fluorescent glass, transparent high heat radiation ceramic, fluorescent ceramic, and transparent high heat radiation crystal. , ytterbium-doped YAG crystals, and the like. Among the above materials, quartz glass with an infrared thermal radiation coefficient of 0.94 is the best choice.
  • a plurality of wires are respectively disposed in the first transparent conductive layer 41 and the second transparent conductive layer 51.
  • a plurality of the wires disposed in the first transparent conductive layer 41 are connected to the first electrode 42 at one end, and the other end thereof is connected to the N-type semiconductor layer 10.
  • One end of the wire disposed in the second transparent conductive layer 51 is connected to the second electrode 52, and the other end thereof is connected to the P-type semiconductor layer 20.
  • the first transparent conductive layer 41 and the second transparent conductive layer 51 are respectively electrically connected to the plurality of wires.
  • a plurality of the wires are attached to the conductive film 61.
  • the wire described above may be made of a material such as gold or silver.
  • the first transparent heat dissipation layer 40 is formed with a first protrusion 43 extending from the N-type semiconductor layer 10, and the first electrode 42 is located on the first protrusion 43.
  • the second transparent heat dissipation layer 50 protrudes from the P-type semiconductor layer 20 to form a second protrusion 53 , and the second electrode 52 is located on the second protrusion 53 .
  • the first protruding portion 43 and the second protruding portion 53 are respectively located at different side ends of the PN junction, thereby facilitating connection with an external circuit.
  • an electrode hole 70 is defined in the first transparent heat dissipation layer 40 and the second transparent heat dissipation layer 50.
  • the first electrode 42 is disposed in the electrode hole 70 of the first transparent heat dissipation layer 40.
  • the second electrode 52 is disposed in the electrode hole 70 of the second transparent heat dissipation layer 50.
  • the red, green, and blue chip light sources can be separately fabricated by the above technical solutions, and then only the red, green, and blue chip light sources are set together to perform light mixing to obtain a white chip light source.
  • the top surface of the first transparent heat dissipation layer 40 and the bottom surface of the second transparent heat dissipation layer 50 are respectively roughened to enhance the light emitting effect.
  • a method for fabricating a high-efficiency vertical LED structure chip having heat dissipation characteristics includes the following steps:
  • a P-type semiconductor layer 20, an active layer 30, and an N-type semiconductor layer 10 are sequentially grown on a sapphire substrate, wherein the active layer 30 is disposed on the N-type semiconductor layer 10 and the P-type semiconductor layer. Between 20, a PN junction is formed by the N-type semiconductor layer 10, the P-type semiconductor layer 20, and the active layer 30.
  • a first transparent conductive layer 41 is disposed on a top surface of the N-type semiconductor layer 10, and then a first transparent heat dissipation layer 40 is bonded on a top surface of the N-type semiconductor layer 10, the first transparent conductive layer The layer 41 is located between the N-type semiconductor layer 10 and the first transparent heat dissipation layer 40.
  • a conductive film 61 is disposed on the bottom surface of the first transparent heat dissipation layer 40.
  • the conductive film 61 is provided with a plurality of wires.
  • the first transparent conductive layer 41 is electrically connected to the first electrode 42.
  • the first electrode 42 passes through the conductive layer.
  • the film 61, a plurality of the wires, and the first transparent conductive layer 41 are electrically connected to the N-type semiconductor layer 10.
  • the sapphire substrate on the bottom surface of the P-type semiconductor layer 20 is peeled off.
  • the peeling is performed by a laser lift-off method.
  • a second transparent conductive layer 51 is disposed on the bottom surface of the P-type semiconductor layer 20, and then a second transparent heat dissipation layer 50 is bonded on the bottom surface of the P-type semiconductor layer 20.
  • the second transparent conductive layer 51 is located.
  • the bottom surface of the P-type semiconductor layer 20 is between the bottom surface and the second transparent heat dissipation layer 50.
  • a conductive film 61 is disposed on the bottom surface of the second transparent heat dissipation layer 50, and the conductive film 61 is provided with a plurality of wires.
  • a second electrode 52 is electrically connected to the second transparent conductive layer 51.
  • the second electrode 52 is electrically connected to the bottom surface of the P-type semiconductor layer 20 through the conductive film 61, a plurality of the wires, and the second transparent conductive layer 51.
  • the first transparent heat dissipation layer 40 and the second transparent heat dissipation layer 50 in the second and fourth steps are made of heat-dissipating and transparent glass, the top surface of the first transparent heat dissipation layer 40 and the bottom surface of the second transparent heat dissipation layer 50. Roughening treatment is separately performed to enhance the luminous effect.
  • a high-efficiency vertical LED structure chip having heat dissipation characteristics includes an N-type semiconductor layer 10, a P-type semiconductor layer 20, and an active layer 30, wherein the active layer 30 is disposed thereon. Between the N-type semiconductor layer 10 and the P-type semiconductor layer 20, a PN junction 100 is formed by the N-type semiconductor layer 10, the P-type semiconductor layer 20, and the active layer 30.
  • a first transparent heat dissipation layer 40 is disposed on a top surface of the N-type semiconductor layer 10, and a second transparent heat dissipation layer 50 is disposed on a bottom surface of the P-type semiconductor layer 20.
  • a first transparent conductive heat conductive layer 41 is disposed between the N-type semiconductor layer 10 and the first transparent heat dissipation layer 40, and a second transparent conductive layer is disposed between the P-type semiconductor layer 20 and the second transparent heat dissipation layer 50.
  • the heat conductive layer 51, the first transparent conductive heat conductive layer 41 and the second transparent conductive heat conductive layer 51 are graphene layers.
  • a transparent heat dissipation layer graphene layer 88 is grown on the bottom surface of the first transparent heat dissipation layer 40 and the top surface of the second transparent heat dissipation layer 50, respectively.
  • the transparent heat dissipation layer graphene layer 88 on the bottom surface of the first transparent heat dissipation layer 40 and the top surface of the second transparent heat dissipation layer 50 is respectively bonded to the first transparent conductive heat conduction layer 41 and the second transparent conductive heat conduction layer 51.
  • the first electrode 42 and the second electrode 52 are respectively connected to the transparent heat dissipation layer graphene layer 88 on the first transparent heat dissipation layer 40 and the second transparent heat dissipation layer 50,
  • the first electrode 42 and the second electrode 52 are respectively connected to the positive and negative lines of the external circuit, and the current flows from the first electrode 42 and the second electrode 52 into the first transparent conductive heat conduction layer 41 and the second transparent conductive heat conduction.
  • the layer 51 further flows into the N-type semiconductor layer 10 and the P-type semiconductor layer 20 and excites the PN junction light formed by the N-type semiconductor layer 10, the P-type semiconductor layer 20, and the active layer 30, where The heat generated by the PN junction is emitted by the first transparent conductive heat conductive layer 41 and the second transparent conductive heat conductive layer 51 while being emitted.
  • the first transparent heat dissipation layer 40 and the second transparent heat dissipation layer 50 are made of a material having excellent heat dissipation and light transmission properties, such as glass.
  • the first transparent heat dissipation layer 40 is formed with a first protrusion 43 extending from the N-type semiconductor layer 10, and the first electrode 42 is located on the first protrusion 43.
  • the second transparent heat dissipation layer 50 protrudes from the P-type semiconductor layer 20 to form a second protrusion 53 , and the second electrode 52 is located on the second protrusion 53 .
  • the first protruding portion 43 and the second protruding portion 53 are respectively located at different side ends of the PN junction, thereby facilitating connection with an external circuit.
  • an electrode hole 70 is defined in the first transparent heat dissipation layer 40 and the second transparent heat dissipation layer 50.
  • the first electrode 42 is disposed in the electrode hole 70 of the first transparent heat dissipation layer 40.
  • the second electrode 52 is disposed in the electrode hole 70 of the second transparent heat dissipation layer 50.
  • the red, green, and blue chip light sources can be separately fabricated by the above technical solutions, and then only the red, green, and blue chip light sources are set together to perform light mixing to obtain a white chip light source.
  • a method for fabricating a high-efficiency vertical LED structure chip having heat dissipation characteristics includes the following steps:
  • step A a sacrificial layer 82 and a PN junction 100 are grown on the substrate 81,
  • the sacrificial layer 82 is disposed on the top of the substrate 81, and the PN junction 100 is disposed on the top of the sacrificial layer 82.
  • the PN junction 100 includes an N-type semiconductor layer 10, a P-type semiconductor layer 20, and an active layer 30, wherein the active layer 30 is disposed between the N-type semiconductor layer 10 and the P-type semiconductor layer 20,
  • the substrate 81 is a sapphire substrate.
  • the step A1 may be performed, and the insulating trench 83 is opened from the top to the bottom on the PN junction 100.
  • the insulating trench 83 divides the PN junction 100 into a plurality of sub-unit PN junctions 84.
  • the insulating trench 83 penetrates the N-type semiconductor layer 10 and the active layer 30.
  • the bottom of the insulating trench 83 is located in the P-type semiconductor layer 20, that is, the insulating trench 83 does not cut the P-type semiconductor layer 20.
  • each of the insulating grooves 83 may be filled with an insulating layer 85,
  • the purpose of performing the A1 step is to adapt the technical solution of the present invention to mass industrial production by dividing the PN junction 100 into a plurality of subunit PN junctions 84.
  • the purpose of opening the insulating trench 83 and filling the insulating paste layer 85 in each of the insulating trenches 83 is to insulate a plurality of the sub-unit PN junctions 84 from each other because the PN junction 100 is in the subsequent growth of the graphene conductive layer.
  • the outer side surface may be contaminated with graphene, so that the graphene will connect the N-type semiconductor layer 10 and the P-type semiconductor layer 20 to form a short circuit, and the insulating adhesive layer 85 can prevent this from happening.
  • step B the first transparent conductive heat conductive layer 41 is grown in situ on the top of the PN junction 100,
  • the first transparent conductive heat conductive layer 41 is a graphene layer.
  • step B1 may be performed, and the hot-melt adhesive is attached to the top of the PN junction 100 in step A to paste the temporary protection plate 86.
  • the purpose of connecting the hot melt adhesive to the temporary protection plate 86 is to facilitate the grasping and positioning of the product in the subsequent steps.
  • a cooling device 87 is connected above the hot melt adhesive temporary protection plate 86,
  • the cooling device 87 can cool the product and facilitate production.
  • step C the substrate 81 under the PN junction 100 and the sacrificial layer 82 are peeled off.
  • the peeling is performed by laser peeling.
  • the bottom surface of the PN junction 100 is washed with a hydrochloric acid solution to remove residual substances.
  • the C1 step is performed, and the cooling device 87 and the hot melt adhesive temporary protection plate 86 are removed from the PN junction 100,
  • the temporary protective plate 86 is removed, and the residual hot melt is washed away with an acetone solution.
  • step D the second transparent conductive heat conductive layer 51 is grown in situ at the bottom of the PN junction 100,
  • the second transparent conductive heat conductive layer 51 is a graphene layer.
  • the D1 step is performed, and the cutting operation is performed along the position of the insulating slot 83 to form a plurality of independent sub-unit PN junctions 84.
  • step E the first transparent heat dissipation layer 40 and the second transparent heat dissipation layer 50 are respectively bonded to the upper and lower sides of the PN junction 100 on which the graphene layer is grown at the top and the bottom, respectively.
  • the first transparent heat dissipation layer 40 and the second transparent heat dissipation layer 50 are made of a material having excellent heat dissipation and light transmission properties, such as glass.
  • a transparent heat dissipation layer graphene layer 88 is grown on the bottom surface of the first transparent heat dissipation layer 40 and the top surface of the second transparent heat dissipation layer 50, respectively.
  • the transparent heat dissipation layer graphene layer 88 on the bottom surface of the first transparent heat dissipation layer 40 and the top surface of the second transparent heat dissipation layer 50 is respectively bonded to the graphene layer on the top and bottom of the PN junction 100.
  • the first transparent heat dissipation layer 40 and the second transparent heat dissipation layer 50 are respectively bonded to the upper and lower sides of the sub-unit PN junction 84 in which the graphene layer is grown at the top and bottom.
  • the first transparent heat dissipation layer 40 and the second transparent heat dissipation layer 50 are made of a material having excellent heat dissipation and light transmission properties, such as glass.
  • a transparent heat dissipation layer graphene layer 88 is grown on the bottom surface of the first transparent heat dissipation layer 40 and the top surface of the second transparent heat dissipation layer 50, respectively.
  • the transparent heat dissipation layer graphene layer 88 on the bottom surface of the first transparent heat dissipation layer 40 and the top surface of the second transparent heat dissipation layer 50 is respectively bonded to the graphene layer on the top and bottom of the PN junction 100.
  • step F the first electrode 42 and the second electrode 52 are respectively connected to the transparent heat dissipation layer graphene layer 88 on the first transparent heat dissipation layer 40 and the second transparent heat dissipation layer 50,
  • a plurality of the PN junctions 100 or a plurality of the sub-unit PN junctions 84 may be simultaneously bonded to the first transparent heat dissipation layer 40 and the second transparent heat dissipation layer 50 in the E step. between,
  • a graphene layer may be grown on the N-type semiconductor layer 10, and then a graphene layer may be grown on the P-type semiconductor layer 20. Conversely, a graphene layer may be grown on the P-type semiconductor layer 20 first. Then, a graphene layer is grown on the N-type semiconductor layer 10.
  • a high-efficiency vertical LED structure chip having heat dissipation characteristics includes an N-type semiconductor layer 10, a P-type semiconductor layer 20, and an active layer 30, wherein the active layer 30 is disposed in the N-type Between the semiconductor layer 10 and the P-type semiconductor layer 20, a PN junction 100 is formed by the N-type semiconductor layer 10, the P-type semiconductor layer 20, and the active layer 30.
  • a first transparent heat dissipation layer 40 is disposed on a top surface of the N-type semiconductor layer 10, and a second transparent heat dissipation layer 50 is disposed on a bottom surface of the P-type semiconductor layer 20.
  • a first transparent conductive heat conductive layer 41 is disposed between the N-type semiconductor layer 10 and the first transparent heat dissipation layer 40, and a second transparent conductive layer is disposed between the P-type semiconductor layer 20 and the second transparent heat dissipation layer 50.
  • the heat conductive layer 51, the first transparent conductive heat conductive layer 41 and the second transparent conductive heat conductive layer 51 are graphene layers, and a transition ITO layer is disposed between the P type semiconductor layer 20 and the second transparent conductive heat conductive layer 51.
  • a transparent heat dissipation layer graphene layer 88 is grown on the bottom surface of the first transparent heat dissipation layer 40 and the top surface of the second transparent heat dissipation layer 50, respectively.
  • the transparent heat dissipation layer graphene layer 88 on the bottom surface of the first transparent heat dissipation layer 40 and the top surface of the second transparent heat dissipation layer 50 is respectively bonded to the first transparent conductive heat conduction layer 41 and the second transparent conductive heat conduction layer 51.
  • the first electrode 42 and the second electrode 52 are respectively connected to the transparent heat dissipation layer graphene layer 88 on the first transparent heat dissipation layer 40 and the second transparent heat dissipation layer 50,
  • the first electrode 42 and the second electrode 52 are respectively connected to the positive and negative lines of the external circuit, and the current flows from the first electrode 42 and the second electrode 52 into the first transparent conductive heat conduction layer 41 and the second transparent conductive heat conduction.
  • the layer 51 further flows into the N-type semiconductor layer 10 and the P-type semiconductor layer 20 and excites the PN junction light formed by the N-type semiconductor layer 10, the P-type semiconductor layer 20, and the active layer 30, where The heat generated by the PN junction is emitted by the first transparent conductive heat conductive layer 41 and the second transparent conductive heat conductive layer 51 while being emitted.
  • the first transparent heat dissipation layer 40 and the second transparent heat dissipation layer 50 are made of a material having excellent heat dissipation and light transmission properties, such as glass.
  • the first transparent heat dissipation layer 40 is formed with a first protrusion 43 extending from the N-type semiconductor layer 10, and the first electrode 42 is located on the first protrusion 43.
  • the second transparent heat dissipation layer 50 protrudes from the P-type semiconductor layer 20 to form a second protrusion 53 , and the second electrode 52 is located on the second protrusion 53 .
  • the first protruding portion 43 and the second protruding portion 53 are respectively located at different side ends of the PN junction, thereby facilitating connection with an external circuit.
  • an electrode hole 70 is defined in the first transparent heat dissipation layer 40 and the second transparent heat dissipation layer 50.
  • the first electrode 42 is disposed in the electrode hole 70 of the first transparent heat dissipation layer 40.
  • the second electrode 52 is disposed in the electrode hole 70 of the second transparent heat dissipation layer 50.
  • the red, green, and blue chip light sources can be separately fabricated by the above technical solutions, and then only the red, green, and blue chip light sources are set together to perform light mixing to obtain a white chip light source.
  • a method for fabricating a high-efficiency vertical LED structure chip having heat dissipation characteristics includes the following steps:
  • step A a sacrificial layer 82 and a PN junction 100 are grown on the substrate 81,
  • the sacrificial layer 82 is disposed on the top of the substrate 81, and the PN junction 100 is disposed on the top of the sacrificial layer 82.
  • the PN junction 100 includes an N-type semiconductor layer 10, a P-type semiconductor layer 20, and an active layer 30, wherein the active layer 30 is disposed between the N-type semiconductor layer 10 and the P-type semiconductor layer 20,
  • the substrate 81 is a sapphire substrate.
  • the step A1 may be performed, and the insulating trench 83 is opened from the top to the bottom on the PN junction 100.
  • the insulating trench 83 divides the PN junction 100 into a plurality of sub-unit PN junctions 84.
  • the insulating trench 83 penetrates the N-type semiconductor layer 10 and the active layer 30.
  • the bottom of the insulating trench 83 is located in the P-type semiconductor layer 20, that is, the insulating trench 83 does not cut the P-type semiconductor layer 20.
  • each of the insulating grooves 83 may be filled with an insulating layer 85,
  • the purpose of performing the A1 step is to adapt the technical solution of the present invention to mass industrial production by dividing the PN junction 100 into a plurality of subunit PN junctions 84.
  • the purpose of opening the insulating trench 83 and filling the insulating paste layer 85 in each of the insulating trenches 83 is to insulate a plurality of the sub-unit PN junctions 84 from each other because the PN junction 100 is in the subsequent growth of the graphene conductive layer.
  • the outer side surface may be contaminated with graphene, so that the graphene will connect the N-type semiconductor layer 10 and the P-type semiconductor layer 20 to form a short circuit, and the insulating adhesive layer 85 can prevent this from happening.
  • step B an excessive layer 91 is grown on the P-type semiconductor layer 20 on top of the PN junction 100, and then the second transparent conductive heat conductive layer 51 is grown on the excessive layer 91 in situ.
  • the second transparent conductive heat conductive layer 51 is a graphene layer.
  • the excess layer 91 is an ITO layer, and the ITO layer can make the graphene layer grow more smoothly.
  • Graphene has high electrical and thermal conductivity and light transmission properties. The most important point is that its refractive index and work function are well matched with N-GaN of PN junction, which makes it have good light transmission between graphene and gallium nitride. Sexual and good ohmic contact performance. Since the work function of P-GaN (7.2/eV) is higher than that of graphene (5/eV), ITO, etc., which can only be matured and has good ohmic contact, can be used as a transition layer to regenerate graphene on the transition layer. To compensate for the low conductivity of ITO.
  • the step B1 may be performed, and the thermal balance stabilizing device 93 is disposed on the top of the PN junction 100 through the high temperature solid-state adhesive layer 92 at the top of the PN junction 100 of the step A.
  • the heat balance stabilization device 93 can eliminate the thermal stress of the PN junction 100 and facilitate subsequent production.
  • step C the substrate 81 under the PN junction 100 and the sacrificial layer 82 are peeled off.
  • the peeling is performed by laser peeling.
  • the bottom surface of the PN junction 100 is washed with a hydrochloric acid solution to remove residual substances.
  • step B1 If the step B1 is present, the step C1 is performed, the heat balance stabilizing device 93 is removed from the PN junction 100, and then the high temperature solid phase adhesive layer 92 is melted at a high temperature, and then the residual substance is washed away with a hydrochloric acid solution.
  • step D the first transparent conductive heat conductive layer 41 is grown in situ on the bottom surface of the N-type semiconductor layer 10 at the bottom of the PN junction 100,
  • the first transparent conductive heat conductive layer 41 is a graphene layer.
  • the D1 step is performed, and the cutting operation is performed along the position of the insulating slot 83 to form a plurality of independent sub-unit PN junctions 84.
  • step E the first transparent heat dissipation layer 40 and the second transparent heat dissipation layer 50 are respectively bonded to the upper and lower sides of the PN junction 100 on which the graphene layer is grown at the top and the bottom, respectively.
  • the first transparent heat dissipation layer 40 and the second transparent heat dissipation layer 50 are made of a material having excellent heat dissipation and light transmission properties, such as glass.
  • a transparent heat dissipation layer graphene layer 88 is grown on the bottom surface of the first transparent heat dissipation layer 40 and the top surface of the second transparent heat dissipation layer 50, respectively.
  • the transparent heat dissipation layer graphene layer 88 on the bottom surface of the first transparent heat dissipation layer 40 and the top surface of the second transparent heat dissipation layer 50 is respectively bonded to the graphene layer on the top and bottom of the PN junction 100.
  • the first transparent heat dissipation layer 40 and the second transparent heat dissipation layer 50 are respectively bonded to the upper and lower sides of the sub-unit PN junction 84 in which the graphene layer is grown at the top and bottom.
  • the first transparent heat dissipation layer 40 and the second transparent heat dissipation layer 50 are made of a material having excellent heat dissipation and light transmission properties, such as glass.
  • a transparent heat dissipation layer graphene layer 88 is grown on the bottom surface of the first transparent heat dissipation layer 40 and the top surface of the second transparent heat dissipation layer 50, respectively.
  • the transparent heat dissipation layer graphene layer 88 on the bottom surface of the first transparent heat dissipation layer 40 and the top surface of the second transparent heat dissipation layer 50 is respectively bonded to the graphene layer on the top and bottom of the PN junction 100.
  • step F the first electrode 42 and the second electrode 52 are respectively connected to the transparent heat dissipation layer graphene layer 88 on the first transparent heat dissipation layer 40 and the second transparent heat dissipation layer 50,
  • the red, green, and blue chip light sources can be separately fabricated by the above technical solutions, and then only the red, green, and blue chip light sources need to be set together for mixing.
  • a white chip light source can be obtained.
  • the red, green, and blue PN junction bands may be fabricated, and then the conductive film is broken by laser etching to form a plurality of red, green, and blue PN junction blocks.

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Led Device Packages (AREA)
  • Led Devices (AREA)

Abstract

提供一种具备散热特性的高光效垂直LED结构芯片及其制作方法，其结构包括N型半导体层（10）、P型半导体层（20）以及有源层（30），其中，有源层（30）设置在N型半导体层（10）与P型半导体层（20）之间，由N型半导体层（10）、P型半导体层（20）以及有源层（30）形成一PN结，在N型半导体层（10）顶面上设置有第一透明散热层（40），在P型半导体层（20）底面上设置有第二透明散热层（50），在N型半导体层（10）与第一透明散热层（40）之间设置有第一透明导电层（41），在P型半导体层（20）与第二透明散热层（50）之间设置有第二透明导电层（51），第一透明导电层（41）上电连接有第一电极（42），第二透明导电层（51）上电连接有第二电极（52）。

Description

一种具备散热特性的高光效垂直LED结构芯片及其制作方法 技术领域
本发明涉及一种LED芯片结构及其制作方法，特别是指一种包括N型半导体层、P型半导体层以及有源层，在该N型半导体层顶面上设置有第一透明散热层，在该P型半导体层底面上设置有第二透明散热层的LED芯片结构及其制作方法。
背景技术
去封装去散热去电源一直是LED研究工作者努力的方向，要实现相应技术方案研发人员必须从LED芯片源头入手，LED发热的原因是因为其所加入的电能并没有全部转化为光能，而是有一部分转化成为热能，只有将芯片的效率提高，而且将未能转换成光能的那部分电功率所产生的热及时的散发出去才能够真正的实现相应的技术方案。
LED的光效目前只有160lm/W，其电光转换效率大约只有40-50％左右。也就是说大约50％的电能都变成了热能。
具体来说，LED结温的产生是由于两个因素所引起的。
1.内部量子效率不高，也就是在电子和空穴复合时，并不能100％都产生光子，通常称为由“电流泄漏”而使PN区载流子的复合率降低。泄漏电流乘以电压就是这部分的功率，也就是转化为热能，但这部分不占主要成分，因为现在内部光子效率已经接近90％。
2.内部产生的光子无法全部射出到芯片外部而最后转化为热量，这部分是主要的，因为目前这种称为外部量子效率只有30％左右，其大部分都转化成为了热量。
所以要解决LED的发热问题必须首先提高内部量子效率其次是如何提高外部量子效率。
在所有芯片结构中垂直结构相比于水平结构芯片因它没有横向流动的电流，因此，电阻降低，没有电流拥塞，电流分布相对比较均匀，充分利用发光层的材料，电流产生的热量减小。虽然垂直结构相比于水平结构有明显的优势，但是由于氮化镓掺杂的原因导致P型GaN及N型GaN的导电率特别是P型GaN的导电率明显降低，所以需要透明导电扩散层来辅助，而目前传统的透明电层多数由ITO为主，ITO在导电性能及透光度上都没达到很好的效果，其严重的影响了led的外部提取效率。
2004年，英国曼彻斯特大学物理学家Andre Geim和Konstantin Novoselov，成功地在实验室中利用胶带剥离法从石墨中分离出单层石墨烯。经过世界范围内科学工作者近10年的潜心研究，证实了石墨烯是目前世上最薄也是最硬的纳米材料，具有极高的导热系数及电子迁移率和稳定的化学稳定性和透光率。使其在电化学、光电子等领域具有非常广泛的应用前景。石墨烯化学修饰电极即是利用石墨烯制成的电化学性能优异的一种修饰电极，其优越性主要表现在能加快电子转移速度，加大响应电流、降低检出限等。
石墨烯有如此优越的导电及透光性能，如何将它很好的应用到LED芯片的制作上来是我们一直以来研究的方向。
发明内容
本发明提供一种具备散热特性的高光效垂直LED结构芯片及其制作方法，如何提高芯片外量子效率及将未能转换成光能的那部分电功率所产生的热及时的散发出去是本发明的重 点，只有提高发光效率与提高散热性能齐头并进才能，形成提高散热性能-提高发光效率-提高散热性能的良性循环。
石墨烯有较高的导电导热及透光性能外，最重要的一点还有其折射率及功函数与PN结的N-GaN非常匹配，使得石墨烯与氮化镓之间有良好的透光性及良好的欧姆接触性能。由于P-GaN的功函数(7.2/eV)较高于石墨烯(5/eV)，所以目前只能由成熟工艺且有良好欧姆接触的ITO等作为过渡层，在过渡层上再生长石墨烯来弥补ITO导电性能低的特性。在N型半导体层与P型半导体层面上原位生长导电导热石墨烯层并且与生长有石墨烯的透明散热层进行无胶键合，形成既有良好的透光性及外部量子提取效率又能将PN结的热量即时扩散并辐射散发掉的高光效垂直结构，此为本发明的主要目的。
本发明所采取的技术方案是：一种具备散热特性的高光效垂直LED结构芯片，其包括N型半导体层、P型半导体层以及有源层，其中，该有源层设置在该N型半导体层与该P型半导体层之间，由该N型半导体层、该P型半导体层以及该有源层形成一PN结，在该N型半导体层顶面上设置有第一透明散热层，在该P型半导体层底面上设置有第二透明散热层，在该N型半导体层与该第一透明散热层之间设置有第一透明导电层，在该P型半导体层与该第二透明散热层之间设置有第二透明导电层，该第一透明导电层上电连接有第一电极，该第二透明导电层上电连接有第二电极。
该第一电极以及该第二电极分别连接外部电路的正负极线，电流由该第一电极以及该第二电极流入该第一透明导电层以及该第二透明导电层并进一步流入该N型半导体层以及该P型半导体层中并激发由该N型半导体层、该P型半导体层以及该有源层形成的该PN结发光，在该PN结发光的同时其发光所产生的热量由该第一透明导电层以及该第二透明导电层向外散发。
该第一透明散热层以及该第二透明散热层由散热透光性能优良的材料制成，比如，高热辐射玻璃、荧光玻璃，透明高热辐射陶瓷、荧光陶瓷，透明高热辐射的晶体、掺铈YAG晶体等。以上材料中以0.94的红外热辐射系数的石英玻璃为最佳选择。
为了提升该第一透明导电层以及该第二透明导电层的导电性能，该第一透明导电层以及该第二透明导电层中分别设置有若干导线，设置在该第一透明导电层中的若干该导线一端与该第一电极相连接，而其另外一端与该N型半导体层相连接，设置在该第二透明导电层中的若干该导线一端与该第二电极相连接，而其另外一端与该P型半导体层相连接。
在具体实施的时候，为了提升该第一透明导电层以及该第二透明导电层的导电性能，该第一透明导电层以及该第二透明导电层分别与若干导线贴合电连接，若干该导线附着在导电膜上，上述的该导线可以由金、银等材料制成。
在具体实施的时候上述技术内容可以通过多种结构实现。
第一种结构，该第一透明散热层相对于该N型半导体层外伸形成一第一凸出部，该第一电极位于该第一凸出部上，该第二透明散热层相对于该P型半导体层外伸形成一第二凸出部，该第二电极位于该第二凸出部上，该第一凸出部以及该第二凸出部分别位于该PN结的不同侧端，从而方便与外部电路连接。
第二种结构，在该第一透明散热层以及该第二透明散热层上分别开设有电极孔，该第一电极设置在该第一透明散热层的该电极孔中，该第二电极设置在该第二透明散热层的该电极孔中，第二种结构的芯片其各个层结构整齐叠设在一起方便生产加工。
在具体实施的时候，可以由上述的技术方案分别制作红、绿、蓝芯片光源，而后只需要将红、绿、蓝芯片光源设置在一起进行混光就能够得到白色芯片光源。
在具体实施的时候，该第一透明散热层的顶面以及该第二透明散热层的底面分别进行粗糙化处理，以提升发光效果。
一种具备散热特性的高光效垂直LED结构芯片的制作方法，包括如下步骤：
第一步、在蓝宝石衬底上依次生长制作P型半导体层、有源层、N型半导体层其中，该有源层设置在该N型半导体层与该P型半导体层之间，由该N型半导体层、该P型半导体层以及该有源层形成一PN结。
第二步、在该N型半导体层顶面上设置第一透明导电层，之后将第一透明散热层键合设置在该N型半导体层的顶面上，该第一透明导电层位于该N型半导体层与该第一透明散热层之间，该第一透明散热层的底面上设置有导电膜，该导电膜上设置有若干导线，该第一透明导电层上电连接有第一电极，该第一电极通过该导电膜、若干该导线以及该第一透明导电层与该N型半导体层电连接。
第三步、将该P型半导体层底面上的该蓝宝石衬底剥离掉，在具体实施的时候，采用激光剥离法进行剥离。
第四步、在该P型半导体层底面上设置第二透明导电层，之后将第二透明散热层键合设置在该P型半导体层底面上，该第二透明导电层位于该P型半导体层底面与该第二透明散热层之间，该第二透明散热层的底面上设置有导电膜，该导电膜上设置有若干导线，该第二透明导电层上电连接有第二电极，该第二电极通过该导电膜、若干该导线以及该第二透明导电层与该P型半导体层底面电连接。
第二、四步中的该第一透明散热层以及该第二透明散热层由散热透光玻璃制成，该第一透明散热层的顶面以及该第二透明散热层的底面分别进行粗糙化处理，以提升发光效果。
一种具备散热特性的高光效垂直LED结构芯片，其包括N型半导体层、P型半导体层以及有源层，其中，该有源层设置在该N型半导体层与该P型半导体层之间，由该N型半导体层、该P型半导体层以及该有源层形成一PN结，在该N型半导体层顶面上设置有第一透明散热层，在该P型半导体层底面上设置有第二透明散热层，在该N型半导体层与该第一透明散热层之间设置有第一透明导电导热层，在该P型半导体层与该第二透明散热层之间设置有第二透明导电导热层，该第一透明导电导热层以及该第二透明导电导热层为石墨烯层，该第一透明散热层的底面上以及该第二透明散热层的顶面上分别生长有透明散热层石墨烯层，该第一透明散热层底面上以及该第二透明散热层顶面上的该透明散热层石墨烯层分别与该第一透明导电导热层以及该第二透明导电导热层键合在一起，在该第一透明散热层以及该第二透明散热层上的该透明散热层石墨烯层上分别连接第一电极以及第二电极，该第一电极以及该第二电极分别连接外部电路的正负极线，电流由该第一电极以及该第二电极流入该第一透明导电导热层以及该第二透明导电导热层并进一步流入该N型半导体层以及该P型半导体层中并激发由该N型半导体层、该P型半导体层以及该有源层形成的该PN结发光，在该PN结发光的同时其发光所产生的热量由该第一透明导电导热层以及该第二透明导电导热层向外散发。
一种具备散热特性的高光效垂直LED结构芯片的制作方法，其包括如下步骤：A步骤、在衬底上生长牺牲层以及PN结，其中，该牺牲层设置在该衬底的顶部，该PN结设置在该牺牲层的顶部，该PN结包括N型半导体层、P型半导体层以及有源层，其中，该有源层设置在该N型半导体层与该P型半导体层之间，B步骤、在该PN结顶部原位生长第一透明导电导热层，该第一透明导电导热层为石墨烯层，C步骤、将该PN结下方的该衬底以及该牺牲层剥离掉，D步骤、在该PN结底部原位生长第二透明导电导热层，该第二透明导电导热层为石墨烯层，E步骤、在顶部以及底部生长有石墨烯层的该PN结的上下两侧分别键合第一透明散热层 以及第二透明散热层，该第一透明散热层以及该第二透明散热层由散热透光性材料制成，该第一透明散热层的底面上以及该第二透明散热层的顶面上分别生长有透明散热层石墨烯层，该第一透明散热层底面上以及该第二透明散热层顶面上的该透明散热层石墨烯层分别与该PN结顶部以及底部的石墨烯层键合在一起，F步骤、在该第一透明散热层以及该第二透明散热层上的该透明散热层石墨烯层上分别连接第一电极以及第二电极。
一种具备散热特性的高光效垂直LED结构芯片，其包括N型半导体层、P型半导体层以及有源层，其中，该有源层设置在该N型半导体层与该P型半导体层之间，由该N型半导体层、该P型半导体层以及该有源层形成一PN结，在该N型半导体层顶面上设置有第一透明散热层，在该P型半导体层底面上设置有第二透明散热层，
在该N型半导体层与该第一透明散热层之间设置有第一透明导电导热层，在该P型半导体层与该第二透明散热层之间设置有第二透明导电导热层，该第一透明导电导热层以及该第二透明导电导热层为石墨烯层，在该P型半导体层与该第二透明导电导热层之间设置有过渡ITO层，
该第一透明散热层的底面上以及该第二透明散热层的顶面上分别生长有透明散热层石墨烯层，
该第一透明散热层底面上以及该第二透明散热层顶面上的该透明散热层石墨烯层分别与该第一透明导电导热层以及该第二透明导电导热层键合在一起，
在该第一透明散热层以及该第二透明散热层上的该透明散热层石墨烯层上分别连接第一电极以及第二电极，
该第一电极以及该第二电极分别连接外部电路的正负极线，电流由该第一电极以及该第二电极流入该第一透明导电导热层以及该第二透明导电导热层并进一步流入该N型半导体层以及该P型半导体层中并激发由该N型半导体层、该P型半导体层以及该有源层形成的该PN结发光，在该PN结发光的同时其发光所产生的热量由该第一透明导电导热层以及该第二透明导电导热层向外散发。
一种具备散热特性的高光效垂直LED结构芯片的制作方法，包括如下步骤：
A步骤、在衬底上生长牺牲层以及PN结，其中，该牺牲层设置在该衬底的顶部，该PN结设置在该牺牲层的顶部，该PN结包括N型半导体层、P型半导体层以及有源层，其中，该有源层设置在该N型半导体层与该P型半导体层之间，在每一个该绝缘槽中都填充绝缘胶层，
B步骤、在该PN结顶部该P型半导体层上生长过度层，之后在该过度层上原位生长第二透明导电导热层，该第二透明导电导热层为石墨烯层，该过度层为ITO层，在完成B步骤后进行B1步骤、在A步骤的该PN结顶部通过高温固晶胶层将热平衡稳定装置设置在该PN结顶部，该热平衡稳定装置能够消除该PN结的热应力，
C步骤、将该PN结下方的该衬底以及该牺牲层剥离掉，完成C步骤后进行C1步骤、从该PN结上将该热平衡稳定装置去除掉，而后高温融化该高温固晶胶层，
D步骤、在该PN结底部该N型半导体层底面上原位生长第一透明导电导热层，该第一透明导电导热层为石墨烯层，
E步骤、在顶部以及底部生长有石墨烯层的该PN结的上下两侧分别键合第一透明散热层以及第二透明散热层，该第一透明散热层以及该第二透明散热层由散热透光性能优良的材料制成，该第一透明散热层的底面上以及该第二透明散热层的顶面上分别生长有透明散热层石墨烯层，该第一透明散热层底面上以及该第二透明散热层顶面上的该透明散热层石墨烯层分别与该PN结顶部以及底部的石墨烯层键合在一起，
F步骤、在该第一透明散热层以及该第二透明散热层上的该透明散热层石墨烯层上分别连接第一电极以及第二电极。
本发明的有益效果为：本发明的该第一电极以及该第二电极分别连接外部电路的正负极线，电流由该第一电极以及该第二电极流入该第一透明导电层以及该第二透明导电层并进一步流入该N型半导体层以及该P型半导体层中并激发由该N型半导体层、该P型半导体层以及该有源层形成的该PN结发光，在该PN结发光的同时其发光所产生的热量由该第一透明导电层以及该第二透明导电层向外扩散，通过第一透明散热层以及第二透明散热层散发。
附图说明
图1为本发明的结构示意图。
图2为本发明第一种结构的结构示意图。
图3为本发明第二种结构的结构示意图。
图4为本发明制作方法的流程图。
图5为本发明同时将若干PN结或者若干子单元PN结键合在第一透明散热层与第二透明散热层之间的结构图。
图6为本发明另一种制作方法的流程图。
图7为本发明利用激光蚀刻断开导电膜以形成若干红、绿、蓝PN结光块的示意图。
具体实施方式
如图1至3所示，一种具备散热特性的高光效垂直LED结构芯片，其包括N型半导体层10、P型半导体层20以及有源层30，其中，该有源层30设置在该N型半导体层10与该P型半导体层20之间，由该N型半导体层10、该P型半导体层20以及该有源层30形成一PN结100。
在该N型半导体层10顶面上设置有第一透明散热层40，在该P型半导体层20底面上设置有第二透明散热层50。
在该N型半导体层10与该第一透明散热层40之间设置有第一透明导电层41，在该P型半导体层20与该第二透明散热层50之间设置有第二透明导电层51。
该第一透明导电层41上电连接有第一电极42，该第二透明导电层51上电连接有第二电极52。
该第一电极42以及该第二电极52分别连接外部电路的正负极线，电流由该第一电极42以及该第二电极52流入该第一透明导电层41以及该第二透明导电层51并进一步流入该N型半导体层10以及该P型半导体层20中并激发由该N型半导体层10、该P型半导体层20以及该有源层30形成的该PN结发光，在该PN结发光的同时其发光所产生的热量由该第一透明导电层41以及该第二透明导电层51向外散发。
该第一透明散热层40以及该第二透明散热层50由高热辐射及透光性能优良的材料制成，比如，高热辐射玻璃、荧光玻璃，透明高热辐射陶瓷、荧光陶瓷，透明高热辐射的晶体、掺铈YAG晶体等。以上材料中以0.94的红外热辐射系数的石英玻璃为最佳选择。
为了提升该第一透明导电层41以及该第二透明导电层51的导电性能，该第一透明导电层41以及该第二透明导电层51中分别设置有若干导线。
设置在该第一透明导电层41中的若干该导线一端与该第一电极42相连接，而其另外一端与该N型半导体层10相连接。
设置在该第二透明导电层51中的若干该导线一端与该第二电极52相连接，而其另外一端与该P型半导体层20相连接。
在具体实施的时候，为了提升该第一透明导电层41以及该第二透明导电层51的导电性能，该第一透明导电层41以及该第二透明导电层51分别与若干导线贴合电连接，若干该导线附着在导电膜61上。
上述的该导线可以由金、银等材料制成。
在具体实施的时候上述技术内容可以通过多种结构实现。
第一种结构，该第一透明散热层40相对于该N型半导体层10外伸形成一第一凸出部43，该第一电极42位于该第一凸出部43上。
该第二透明散热层50相对于该P型半导体层20外伸形成一第二凸出部53，该第二电极52位于该第二凸出部53上。
该第一凸出部43以及该第二凸出部53分别位于该PN结的不同侧端，从而方便与外部电路连接。
第二种结构，在该第一透明散热层40以及该第二透明散热层50上分别开设有电极孔70，该第一电极42设置在该第一透明散热层40的该电极孔70中，该第二电极52设置在该第二透明散热层50的该电极孔70中，第二种结构的芯片其各个层结构整齐叠设在一起方便生产加工。
在具体实施的时候，可以由上述的技术方案分别制作红、绿、蓝芯片光源，而后只需要将红、绿、蓝芯片光源设置在一起进行混光就能够得到白色芯片光源。
在具体实施的时候，该第一透明散热层40的顶面以及该第二透明散热层50的底面分别进行粗糙化处理，以提升发光效果。
如图1至3所示，一种具备散热特性的高光效垂直LED结构芯片的制作方法，包括如下步骤：
第一步、在蓝宝石衬底上依次生长制作P型半导体层20、有源层30、N型半导体层10，其中，该有源层30设置在该N型半导体层10与该P型半导体层20之间，由该N型半导体层10、该P型半导体层20以及该有源层30形成一PN结。
第二步、在该N型半导体层10顶面上设置第一透明导电层41，之后将第一透明散热层40键合设置在该N型半导体层10的顶面上，该第一透明导电层41位于该N型半导体层10与该第一透明散热层40之间。
该第一透明散热层40的底面上设置有导电膜61，该导电膜61上设置有若干导线，该第一透明导电层41上电连接有第一电极42，该第一电极42通过该导电膜61、若干该导线以及该第一透明导电层41与该N型半导体层10电连接。
第三步、将该P型半导体层20底面上的该蓝宝石衬底剥离掉。
在具体实施的时候，采用激光剥离法进行剥离。
第四步、在该P型半导体层20底面上设置第二透明导电层51，之后将第二透明散热层50键合设置在该P型半导体层20底面上，该第二透明导电层51位于该P型半导体层20底面与该第二透明散热层50之间。该第二透明散热层50的底面上设置有导电膜61，该导电膜61上设置有若干导线。该第二透明导电层51上电连接有第二电极52。
该第二电极52通过该导电膜61、若干该导线以及该第二透明导电层51与该P型半导体层20底面电连接。
第二、四步中的该第一透明散热层40以及该第二透明散热层50由散热透光玻璃制成，该第一透明散热层40的顶面以及该第二透明散热层50的底面分别进行粗糙化处理，以提升发光效果。
如图1至5所示，一种具备散热特性的高光效垂直LED结构芯片，其包括N型半导体层10、P型半导体层20以及有源层30，其中，该有源层30设置在该N型半导体层10与该P型半导体层20之间，由该N型半导体层10、该P型半导体层20以及该有源层30形成一PN结100。
在该N型半导体层10顶面上设置有第一透明散热层40，在该P型半导体层20底面上设置有第二透明散热层50。
在该N型半导体层10与该第一透明散热层40之间设置有第一透明导电导热层41，在该P型半导体层20与该第二透明散热层50之间设置有第二透明导电导热层51，该第一透明导电导热层41以及该第二透明导电导热层51为石墨烯层，
该第一透明散热层40的底面上以及该第二透明散热层50的顶面上分别生长有透明散热层石墨烯层88，
该第一透明散热层40底面上以及该第二透明散热层50顶面上的该透明散热层石墨烯层88分别与该第一透明导电导热层41以及该第二透明导电导热层51键合在一起，
在该第一透明散热层40以及该第二透明散热层50上的该透明散热层石墨烯层88上分别连接第一电极42以及第二电极52，
该第一电极42以及该第二电极52分别连接外部电路的正负极线，电流由该第一电极42以及该第二电极52流入该第一透明导电导热层41以及该第二透明导电导热层51并进一步流入该N型半导体层10以及该P型半导体层20中并激发由该N型半导体层10、该P型半导体层20以及该有源层30形成的该PN结发光，在该PN结发光的同时其发光所产生的热量由该第一透明导电导热层41以及该第二透明导电导热层51向外散发。
该第一透明散热层40以及该第二透明散热层50由散热透光性能优良的材料制成，比如，玻璃。
在具体实施的时候上述技术内容可以通过多种结构实现。
第一种结构，该第一透明散热层40相对于该N型半导体层10外伸形成一第一凸出部43，该第一电极42位于该第一凸出部43上。
该第二透明散热层50相对于该P型半导体层20外伸形成一第二凸出部53，该第二电极52位于该第二凸出部53上。
该第一凸出部43以及该第二凸出部53分别位于该PN结的不同侧端，从而方便与外部电路连接。
第二种结构，在该第一透明散热层40以及该第二透明散热层50上分别开设有电极孔70，该第一电极42设置在该第一透明散热层40的该电极孔70中，该第二电极52设置在该第二透明散热层50的该电极孔70中，第二种结构的芯片其各个层结构整齐叠设在一起方便生产加工。
在具体实施的时候，可以由上述的技术方案分别制作红、绿、蓝芯片光源，而后只需要将红、绿、蓝芯片光源设置在一起进行混光就能够得到白色芯片光源。
如图1至5所示，一种具备散热特性的高光效垂直LED结构芯片的制作方法，包括如下步骤：
A步骤、在衬底81上生长牺牲层82以及PN结100，
其中，该牺牲层82设置在该衬底81的顶部，该PN结100设置在该牺牲层82的顶部，
该PN结100包括N型半导体层10、P型半导体层20以及有源层30，其中，该有源层30设置在该N型半导体层10与该P型半导体层20之间，
在具体实施的时候，该衬底81为蓝宝石衬底，
在完成A步骤后可以进行A1步骤、在该PN结100上自上而下开设绝缘槽83，该绝缘槽83将该PN结100分隔成若干子单元PN结84，
该绝缘槽83贯穿该N型半导体层10以及该有源层30，该绝缘槽83底部位于该P型半导体层20中，也就是说，该绝缘槽83没有将该P型半导体层20切断，
在具体实施的时候，可以在每一个该绝缘槽83中都填充绝缘胶层85，
进行A1步骤的目的在于通过将该PN结100分隔成若干该子单元PN结84的方式使本发明的技术方案适合大批量工业化生产，
开设该绝缘槽83以及在每一个该绝缘槽83中填充该绝缘胶层85的目的在于使若干该子单元PN结84相互绝缘，因为在后续生长石墨烯导电层的时候，在该PN结100的外侧面有可能被石墨烯污染，这样石墨烯就会将N型半导体层10与P型半导体层20连通，从而形成短路，该绝缘胶层85能够避免这种情况的发生，
B步骤、在该PN结100顶部原位生长第一透明导电导热层41，
该第一透明导电导热层41为石墨烯层，
在完成B步骤后可以进行B1步骤、在A步骤的该PN结100顶部连接热熔胶粘贴临时保护板86，
连接该热熔胶粘贴临时保护板86的目的在于方便在后续步骤中对产品的抓取定位方便，
在具体实施的时候，在该热熔胶粘贴临时保护板86上方连接冷却装置87，
由于在该PN结100上生长石墨烯层会产生大量的热量，通过该冷却装置87能够使产品降温，方便进行生产，
C步骤、将该PN结100下方的该衬底81以及该牺牲层82剥离掉，
在具体实施的时候，采用激光剥离的方式进行剥离，
完成剥离后利用盐酸溶液清洗该PN结100的底面以清除残留物质，
如果存在B1步骤则进行C1步骤、从该PN结100上将该冷却装置87以及该热熔胶粘贴临时保护板86去除掉，
在将该热熔胶粘贴临时保护板86去除掉之后利用丙酮溶液清洗掉残余的热熔胶，
D步骤、在该PN结100底部原位生长第二透明导电导热层51，
该第二透明导电导热层51为石墨烯层，
如果存在A1步骤则进行D1步骤、沿该绝缘槽83位置进行切断动作，以形成若干独立的该子单元PN结84，
E步骤、在顶部以及底部生长有石墨烯层的该PN结100的上下两侧分别键合第一透明散热层40以及第二透明散热层50，
该第一透明散热层40以及该第二透明散热层50由散热透光性能优良的材料制成，比如，玻璃，
该第一透明散热层40的底面上以及该第二透明散热层50的顶面上分别生长有透明散热层石墨烯层88，
该第一透明散热层40底面上以及该第二透明散热层50顶面上的该透明散热层石墨烯层88分别与该PN结100顶部以及底部的石墨烯层键合在一起，
如果存在A1、D1步骤则E步骤为、在顶部以及底部生长有石墨烯层的该子单元PN结84的上下两侧分别键合第一透明散热层40以及第二透明散热层50，
该第一透明散热层40以及该第二透明散热层50由散热透光性能优良的材料制成，比如，玻璃，
该第一透明散热层40的底面上以及该第二透明散热层50的顶面上分别生长有透明散热层石墨烯层88，
该第一透明散热层40底面上以及该第二透明散热层50顶面上的该透明散热层石墨烯层88分别与该PN结100顶部以及底部的石墨烯层键合在一起，
F步骤、在该第一透明散热层40以及该第二透明散热层50上的该透明散热层石墨烯层88上分别连接第一电极42以及第二电极52，
如图5所示，值得注意的是，在E步骤中可以同时将若干该PN结100或者若干该子单元PN结84键合在该第一透明散热层40与该第二透明散热层50之间，
在上述步骤中可以先在该N型半导体层10上生长石墨烯层，而后在该P型半导体层20上生长石墨烯层，反之，也可以先在该P型半导体层20上生长石墨烯层，而后在该N型半导体层10上生长石墨烯层。
如图6所示，一种具备散热特性的高光效垂直LED结构芯片，其包括N型半导体层10、P型半导体层20以及有源层30，其中，该有源层30设置在该N型半导体层10与该P型半导体层20之间，由该N型半导体层10、该P型半导体层20以及该有源层30形成一PN结100。
在该N型半导体层10顶面上设置有第一透明散热层40，在该P型半导体层20底面上设置有第二透明散热层50。
在该N型半导体层10与该第一透明散热层40之间设置有第一透明导电导热层41，在该P型半导体层20与该第二透明散热层50之间设置有第二透明导电导热层51，该第一透明导电导热层41以及该第二透明导电导热层51为石墨烯层，在该P型半导体层20与该第二透明导电导热层51之间设置有过渡ITO层。
该第一透明散热层40的底面上以及该第二透明散热层50的顶面上分别生长有透明散热层石墨烯层88，
该第一透明散热层40底面上以及该第二透明散热层50顶面上的该透明散热层石墨烯层88分别与该第一透明导电导热层41以及该第二透明导电导热层51键合在一起，
在该第一透明散热层40以及该第二透明散热层50上的该透明散热层石墨烯层88上分别连接第一电极42以及第二电极52，
该第一电极42以及该第二电极52分别连接外部电路的正负极线，电流由该第一电极42以及该第二电极52流入该第一透明导电导热层41以及该第二透明导电导热层51并进一步流入该N型半导体层10以及该P型半导体层20中并激发由该N型半导体层10、该P型半导体层20以及该有源层30形成的该PN结发光，在该PN结发光的同时其发光所产生的热量由该第一透明导电导热层41以及该第二透明导电导热层51向外散发。
该第一透明散热层40以及该第二透明散热层50由散热透光性能优良的材料制成，比如，玻璃。
在具体实施的时候上述技术内容可以通过多种结构实现。
第一种结构，该第一透明散热层40相对于该N型半导体层10外伸形成一第一凸出部43，该第一电极42位于该第一凸出部43上。
该第二透明散热层50相对于该P型半导体层20外伸形成一第二凸出部53，该第二电极52位于该第二凸出部53上。
该第一凸出部43以及该第二凸出部53分别位于该PN结的不同侧端，从而方便与外部电路连接。
第二种结构，在该第一透明散热层40以及该第二透明散热层50上分别开设有电极孔70，该第一电极42设置在该第一透明散热层40的该电极孔70中，该第二电极52设置在该第二透明散热层50的该电极孔70中，第二种结构的芯片其各个层结构整齐叠设在一起方便生产加工。
在具体实施的时候，可以由上述的技术方案分别制作红、绿、蓝芯片光源，而后只需要将红、绿、蓝芯片光源设置在一起进行混光就能够得到白色芯片光源。
如图6所示，一种具备散热特性的高光效垂直LED结构芯片的制作方法，包括如下步骤：
A步骤、在衬底81上生长牺牲层82以及PN结100，
其中，该牺牲层82设置在该衬底81的顶部，该PN结100设置在该牺牲层82的顶部，
该PN结100包括N型半导体层10、P型半导体层20以及有源层30，其中，该有源层30设置在该N型半导体层10与该P型半导体层20之间，
在具体实施的时候，该衬底81为蓝宝石衬底，
在完成A步骤后可以进行A1步骤、在该PN结100上自上而下开设绝缘槽83，该绝缘槽83将该PN结100分隔成若干子单元PN结84，
该绝缘槽83贯穿该N型半导体层10以及该有源层30，该绝缘槽83底部位于该P型半导体层20中，也就是说，该绝缘槽83没有将该P型半导体层20切断，
在具体实施的时候，可以在每一个该绝缘槽83中都填充绝缘胶层85，
进行A1步骤的目的在于通过将该PN结100分隔成若干该子单元PN结84的方式使本发明的技术方案适合大批量工业化生产，
开设该绝缘槽83以及在每一个该绝缘槽83中填充该绝缘胶层85的目的在于使若干该子单元PN结84相互绝缘，因为在后续生长石墨烯导电层的时候，在该PN结100的外侧面有可能被石墨烯污染，这样石墨烯就会将N型半导体层10与P型半导体层20连通，从而形成短路，该绝缘胶层85能够避免这种情况的发生，
B步骤、在该PN结100顶部该P型半导体层20上生长过度层91，之后在该过度层91上原位生长第二透明导电导热层51，
该第二透明导电导热层51为石墨烯层，
该过度层91为ITO层，通过该ITO层能够使石墨烯层生长的更为顺利，
石墨烯有较高的导电导热及透光性能外，最重要的一点还有其折射率及功函数与PN结的N-GaN非常匹配，使得石墨烯与氮化镓之间有良好的透光性及良好的欧姆接触性能。由于P-GaN的功函数(7.2/eV)较高于石墨烯(5/eV)，所以目前只能由成熟工艺且有良好欧姆接触的ITO等作为过渡层，在过渡层上再生长石墨烯来弥补ITO导电性能低的特性。
在完成B步骤后可以进行B1步骤、在A步骤的该PN结100顶部通过高温固晶胶层92将热平衡稳定装置93设置在该PN结100顶部，
该热平衡稳定装置93能够消除该PN结100的热应力，方便后续生产，
C步骤、将该PN结100下方的该衬底81以及该牺牲层82剥离掉，
在具体实施的时候，采用激光剥离的方式进行剥离，
完成剥离后利用盐酸溶液清洗该PN结100的底面以清除残留物质，
如果存在B1步骤则进行C1步骤、从该PN结100上将该热平衡稳定装置93去除掉，而后高温融化该高温固晶胶层92，之后利用盐酸溶液清洗掉残余物质，
D步骤、在该PN结100底部该N型半导体层10底面上原位生长第一透明导电导热层41，
该第一透明导电导热层41为石墨烯层，
如果存在A1步骤则进行D1步骤、沿该绝缘槽83位置进行切断动作，以形成若干独立的该子单元PN结84，
E步骤、在顶部以及底部生长有石墨烯层的该PN结100的上下两侧分别键合第一透明散热层40以及第二透明散热层50，
该第一透明散热层40以及该第二透明散热层50由散热透光性能优良的材料制成，比如，玻璃，
该第一透明散热层40的底面上以及该第二透明散热层50的顶面上分别生长有透明散热层石墨烯层88，
该第一透明散热层40底面上以及该第二透明散热层50顶面上的该透明散热层石墨烯层88分别与该PN结100顶部以及底部的石墨烯层键合在一起，
如果存在A1、D1步骤则E步骤为、在顶部以及底部生长有石墨烯层的该子单元PN结84的上下两侧分别键合第一透明散热层40以及第二透明散热层50，
该第一透明散热层40以及该第二透明散热层50由散热透光性能优良的材料制成，比如，玻璃，
该第一透明散热层40的底面上以及该第二透明散热层50的顶面上分别生长有透明散热层石墨烯层88，
该第一透明散热层40底面上以及该第二透明散热层50顶面上的该透明散热层石墨烯层88分别与该PN结100顶部以及底部的石墨烯层键合在一起，
F步骤、在该第一透明散热层40以及该第二透明散热层50上的该透明散热层石墨烯层88上分别连接第一电极42以及第二电极52，
如图7所示，最后，在实施本发明技术的时候，可以由上述的技术方案分别制作红、绿、蓝芯片光源，而后只需要将红、绿、蓝芯片光源设置在一起进行混光就能够得到白色芯片光源。而在具体实施的时候，可以先制作红、绿、蓝PN结光带，而后利用激光蚀刻断开导电膜以形成若干红、绿、蓝PN结光块。

Claims (19)

  1. 一种具备散热特性的高光效垂直LED结构芯片，其包括N型半导体层、P型半导体层以及有源层，其中，该有源层设置在该N型半导体层与该P型半导体层之间，由该N型半导体层、该P型半导体层以及该有源层形成一PN结，其特征在于：
    在该N型半导体层顶面上设置有第一透明散热层，在该P型半导体层底面上设置有第二透明散热层，在该N型半导体层与该第一透明散热层之间设置有第一透明导电层，在该P型半导体层与该第二透明散热层之间设置有第二透明导电层，该第一透明导电层上电连接有第一电极，该第二透明导电层上电连接有第二电极，
    该第一电极以及该第二电极分别连接外部电路的正负极线，电流由该第一电极以及该第二电极流入该第一透明导电层以及该第二透明导电层并进一步流入该N型半导体层以及该P型半导体层中并激发由该N型半导体层、该P型半导体层以及该有源层形成的该PN结发光，在该PN结发光的同时其发光所产生的热量由该第一透明导电层以及该第二透明导电层向外散发。
  2. 如权利要求1所述的一种具备散热特性的高光效垂直LED结构芯片，其特征在于：该第一透明散热层以及该第二透明散热层由散热透光玻璃制成。
  3. 如权利要求1所述的一种具备散热特性的高光效垂直LED结构芯片，其特征在于：该第一透明导电层以及该第二透明导电层中分别设置有若干导线，设置在该第一透明导电层中的若干该导线一端与该第一电极相连接，而其另外一端与该N型半导体层相连接，设置在该第二透明导电层中的若干该导线一端与该第二电极相连接，而其另外一端与该P型半导体层相连接。
  4. 如权利要求1所述的一种具备散热特性的高光效垂直LED结构芯片，其特征在于：该第一透明导电层以及该第二透明导电层分别与若干导线贴合电连接，若干该导线附着在导电膜上。
  5. 如权利要求1至4任意一项所述的一种具备散热特性的高光效垂直LED结构芯片，其特征在于：该第一透明散热层相对于该N型半导体层外伸形成一第一凸出部，该第一电极位于该第一凸出部上，该第二透明散热层相对于该P型半导体层外伸形成一第二凸出部，该第二电极位于该第二凸出部上，该第一凸出部以及该第二凸出部分别位于该PN结的不同侧端，从而方便与外部电路连接。
  6. 如权利要求1至4任意一项所述的一种具备散热特性的高光效垂直LED结构芯片，其特征在于：在该第一透明散热层以及该第二透明散热层上分别开设有电极孔，该第一电极设置在该第一透明散热层的该电极孔中，该第二电极设置在该第二透明散热层的该电极孔中该高效散热LED芯片结构的各个层结构整齐叠设在一起。
  7. 一种具备散热特性的高光效垂直LED结构芯片的制作方法，其特征在于，包括如下步骤：
    第一步、在蓝宝石衬底上依次生长制作P型半导体层、有源层、N型半导体层，其中，该有源层设置在该N型半导体层与该P型半导体层之间，由该N型半导体层、该P型半导体层以及该有源层形成一PN结，
    第二步、在该N型半导体层顶面上设置第一透明导电层，之后将第一透明散热层键合设置在该N型半导体层的顶面上，该第一透明导电层位于该N型半导体层与该第一透明散热层之间，该第一透明散热层的底面上设置有导电膜，该导电膜上设置有若干导线，该第一透明 导电层上电连接有第一电极，该第一电极通过该导电膜、若干该导线以及该第一透明导电层与该N型半导体层电连接，
    第三步、将该P型半导体层底面上的该蓝宝石衬底剥离掉，
    第四步、在该P型半导体层底面上设置第二透明导电层，之后将第二透明散热层键合设置在该P型半导体层底面上，该第二透明导电层位于该P型半导体层底面与该第二透明散热层之间，该第二透明散热层的底面上设置有导电膜，该导电膜上设置有若干导线，该第二透明导电层上电连接有第二电极，该第二电极通过该导电膜、若干该导线以及该第二透明导电层与该P型半导体层底面电连接。
  8. 如权利要求7所述的一种具备散热特性的高光效垂直LED结构芯片的制作方法，其特征在于：第二、四步中的该第一透明散热层以及该第二透明散热层由散热透光玻璃制成，该第一透明散热层的顶面以及该第二透明散热层的底面分别进行粗糙化处理。
  9. 一种具备散热特性的高光效垂直LED结构芯片，其包括N型半导体层、P型半导体层以及有源层，其中，该有源层设置在该N型半导体层与该P型半导体层之间，由该N型半导体层、该P型半导体层以及该有源层形成一PN结，其特征在于：
    在该N型半导体层顶面上设置有第一透明散热层，在该P型半导体层底面上设置有第二透明散热层，在该N型半导体层与该第一透明散热层之间设置有第一透明导电导热层，在该P型半导体层与该第二透明散热层之间设置有第二透明导电导热层，该第一透明导电导热层以及该第二透明导电导热层为石墨烯层，
    该第一透明散热层的底面上以及该第二透明散热层的顶面上分别生长有透明散热层石墨烯层，该第一透明散热层底面上以及该第二透明散热层顶面上的该透明散热层石墨烯层分别与该第一透明导电导热层以及该第二透明导电导热层键合在一起，在该第一透明散热层以及该第二透明散热层上的该透明散热层石墨烯层上分别连接第一电极以及第二电极，
    该第一电极以及该第二电极分别连接外部电路的正负极线，电流由该第一电极以及该第二电极流入该第一透明导电导热层以及该第二透明导电导热层并进一步流入该N型半导体层以及该P型半导体层中并激发由该N型半导体层、该P型半导体层以及该有源层形成的该PN结发光，在该PN结发光的同时其发光所产生的热量由该第一透明导电导热层以及该第二透明导电导热层向外散发。
  10. 一种具备散热特性的高光效垂直LED结构芯片的制作方法，其特征在于，包括如下步骤：
    A步骤、在衬底上生长牺牲层以及PN结，其中，该牺牲层设置在该衬底的顶部，该PN结设置在该牺牲层的顶部，该PN结包括N型半导体层、P型半导体层以及有源层，其中，该有源层设置在该N型半导体层与该P型半导体层之间，
    B步骤、在该PN结顶部原位生长第一透明导电导热层，该第一透明导电导热层为石墨烯层，
    C步骤、将该PN结下方的该衬底以及该牺牲层剥离掉，
    D步骤、在该PN结底部原位生长第二透明导电导热层，该第二透明导电导热层为石墨烯层，
    E步骤、在顶部以及底部生长有石墨烯层的该PN结的上下两侧分别键合第一透明散热层以及第二透明散热层，该第一透明散热层以及该第二透明散热层由散热透光性材料制成，该第一透明散热层的底面上以及该第二透明散热层的顶面上分别生长有透明散热层石墨烯层， 该第一透明散热层底面上以及该第二透明散热层顶面上的该透明散热层石墨烯层分别与该PN结顶部以及底部的石墨烯层键合在一起，
    F步骤、在该第一透明散热层以及该第二透明散热层上的该透明散热层石墨烯层上分别连接第一电极以及第二电极。
  11. 如权利要求10所述的一种具备散热特性的高光效垂直LED结构芯片的制作方法，其特征在于：在完成A步骤后进行A1步骤、在该PN结上自上而下开设绝缘槽，该绝缘槽将该PN结分隔成若干子单元PN结，该绝缘槽贯穿该N型半导体层以及该有源层，该绝缘槽底部位于该P型半导体层中，也就是说，该绝缘槽没有将该P型半导体层切断，在每一个该绝缘槽中都填充绝缘胶层。
  12. 如权利要求11所述的一种具备散热特性的高光效垂直LED结构芯片的制作方法，其特征在于：完成D步骤后进行D1步骤、沿该绝缘槽位置进行切断动作，以形成若干独立的该子单元PN结。
  13. 如权利要求12所述的一种具备散热特性的高光效垂直LED结构芯片的制作方法，其特征在于：完成D1步骤后的E步骤为、在顶部以及底部生长有石墨烯层的该子单元PN结的上下两侧分别键合第一透明散热层以及第二透明散热层，该第一透明散热层以及该第二透明散热层由散热透光性材料制成，该第一透明散热层的底面上以及该第二透明散热层的顶面上分别生长有透明散热层石墨烯层，该第一透明散热层底面上以及该第二透明散热层顶面上的该透明散热层石墨烯层分别与该PN结顶部以及底部的石墨烯层键合在一起。
  14. 如权利要求10所述的一种具备散热特性的高光效垂直LED结构芯片的制作方法，其特征在于：在C步骤中采用激光剥离的方式进行剥离，完成剥离后利用盐酸溶液清洗该PN结的底面以清除残留物质。
  15. 如权利要求10至14中任意一项所述的一种具备散热特性的高光效垂直LED结构芯片的制作方法，其特征在于：在完成B步骤后进行B1步骤、在A步骤的该PN结顶部连接热熔胶粘贴临时保护板，在该热熔胶粘贴临时保护板上方连接冷却装置。
  16. 如权利要求15所述的一种具备散热特性的高光效垂直LED结构芯片的制作方法，其特征在于：完成C步骤后进行C1步骤、从该PN结上将该冷却装置以及该热熔胶粘贴临时保护板去除掉，在将该热熔胶粘贴临时保护板去除掉之后利用丙酮溶液清洗掉残余的热熔胶。
  17. 一种具备散热特性的高光效垂直LED结构芯片，其包括N型半导体层、P型半导体层以及有源层，其中，该有源层设置在该N型半导体层与该P型半导体层之间，由该N型半导体层、该P型半导体层以及该有源层形成一PN结，其特征在于：
    在该N型半导体层顶面上设置有第一透明散热层，在该P型半导体层底面上设置有第二透明散热层，
    在该N型半导体层与该第一透明散热层之间设置有第一透明导电导热层，在该P型半导体层与该第二透明散热层之间设置有第二透明导电导热层，该第一透明导电导热层以及该第二透明导电导热层为石墨烯层，在该P型半导体层与该第二透明导电导热层之间设置有过渡ITO层，
    该第一透明散热层的底面上以及该第二透明散热层的顶面上分别生长有透明散热层石墨烯层，
    该第一透明散热层底面上以及该第二透明散热层顶面上的该透明散热层石墨烯层分别与该第一透明导电导热层以及该第二透明导电导热层键合在一起，
    在该第一透明散热层以及该第二透明散热层上的该透明散热层石墨烯层上分别连接第一电极以及第二电极，
    该第一电极以及该第二电极分别连接外部电路的正负极线，电流由该第一电极以及该第二电极流入该第一透明导电导热层以及该第二透明导电导热层并进一步流入该N型半导体层以及该P型半导体层中并激发由该N型半导体层、该P型半导体层以及该有源层形成的该PN结发光，在该PN结发光的同时其发光所产生的热量由该第一透明导电导热层以及该第二透明导电导热层向外散发。
  18. 一种具备散热特性的高光效垂直LED结构芯片的制作方法，其特征在于，包括如下步骤：
    A步骤、在衬底上生长牺牲层以及PN结，其中，该牺牲层设置在该衬底的顶部，该PN结设置在该牺牲层的顶部，该PN结包括N型半导体层、P型半导体层以及有源层，其中，该有源层设置在该N型半导体层与该P型半导体层之间，在每一个该绝缘槽中都填充绝缘胶层，
    B步骤、在该PN结顶部该P型半导体层上生长过度层，之后在该过度层上原位生长第二透明导电导热层，该第二透明导电导热层为石墨烯层，该过度层为ITO层，在完成B步骤后进行B1步骤、在A步骤的该PN结顶部通过高温固晶胶层将热平衡稳定装置设置在该PN结顶部，该热平衡稳定装置能够消除该PN结的热应力，
    C步骤、将该PN结下方的该衬底以及该牺牲层剥离掉，完成C步骤后进行C1步骤、从该PN结上将该热平衡稳定装置去除掉，而后高温融化该高温固晶胶层，
    D步骤、在该PN结底部该N型半导体层底面上原位生长第一透明导电导热层，该第一透明导电导热层为石墨烯层，
    E步骤、在顶部以及底部生长有石墨烯层的该PN结的上下两侧分别键合第一透明散热层以及第二透明散热层，该第一透明散热层以及该第二透明散热层由散热透光性能优良的材料制成，该第一透明散热层的底面上以及该第二透明散热层的顶面上分别生长有透明散热层石墨烯层，该第一透明散热层底面上以及该第二透明散热层顶面上的该透明散热层石墨烯层分别与该PN结顶部以及底部的石墨烯层键合在一起，
    F步骤、在该第一透明散热层以及该第二透明散热层上的该透明散热层石墨烯层上分别连接第一电极以及第二电极。
  19. 如权利要求18所述的一种具备散热特性的高光效垂直LED结构芯片的制作方法，其特征在于：在完成A步骤后进行A1步骤、在该PN结上自上而下开设绝缘槽，该绝缘槽将该PN结分隔成若干子单元PN结，该绝缘槽贯穿该N型半导体层以及该有源层，该绝缘槽底部位于该P型半导体层中，
    完成D步骤后进行D1步骤、沿该绝缘槽位置进行切断动作，以形成若干独立的该子单元PN结，
    完成D1步骤后E步骤为、在顶部以及底部生长有石墨烯层的该子单元PN结的上下两侧分别键合第一透明散热层以及第二透明散热层，该第一透明散热层以及该第二透明散热层由散热透光性能优良的材料制成，该第一透明散热层的底面上以及该第二透明散热层的顶面上分别生长有透明散热层石墨烯层，该第一透明散热层底面上以及该第二透明散热层顶面上的该透明散热层石墨烯层分别与该PN结顶部以及底部的石墨烯层键合在一起。
PCT/CN2016/085390 2015-06-12 2016-06-10 一种具备散热特性的高光效垂直led结构芯片及其制作方法 WO2016197966A1 (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201510321818.8 2015-06-12
CN201510321818.8A CN105024004A (zh) 2015-06-12 2015-06-12 一种具备散热特性的高光效垂直led结构芯片及其制作方法

Publications (1)

Publication Number Publication Date
WO2016197966A1 true WO2016197966A1 (zh) 2016-12-15

Family

ID=54413819

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2016/085390 WO2016197966A1 (zh) 2015-06-12 2016-06-10 一种具备散热特性的高光效垂直led结构芯片及其制作方法

Country Status (2)

Country Link
CN (1) CN105024004A (zh)
WO (1) WO2016197966A1 (zh)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11215861B2 (en) * 2017-06-29 2022-01-04 Boe Technology Group Co., Ltd. Display panel and method for improving display quality thereof
CN113937124A (zh) * 2021-04-09 2022-01-14 友达光电股份有限公司 显示面板

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105024004A (zh) * 2015-06-12 2015-11-04 蔡鸿 一种具备散热特性的高光效垂直led结构芯片及其制作方法
CN105957939A (zh) * 2016-05-28 2016-09-21 江苏积汇新能源科技有限公司 基于柔性石墨烯电极的垂直结构led加工方法
CN107785466A (zh) * 2016-08-26 2018-03-09 中国科学院金属研究所 一种基于石墨烯电极的透明led及其制备方法
CN108598192A (zh) * 2018-05-15 2018-09-28 中国科学院半导体研究所 InGaN/GaN异质外延结构及其生长方法
CN111399314A (zh) * 2020-05-29 2020-07-10 济南晶众光电科技有限公司 基于光偏振调制器的纳秒速度大口径晶体光快门器件
CN112489848A (zh) * 2020-12-07 2021-03-12 中国科学院长春光学精密机械与物理研究所 一种半导体辐射电池

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006253403A (ja) * 2005-03-10 2006-09-21 Hitachi Cable Ltd 発光ダイオードエピタキシャルウェハの成長方法
US7250635B2 (en) * 2004-02-06 2007-07-31 Dicon Fiberoptics, Inc. Light emitting system with high extraction efficency
CN101494268A (zh) * 2008-11-24 2009-07-29 厦门市三安光电科技有限公司 一种具有电流阻挡结构的垂直发光二极管的制作方法
CN101969092A (zh) * 2010-09-16 2011-02-09 兰红波 垂直结构金属衬底准光子晶体hb-led芯片及制造方法与应用
CN102891246A (zh) * 2012-09-18 2013-01-23 泰州普吉光电股份有限公司 一种垂直结构的led芯片
CN203415610U (zh) * 2013-06-21 2014-01-29 杭州格蓝丰纳米科技有限公司 一种垂直型石墨烯led芯片
CN105024004A (zh) * 2015-06-12 2015-11-04 蔡鸿 一种具备散热特性的高光效垂直led结构芯片及其制作方法

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101859858B (zh) * 2010-05-07 2013-03-27 中国科学院苏州纳米技术与纳米仿生研究所 基于石墨烯的透明导电电极及其制法与应用
KR20120044545A (ko) * 2010-10-28 2012-05-08 삼성엘이디 주식회사 반도체 발광 소자
CN202940270U (zh) * 2012-11-29 2013-05-15 昆山开威电子有限公司 一种双面发光的led芯片和led器件

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7250635B2 (en) * 2004-02-06 2007-07-31 Dicon Fiberoptics, Inc. Light emitting system with high extraction efficency
JP2006253403A (ja) * 2005-03-10 2006-09-21 Hitachi Cable Ltd 発光ダイオードエピタキシャルウェハの成長方法
CN101494268A (zh) * 2008-11-24 2009-07-29 厦门市三安光电科技有限公司 一种具有电流阻挡结构的垂直发光二极管的制作方法
CN101969092A (zh) * 2010-09-16 2011-02-09 兰红波 垂直结构金属衬底准光子晶体hb-led芯片及制造方法与应用
CN102891246A (zh) * 2012-09-18 2013-01-23 泰州普吉光电股份有限公司 一种垂直结构的led芯片
CN203415610U (zh) * 2013-06-21 2014-01-29 杭州格蓝丰纳米科技有限公司 一种垂直型石墨烯led芯片
CN105024004A (zh) * 2015-06-12 2015-11-04 蔡鸿 一种具备散热特性的高光效垂直led结构芯片及其制作方法

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11215861B2 (en) * 2017-06-29 2022-01-04 Boe Technology Group Co., Ltd. Display panel and method for improving display quality thereof
CN113937124A (zh) * 2021-04-09 2022-01-14 友达光电股份有限公司 显示面板
CN113937124B (zh) * 2021-04-09 2024-05-28 友达光电股份有限公司 显示面板

Also Published As

Publication number Publication date
CN105024004A (zh) 2015-11-04

Similar Documents

Publication Publication Date Title
WO2016197966A1 (zh) 一种具备散热特性的高光效垂直led结构芯片及其制作方法
TWI414088B (zh) 發光元件及其製造方法
CN105552180B (zh) 一种新型高压led的制作方法
US10186637B2 (en) Flip-chip light emitting device and fabrication method
WO2013104289A1 (zh) 发光二极管及制作方法
JP2013201455A (ja) 発光素子
TW201037859A (en) Light emitting diode chip and manufacturing method thereof
JP2013034010A (ja) 縦型発光素子
JP4393306B2 (ja) 半導体発光素子およびその製造方法並びに半導体装置
TWI246786B (en) Substrate-free flip chip light emitting diode and manufacturing method thereof
WO2014110982A1 (zh) 一种基于激光剥离的半导体发光器件的制备方法
JP2014075565A (ja) 化合物半導体装置の製造方法
TW201125157A (en) Method of manufacturing semiconductor light-emitting chip and semiconductor light-emitting chip
CN105355746A (zh) 包括递变区域的半导体发光器件
CN102683550B (zh) 半导体发光器件及其制造方法
CN105023932B (zh) 一种结合led外延结构与led封装基板为一体的垂直式led阵列元件
TW201501357A (zh) 發光二極體晶粒及其製造方法
TW201327946A (zh) 發光晶片及發光晶片的製造方法
TWI360893B (en) Light emitting diode chip and method for fabricati
TW201403868A (zh) 發光元件及其製造方法
TWI427821B (zh) Method for fabricating planar conduction type light emitting diodes with thermal guide substrate
TWI411145B (zh) High heat dissipation stacking / cladding type light emitting diodes
CN105305224B (zh) 一种采用铝基板封装的大功率半导体激光器及其封装方法
WO2015165048A1 (zh) 一种结合led外延结构与led封装基板为一体的垂直式led阵列元件
TW573373B (en) Lamination type manufacturing method of LED and structure thereof

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 16806864

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

32PN Ep: public notification in the ep bulletin as address of the adressee cannot be established

Free format text: NOTING OF LOSS OF RIGHTS PURSUANT TO RULE 112(1) EPC (EPO FORM 1205A DATED 28/05/2018)

122 Ep: pct application non-entry in european phase

Ref document number: 16806864

Country of ref document: EP

Kind code of ref document: A1