WO2015165048A1 - 一种结合led外延结构与led封装基板为一体的垂直式led阵列元件 - Google Patents

一种结合led外延结构与led封装基板为一体的垂直式led阵列元件 Download PDF

Info

Publication number
WO2015165048A1
WO2015165048A1 PCT/CN2014/076510 CN2014076510W WO2015165048A1 WO 2015165048 A1 WO2015165048 A1 WO 2015165048A1 CN 2014076510 W CN2014076510 W CN 2014076510W WO 2015165048 A1 WO2015165048 A1 WO 2015165048A1
Authority
WO
WIPO (PCT)
Prior art keywords
electrode structure
led
substrate
led epitaxial
vertical
Prior art date
Application number
PCT/CN2014/076510
Other languages
English (en)
French (fr)
Inventor
陈振贤
Original Assignee
陈振贤
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 陈振贤 filed Critical 陈振贤
Priority to PCT/CN2014/076510 priority Critical patent/WO2015165048A1/zh
Priority to GB1617443.5A priority patent/GB2540299B/en
Priority to DE112014006625.7T priority patent/DE112014006625T5/de
Publication of WO2015165048A1 publication Critical patent/WO2015165048A1/zh

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005Processes
    • H01L33/0062Processes for devices with an active region comprising only III-V compounds
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/075Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/15Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission
    • H01L27/153Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars
    • H01L27/156Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars two-dimensional arrays
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/26Materials of the light emitting region
    • H01L33/30Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table
    • H01L33/32Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table containing nitrogen
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/40Materials therefor
    • H01L33/405Reflective materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/44Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating

Definitions

  • the present invention relates to a vertical LED array component, and more particularly to a vertical LED array component incorporating an LED epitaxial structure and an LED package substrate. Background technique
  • LED light source components (lm/$) is the most important factor in the LED lighting market. Therefore, LED die manufacturers or LED package component manufacturers are trying their best to reduce the manufacturing of their products in their respective fields. cost. Most LED die manufacturers have also stepped into the field of LED package component manufacturing, and expect to reduce the cost and price by shortening the LED light source supply chain.
  • the existing method for fabricating a vertical LED array component is to bond a vertical LED die to a LED package substrate with a circuit in a Die Bonding manner, and a positive electrode under the vertical LED die is bonded to the LED package substrate.
  • the positive pole The negative electrode above the vertical LED die is connected to the negative electrode on the LED package substrate by wire bonding (Wire Bonding), and is packaged into a vertical LED array component in series, parallel or serial and parallel connection.
  • an epitaxial substrate for growing epitaxial layers (Epi-Substrate;)
  • a package substrate (Package Substrate) that finally carries a vertical LED die.
  • the existing LED epitaxial carrier substrate needs to be ion-distributed on the semiconductor substrate wafer for conduction, and a positive electrode needs to be fabricated on the bottom of the LED epitaxial carrier substrate.
  • the process requirement causes the process complexity of the existing vertical LED array component. And the cost cannot be further reduced.
  • FIG. 1 is a schematic diagram of a conventional vertical LED array component.
  • the bonding material layer 16 causes the thermal resistance value of the entire high power density vertical LED package component 10 to be difficult to be lowered.
  • the present invention provides a vertical LED array component that can be directly fabricated on a semiconductor wafer and incorporates an LED epitaxial structure and an LED package substrate, and includes a substrate and a plurality of vertical LED epitaxial structures.
  • the substrate has an upper surface.
  • a plurality of vertical LED epitaxial structures are formed on the upper surface of the substrate, and each of the LED epitaxial structures includes an LED epitaxial layer, a first electrode structure, and a second electrode structure.
  • the LED epitaxial layer contains an N-type half a conductor layer, a multiple quantum well structure layer, and a P-type semiconductor layer.
  • the first electrode structure is formed below the epitaxial layer of the LED and bonded to the upper surface of the substrate.
  • a second electrode structure is formed over the epitaxial layer of the LED.
  • a dielectric layer structure is formed around the plurality of vertical LED epitaxial structures, and the dielectric layer structure extends in the selective region toward the substrate and extends through the first electrode structure into the substrate and below the upper surface of the substrate.
  • the present invention passes through the dielectric trench to prevent leakage that may occur between the plurality of LED epitaxial structures.
  • the first electrode structure of the vertical LED array component of the present invention is a bonding metal layer formed by wafer bonding of an epitaxial substrate wafer and a package substrate wafer carrying the plurality of LED epitaxial structures, Further reducing the cost of the package substrate, the package substrate wafer may be a reclaimed wafer after the IC process or a regenerated wafer that has been discarded and can no longer be recycled for use in the IC process. Compared with the prior art vertical LED component manufacturing process, the present invention has the advantages of simple process and cost saving.
  • the vertical LED array component of the present invention further comprises a conductor material layer, a third electrode structure and a fourth electrode structure.
  • a layer of conductive material is formed on the dielectric layer structure around each of the epitaxial structures of the LEDs for electrically connecting the first electrode structure and the second electrode structure between the epitaxial structures of the adjacent LEDs.
  • a third electrode structure is formed on the upper surface of the substrate and outside the plurality of LED epitaxial structures; and a fourth electrode structure is formed on the upper surface of the substrate and outside the plurality of LED epitaxial structures, the third electrode structure and The fourth electrode structure and the first electrode structure and the second electrode structure between the plurality of LED epitaxial structures are electrically connected to each other to form a circuit, wherein the polarity of the third electrode structure and the fourth electrode structure are different And used to connect an external power supply.
  • the plurality of LED epitaxial structures may be electrically connected in series, in parallel, and in series and parallel. Compared with the prior art, since the vertical LED array component of the present invention can make an electrically conductive connection by using a semiconductor IC process, it is possible to provide a telecommunication connection stability between LED epitaxial structures.
  • the substrate of the vertical LED array component of the present invention further has a lower surface, which can serve as a bottom portion of the thermally conductive substrate of the package component for direct contact or indirect contact with a heat conducting component or a heat dissipating component to exclude the vertical LED of the present invention.
  • the thermal energy generated by the array elements due to high power density illuminating.
  • a transparent material layer structure having high transmittance and low thermal conductivity is formed to isolate the vertical LED array component of the present invention due to high luminous flux density.
  • the thermal energy generated on the upper surface of the component may be transmitted back to the plurality of LED epitaxial structures themselves, thereby causing a decrease in luminous efficiency.
  • the vertical LED array element of the present invention has an absolute heat dissipation advantage.
  • the present invention provides a vertical LED array component which is integrated with an LED epitaxial structure and an LED package substrate. Compared with the prior art, the vertical LED array component of the present invention has good heat dissipation, simple process and cost saving. Features. DRAWINGS
  • FIG. 1 is a schematic diagram of a conventional vertical LED array component.
  • FIG. 2 is a schematic diagram of a vertical LED array component on a wafer substrate in accordance with an embodiment of the present invention.
  • 3 is a schematic plan view of a vertical LED array component in accordance with an embodiment of the present invention.
  • 4 is a cross-sectional view of a vertical LED array component in accordance with an embodiment of the present invention.
  • FIG. 5 is a schematic view of a vertical LED array component according to an embodiment of the present invention before wafer bonding.
  • 6 is a circuit diagram of a vertical LED array component in accordance with an embodiment of the present invention.
  • LED package substrate 16 Conductive bonding material layer
  • Vertical LED array component 102 substrate, package substrate
  • LED epitaxial structure 106 upper surface
  • LED epitaxial layer 110 first electrode structure, bonding metal layer
  • second electrode structure 114 N-type semiconductor layer
  • Dielectric trench 126 Conductor material layer
  • Projection layer 138 Transparent material layer structure
  • epitaxial substrate 101 wafer of vertical LED array element
  • FIG. 2 is a schematic diagram of a vertical LED array component on a wafer substrate according to an embodiment of the invention
  • FIG. 3 illustrates a vertical LED array according to an embodiment of the present invention
  • a schematic plan view of a component, and FIG. 4 is a cross-sectional view of a vertical LED array component in accordance with an embodiment of the present invention.
  • the invention provides a vertical LED array component 100 integrated with an LED epitaxial structure and an LED package substrate, which comprises a substrate 102 and a plurality of vertical LED epitaxial structures 104.
  • a wafer 101 of a vertical LED array element forming a plurality of vertical LED epitaxial structures can be designed and fabricated into vertical LED array elements 100 of different sizes according to application requirements.
  • the vertical LED array component 100 of the present invention comprises nine vertical LED epitaxial structures 104 (shown in FIG. 2), but is not limited by this design in practical applications.
  • the substrate 102 has an upper surface 106.
  • the substrate 102 can be a silicon substrate or any semiconductor substrate. In the specific embodiment, the substrate 102 is a silicon substrate.
  • the plurality of vertical LED epitaxial structures 104 are formed on the upper surface 106 of the substrate 102.
  • Each LED epitaxial structure 104 includes an LED epitaxial layer 108, a first electrode structure 110, and a second electrode structure 112.
  • the LED epitaxial layer 108 includes an N-type semiconductor layer 114, a multiple quantum well structure layer 116, and a P-type semiconductor layer 118.
  • Another light reflection layer 120 is formed on the first electrode structure 110 and the LED.
  • the LED epitaxial layer 108 is grown on another epitaxial substrate 140 and transferred to the upper surface 106 of the substrate 102 via wafer bonding (Wafer Bonding) technology, and each LED vertical epitaxial structure 104 It may also be composed of a plurality of minute epitaxial structures having positive and negative electrodes.
  • the first electrode structure 110 is formed below the LED epitaxial layer 108 and bonded to the upper surface 106 of the substrate 102.
  • the second electrode structure 112 is formed over the LED epitaxial layer 108.
  • a dielectric layer structure 122 is formed around the plurality of vertical LED epitaxial structures 104. The dielectric layer structure 122 extends in a direction of the substrate 102 in a selective region, and extends into the substrate 102 while crossing the first electrode structure 110.
  • a dielectric layer trench 124 is formed under the upper surface 106 of the substrate 102, and the vertical LED array component 100 of the present invention passes through the dielectric trench 124 to prevent the first electrode structure of the plurality of LED epitaxial structures 104.
  • a leakage phenomenon may occur due to the package substrate 102 being a semiconductor material.
  • FIG. 5 is a schematic diagram of a vertical LED array component according to an embodiment of the present invention before wafer bonding.
  • the first electrode structure 110 of the vertical LED array device 100 of the present invention is a bonding metal layer 111 on an epitaxial substrate 140 on which the plurality of LED epitaxial layers 108 are grown, and is bonded to the bonding metal layer 113 on a package substrate 102 via a wafer.
  • (Wafer Bonding) formed by a bonding metal layer 110, wherein the bonding metal layer 110 is formed by a bonding metal layer 113 of the epitaxial substrate wafer and a bonding metal layer 111 of the package substrate wafer through a wafer bonding process.
  • a single metal bonding layer (as shown in FIG.
  • the metal bonding layer also serves as the first electrode structure 110 of each of the LED epitaxial structures 104 in the vertical LED array device 100 of the present invention and the vertical LED of the present invention.
  • a third electrode structure 128 and a fourth electrode structure 130 of an external power source are connected to the array element 100.
  • the substrate 102 used in the present invention is made of silicon (Silicon) and has a thickness of 300 600 ⁇ m, and the package substrate wafer may be 6 ⁇ or 8 ⁇ or 12 ⁇ with a lattice of (100).
  • the silicon wafer forms a metal bonding layer 113 on the surface.
  • the package substrate wafer can be processed by a Reclaimed Wafer which has been processed by an IC process or after repeated recovery and reproduction, and can no longer be used in an IC process having a thickness of less than 600 ⁇ m.
  • the vertical LED array component 100 of the present invention requires only two substrates, namely an epitaxial substrate 140 for growing the LED epitaxial layer 108, and will be used for wafer bonding (Wafer) compared to prior art vertical LED component fabrication processes. Bonding) A carrier carrier carrying the LED epitaxial layer 108 after transfer is used as the final LED package substrate 102.
  • the semiconductor chip package substrate 102 which also functions as an LED epitaxial structure carrying and encapsulating function, does not need to be ion-conducted on the semiconductor wafer for conducting electricity as in the existing LED carrier substrate, and is not required to be thinned at the bottom of the LED carrier substrate.
  • Make a positive electrode The positive electrode of each of the LED epitaxial structures 104 of the vertical LED array component 100 of the present invention is automatically formed upon wafer bonding. Therefore, the vertical LED array element 100 of the present invention has the characteristics of simple process and cost saving.
  • the vertical LED array component 100 of the present invention further includes a conductor material layer 126 and a third electrode structure.
  • a conductive material layer 126 is formed on the dielectric layer structure 122 around the LED epitaxial structure 104 for electrically connecting the first electrode structure 110 and the second electrode structure 112 between the adjacent LED epitaxial structures 104.
  • the third electrode structure 128 is located on the upper surface 106 of the substrate 102 and outside the region of the plurality of LED epitaxial structures 104; and the fourth electrode structure 130 is located on the upper surface 106 of the substrate 102 and outside the region of the plurality of LED epitaxial structures 104. .
  • the third electrode structure 128 and the fourth electrode structure 130 are both part of the bonding metal layer 110 and are located at the same Outside of the plurality of LED epitaxial structures 104.
  • the third electrode structure 128 and the fourth electrode structure 130 and the first electrode structure 110 and the second electrode structure 112 between the plurality of LED epitaxial structures 104 are electrically connected to each other to form a circuit, wherein the third electrode structure 128 and The fourth electrode structures 130 have different polarities and are respectively connected to an external power source.
  • an electrode solder layer 132 for soldering the external power source may be further formed on the third pole structure 128 and the fourth electrode structure 130.
  • the first electrode structure 110 and the second electrode structure 112 may be electrically connected in series between the plurality of LED epitaxial structures 104, and simultaneously with the third electrode structure 128 of the upper surface 106 of the substrate 102.
  • the fourth electrode structure 130 is electrically connected to form a series circuit.
  • the first electrode structure 110 of the plurality of LED epitaxial structures 104 is electrically connected to the third electrode structure 128 of the upper surface 106 of the substrate 102
  • the second electrode structure 112 of the plurality of LED epitaxial structures 104 is electrically connected to the substrate 102.
  • the fourth electrode structure 130 of the upper surface 106 forms a parallel circuit.
  • the plurality of LED epitaxial structures 104 can be divided into M LED epitaxial structure groups, and the first electrode structure 110 and the second electrode are connected in series between each LED epitaxial structure 104 in each LED epitaxial structure group.
  • the structure 112 is electrically connected.
  • the M LED epitaxial structure groups are electrically connected in parallel to the third electrode structure 128 and the fourth electrode structure 130 of the upper surface 106 of the substrate 102, thereby forming a series and parallel hybrid circuit.
  • M is a natural number greater than one.
  • FIG. 6 is a schematic circuit diagram of a vertical LED array component according to an embodiment of the present invention.
  • the plurality of LED epitaxial structures 104 can be divided into three LED epitaxial structure groups, and each LED epitaxial structure 104 in each LED epitaxial structure group is first connected in series.
  • the electrode structure 110 and the second electrode structure 112 are electrically connected.
  • the three LED epitaxial structures are electrically connected in parallel to the third electrode structure 128 and the fourth electrode structure 130 of the upper surface 106 of the substrate 102, thereby forming a a series, parallel hybrid circuit, wherein the first electrode structures 110 between the adjacent LED epitaxial structures 104 between the three parallel LED epitaxial structure groups can be connected to each other (as shown in FIG. 6), wherein if there is one LED The epitaxial structure 104 is broken and cannot be turned on.
  • the circuit design employed in the present invention does not affect the operation of other vertical LED array elements 100.
  • the plurality of LED epitaxial structures 104 can also be electrically connected in series, in parallel, and in series and parallel.
  • the vertical LED array component 100 of the present invention does provide a stable fabrication of a telecommunications connection between LED components directly on a semiconductor wafer, and can effectively provide a single LED light source component while having high power density and high An effective solution for luminous flux.
  • the substrate 102 of the vertical LED array component 100 of the present invention further has a lower surface 134, and the lower surface 134 can be used for direct contact or indirect contact with a heat conducting component or a heat dissipating component to effectively apply the vertical LED array component of the present invention.
  • the heat generated by the high power density energization luminescence can be quickly conducted to the external heat conducting component or the heat dissipating component.
  • a fluorescent layer 136 is further formed on the plurality of LED epitaxial structures 104 of the vertical LED array component 100 of the present invention for exciting the blue or ultraviolet light generated by the vertical LED array component 100 into white light.
  • a transparent substance layer structure 138 having a high transmittance and a low thermal conductivity is additionally formed on the phosphor layer 136 for isolating the photon or light wave of the vertical LED array element 100 of the present invention due to its high luminous flux.
  • the accumulated thermal energy due to the interaction may be transmitted back to
  • the plurality of LED epitaxial structures 104 themselves, in turn, cause the temperature of the plurality of LED epitaxial structures 104 to rise, resulting in a decrease in luminous efficiency of the final vertical LED array device 100.
  • the carrier substrate carrying the LED epitaxial structure 104 of the vertical LED array component 100 of the present invention can be directly used as the LED package substrate 102, and can be directly or indirectly disposed in the heat conduction or heat dissipation module of the lighting fixture. on. Since the LED epitaxial structure 104 and the LED package have been integrated to reduce the thermal resistance of the solid crystal contact material, the thermal resistance value (Rjc) of the vertical LED array component of the present invention will also be higher than that of the prior art vertical LED array. The component is lower. The vertical LED array component of the present invention will effectively reduce the junction temperature of the LED and prolong the effective life of the light source in the actual lamp application of high power operation.
  • the vertical LED array component of the present invention can be fabricated on a large-sized semiconductor wafer substrate in one go, and there is no need to have an existing solid crystal or wire bonding process, which will effectively reduce the overall fabrication of the light source component. cost. Since the present invention employs a wafer level semiconductor process, a standard light source component of any particular luminous flux can be fabricated by controlling the extent of the epitaxial structure of the vertical LED array elements on a large wafer. Compared with the prior art, the present invention provides a vertical LED array component which is combined with an LED epitaxial structure and an LED package substrate. The vertical LED array component of the present invention has the advantages of good heat dissipation, simple process and cost saving.

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Led Device Packages (AREA)

Abstract

一种结合LED外延结构与LED封装基板为一体的垂直式LED阵列元件(100),其包含有一基板(102)以及多个垂直式LED外延结构(104)。基板(102)具有一上表面。多个垂直式LED外延结构形成于基板的上表面(106),每一LED外延结构(104)包含一LED外延层(108)、一第一电极结构(110)以及一第二电极结构(112)。第一电极结构(110)形成于LED外延层(108)的下方并与基板(102)的上表面(106)相接合。第二电极结构(112)形成于该LED外延层(108)的上方。其中,多个垂直式LED外延结构(104)周围形成一介电层结构(122),介电层结构(122)于选择性的区域内向基板(102)方向延伸并穿越第一电极结构(110)而伸入基板(102)之中,并在基板(102)的上表面(106)以下形成一介电层沟槽(124)。提供一直接在晶片上制造高功率密度、高光通量的垂直式LED阵列元件(100)的设计,可通过介电沟槽(124)以防止该多个LED外延结构(104)间可能发生的漏电现象。

Description

一种结合 LED外延结构与 LED封装基板为一体的垂直式 LED阵列元件 技术领域
本发明关于一种垂直式 LED阵列元件, 特别是关于一种结合 LED外延结构与 LED 封装基板为一体的垂直式 LED阵列元件。 背景技术
LED光源元件价格 (lm/$)是导致 LED照明市场是否能够全面启动的最重要因素,因此 不管是 LED裸片制造商或 LED封装元件制造商无不戮力在各自的领域上设法降低产品的 制造成本。 多数的 LED裸片制造商亦跨足了 LED封装元件制造领域, 期望能以缩短 LED 光源供应链的方式来达到降低成本及售价的目的。
现有制作垂直式 LED阵列元件的方式是将垂直式 LED裸片以固晶 (Die Bonding)的方 式接合在具有电路的 LED封装基板上, 垂直式 LED裸片下方的正极接合到 LED封装基 板上的正极。垂直式 LED裸片上方的负极再以打线 (Wire Bonding)的方式连接到 LED封装 基板上的负极, 以串联、 并联或串、 并联方式封装成垂直式 LED阵列元件。
此外, 现有制作垂直式 LED阵列元件的方式, 对于 LED裸片及 LED封装而言, 总 共要使用到三个不同的基板, 即用于生长外延层的外延基板 (Epi-Substrate;)、用于晶片键合 (Wafer Bonding)移转后承载外延层的导电承载基板 (Chip Carrier), 以及最后承载垂直式 LED裸片的封装电路基板 (Package Substrate)。 其中, 现有 LED外延承载基板为了导电需 在半导体基板晶片上做离子布值, 还需在 LED外延承载基板底部制作正电极, 此制程上 的需求造成现有垂直式 LED阵列元件的制程复杂度与成本无法进一步的降低。
请参阅图 1, 图 1绘示现有垂直式 LED阵列元件的示意图。 再者, 现有垂直式 LED 阵列元件 10在大功率及高光通量的应用时, 由于多晶模组封装及功率密度较高, 又由于 LED裸片 12与 LED封装基板 14之间又有一额外导电接合材料层 16, 导致整个高功率密 度垂直式 LED封装元件 10的热阻值不易降低, 当该垂直式 LED封装元件元件 10在高功 率操作下, 将导致 LED的结点温度居高不下, 进而造成光衰及光源有效寿命减短。
因此,针对现有垂直式 LED阵列元件所面临的问题,市场上迫切需要一种新颖的 LED 元件, 其能同时解决制程复杂度、 因光衰而导致光源有效寿命短及生产成本的问题。 发明内容
有鉴于此, 本发明提出一种可直接在半导体晶片上制造的结合 LED外延结构与 LED 封装基板为一体的垂直式 LED阵列元件,其包含有一基板以及多个垂直式 LED外延结构。 基板具有一上表面。 多个垂直式 LED外延结构形成于基板的上表面, 每一 LED外延结构 包含一 LED外延层、 一第一电极结构以及一第二电极结构。 LED外延层包含有一 N型半 导体层、 一多重量子阱结构层以及一 P型半导体层。 第一电极结构形成于 LED外延层的 下方并与基板的上表面相接合。 第二电极结构形成于该 LED外延层的上方。 其中, 多个 垂直式 LED外延结构周围形成一介电层结构, 介电层结构于选择性的区域内向基板方向 延伸并穿越第一电极结构而伸入基板之中, 并在基板的上表面以下形成一介电层沟槽, 本 发明通过介电沟槽以防止该多个 LED外延结构间可能发生的漏电现象。
此外, 本发明垂直式 LED阵列元件的第一电极结构为承载该多个 LED外延结构的一 外延基板晶片与一封装基板晶片经过晶片键合 (Wafer Bonding)后所形成的一接合金属层, 为了进一步降低封装基板成本,该封装基板晶片可为经过 IC制程后的再生晶片 (Reclaimed Wafer)或已废弃无法再回收使用于 IC制程的再生晶片。 相较于现有垂直式 LED元件的制 作程序, 本发明具有制程简单及节省成本的优点。
再者, 本发明垂直式 LED阵列元件另包含有一导体材料层、 一第三电极结构以及一 第四电极结构。 导体材料层形成于每一 LED外延结构周围的该介电层结构上, 用以电连 接该相邻 LED外延结构间的第一电极结构及第二电极结构。 第三电极结构形成于该基板 的该上表面并位于该多个 LED外延结构之外; 而第四电极结构形成于基板的上表面并位 于该多个 LED外延结构之外, 第三电极结构及第四电极结构与该多个 LED外延结构间的 第一电极结构及第二电极结构之间以相互电连接而形成一电路,其中该第三电极结构及该 第四电极结构的极性相异, 并分别用以连接一外部电源。 而于实际应用上, 该多个 LED 外延结构之间还可以以串联、 并联以及串并联的形式进行电性连结。 相较于现有技术, 由 于本发明垂直式 LED阵列元件可利用半导体 IC制程制作导电连接, 可提供一种 LED外 延结构间的电信连结稳定。
最后, 本发明垂直式 LED阵列元件的基板另具有一下表面, 该下表面可作为封装元 件的导热基板底部以用来直接接触或间接接触一导热元件或一散热元件, 以排除本发明垂 直式 LED阵列元件因高功率密度通电发光所产生的热能。 再者, 于本发明垂直式 LED阵 列元件的 LED外延结构的上, 另形成有一高透光率且具低导热率的透明物质层结构, 用 以隔绝本发明垂直式 LED阵列元件因高光通量密度在元件上表面所产生的热能, 可能回 传至该多个 LED外延结构本身进而导致发光效率递减的现象。 相较于现有技术, 本发明 垂直式 LED阵列元件具有绝对的散热优势。
承上所述, 本发明提出一种结合 LED外延结构与 LED封装基板为一体垂直式 LED 阵列元件, 相较于现有技术, 本发明垂直式 LED阵列元件具有散热佳、 制程简单及节省 成本的特点。 附图说明
图 1绘示现有垂直式 LED阵列元件的示意图。
图 2绘示根据本发明的一具体实施例在一晶片基板上的垂直式 LED阵列元件的示意 图 图 3绘示本发明的一具体实施例的垂直式 LED阵列元件的平面示意图。 图 4绘示本发明的一具体实施例的垂直式 LED阵列元件的剖面示意图。
图 5绘示本发明的一具体实施例的垂直式 LED阵列元件的晶片键合前的示意图。 图 6绘示本发明的一具体实施例的垂直式 LED阵列元件的电路示意图。
符号说明】
10: 垂直式 LED阵列元件 12: LED裸片
14: LED封装基板 16: 导电接合材料层
100: 垂直式 LED阵列元件 102: 基板、 封装基板
104: LED外延结构 106: 上表面
108: LED外延层 110: 第一电极结构、 接合金属层
111: 外延基板上的接合金属层
113: 封装基板上的接合金属层
112: 第二电极结构 114: N型半导体层
116: 多重量子阱结构层 118: P型半导体层
120: 光反射层 122: 介电层结构
124: 介电沟槽 126: 导体材料层
128: 第三电极结构 130: 第四电极结构
132: 焊料层 134: 下表面
136: 突光层 138: 透明物质层结构
140: 外延基板 101: 垂直式 LED阵列元件的晶片 具体实施方式
请参阅图 2至图 4,图 2绘示根据本发明的一具体实施例在一晶片基板上的垂直式 LED 阵列元件的示意图, 图 3绘示本发明的一具体实施例的垂直式 LED阵列元件的平面示意 图, 图 4绘示本发明的一具体实施例的垂直式 LED阵列元件的剖面示意图。 本发明提出 一种结合 LED外延结构与 LED封装基板为一体的垂直式 LED阵列元件 100,其包含有一 基板 102以及多个垂直式 LED外延结构 104。 于实际应用上, 在一形成多个垂直式 LED 外延结构的垂直式 LED阵列元件的晶片 101可依应用需要而将其设计、 制作成不同尺寸 的垂直式 LED阵列元件 100。 于本实施例中, 本发明垂直式 LED阵列元件 100包含 9个 垂直式 LED外延结构 104(如图 2所示), 但于实际应用上并不以此设计为限。 基板 102具 有一上表面 106,基板 102可为一硅 (Silicon)基板或任何半导体基板其中的一者,于本具体 实施例中, 基板 102为一硅基板。此外, 该多个垂直式 LED外延结构 104形成于基板 102 的上表面 106的上。每一 LED外延结构 104包含一 LED外延层 108、一第一电极结构 110 以及一第二电极结构 112。 LED外延层 108包含有一 N型半导体层 114、 一多重量子阱结 构层 116以及一 P型半导体层 118,另有一光反射层 120形成于该第一电极结构 110与 LED 外延层 108之间。于实际应用上, LED外延层 108是在另一外延基板 140上生长形成并经 晶片键合 (Wafer Bonding)技术而移转至该基板 102的上表面 106,而每一 LED垂直式外延 结构 104也可以是由多个具有正、负电极的微小外延结构所构成。再者,第一电极结构 110 形成于 LED外延层 108的下方并与基板 102的上表面 106相接合。 第二电极结构 112形 成于 LED外延层 108的上方。 其中, 该多个垂直式 LED外延结构 104周围形成一介电层 结构 122, 介电层结构 122于选择性的区域内向基板 102的方向延伸, 同时并穿越第一电 极结构 110而伸入基板 102之中,并在基板 102的上表面 106以下形成一介电层沟槽 124, 而本发明垂直式 LED阵列元件 100通过介电沟槽 124以防止该多个 LED外延结构 104的 第一电极结构 110间, 因封装基板 102为半导体材料而可能发生的漏电现象。
请参阅图 5,图 5绘示本发明的一具体实施例的垂直式 LED阵列元件的晶片键合前的 示意图。 本发明垂直式 LED阵列元件 100的第一电极结构 110为生长该多个 LED外延层 108的一外延基板 140上的接合金属层 111, 与一封装基板 102上的接合金属层 113经过 晶片键合 (Wafer Bonding)后所形成的一接合金属层 110, 其中接合金属层 110由该外延基 板晶片的接合金属层 113与封装基板晶片的接合金属层 111经过晶片键合 (Wafer Bonding) 制程所形成的单一金属键合层 (如图 5 所示), 而该金属键合层亦同时做为本发明垂直式 LED阵列元件 100中每一 LED外延结构 104的第一电极结构 110以及本发明垂直式 LED 阵列元件 100中连接外部电源的第三电极结构 128及第四电极结构 130。 再者, 本发明所 采用的基板 102材质为硅 (Silicon), 厚度为 300 600微米 (μιη)之间, 而该封装基板晶片可 以是晶格为 (100)的 6吋或 8吋或 12吋的硅晶片并在表面形成一金属键合层 113。 该封装 基板晶片并可以采用经过 IC制程后的再生晶片 (Reclaimed Wafer)加工而成或经过多次回 收再生后而无法再使用于 IC制程的厚度小于 600微米 (μιη)的报废晶片加工而成。 相较于 现有垂直式 LED元件的制作程序, 本发明垂直式 LED阵列元件 100仅需要使用到两个基 板,即用于生长 LED外延层 108的外延基板 140以及将用于晶片键合 (Wafer Bonding)移转 后承载 LED外延层 108的承载基板 (Chip Carrier)作为最终 LED封装基板 102使用。 而此 身兼 LED外延结构承载及封装功能的半导体晶片封装基板 102, 亦不必如现有 LED承载 基板般为了导电在半导体晶片上做离子布值, 更不需在 LED承载基板的底部磨薄后再制 作正电极。 本发明垂直式 LED阵列元件 100的每一个 LED外延结构 104的正电极在晶片 键合时就已自动形成。 因此, 本发明垂直式 LED阵列元件 100具有制程简单及节省成本 的特点。
再者,本发明垂直式 LED阵列元件 100另包含有一导体材料层 126、一第三电极结构
128以及一第四电极结构 130。导体材料层 126形成于 LED外延结构 104周围的介电层结 构 122上, 用以电连接该相邻 LED外延结构 104间的第一电极结构 110及第二电极结构 112。第三电极结构 128位于基板 102的上表面 106并位于该多个 LED外延结构 104的区 域外; 而第四电极结构 130位于基板 102的上表面 106并位于该多个 LED外延结构 104 的区域外。第三电极结构 128与第四电极结构 130同为接合金属层 110的一部份并位于该 多个 LED外延结构 104之外。 第三电极结构 128及第四电极结构 130与该多个 LED外延 结构 104间的第一电极结构 110及第二电极结构 112之间以相互电连接而形成一电路,其 中第三电极结构 128及第四电极结构 130的极性相异,并分别用以连接一外部电源。此外, 第三极结构 128及第四电极结构 130上可以另形成一利于焊接该外部电源的电极焊料层 (Solder Layer)132。
于实际应用上,该多个 LED外延结构 104之间可以以串联的形式将第一电极结构 110 及第二电极结构 112电连接, 同时并与基板 102的上表面 106的第三电极结构 128及第四 电极结构 130电连接, 进而形成一串联电路。 此外, 该多个 LED外延结构 104的第一电 极结构 110电连接至基板 102的上表面 106的第三电极结构 128, 该多个 LED外延结构 104的第二电极结构 112电连接至基板 102的上表面 106的第四电极结构 130, 进而形成 一并联电路。 再者, 该多个 LED外延结构 104可以区分为 M个 LED外延结构群, 每一 LED外延结构群中的每一 LED外延结构 104之间以串联的形式将第一电极结构 110及第 二电极结构 112电连接, 该 M个 LED外延结构群之间以并联的形式电连接于基板 102的 上表面 106的第三电极结构 128及第四电极结构 130, 进而形成一串、 并联混合电路, 其 中 M为大于一的自然数。
请参阅图 6, 图 6绘示本发明的一具体实施例的垂直式 LED阵列元件的电路示意图。 于本发明的一具体实施例中,该多个 LED外延结构 104可以区分为 3个 LED外延结构群, 每一 LED外延结构群中的每一 LED外延结构 104之间以串联的形式将第一电极结构 110 及第二电极结构 112电连接,该 3个 LED外延结构群之间以并联的形式电连接于基板 102 的上表面 106的第三电极结构 128及第四电极结构 130, 进而形成一串、 并联混合电路, 其中该 3个并联的 LED外延结构群之间相邻的各别 LED外延结构 104之间第一电极结构 110可相互连接 (如图 6所示), 其中若有一个 LED外延结构 104坏损而无法导通, 本发明 所采用的电路设计并不会影响其它垂直式 LED阵列元件 100的运作。 综前所述, 该多个 LED外延结构 104之间还可以以串联、并联以及串并联的形式进行电性连结。相较于现有 技术, 本发明垂直式 LED阵列元件 100确实提供一种能直接在半导体晶片上制作且 LED 元件间的电信连结稳定, 并且能有效提供单一 LED光源元件同时具有高功率密度及高光 通量的有效解决方案。
最后, 本发明垂直式 LED阵列元件 100的基板 102另具有一下表面 134, 下表面 134 可以用来直接接触或间接接触一导热元件或一散热元件, 以有效将本发明垂直式 LED阵 列元件 loo 因高功率密度通电发光时所产生的热能够快速的传导至外接的导热元件或散 热元件上。 再者, 于本发明垂直式 LED阵列元件 100的该多个 LED外延结构 104的上另 形成一荧光层 136,用以将该垂直式 LED阵列元件 100所产生的蓝光或紫外光激发成白光 而做为照明使用,而荧光层 136上另外形成一同时具有高透光率且具低导热率的透明物质 层结构 138,用以隔绝本发明垂直式 LED阵列元件 100因其高光通量的光子或光波与覆盖 在该垂直式 LED阵列元件 100上的光学元件, 因交互作用而产生累积的热能可能回传至 该多个 LED外延结构 104本身, 进而导致该多个 LED外延结构 104温度上升而导致最终 垂直式 LED阵列元件 100发光效率递减的现象。 相较于现有技术, 本发明垂直式 LED阵 列元件 100所承载 LED外延结构 104的承载基板可直接做为 LED封装基板 102, 进而可 以直接或间接的被安置在照明灯具的导热或散热模组上。 由于 LED外延结构 104与 LED 封装已合为一体, 少掉了固晶的接点材料热阻, 因此本发明垂直式 LED阵列元件的热阻 值 (Rjc)也将比现有技术的垂直式 LED阵列元件更低。本发明垂直式 LED阵列元件在高功 率操作的实际灯具应用下将有效的降低 LED的结点温度及延长光源有效寿命。
承上所述, 本发明垂直式 LED阵列元件的制造上可以在大尺寸的半导体晶片基板上 一气呵成, 不需再有现有的固晶、 打线的制程, 将有效的降低光源元件的整体制作成本。 由于本发明采用了晶片级的半导体制程, 在大尺寸的晶片上控制垂直式 LED阵列元件的 外延结构面积大小就可以制作出任意特定光通量的标准光源元件。相较于现有技术, 本发 明提出一种结合 LED外延结构与 LED封装基板为一体垂直式 LED阵列元件, 本发明垂 直式 LED阵列元件具有散热佳、 制程简单及节省成本的特点。
通过以上较佳具体实施例的详述, 希望能更加清楚描述本发明的特征与精神, 而并非 以上述所公开的较佳具体实施例来对本发明的范畴加以限制。相反地, 其目的是希望能涵 盖各种改变及具相等性的安排于本发明所欲申请的专利范围的范畴内。 因此, 本发明所申 请的专利范围的范畴应根据上述的说明作最宽广的解释, 以致使其涵盖所有可能的改变以 及具相等性的安排。

Claims

权利要求
1.一种结合 LED外延结构与 LED封装基板为一体的垂直式 LED阵列元件,包含有: 一基板, 具有一上表面; 以及
多个垂直式 LED外延结构, 形成于该基板的该上表面, 每一 LED外延结构包含一 LED外延层、一第一电极结构以及一第二电极结构, 该 LED外延层包含有一 N型半导体 层、 一多重量子阱结构层以及一 P型半导体层, 该第一电极结构形成于该 LED外延层的 下方并与该基板的该上表面相接合, 该第二电极结构形成于该 LED外延层的上方;
其中,该多个垂直式 LED外延结构周围形成一介电层结构, 该介电层结构于选择 性的区域内向该基板方向延伸并穿越该第一电极结构而伸入该基板之中,并在该基板的该 上表面以下形成一介电层沟槽。
2.根据权利要求 1的垂直式 LED阵列元件, 其中该第一电极结构为生长该多个 LED 外延层的一外延基板晶片与一封装基板晶片经过晶片键合 (Wafer Bonding)所形成的一接 合金属层。
3.根据权利要求 1的垂直式 LED阵列元件, 其中该基板材质为硅, 厚度为 300 600 微米之间。
4.根据权利要求 2的垂直式 LED阵列元件, 其中该封装基板晶片为 6吋或 8吋或 12 吋的硅晶片。
5.根据权利要求 3的垂直式 LED阵列元件,其中该封装基板晶片为经过 IC制程后的 再生晶片或已废弃无法再回收使用于 IC制程的再生晶片。
6.根据权利要求 1的垂直式 LED阵列元件,其中该介电沟槽用以防止该多个 LED外 延结构间可能发生的漏电现象。
7.根据权利要求 1的垂直式 LED阵列元件,另包含有一导体材料层,形成于每一 LED 外延结构周围的该介电层结构上, 用以电连接该相邻 LED外延结构间的该第一电极结构 及该第二电极结构。
8.根据权利要求 1的垂直式 LED阵列元件, 另包含有:
一第三电极结构, 形成于该基板的该上表面并位于该多个 LED外延结构之外; 以及 一第四电极结构, 形成于该基板的该上表面并位于该多个 LED外延结构之外, 该第 三电极结构及该第四电极结构与该多个 LED外延结构间的该第一电极结构及该第二电极 结构之间以相互电连接而形成一电路, 其中该第三电极结构及该第四电极结构的极性相 异, 并分别用以连接一外部电源。
9.根据权利要求 8的垂直式 LED阵列元件, 其中该第三极结构及该第四电极结构上 可以另形成一焊料层, 用于利于焊接该外部电源的电极。
10.根据权利要求 8的垂直式 LED阵列元件, 其中该多个 LED外延结构之间以串联 的形式将该第一电极结构及该第二电极结构电连接,同时并与该基板的该上表面的该第三 电极结构及该第四电极结构电连接, 进而形成一串联电路。
11.根据权利要求 8的垂直式 LED阵列元件, 其中该多个 LED外延结构的该第一电 极结构电连接至该基板的该上表面的该第三电极结构, 该多个 LED外延结构的该第二电 极结构电连接至该基板的该上表面的该第四电极结构, 进而形成一并联电路。
12.根据权利要求 8的垂直式 LED阵列元件, 其中该多个 LED外延结构可以区分为 M个 LED外延结构群, 每一 LED外延结构群中的每一 LED外延结构之间以串联的形式 将该第一电极结构及该第二电极结构电连接,该 M个 LED外延结构群之间以并联的形式 电连接于该基板的该上表面的该第三电极结构及该第四电极结构,进而形成一串、并联混 合电路, 其中 M为大于一的自然数。
13.根据权利要求 1的垂直式 LED阵列元件, 其中于该 LED外延结构的上另形成一 荧光层, 用以激发白光。
14.根据权利要求 13的垂直式 LED阵列元件, 其中于该荧光层上形成一高透光率且 具低导热率的透明物质层结构。
15.根据权利要求 1的垂直式 LED阵列元件, 其中该基板另具有一下表面, 该下表面 可以用来直接接触或间接接触一导热元件或一散热元件。
16.根据权利要求 1的垂直式 LED阵列元件, 其中该多个 LED外延结构的该 LED外 延层是从另一外延基板上移转于该基板的该上表面。
17.根据权利要求 1的垂直式 LED阵列元件, 其中每一 LED外延结构可以是由多个 具有正、 负电极的微小外延结构所构成。
PCT/CN2014/076510 2014-04-29 2014-04-29 一种结合led外延结构与led封装基板为一体的垂直式led阵列元件 WO2015165048A1 (zh)

Priority Applications (3)

Application Number Priority Date Filing Date Title
PCT/CN2014/076510 WO2015165048A1 (zh) 2014-04-29 2014-04-29 一种结合led外延结构与led封装基板为一体的垂直式led阵列元件
GB1617443.5A GB2540299B (en) 2014-04-29 2014-04-29 Vertical LED array element integrating LED epitaxial structures with LED package substrate
DE112014006625.7T DE112014006625T5 (de) 2014-04-29 2014-04-29 Vertikales LED-Array-Element, das LED epitaktische Strukturen mit einem LED-Paket-Substrat integriert

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/CN2014/076510 WO2015165048A1 (zh) 2014-04-29 2014-04-29 一种结合led外延结构与led封装基板为一体的垂直式led阵列元件

Publications (1)

Publication Number Publication Date
WO2015165048A1 true WO2015165048A1 (zh) 2015-11-05

Family

ID=54358008

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2014/076510 WO2015165048A1 (zh) 2014-04-29 2014-04-29 一种结合led外延结构与led封装基板为一体的垂直式led阵列元件

Country Status (3)

Country Link
DE (1) DE112014006625T5 (zh)
GB (1) GB2540299B (zh)
WO (1) WO2015165048A1 (zh)

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20040110316A1 (en) * 2002-11-20 2004-06-10 Mitsuhiko Ogihara Semiconductor device and method of manufacturing the same
CN101615611A (zh) * 2008-07-30 2009-12-30 鹤山丽得电子实业有限公司 一种发光二极管芯片及其制备方法
CN101685841A (zh) * 2008-09-26 2010-03-31 台达电子工业股份有限公司 发光二极管芯片
US20110127554A1 (en) * 2009-12-02 2011-06-02 Samsung Electronics Co., Ltd. Light emitting device and method of manufacturing the same
CN102456775A (zh) * 2010-10-14 2012-05-16 晶元光电股份有限公司 发光元件及其制法
CN102593284A (zh) * 2012-03-05 2012-07-18 映瑞光电科技(上海)有限公司 隔离深沟槽及其高压led芯片的制造方法
CN102593275A (zh) * 2011-01-13 2012-07-18 台湾积体电路制造股份有限公司 制作发光二极管封装结构的方法以及发光二极管元件
CN103415935A (zh) * 2011-03-14 2013-11-27 皇家飞利浦有限公司 具有重新分布用于倒装芯片安装的垂直接触件的led

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20040110316A1 (en) * 2002-11-20 2004-06-10 Mitsuhiko Ogihara Semiconductor device and method of manufacturing the same
CN101615611A (zh) * 2008-07-30 2009-12-30 鹤山丽得电子实业有限公司 一种发光二极管芯片及其制备方法
CN101685841A (zh) * 2008-09-26 2010-03-31 台达电子工业股份有限公司 发光二极管芯片
US20110127554A1 (en) * 2009-12-02 2011-06-02 Samsung Electronics Co., Ltd. Light emitting device and method of manufacturing the same
CN102456775A (zh) * 2010-10-14 2012-05-16 晶元光电股份有限公司 发光元件及其制法
CN102593275A (zh) * 2011-01-13 2012-07-18 台湾积体电路制造股份有限公司 制作发光二极管封装结构的方法以及发光二极管元件
CN103415935A (zh) * 2011-03-14 2013-11-27 皇家飞利浦有限公司 具有重新分布用于倒装芯片安装的垂直接触件的led
CN102593284A (zh) * 2012-03-05 2012-07-18 映瑞光电科技(上海)有限公司 隔离深沟槽及其高压led芯片的制造方法

Also Published As

Publication number Publication date
DE112014006625T5 (de) 2017-02-09
GB2540299B (en) 2018-04-11
GB201617443D0 (en) 2016-11-30
GB2540299A (en) 2017-01-11

Similar Documents

Publication Publication Date Title
TW535307B (en) Package of light emitting diode with protective diode
US10497745B2 (en) Light-emitting diode device
TWI614920B (zh) 光電元件及其製造方法
TWI414088B (zh) 發光元件及其製造方法
JP5237566B2 (ja) 発光素子パッケージ及びその製造方法
KR100928259B1 (ko) 발광 장치 및 그 제조방법
TWI535077B (zh) 發光單元及其發光模組
WO2012012976A1 (zh) 一种硅基板集成有功能电路的led表面贴装结构及其封装方法
US8278681B2 (en) Light-emitting diode package and wafer-level packaging process of light-emitting diode
JP2021500735A (ja) 発光素子パッケージ及びこれを含む照明装置
TW201133930A (en) Improved multi-junction LED
CN102723423B (zh) 大功率白光led器件无金线双面出光的封装方法及封装结构
WO2016197966A1 (zh) 一种具备散热特性的高光效垂直led结构芯片及其制作方法
TW201330337A (zh) 發光二極體晶片之結構、發光二極體封裝基板之結構、發光二極體封裝結構及其製法
TWI506818B (zh) 發光模組及交流發光裝置
TW202005122A (zh) 發光晶粒、封裝結構及其相關製造方法
TW201442283A (zh) 發光二極體裝置及其製作方法
WO2015074353A1 (zh) 一种半导体发光二极管芯片
KR101163491B1 (ko) 발광 소자 패키지
CN105023932B (zh) 一种结合led外延结构与led封装基板为一体的垂直式led阵列元件
US20140183569A1 (en) Led chip unit and manufacturing method thereof, and led module
TW201244056A (en) Light emitting diode module package structure
WO2015165048A1 (zh) 一种结合led外延结构与led封装基板为一体的垂直式led阵列元件
TWI360893B (en) Light emitting diode chip and method for fabricati
TWI411145B (zh) High heat dissipation stacking / cladding type light emitting diodes

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 14890720

Country of ref document: EP

Kind code of ref document: A1

ENP Entry into the national phase

Ref document number: 201617443

Country of ref document: GB

Kind code of ref document: A

Free format text: PCT FILING DATE = 20140429

WWE Wipo information: entry into national phase

Ref document number: 1617443.5

Country of ref document: GB

WWE Wipo information: entry into national phase

Ref document number: 112014006625

Country of ref document: DE

122 Ep: pct application non-entry in european phase

Ref document number: 14890720

Country of ref document: EP

Kind code of ref document: A1