WO2016177251A1 - 一种干刻蚀方法 - Google Patents

一种干刻蚀方法 Download PDF

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WO2016177251A1
WO2016177251A1 PCT/CN2016/078687 CN2016078687W WO2016177251A1 WO 2016177251 A1 WO2016177251 A1 WO 2016177251A1 CN 2016078687 W CN2016078687 W CN 2016078687W WO 2016177251 A1 WO2016177251 A1 WO 2016177251A1
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etching
predetermined
gas
dry etching
chamber
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PCT/CN2016/078687
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English (en)
French (fr)
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马应海
李良坚
左岳平
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京东方科技集团股份有限公司
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Priority to US15/546,475 priority Critical patent/US10468266B2/en
Publication of WO2016177251A1 publication Critical patent/WO2016177251A1/zh

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/3065—Plasma etching; Reactive-ion etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31105—Etching inorganic layers
    • H01L21/31111—Etching inorganic layers by chemical means
    • H01L21/31116—Etching inorganic layers by chemical means by dry-etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32—Gas-filled discharge tubes
    • H01J37/32431—Constructional details of the reactor
    • H01J37/3244—Gas supply means
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32—Gas-filled discharge tubes
    • H01J37/32431—Constructional details of the reactor
    • H01J37/32798—Further details of plasma apparatus not provided for in groups H01J37/3244 - H01J37/32788; special provisions for cleaning or maintenance of the apparatus
    • H01J37/32853—Hygiene
    • H01J37/32871—Means for trapping or directing unwanted particles
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/3065—Plasma etching; Reactive-ion etching
    • H01L21/30655—Plasma etching; Reactive-ion etching comprising alternated and repeated etching and passivation steps, e.g. Bosch process
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
    • H01L21/76805—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics the opening being a via or contact hole penetrating the underlying conductor
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F2202/00—Materials and properties
    • G02F2202/10—Materials and properties semiconductor
    • G02F2202/104—Materials and properties semiconductor poly-Si
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J2237/00—Discharge tubes exposing object to beam, e.g. for analysis treatment, etching, imaging
    • H01J2237/32—Processing objects by plasma generation
    • H01J2237/33—Processing objects by plasma generation characterised by the type of processing
    • H01J2237/334—Etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J2237/00—Discharge tubes exposing object to beam, e.g. for analysis treatment, etching, imaging
    • H01J2237/32—Processing objects by plasma generation
    • H01J2237/33—Processing objects by plasma generation characterised by the type of processing
    • H01J2237/334—Etching
    • H01J2237/3343—Problems associated with etching
    • H01J2237/3347—Problems associated with etching bottom of holes or trenches
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259—Multistep manufacturing methods

Definitions

  • the present disclosure relates to a dry etching method and belongs to the technical field of semiconductor processes.
  • Dry etching is a technique of performing thin film etching using plasma.
  • a gas exists in the form of a plasma, it has two characteristics: on the one hand, the chemical activity of these gases in the plasma is much stronger than in the normal state, and depending on the material to be etched, the selection of a suitable gas can be faster. Reacting with the material to achieve the purpose of etching removal; on the other hand, the electric field can be used to guide and accelerate the plasma to have a certain energy, and when it bombards the surface of the object to be etched, it will be etched. The atoms of the material are shot out to achieve the purpose of etching using physical energy transfer.
  • dry etching is the result of a balance between physical and chemical processes on the wafer surface.
  • the dry etching method is: using a glow discharge of a specific gas (or a mixed gas) having a gas pressure of 10 to 1000 Pa to generate a molecular or molecular group capable of undergoing an ionic chemical reaction with a film, and the resulting reaction product is volatile. of. It is evacuated in a low pressure vacuum chamber to effect etching.
  • the present disclosure is capable of reducing the microetching effect during dry etching.
  • the present disclosure provides a dry etching method comprising:
  • At least two etching steps a step of adding a plasma to the etching chamber between any two adjacent etching steps performed sequentially, wherein the plasma neutralizes electrons accumulated on the sidewalls of the photoresist.
  • the step of adding a plasma comprises: adding a shielding gas; and processing the shielding gas to generate the plasma.
  • the method further includes the step of removing the etching gas in the etching chamber before the step of adding the plasma.
  • the step of removing and removing the etching gas in the etching chamber comprises: setting the source power or the bias voltage to zero, and introducing the shielding gas for a predetermined time according to the predetermined pressure and the predetermined flow rate.
  • the predetermined pressure is 50 mt
  • the predetermined flow rate is 1000 sccm
  • the predetermined time is 10 s.
  • the method further includes the step of removing the shielding gas in the etching chamber after the step of adding the plasma.
  • the step of removing the shielding gas in the etching chamber comprises: setting the source power or the bias voltage to zero, and introducing a predetermined amount of the etching gas according to the predetermined pressure.
  • the etch chamber pressure and the etch gas flow/flow rate are the same as the next etch step.
  • the etching gas is introduced for 10 seconds.
  • the step of adding plasma into the etch chamber includes: setting a predetermined chamber pressure, a predetermined source power, a predetermined bias voltage, and introducing a shielding gas at a predetermined flow rate for a predetermined time.
  • the predetermined chamber pressure is 50 mt
  • the predetermined source power is 500 w
  • the predetermined bias voltage is 0 w
  • the predetermined flow rate is 1000 sccm
  • the predetermined time is 10-20 s.
  • the two adjacent etching steps include a main etching step and an over etching step;
  • the step of the main etching step and the over etching step includes adding a shielding gas to the etching chamber for processing.
  • the shielding gas is hydrogen
  • the dry etching method provided by the present disclosure adds hydrogen plasma treatment during the etching process to remove electrons accumulated on the sidewalls of the etching trench to reduce the micro-etching effect when performing multiple etching steps, thereby improving the display substrate. Process stability and reliability.
  • FIG. 1 is a schematic view showing the effect of microetching by dry etching in the prior art
  • FIG. 2 is a schematic flow chart of a dry etching method of the present disclosure
  • FIG. 3 is a schematic diagram of the dry etching avoidance microetching effect of the present disclosure.
  • the present disclosure provides a dry etching method, the method comprising: at least two etching steps; further comprising: adding a shielding gas to the etching chamber for processing between any two adjacent etching steps performed successively; And the step of causing the shielding gas to generate plasma in the step to neutralize electrons accumulated on the sidewalls of the etched trench.
  • the method further includes adding a shielding gas into the etching cavity and generating plasma to neutralize electrons accumulated on the sidewalls of the etching trench, thereby The micro-etching is avoided or reduced in the post-etching step due to the electrons accumulated in the previous etching step during the multiple etching.
  • the step of adding a shielding gas may be applied between any two adjacent etching steps, and the two adjacent etching steps are for completing an etching process;
  • the dry etch can be an etch via or other etch.
  • the dry etching method provided by the present disclosure will be described in detail below by taking a step of etching a via hole and adding a shielding gas between the main etching and the over etching.
  • the etch via includes an S1 main etch step and an S3 over etch step.
  • the main etch is generally used to etch most of the layer to be etched to obtain a desired etched trench sidewall profile; and the over etch is used to remove the etch residue and the remaining layer to be etched.
  • a portion of the next layer of the layer to be etched is generally etched away.
  • the main etching and the over etching further include a step S2 of adding a shielding gas to the etching chamber for processing, wherein the protective gas generates plasma to neutralize the etching trench (ie, via) side in the step S2. Electrons accumulated on the wall.
  • the etching gas in the etching chamber is removed, the source power or the bias voltage is set to zero, and the shielding gas is introduced for a predetermined time according to the predetermined pressure and the predetermined flow rate. As the shielding gas is introduced, the etching gas in the etching chamber is discharged by the shielding gas.
  • the predetermined pressure is 50 mt when the etching gas is purged, the predetermined flow rate is 1000 sccm, and the predetermined time is 10 s.
  • the shielding gas is hydrogen. It is of course to be understood that the present disclosure is not limited thereto, and other gases capable of generating ions in the etch chamber and absorbing electrons accumulated on the sidewalls of the etched trenches can still implement the present disclosure, and are not listed here. .
  • the following is a detailed description of the steps of adding a shielding gas to the etching chamber by using hydrogen as a protective gas.
  • the predetermined chamber pressure, the predetermined source power, the predetermined bias voltage are set, and the shielding gas (hydrogen gas) is supplied for a predetermined time at a predetermined flow rate.
  • Hydrogen generates particles and electrons under predetermined conditions as shown in formula (1):
  • the ions generated after the hydrogen ionization neutralize the electrons accumulated on the sidewalls of the etching trench to generate hydrogen gas, as shown in the formula (2).
  • the conditions for adding the shielding gas to the etching chamber are as follows: the predetermined chamber pressure is 50 mt, the predetermined source power is 500 w, the predetermined bias voltage is 0 w, the predetermined flow rate is 1000 sccm, and the predetermined time is 10-20 s. .
  • a protective gas is added to the etching chamber for treatment. It is necessary to remove the hydrogen in the etching chamber.
  • the source power or the bias voltage is set to zero, and a predetermined amount of etching gas is introduced at a predetermined pressure.
  • the etching gas is introduced, the shielding gas in the etching chamber is exhausted by the etching gas.
  • the protective body is removed, the pressure in the etching chamber and the flow/flow rate of the etching gas are passed to the next step.
  • the etching step is the same, and the etching gas introduction time can be 10 s.
  • the following description is made by etching a via hole by a dry etching method provided by the present disclosure.
  • a main etching is used to etch most of the insulating layer under the missing portion of the photoresist layer 1. 3.
  • the metal layer 4 is not damaged (e.g., etched to the dotted line of Figure 3) to obtain a desired etched trench sidewall profile.
  • the etching gas in the etching chamber is removed.
  • the set pressure is 50 mt
  • the predetermined flow rate is 1000 sccm
  • 10 s of hydrogen is introduced.
  • the hydrogen gas is introduced, the etching gas in the etching chamber is discharged by the hydrogen gas.
  • a certain amount of hydrogen is then added to the etch chamber.
  • the chamber pressure is set to 50 mt
  • the source power is 500 W
  • the bias voltage is 0 w
  • the flow rate is 1000 sccm
  • the pass time is 10-20 s.
  • the source power or the bias voltage is set to zero, and an etching process (ie, over-etching) is pressed to set the pressure, and a predetermined amount of etching gas is introduced.
  • etching gas is introduced, the hydrogen gas in the etching chamber is exhausted by the etching gas.
  • etching is performed to remove the etching residue and the remaining insulating layer 3, ensuring that the via holes reach the metal layer 4.
  • etching is performed twice, but the present invention is not limited to performing only two etchings, and an appropriate number of etchings may be performed according to actual needs.
  • the dry etching method provided by the present disclosure adds plasma (for example, hydrogen plasma) treatment during etching to remove electrons accumulated in the photoresist layer 1 to reduce micro-etching effect, and is suitable for via holes.
  • plasma for example, hydrogen plasma
  • the etching improves the process stability and reliability of the display substrate.

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Abstract

一种干刻蚀方法，包括：至少两次刻蚀步骤；在先后进行的任两次相邻的刻蚀步骤之间还包括在刻蚀腔内加入氢保护气体进行处理的步骤，使氢保护气体产生等离子以中和刻蚀沟槽侧壁上累积的电子，以减小进行多次刻蚀步骤时的微刻蚀效应，提高了显示基板的工艺稳定性和可靠性。

Description

一种干刻蚀方法
相关申请的交叉引用
本申请要求于2015年05月06日递交的中国专利申请第201510226706.4号的优先权，在此全文引用上述中国专利申请公开的内容以作为本申请的一部分。
技术领域
本公开文本涉及一种干刻蚀方法，属于半导体工艺技术领域。
背景技术
干刻蚀(或称作干法刻蚀)是用等离子体进行薄膜刻蚀的技术。当气体以等离子体形式存在时，它具备两个特点：一方面等离子体中的这些气体化学活性比常态下时要强很多，根据被刻蚀材料的不同，选择合适的气体，就可以更快地与材料进行反应，实现刻蚀去除的目的；另一方面，还可以利用电场对等离子体进行引导和加速，使其具备一定能量，当其轰击被刻蚀物的表面时，会将被刻蚀物材料的原子击出，从而达到利用物理上的能量转移来实现刻蚀的目的。因此，干法刻蚀是晶圆片表面物理和化学两种过程平衡的结果。一般干刻蚀的方法为：利用气压为10～1000帕的特定气体(或混合气体)的辉光放电，产生能与薄膜发生离子化学反应的分子或分子基团，生成的反应产物是挥发性的。它在低气压的真空室中被抽走，从而实现刻蚀。
目前，低温多晶硅薄膜晶体管列阵基板的制备的深过孔等离子体刻蚀过程中，由于刻蚀腔内等离子体分布的不均匀性，会导致基板局部地区会有正/负电荷的累积。且由于等离子体鞘层的存在使得离子和电子分布的不同，电子集聚在刻蚀沟槽侧壁，而离子集聚在沟槽底部。如图1所示，为了在绝缘层3刻蚀出到达金属层4的过孔，在刻蚀过程中，由于刻蚀气体中的正离子受到刻蚀沟槽侧壁累积的电子的影响导致物理刻蚀的方向发生改 变，出现一些微刻蚀2，其中1为光阻层，5为缓冲层，6为衬底。这些微刻蚀会造成液晶面板的稳定性和可靠性降低。
发明内容
本公开文本能够减小干刻蚀时的微刻蚀效应。
本公开文本提供了一种干刻蚀方法，包括：
至少两次刻蚀步骤；在先后进行的任两次相邻的刻蚀步骤之间，在刻蚀腔内加入等离子的步骤，其中所述等离子以中和光阻侧壁上累积的电子。
其中，在一个实施例中，所述加入等离子的步骤包括：加入保护气体；对所述保护气体进行处理以产生所述等离子。
其中在一个实施例中，所述方法进一步包括，在所述加入等离子的步骤之前，清除所述刻蚀腔内刻蚀气体的步骤。
其中在一个实施例中，所述清除清除刻蚀腔内刻蚀气体的步骤包括：设置源功率或偏压为零，按预定压力、预定流速在预定时间内通入保护气体。
其中在一个实施例中，所述预定压力为50mt，所述预定流速为1000sccm，所述预定时间为10s。
其中在一个实施例中，所述方法进一步包括，在所述加入等离子的步骤之后还包括，清除刻蚀腔内保护气体的步骤。
其中在一个实施例中，所述清除刻蚀腔内保护气体的步骤包括：设置源功率或偏压为零，按预定压力通入预定量的蚀刻气体。
其中在一个实施例中，所述刻蚀腔压力及通入刻蚀气体气流/流量与下一刻蚀步骤相同。
其中在一个实施例中，所述蚀刻气体通入时间为10s。
其中在一个实施例中，所述在刻蚀腔内加入等离子的步骤包括：设置预定腔室压力、预定源功率、预定偏压，以预定流速在预定时间内通入保护气体。
其中在一个实施例中，所述预定腔室压力为50mt，所述预定源功率为500w，所述预定偏压为0w，所述预定流速为1000sccm，预定时间为10-20s。
其中在一个实施例中，所述两次相邻的刻蚀步骤包括主刻蚀步骤和过刻蚀步骤；
所述主刻蚀步骤和过刻蚀步骤之间包括在刻蚀腔内加入保护气体进行处理的步骤。
其中在一个实施例中，所述保护气体是氢气。
本公开文本提供的干刻蚀方法，在刻蚀过程中加入氢气等离子处理，去除刻蚀沟槽侧壁累积的电子以减小进行多次刻蚀步骤时的微刻蚀效应，提高了显示基板的工艺稳定性和可靠性。
附图说明
图1是现有技术干刻蚀生产生微刻蚀效应示意图；
图2是本公开文本干刻蚀方法流程示意图；
图3是本公开文本干刻蚀避免微刻蚀效应示意图。
具体实施方式
为使本公开实施例的目的、技术方案和优点更加清楚，下面结合附图和实施例，对本公开文本的具体实施方式作进一步详细描述。以下实施例用于说明本公开文本，但不用来限制本公开文本的范围。基于所描述的本公开的实施例，本领域普通技术人员所获得的所有其他实施例，都属于本公开保护的范围。
除非另作定义，此处使用的技术术语或者科学术语应当为本公开所属领域内具有一般技能的人士所理解的通常意义。本公开专利申请说明书以及权利要求书中使用的“第一”、“第二”以及类似的词语并不表示任何顺序、数量或者重要性，而只是用来区分不同的组成部分。同样，“一个”或者“一”等类似词语也不表示数量限制，而是表示存在至少一个。“连接”或者“相连”等类似的词语并非限定于物理的或者机械的连接，而是 可以包括电性的连接，不管是直接的还是间接的。“上”、“下”、“左”、“右”等仅用于表示相对位置关系，当被描述对象的绝对位置改变后，则该相对位置关系也相应地改变。
本公开文本提供了一种干刻蚀方法，该方法包括：至少两次刻蚀步骤；在先后进行的任两次相邻的刻蚀步骤之间还包括在刻蚀腔内加入保护气体进行处理的步骤，其中在该步骤中使所述保护气体产生等离子以中和刻蚀沟槽侧壁上累积的电子。由于在先后进行的任两次相邻的刻蚀步骤之间还包括在刻蚀腔内加入保护气体并使所述保护气体产生等离子以中和刻蚀沟槽侧壁上累积的电子，因此可以消除多次刻蚀时由于在先刻蚀步骤累积的电子而使得在后刻蚀步骤避免或减小产生微刻蚀。
应该理解：在本公开文本中，加入保护气体的步骤可以加在任意两次相邻的刻蚀步骤之间，两次相邻的刻蚀步骤都是为了完成一个刻蚀过程；本公开文本的干刻蚀可以是刻蚀过孔或进行其他刻蚀。为了便于理解，下面以刻蚀过孔且在主刻蚀和过刻蚀之间加入保护气体的步骤为例对本公开文本提供的干刻蚀方法展开详细说明。
如图2所示，刻蚀过孔包括S1主刻蚀步骤和S3过刻蚀步骤。应该理解，主刻蚀，一般用来刻蚀大部分的待刻蚀层，获得理想的刻蚀沟槽侧壁剖面；而过刻蚀，用于去除刻蚀残留物和剩余的待刻蚀层，为了达到贯通，一般会刻蚀掉待刻蚀层的下一层的一部分。主刻蚀与过刻蚀之间，还包括在刻蚀腔内加入保护气体进行处理的步骤S2，其中在该步骤S2中使保护气体产生等离子以中和刻蚀沟槽(即过孔)侧壁上累积的电子。由此，由于主刻蚀时在过孔侧壁上累积的电子被保护气体产生的等离子中和，从而可以避免或减缓在过刻蚀时产生如图1的微刻蚀。下面对本公开文本提供的干刻蚀方法展开详细的说明。
在本公开文本中，由于刻蚀过程中会用到氧气等活性气体，为了避免加入保护气体后和氧气混合产生危险(例如爆炸)。优选在加入保护气体之前需要将刻蚀腔内的刻蚀气体清除掉。清除刻蚀腔内刻蚀气体时，设置源功率或偏压为零，按预定压力、预定流速在预定时间内通入保护气体。 随着保护气体的通入，在刻蚀腔内的刻蚀气会被保护气体排出。在一个实施例中，在清除刻蚀气体时预定压力为50mt，预定流速为1000sccm，预定时间为10s。
在刻蚀过程中向刻蚀腔内加入一定量的保护气体，保护气体在一定条件下(例如通过加电)生成一定的等离子。该等离子中和刻蚀沟槽侧壁上累积的电子。使刻蚀沟槽侧壁上累积的电子去除。可以有效避免微刻蚀效应，提高显示基板的稳定性和可靠性。在本公开文本的一个实施例中，保护气体是氢气。当然可以理解，本公开文本不仅限于此，其它能在刻蚀腔内产生等离子中和刻蚀沟槽侧壁上累积的电子的气体仍然可以实现本公开文本，在此就不再一一列举了。下面以氢气为保护气体的示例性方案，对刻蚀腔内加入保护气体进行处理的步骤详细说明。设置预定腔室压力、预定源功率、预定偏压，以预定流速在预定时间内通入保护气体(氢气)。氢气在预定条件下产生粒子和电子如式(1)所示：
H2→2H++2e-               (1)
氢气离子化后产生的离子中和刻蚀沟槽侧壁上累积的电子生成氢气，如式(2)所示。
2H++2e-→H2                    (2)
向刻蚀腔内通入一定量的氢气后，刻蚀沟槽侧壁上累积的电子被离子化后的氢气粒子中和。在一个实施例中，对刻蚀腔内加入保护气体进行处理的条件如下：预定腔室压力为50mt，预定源功率为500w，预定偏压为0w，预定流速为1000sccm，预定时间为10-20s。
由于刻蚀过程中会用到氧气，为了避免加入刻蚀气体后和已经在刻蚀腔内的保护气体混合产生危险的化学反应(例如爆炸)，在刻蚀腔内加入保护气体进行处理之后还需要将刻蚀腔内的氢气清除。清除刻蚀腔内保护气体时，设置源功率或偏压为零，按预定压力通入预定量的蚀刻气体。随着刻蚀气体的通入，在刻蚀腔内的保护气会被刻蚀气体排出。在一个实施例中，在清除保护体时，刻蚀腔内的压力及通入刻蚀气体气流/流量与下一 刻蚀步骤相同，蚀刻气体通入时间可以为10s。
如图3所示，下面以本公开文本提供的干刻蚀方法刻蚀形成过孔为例具体说明，首先采用主刻蚀，用来刻蚀光阻层1缺失部分下的大部分的绝缘层3，并不损伤金属层4(例如刻蚀到图3的虚线所示处)，获得理想的刻蚀沟槽侧壁剖面。然后，清除刻蚀腔内的刻蚀气体。在一个实施例中，设置压力为50mt，预定流速为1000sccm，通入10s的氢气。随着氢气的通入，在刻蚀腔内的刻蚀气会被氢气排出。然后向刻蚀腔内加入一定量的氢气。在一个实施例中，设置腔室压力为50mt，源功率为500w，偏压为0w，流速为1000sccm，通入时间为10-20s。向刻蚀腔内通入一定量的氢气后，氢气在一定条件下(例如通过加电)生成一定的等离子。刻蚀沟槽侧壁上累积的电子被离子化后的氢气粒子中和。为了防止残留的氢气和过刻蚀通入的刻蚀气体中的例如为氧气的活跃气体反应，在刻蚀腔内加入氢气进行处理之后还需要将刻蚀腔内的氢气清除。清除刻蚀腔内的氢气时，设置源功率或偏压为零，按下一个刻蚀程序(即过刻蚀)设定压力，通入预定量的蚀刻气体。随着刻蚀气体的通入，在刻蚀腔内的氢气会被刻蚀气体排出。最后再执行过刻蚀，以去除刻蚀残留物和剩余绝缘层3，确保过孔到达金属层4。通过上述方法，由于氢气中的等离子中和了刻蚀沟槽侧壁上的电子，因此不会产生微刻蚀。
需要指出，在本公开文本的一个实施例中，进行了两次刻蚀，但本发明不限制于仅进行两次刻蚀，可根据实际需要，进行恰当次数的刻蚀。
综上所述，本公开文本提供的干刻蚀方法，在刻蚀过程中加入等离子(例如，氢气等离子)处理，去除光阻层1累积的电子以减小微刻蚀效应，适用于过孔的刻蚀，提高了显示基板的工艺稳定性和可靠性。
以上实施方式仅用于说明本公开文本，而并非对本公开文本的限制，有关技术领域的普通技术人员，在不脱离本公开文本的精神和范围的情况下，还可以做出各种变化和变型，因此所有等同的技术方案也属于本公开文本的范畴，本公开文本的专利保护范围应由权利要求限定。

Claims (13)

  1. 一种干刻蚀方法，包括：
    至少两次刻蚀的步骤；
    在先后进行的任两次相邻的刻蚀步骤之间，在刻蚀腔内加入等离子的步骤，其中所述等离子以中和刻蚀沟槽侧壁上累积的电子。
  2. 如权利要求1所述的干刻蚀方法，其中所述加入等离子的步骤包括：
    加入保护气体；
    对所述保护气体进行处理以产生所述等离子。
  3. 如权利要求2所述的干刻蚀方法，其中，所述方法进一步包括，在所述加入等离子的步骤之前，清除所述刻蚀腔内刻蚀气体的步骤。
  4. 如权利要求3所述的干刻蚀方法，其中，所述清除清除刻蚀腔内刻蚀气体的步骤包括：设置源功率或偏压为零，按预定压力、预定流速在预定时间内通入保护气体。
  5. 如权利要求4所述的干刻蚀方法，其中，所述预定压力为50mt，所述预定流速为1000sccm，所述预定时间为10s。
  6. 如权利要求2所述的干刻蚀方法，其中，所述方法进一步包，在所述加入等离子的步骤之后，清除刻蚀腔内保护气体的步骤。
  7. 如权利要求6所述的干刻蚀方法，其中，所述清除刻蚀腔内保护气体的步骤包括：设置源功率或偏压为零，按预定压力通入预定量的蚀刻气体。
  8. 如权利要求7所述的干刻蚀方法，其中，刻蚀腔压力及通入刻蚀气体气流/流量与下一刻蚀步骤相同。
  9. 如权利要求8所述的干刻蚀方法，其中，所述蚀刻气体通入时间为10s。
  10. 如权利要求2所述的干刻蚀方法，其中，所述在刻蚀腔内加入等离子的步骤包括：设置预定腔室压力、预定源功率、预定偏压，以预定流速在预定时间内通入保护气体。
  11. 如权利要求10所述的干刻蚀方法，其中：
    所述预定腔室压力为50mt，所述预定源功率为500w，所述预定偏压为0w，所述预定流速为1000sccm，预定时间为10-20s。
  12. 如权利要求1所述的干刻蚀方法，其中，所述两次相邻的刻蚀步骤包括主刻蚀步骤和过刻蚀步骤；
    所述主刻蚀步骤和过刻蚀步骤之间包括在刻蚀腔内加入保护气体进行处理的步骤。
  13. 如权利要求2-12任意一项所述的干刻蚀方法，其中，所述保护气体是氢气。
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