WO2016161875A1 - 薄膜晶体管阵列基板、液晶显示面板及显示装置 - Google Patents

薄膜晶体管阵列基板、液晶显示面板及显示装置 Download PDF

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WO2016161875A1
WO2016161875A1 PCT/CN2016/076439 CN2016076439W WO2016161875A1 WO 2016161875 A1 WO2016161875 A1 WO 2016161875A1 CN 2016076439 W CN2016076439 W CN 2016076439W WO 2016161875 A1 WO2016161875 A1 WO 2016161875A1
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Prior art keywords
common electrode
sub
thin film
film transistor
array substrate
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PCT/CN2016/076439
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English (en)
French (fr)
Inventor
王骁
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BOE Technology Group Co Ltd
Beijing BOE Display Technology Co Ltd
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BOE Technology Group Co Ltd
Beijing BOE Display Technology Co Ltd
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Priority to US15/325,055 priority Critical patent/US20170160604A1/en
Publication of WO2016161875A1 publication Critical patent/WO2016161875A1/zh
Anticipated expiration legal-status Critical
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    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G02F1/134309—Electrodes characterised by their geometrical arrangement
    • G02F1/134336—Matrix
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G02F1/134309—Electrodes characterised by their geometrical arrangement
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136286—Wiring, e.g. gate line, drain line
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136213—Storage capacitors associated with the pixel electrode
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G02F1/134309—Electrodes characterised by their geometrical arrangement
    • G02F1/134345—Subdivided pixels, e.g. for grey scale or redundancy
    • G02F1/134354—Subdivided pixels, e.g. for grey scale or redundancy the sub-pixels being capacitively coupled
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F2201/00—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00
    • G02F2201/12—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode
    • G02F2201/121—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode common or background
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0421—Structural details of the set of electrodes
    • G09G2300/0426—Layout of electrodes and connections
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0439—Pixel structures
    • G09G2300/0465—Improved aperture ratio, e.g. by size reduction of the pixel circuit, e.g. for improving the pixel density or the maximum displayable luminance or brightness
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0209—Crosstalk reduction, i.e. to reduce direct or indirect influences of signals directed to a certain pixel of the displayed image on other pixels of said image, inclusive of influences affecting pixels in different frames or fields or sub-images which constitute a same image, e.g. left and right images of a stereoscopic display
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0219—Reducing feedthrough effects in active matrix panels, i.e. voltage changes on the scan electrode influencing the pixel voltage due to capacitive coupling
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0223—Compensation for problems related to R-C delay and attenuation in electrodes of matrix panels, e.g. in gate electrodes or on-substrate video signal electrodes

Definitions

  • the present invention relates to the field of display technologies, and in particular to a thin film transistor array substrate, a liquid crystal display panel, and a display device.
  • liquid crystal display devices have replaced traditional cathode ray tube displays in many electronic products because of their advantages of thinness, power saving, and no radiation.
  • a Thin Film Transistor (TFT) array substrate of a conventional liquid crystal display panel has a plurality of gate signal lines and a plurality of data signal lines, wherein any two adjacent gate signal lines and any two adjacent data lines
  • the area enclosed by the signal lines is one sub-pixel unit, and each sub-pixel unit has a corresponding pixel electrode and a common electrode.
  • the voltage of the pixel electrode is controlled by changing the electric signal loaded on the gate signal line and the data signal line, and a direct current voltage is applied to the common electrode through the common electrode line to generate an electric field between the two to control the liquid crystal.
  • Flip to achieve display.
  • the display The load on the panel is relatively large.
  • the polarity of the signal on the data signal line changes, a coupling phenomenon between the signal on the common electrode and the signal on the data signal line occurs, so that the DC voltage on the common electrode generates a large fluctuation, as shown in FIG.
  • the greater the fluctuation of the DC voltage on the common electrode the easier it is to make the screen of the LCD screen green, which is what we often call the Greenish phenomenon. Especially as the size of the LCD screen increases, the Greenish phenomenon will become more serious.
  • embodiments of the present invention provide a thin film transistor array substrate, a liquid crystal display panel, and a display device for improving the Greenish phenomenon of the liquid crystal display panel.
  • an embodiment of the present invention provides a thin film transistor array substrate, including: a substrate, a common electrode disposed on the substrate, and a plurality of sub-arrays arranged in a matrix a unit cell having two gate signal lines between any adjacent two rows of sub-pixel units, and any adjacent two columns of sub-pixel units being a set of sub-pixel unit columns, each group of said sub-pixel units The column shares a data signal line between two columns of sub-pixel units; the thin film transistor array substrate further includes: at least one connected to a low level potential disposed at a gap between adjacent sub-pixel unit columns a metal wire, wherein a projection of the metal line on the substrate substrate and a projection of the common electrode on the substrate substrate have overlapping regions.
  • the metal line is connected to a ground point on an external printed circuit board (PCB).
  • PCB printed circuit board
  • the metal line is disposed in the same layer as the data signal line; and the common electrode is the same as the gate signal line Layer settings.
  • the thin film transistor array substrate provided by the embodiment of the present invention includes, in addition to the disposed metal lines, at least a gap disposed between adjacent sub-pixel unit columns.
  • the vertical common electrode line is disposed in the same layer as the data signal line.
  • the pixel electrode in the thin film transistor array substrate is located above the common electrode, and the common electrode is in each sub-pixel
  • the position corresponding to the opening area of the unit has a plate-like structure.
  • the pixel electrode in the thin film transistor array substrate is located under the common electrode, and the common electrode is in each sub-pixel
  • the position corresponding to the opening area of the unit has a slit shape or a mesh structure.
  • the embodiment of the invention further provides a liquid crystal display panel comprising the above-mentioned thin film transistor array substrate provided by the embodiment of the invention.
  • the embodiment of the invention further provides a display device, which comprises the above liquid crystal display panel provided by the embodiment of the invention.
  • Embodiments of the present invention provide a thin film transistor array substrate, a liquid crystal display panel, and a display device, the thin film transistor array substrate comprising: a substrate substrate, a common electrode disposed on the substrate substrate, and a plurality of sub-pixel units arranged in a matrix, wherein there are two between adjacent two rows of sub-pixel units a gate signal line, and the adjacent two columns of sub-pixel units are a set of sub-pixel unit columns, each set of sub-pixel unit columns sharing a data signal line between the two columns of sub-pixel units; the thin film transistor array substrate Also included is at least one metal line connected to a low-level potential at a gap between adjacent sets of sub-pixel unit columns, wherein the projection of the metal line on the substrate substrate and the projection of the common electrode on the substrate substrate have Stacked area.
  • a filter capacitor is formed between the metal line and the common electrode in the overlap region, so that the signal on the common electrode can be filtered, and the signal on the data signal line and the signal coupling on the common electrode are reduced, so that the common electrode is on the common electrode.
  • the signal tends to be stable. Therefore, the phenomenon of Greenish is effectively improved and the picture quality of the display panel is improved.
  • the metal wires are disposed at positions at the gaps between adjacent groups of sub-pixel unit columns, it does not occupy the aperture ratio.
  • FIG. 1 is a schematic diagram of voltage fluctuations of a common electrode in the prior art
  • FIG. 2 is a schematic structural diagram of a thin film transistor array substrate according to an embodiment of the present invention.
  • FIG. 3 is an equivalent circuit diagram of a filter capacitor according to an embodiment of the present invention.
  • FIG. 4 is a second schematic structural diagram of a thin film transistor array substrate according to an embodiment of the present invention.
  • FIG. 5 is a circuit diagram of capacitance filtering of a thin film transistor array substrate according to an embodiment of the present invention.
  • FIG. 6 is a schematic diagram of voltage fluctuations of a filtered common electrode according to an embodiment of the present invention.
  • An embodiment of the present invention provides a thin film transistor array substrate, as shown in FIG. 2, comprising: a substrate, a common electrode disposed on the substrate, and a plurality of sub-arrays arranged in a matrix a pixel unit having two gate signal lines 001 between any adjacent two rows of sub-pixel units, and any adjacent two columns of sub-pixel units as a group of sub-pixel unit columns, each group of sub-pixel unit columns Sharing a data signal line 002 between two columns of sub-pixel units; the thin film transistor array substrate further comprising: at least one metal line connected to a low-level potential disposed at a gap between adjacent groups of sub-pixel unit columns 003, wherein the projection of the metal line 003 on the substrate substrate and the projection of the common electrode on the substrate substrate have overlapping regions.
  • the projection of the metal line connected to the low-level potential on the substrate substrate and the projection of the common electrode on the substrate substrate have overlapping regions, in the overlapping region A filter capacitor is formed between the inner metal line and the common electrode.
  • the filter capacitor can filter the signal on the common electrode to reduce the signal coupling on the signal signal line and the common electrode, so that the signal on the common electrode tends to be stable. This effectively improves the Greenish phenomenon and improves the picture quality of the display panel.
  • the metal wires are disposed at positions at the gaps between adjacent groups of sub-pixel unit columns, it does not occupy the aperture ratio.
  • the metal line in order to enable the filter capacitor formed between the metal line connected to the low-level potential and the common electrode to work normally, the metal line can be combined with the external printed circuit.
  • the ground point on the board (PCB) is connected to make the ground signal a low level signal.
  • the specific value chosen for the resulting filter capacitor will depend on the primary operating frequency on the PCB and the spectral frequency that affects the system.
  • the metal line and the data signal line may be disposed in the same layer, and the common electrode and the gate signal line are disposed in the same layer.
  • the metal line and the data signal line may be disposed in the same layer, and the common electrode and the gate signal line are disposed in the same layer.
  • the metal lines are disposed in the same layer as the data signal lines, and the source and drain electrodes in the TFT are also disposed in the same layer as the data signal lines, the metal lines are also disposed in the same layer as the source and drain electrodes in the TFT.
  • the common electrode and the gate signal line are disposed in the same layer, and the gate of the TFT is also disposed in the same layer as the gate signal line, the common electrode is also disposed in the same layer as the gate.
  • the gate insulating layer between the gate and the source and drain of the TFT is a dielectric, so that a filter capacitor is formed between the metal line and the common electrode in the overlap region, thereby filtering the signal on the common electrode.
  • the filter The equivalent circuit diagram of the wave capacitance is shown in FIG. 3, in which the resistance R is the equivalent resistance of the common electrode 004.
  • the insulating layer herein may be a gate insulating layer, but is not limited to the gate insulating layer, and any insulating layer between the metal line and the common electrode may form a filtered insulating layer.
  • the thin film transistor array substrate provided by the embodiment of the present invention may further include: disposed at a gap between adjacent sub-pixel unit columns, in addition to the disposed metal line 003 At least one vertical common electrode line 005, wherein each vertical common electrode line 005 is electrically connected to the corresponding common electrode 004 through at least one via.
  • the common electrode signal is applied to the vertical common electrode line to lower the resistance of the common electrode, thereby further improving the Greenish phenomenon of the liquid crystal display panel.
  • the vertical common electrode lines are disposed at positions at the gaps between adjacent groups of sub-pixel unit columns, it does not occupy the aperture ratio.
  • the vertical common electrode line and the data signal line may be disposed in the same layer.
  • the thin film transistor array substrate provided by the embodiment of the present invention can be applied to an advanced Super Dimension Switch (ADS) type liquid crystal panel.
  • ADS Advanced Super Dimension Switch
  • the common electrode in the thin film transistor array substrate is located as a plate electrode in the lower layer (closer to the substrate substrate), and the pixel electrode is located as the slit electrode in the upper layer (closer to the liquid crystal layer), that is, the pixel electrode is located above the common electrode.
  • An insulating layer is provided between the pixel electrode and the common electrode.
  • the common electrode has a plate-like structure at a position corresponding to the opening area of each sub-pixel unit.
  • the thin film transistor array substrate provided by the embodiment of the present invention can also be applied to a high-grade Super Advanced Dimension Switch (HADS) type liquid crystal panel.
  • HADS Super Advanced Dimension Switch
  • the pixel electrode in the thin film transistor array substrate is located as a plate electrode in the lower layer (closer to the substrate substrate), and the common electrode is located as the slit electrode in the upper layer (closer to the liquid crystal layer), that is, the pixel electrode is located below the common electrode, An insulating layer is provided between the pixel electrode and the common electrode.
  • the common electrode is in each The positions corresponding to the opening areas of the sub-pixel units have a slit shape or a mesh structure. As shown in FIG. 5, the common electrode 004 has a mesh structure at a position corresponding to an opening area of each sub-pixel unit. Thus, the resistance of the common electrode can be lowered, thereby further improving the Greenish phenomenon of the liquid crystal display panel.
  • the number of the metal wires 003 connected to the low-level potential can be determined according to the size of the filter capacitor. It can also be said that the size of the filter capacitor can be adjusted by the number of metal wires. The specific number of metal wires is determined according to the specific situation and is not limited herein.
  • the thin film transistor array substrate provided by the embodiment of the present invention generally has a structure such as a thin film transistor, a gate, a source drain, an active layer or a flat layer formed on the substrate.
  • a structure such as a thin film transistor, a gate, a source drain, an active layer or a flat layer formed on the substrate.
  • a pattern including a common electrode, a gate, and a gate signal line is formed by a gate metal layer on a substrate by one patterning process, wherein there are two between adjacent two rows of sub-pixel units. Bar gate signal line.
  • a pattern of metal lines including active drains, data lines, vertical common electrode lines, and metal lines connecting PCB ground points is formed by a source-drain metal layer on the substrate substrate by one patterning process.
  • the adjacent two columns of sub-pixel units are a group of sub-pixel unit columns, and each group of sub-pixel unit columns share a data signal line between two columns of sub-pixel units, and adjacent column sub-pixel unit columns
  • the projection of the metal line on the substrate substrate and the projection of the common electrode on the substrate substrate have overlapping regions, and the vertical common electrode lines are electrically connected to the corresponding common electrodes through the plurality of via holes.
  • a pattern including an insulating layer of a pixel electrode via is formed on a base substrate by one patterning process; and a pattern of a slit-shaped pixel electrode is formed on the insulating layer by one patterning process, wherein The pixel electrode passes through the pixel electrode via and The drain electrodes are connected.
  • the voltage fluctuation test is performed on the common electrode of the thin film transistor array substrate provided by the embodiment of the present invention, and the test result shown in FIG. 6 is compared with the voltage fluctuation diagram shown in FIG. 1 in the prior art. It can be seen that by increasing the arrangement of the metal lines connected to the low-level potential, the DC voltage on the common electrode of the thin film transistor array substrate is less fluctuated and tends to be stable, thereby greatly improving the Greenish phenomenon and improving the picture quality. .
  • an embodiment of the present invention further provides a liquid crystal display panel, including the above-mentioned thin film transistor array substrate provided by the embodiment of the present invention.
  • a liquid crystal display panel including the above-mentioned thin film transistor array substrate provided by the embodiment of the present invention.
  • the liquid crystal display panel refer to the embodiment of the above-mentioned thin film transistor array substrate, and the repeated description is omitted.
  • an embodiment of the present invention further provides a display device, including the liquid crystal display panel provided by the embodiment of the present invention.
  • the display device can be any product or component having a display function, such as a mobile phone, a tablet computer, a television, a display, a notebook computer, a digital photo frame, a navigator, and the like.
  • Other indispensable components of the display device are understood by those skilled in the art, and are not described herein, nor should they be construed as limiting the invention.
  • Embodiments of the present invention provide a thin film transistor array substrate, a liquid crystal display panel, and a display device.
  • the thin film transistor array substrate includes: a base substrate, a common electrode disposed on the base substrate, and a plurality of sub-pixel units arranged in a matrix, wherein the gate signals are provided between adjacent two rows of sub-pixel units a line, and the adjacent two columns of sub-pixel units are a set of sub-pixel unit columns, each set of sub-pixel unit columns sharing a data signal line between the two columns of sub-pixel units; the thin film transistor array substrate further includes a set At least one wire at a gap between adjacent sets of sub-pixel unit columns is connected to a metal line of a low-level potential, wherein the projection of the metal line on the substrate substrate and the projection of the common electrode on the substrate substrate have overlapping regions.
  • a filter capacitor is formed between the metal line and the common electrode in the overlap region, so that the signal on the common electrode can be filtered, and the signal on the data signal line and the signal coupling on the common electrode are reduced, so that the signal on the common electrode tends to Stable. Thereby, the phenomenon of Greenish of the liquid crystal display panel is effectively improved and the picture quality is improved.
  • the line is placed at a position at the gap between adjacent sub-pixel unit columns, so it does not occupy the aperture ratio.

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  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Mathematical Physics (AREA)
  • Optics & Photonics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Geometry (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Liquid Crystal (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)

Abstract

一种薄膜晶体管阵列基板、液晶显示面板及显示装置，其中薄膜晶体管阵列基板包括：衬底基板，设置在衬底基板上的公共电极和呈矩阵排列的多个亚像素单元，在相邻的两行亚像素单元之间具有两条栅极信号线（001），并且以相邻的两列亚像素单元为一组亚像素单元列，每组亚像素单元列共用一条位于两列亚像素单元之间的数据信号线（002）；设置在相邻组亚像素单元列之间的间隙处的至少一条连接低电平电位的金属线（003），金属线（003）在衬底基板上的投影与公共电极在衬底基板上的投影具有交叠区域，在交叠区域内金属线（003）与公共电极之间形成滤波电容，可以对公共电极上的信号进行滤波，减小数据信号线（002）上的信号和公共电极上的信号耦合，使公共电极上的信号趋于稳定，从而有效改善Greenish的现象，提高画面品质。

Description

薄膜晶体管阵列基板、液晶显示面板及显示装置 技术领域
本发明涉及显示技术领域，尤指一种薄膜晶体管阵列基板、液晶显示面板及显示装置。
背景技术
近年来，液晶显示装置因其轻薄、省电、无辐射等优点，已经取代了传统阴极射线管显示器广泛应用于诸多电子产品中。
现有液晶显示面板的薄膜晶体管(Thin Film Transistor，TFT)阵列基板具有多条栅极信号线和多条数据信号线，其中任意相邻的两条栅极信号线和任意相邻的两条数据信号线围成的区域为一个亚像素单元，并且每个亚像素单元都具有对应的像素电极和公共电极。在显示模式中，通过改变栅极信号线和数据信号线上所加载的电信号来控制像素电极的电压，并且通过公共电极线对公共电极施加直流电压而在两者之间产生电场以控制液晶翻转，从而实现显示功能。
对于大尺寸全高清高级超维场转换技术(Advanced Super Dimension Switch，ADS)面板来说，由于高分辨率和ADS像素的大Cst(像素电极和公共电极之间的存储电容)的缘故，显示面板的负载比较大。当数据信号线上的信号极性发生变化时，会发生公共电极上的信号和数据信号线上的信号的耦合现象，使得公共电极上的直流电压产生较大的波动，如图1所示。公共电极上的直流电压波动越大，就越容易使液晶屏的画面泛绿，也就是我们常说的Greenish现象。尤其是随着液晶屏尺寸的增大，Greenish现象会越严重。
因此，如何改善液晶显示面板的Greenish现象，是本领域技术人员亟需解决的技术问题。
发明内容
有鉴于此，本发明实施例提供一种薄膜晶体管阵列基板、液晶显示面板及显示装置，用以改善液晶显示面板的Greenish现象。
因此，本发明实施例提供了一种薄膜晶体管阵列基板，包括：衬底基板，设置在所述衬底基板上的公共电极和呈矩阵排列的多个亚像 素单元，其中在任意相邻的两行亚像素单元之间具有两条栅极信号线，并且以任意相邻的两列亚像素单元为一组亚像素单元列，每组所述亚像素单元列共用一条位于两列亚像素单元之间的数据信号线；所述薄膜晶体管阵列基板还包括：设置在相邻组所述亚像素单元列之间的间隙处的至少一条连接低电平电位的金属线，其中所述金属线在所述衬底基板上的投影与所述公共电极在所述衬底基板上的投影具有交叠区域。
在一种可能的实现方式中，在本发明实施例提供的上述薄膜晶体管阵列基板中，所述金属线与外部印刷电路板(Printed Circuit Board，PCB)上的接地点相连。
在一种可能的实现方式中，在本发明实施例提供的上述薄膜晶体管阵列基板中，所述金属线与所述数据信号线同层设置；并且所述公共电极与所述栅极信号线同层设置。
在一种可能的实现方式中，本发明实施例提供的上述薄膜晶体管阵列基板，除所设置的金属线之外，还包括设置在相邻组所述亚像素单元列之间的间隙处的至少一条垂直公共电极线，其中各个所述垂直公共电极线通过至少一个过孔与对应的公共电极电性相连。
在一种可能的实现方式中，在本发明实施例提供的上述薄膜晶体管阵列基板中，所述垂直公共电极线与所述数据信号线同层设置。
在一种可能的实现方式中，在本发明实施例提供的上述薄膜晶体管阵列基板中，所述薄膜晶体管阵列基板中的像素电极位于公共电极的上方，并且所述公共电极在与每个亚像素单元的开口区域对应的位置具有板状结构。
在一种可能的实现方式中，在本发明实施例提供的上述薄膜晶体管阵列基板中，所述薄膜晶体管阵列基板中的像素电极位于公共电极的下方，并且所述公共电极在与每个亚像素单元的开口区域对应的位置具有狭缝状或网状结构。
本发明实施例还提供了一种液晶显示面板，包括本发明实施例提供的上述薄膜晶体管阵列基板。
本发明实施例还提供了一种显示装置，包括本发明实施例提供的上述液晶显示面板。
本发明实施例提供了一种薄膜晶体管阵列基板、液晶显示面板及 显示装置，所述薄膜晶体管阵列基板包括：衬底基板，设置在衬底基板上的公共电极和呈矩阵排列的多个亚像素单元，其中在相邻的两行亚像素单元之间具有两条栅极信号线，并且以相邻的两列亚像素单元为一组亚像素单元列，每组亚像素单元列共用一条位于两列亚像素单元之间的数据信号线；所述薄膜晶体管阵列基板还包括设置在相邻组亚像素单元列之间的间隙处的至少一条连接低电平电位的金属线，其中金属线在衬底基板上的投影与公共电极在衬底基板上的投影具有交叠区域。由此，在交叠区域内金属线与公共电极之间形成滤波电容，从而可以对公共电极上的信号进行滤波，减小数据信号线上的信号和公共电极上的信号耦合，使公共电极上的信号趋于稳定。因此，有效地改善Greenish的现象并且提高显示面板的画面品质。另外，因为金属线设置在相邻组亚像素单元列之间的间隙处的位置，所以它不会占用开口率。
附图说明
图1为现有技术中公共电极的电压波动示意图；
图2为本发明实施例提供的薄膜晶体管阵列基板的结构示意图之一；
图3为本发明实施例提供的滤波电容的等效电路图；
图4为本发明实施例提供的薄膜晶体管阵列基板的结构示意图之二；
图5为本发明实施例提供的薄膜晶体管阵列基板的电容滤波的电路图；并且
图6为本发明实施例提供的滤波后公共电极的电压波动示意图。
具体实施方式
下面结合附图，对本发明实施例提供的薄膜晶体管阵列基板、液晶显示面板及显示装置的具体实施方式进行详细说明。
在附图中，各区域的形状和大小不反映薄膜晶体管阵列基板的真实比例，其目的只是示意说明本发明内容。
本发明实施例提供了一种薄膜晶体管阵列基板，如图2所示，包括：衬底基板，设置在衬底基板上的公共电极和呈矩阵排列的多个亚 像素单元，其中在任意相邻的两行亚像素单元之间具有两条栅极信号线001，并且以任意相邻的两列亚像素单元为一组亚像素单元列，每组亚像素单元列共用一条位于两列亚像素单元之间的数据信号线002；所述薄膜晶体管阵列基板还包括：设置在相邻组亚像素单元列之间的间隙处的至少一条连接低电平电位的金属线003，其中该金属线003在衬底基板上的投影与公共电极在衬底基板上的投影具有交叠区域。
在本发明实施例提供的上述薄膜晶体管阵列基板中，由于连接低电平电位的金属线在衬底基板上的投影与公共电极在衬底基板上的投影具有交叠区域，所以在交叠区域内金属线与公共电极之间会形成滤波电容。该滤波电容可以对公共电极上的信号进行滤波，减小数据信号线上的信号和公共电极上的信号耦合，从而使公共电极上的信号趋于稳定。由此有效地改善Greenish的现象并且提高显示面板的画面品质。另外，由于金属线设置在相邻组亚像素单元列之间的间隙处的位置，所以它不会占用开口率。
在具体实施例中，根据本发明实施例提供的上述薄膜晶体管阵列基板，为了能够使连接低电平电位的金属线与公共电极之间形成的滤波电容正常工作，该金属线可以与外部印刷电路板(PCB)上的接地点相连，从而将接地信号作为低电平信号。对于形成的滤波电容具体选择什么容值，将取决于PCB上的主要工作频率和对系统造成影响的波谱频率。
在具体实施例中，根据本发明实施例提供的上述薄膜晶体管阵列基板，可以将金属线与数据信号线同层设置，并且将公共电极与栅极信号线同层设置。这样，在制备TFT阵列基板时将不需要增加额外的制备工序。具体地，只需要通过一次构图工艺即可形成金属线和数据信号线的图形，并且通过一次构图工艺即可形成公共电极和栅极信号线的图形。由此，能够节省制备成本，并且提升产品附加值。
需要说明的是，由于金属线与数据信号线同层设置，而TFT中源漏极也与数据信号线同层设置，因此，金属线也与TFT中源漏极同层设置。又由于公共电极与栅极信号线同层设置，而TFT中栅极也与栅极信号线同层设置，因此，公共电极也与栅极同层设置。而TFT中栅极与源漏极之间的栅绝缘层是电介质，这样，在交叠区域金属线与公共电极之间形成滤波电容，从而对公共电极上的信号进行滤波。该滤 波电容的等效电路图如图3所示，其中电阻R是公共电极004的等效电阻。当通过调节滤波电容的大小来调节滤波效果时，滤波电容的大小可以通过交叠区域的面积来控制。具体地，C＝ε·S/d，其中C为滤波电容的大小，ε为介电常数，S为交叠区域的面积，并且d为绝缘层的厚度。这里的绝缘层可以为栅绝缘层，但不局限于栅绝缘层，只要是处于金属线与公共电极之间的绝缘层均可以形成滤波的绝缘层。
进一步地，本发明实施例提供的上述薄膜晶体管阵列基板，如图4所示，除所设置的金属线003之外，还可以包括：设置在相邻组亚像素单元列之间的间隙处的至少一条垂直公共电极线005，其中各个垂直公共电极线005通过至少一个过孔与对应的公共电极004电性相连。在显示模式中，向垂直公共电极线通入公共电极信号可以降低公共电极的电阻，从而进一步改善液晶显示面板的Greenish现象。而且，因为垂直公共电极线设置在相邻组亚像素单元列之间的间隙处的位置，所以它不会占用开口率。
在具体实施例中，在本发明实施例提供的上述薄膜晶体管阵列基板中，可以将垂直公共电极线与数据信号线同层设置。这样，在制备TFT阵列基板时不需要增加额外的制备工序，只需要通过一次构图工艺即可形成垂直公共电极线和数据信号线的图形。由此，能够节省制备成本，并且提升产品附加值。
在具体实施例中，本发明实施例提供的上述薄膜晶体管阵列基板可以应用于高级超维场开关(Advanced Super Dimension Switch，ADS)型液晶面板中。具体地，在薄膜晶体管阵列基板中的公共电极作为板状电极位于下层(更靠近衬底基板)，像素电极作为狭缝电极位于上层(更靠近液晶层)，即像素电极位于公共电极的上方，在像素电极和公共电极之间设有绝缘层。另外，公共电极在与每个亚像素单元的开口区域对应的位置具有板状结构。
在具体实施例中，本发明实施例提供的上述薄膜晶体管阵列基板也可以应用于超高级超维场开关(High Advanced Super Dimension Switch，HADS)型液晶面板中。具体地，在薄膜晶体管阵列基板中的像素电极作为板状电极位于下层(更靠近衬底基板)，公共电极作为狭缝电极位于上层(更靠近液晶层)，即像素电极位于公共电极的下方，在像素电极和公共电极之间设有绝缘层。另外，公共电极在与每 个亚像素单元的开口区域对应的位置具有狭缝状或网状结构。如图5所示，公共电极004在与每个亚像素单元的开口区域对应的位置具有网状结构。这样，可以降低公共电极的电阻，从而进一步改善液晶显示面板的Greenish现象。
需要说明的是，连接低电平电位的金属线003的条数可以根据滤波电容的大小来决定。也可以说，滤波电容的大小可以通过金属线的条数来调节。对于金属线的具体条数，需根据具体情况而定，在此不作限定。
在具体实施例中，根据本发明实施例提供的薄膜晶体管阵列基板一般还会在衬底基板上形成有薄膜晶体管、栅极、源漏极、有源层或平坦层等结构。这些具体结构可以有多种实现方式，在此不作限定。
下面以一个具体的实例详细地说明本发明实施例提供的薄膜晶体管阵列基板的制作方法，具体步骤如下所述。
1、在衬底基板上形成包括有公共电极、栅极、栅极信号线的图形
在具体实施例中，通过一次构图工艺，利用衬底基板上的栅金属层形成包括有公共电极、栅极、栅极信号线的图形，其中在相邻的两行亚像素单元之间具有两条栅极信号线。
2、在形成有公共电极的图形的衬底基板上沉积栅绝缘层。
3、在形成有栅绝缘层的衬底基板上形成包括有源漏极、数据线、垂直公共电极线，以及连接PCB接地点的金属线的图形
在具体实施例中，通过一次构图工艺，利用衬底基板上的源漏金属层形成包括有源漏极、数据线、垂直公共电极线，以及连接PCB接地点的金属线的图形。具体地，以相邻的两列亚像素单元为一组亚像素单元列，每组亚像素单元列共用一条位于两列亚像素单元之间的数据信号线，并且在相邻组亚像素单元列之间的间隙处具有一条金属线或一条垂直公共电极线。另外，该金属线在衬底基板上的投影与公共电极在衬底基板上的投影具有交叠区域，并且该垂直公共电极线通过多个过孔与对应的公共电极电性相连。
4、形成具有像素电极过孔的绝缘层和像素电极的图形
在具体实施例中，通过一次构图工艺，在衬底基板上形成包括有像素电极过孔的绝缘层的图形；并且通过一次构图工艺，在绝缘层上形成狭缝状的像素电极的图形，其中该像素电极通过像素电极过孔与 漏电极相连接。
至此，经过具体实例提供的上述步骤1至4制作出了本发明实施例提供的上述薄膜晶体管阵列基板。
具体地，对本发明实施例提供的上述薄膜晶体管阵列基板的公共电极进行电压波动测试，并将如图6所示的测试结果与现有技术中如图1所示的电压波动示意图作比较，可以看出，通过增加连接低电平电位的金属线的设置，使薄膜晶体管阵列基板的公共电极上的直流电压具有较小的波动，趋于稳定，从而极大地改善了Greenish现象并且提高了画面品质。
基于同一发明构思，本发明实施例还提供了一种液晶显示面板，包括本发明实施例提供的上述薄膜晶体管阵列基板。该液晶显示面板的实施可以参见上述薄膜晶体管阵列基板的实施例，重复之处不再赘述。
基于同一发明构思，本发明实施例还提供了一种显示装置，包括本发明实施例提供的上述液晶显示面板。该显示装置可以为：手机、平板电脑、电视机、显示器、笔记本电脑、数码相框、导航仪等任何具有显示功能的产品或部件。对于该显示装置的其它必不可少的组成部分均为本领域的普通技术人员应该理解具有的，在此不做赘述，也不应作为对本发明的限制。该显示装置的实施可以参见上述液晶显示面板和薄膜晶体管阵列基板的实施例，重复之处不再赘述。
本发明实施例提供了一种薄膜晶体管阵列基板、液晶显示面板及显示装置。所述薄膜晶体管阵列基板包括：衬底基板，设置在衬底基板上的公共电极和呈矩阵排列的多个亚像素单元，其中在相邻的两行亚像素单元之间具有两条栅极信号线，并且以相邻的两列亚像素单元为一组亚像素单元列，每组亚像素单元列共用一条位于两列亚像素单元之间的数据信号线；所述薄膜晶体管阵列基板还包括设置在相邻组亚像素单元列之间的间隙处的至少一条连接低电平电位的金属线，其中金属线在衬底基板上的投影与公共电极在衬底基板上的投影具有交叠区域。在交叠区域内金属线与公共电极之间形成滤波电容，从而可以对公共电极上的信号进行滤波，减小数据信号线上的信号和公共电极上的信号耦合，使公共电极上的信号趋于稳定。由此，有效地改善液晶显示面板的Greenish的现象并且提高画面品质。另外，由于金属 线设置在相邻组亚像素单元列之间的间隙处的位置，所以它不会占用开口率。
显然，本领域的技术人员可以对本发明进行各种改动和变型而不脱离本发明的精神和范围。这样，倘若本发明的这些修改和变型属于本发明权利要求及其等同技术的范围之内，则本发明也意图包含这些改动和变型在内。

Claims (9)

  1. 一种薄膜晶体管阵列基板，包括：衬底基板、设置在所述衬底基板上的公共电极和呈矩阵排列的多个亚像素单元，其中在任意相邻的两行亚像素单元之间具有两条栅极信号线，并且以任意相邻的两列亚像素单元为一组亚像素单元列，每组所述亚像素单元列共用一条位于两列亚像素单元之间的数据信号线；所述薄膜晶体管阵列基板还包括：
    设置在相邻组所述亚像素单元列之间的间隙处的至少一条连接低电平电位的金属线，其中所述金属线在所述衬底基板上的投影与所述公共电极在所述衬底基板上的投影具有交叠区域。
  2. 如权利要求1所述的薄膜晶体管阵列基板，其中所述金属线与外部印刷电路板(PCB)上的接地点相连。
  3. 如权利要求2所述的薄膜晶体管阵列基板，其中所述金属线与所述数据信号线同层设置；并且
    所述公共电极与所述栅极信号线同层设置。
  4. 如权利要求1所述的薄膜晶体管阵列基板，除所设置的金属线之外，还包括设置在相邻组所述亚像素单元列之间的间隙处的至少一条垂直公共电极线，其中各个所述垂直公共电极线通过至少一个过孔与对应的公共电极电性相连。
  5. 如权利要求4所述的薄膜晶体管阵列基板，其中所述垂直公共电极线与所述数据信号线同层设置。
  6. 如权利要求1-5任一项所述的薄膜晶体管阵列基板，其中所述薄膜晶体管阵列基板中的像素电极位于公共电极的上方，并且所述公共电极在与每个亚像素单元的开口区域对应的位置具有板状结构。
  7. 如权利要求1-5任一项所述的薄膜晶体管阵列基板，其中所述薄膜晶体管阵列基板中的像素电极位于公共电极的下方，并且所述公共电极在与每个亚像素单元的开口区域对应的位置具有狭缝状或网状结构。
  8. 一种液晶显示面板，包括如权利要求1-7任一项所述的薄膜晶体管阵列基板。
  9. 一种显示装置，包括如权利要求8所述的液晶显示面板。
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