WO2016161875A1

WO2016161875A1 - Thin film transistor array substrate, liquid crystal display panel and display device

Info

Publication number: WO2016161875A1
Application number: PCT/CN2016/076439
Authority: WO
Inventors: 王骁
Original assignee: 京东方科技集团股份有限公司; 北京京东方显示技术有限公司
Priority date: 2015-04-08
Filing date: 2016-03-16
Publication date: 2016-10-13
Also published as: CN104714345B; US20170160604A1; CN104714345A

Abstract

A thin film transistor (TFT) array substrate, liquid crystal display panel and display device. The TFT array substrate comprises a substrate, a common electrode provided on the substrate and a plurality of sub-pixel units arranged in a matrix. Two gate electrode signal lines (001) are provided between two adjacent rows of sub-pixel units. Each two adjacent columns of sub-pixel units form a group of sub-pixel unit columns, and each group of sub-pixel unit columns shares a data signal line (002) located between the two columns of sub-pixel units. The TFT array substrate further comprises at least one metal wire (003) connected to a low-level potential and located at a gap between adjacent groups of sub-pixel unit columns. A projection of the metal wire (003) on the substrate and a projection of the common electrode on the substrate have an overlapping region. A filter capacitor is formed between the metal wire (003) and the common electrode in the overlapping region, and is configured to filter a signal of the common electrode, reduce coupling of a signal of the data signal line (002) and the signal of the common electrode, and enable the signal of the common electrode to be stable, thus effectively reducing a Greenish phenomenon and improving an image quality.

Description

Thin film transistor array substrate, liquid crystal display panel and display device

Technical field

The present invention relates to the field of display technologies, and in particular to a thin film transistor array substrate, a liquid crystal display panel, and a display device.

Background technique

In recent years, liquid crystal display devices have replaced traditional cathode ray tube displays in many electronic products because of their advantages of thinness, power saving, and no radiation.

A Thin Film Transistor (TFT) array substrate of a conventional liquid crystal display panel has a plurality of gate signal lines and a plurality of data signal lines, wherein any two adjacent gate signal lines and any two adjacent data lines The area enclosed by the signal lines is one sub-pixel unit, and each sub-pixel unit has a corresponding pixel electrode and a common electrode. In the display mode, the voltage of the pixel electrode is controlled by changing the electric signal loaded on the gate signal line and the data signal line, and a direct current voltage is applied to the common electrode through the common electrode line to generate an electric field between the two to control the liquid crystal. Flip to achieve display.

For the large-size Full HD Advanced Super Dimension Switch (ADS) panel, due to the high resolution and the large C _{st of the} ADS pixel (the storage capacitance between the pixel electrode and the common electrode), the display The load on the panel is relatively large. When the polarity of the signal on the data signal line changes, a coupling phenomenon between the signal on the common electrode and the signal on the data signal line occurs, so that the DC voltage on the common electrode generates a large fluctuation, as shown in FIG. The greater the fluctuation of the DC voltage on the common electrode, the easier it is to make the screen of the LCD screen green, which is what we often call the Greenish phenomenon. Especially as the size of the LCD screen increases, the Greenish phenomenon will become more serious.

Therefore, how to improve the Greenish phenomenon of the liquid crystal display panel is a technical problem that a person skilled in the art needs to solve.

Summary of the invention

In view of this, embodiments of the present invention provide a thin film transistor array substrate, a liquid crystal display panel, and a display device for improving the Greenish phenomenon of the liquid crystal display panel.

Therefore, an embodiment of the present invention provides a thin film transistor array substrate, including: a substrate, a common electrode disposed on the substrate, and a plurality of sub-arrays arranged in a matrix a unit cell having two gate signal lines between any adjacent two rows of sub-pixel units, and any adjacent two columns of sub-pixel units being a set of sub-pixel unit columns, each group of said sub-pixel units The column shares a data signal line between two columns of sub-pixel units; the thin film transistor array substrate further includes: at least one connected to a low level potential disposed at a gap between adjacent sub-pixel unit columns a metal wire, wherein a projection of the metal line on the substrate substrate and a projection of the common electrode on the substrate substrate have overlapping regions.

In a possible implementation manner, in the thin film transistor array substrate provided by the embodiment of the invention, the metal line is connected to a ground point on an external printed circuit board (PCB).

In a possible implementation manner, in the thin film transistor array substrate provided by the embodiment of the invention, the metal line is disposed in the same layer as the data signal line; and the common electrode is the same as the gate signal line Layer settings.

In a possible implementation manner, the thin film transistor array substrate provided by the embodiment of the present invention includes, in addition to the disposed metal lines, at least a gap disposed between adjacent sub-pixel unit columns. A vertical common electrode line, wherein each of the vertical common electrode lines is electrically connected to a corresponding common electrode through at least one via.

In a possible implementation manner, in the thin film transistor array substrate provided by the embodiment of the invention, the vertical common electrode line is disposed in the same layer as the data signal line.

In a possible implementation manner, in the above-mentioned thin film transistor array substrate provided by the embodiment of the invention, the pixel electrode in the thin film transistor array substrate is located above the common electrode, and the common electrode is in each sub-pixel The position corresponding to the opening area of the unit has a plate-like structure.

In a possible implementation manner, in the thin film transistor array substrate provided by the embodiment of the invention, the pixel electrode in the thin film transistor array substrate is located under the common electrode, and the common electrode is in each sub-pixel The position corresponding to the opening area of the unit has a slit shape or a mesh structure.

The embodiment of the invention further provides a liquid crystal display panel comprising the above-mentioned thin film transistor array substrate provided by the embodiment of the invention.

The embodiment of the invention further provides a display device, which comprises the above liquid crystal display panel provided by the embodiment of the invention.

Embodiments of the present invention provide a thin film transistor array substrate, a liquid crystal display panel, and a display device, the thin film transistor array substrate comprising: a substrate substrate, a common electrode disposed on the substrate substrate, and a plurality of sub-pixel units arranged in a matrix, wherein there are two between adjacent two rows of sub-pixel units a gate signal line, and the adjacent two columns of sub-pixel units are a set of sub-pixel unit columns, each set of sub-pixel unit columns sharing a data signal line between the two columns of sub-pixel units; the thin film transistor array substrate Also included is at least one metal line connected to a low-level potential at a gap between adjacent sets of sub-pixel unit columns, wherein the projection of the metal line on the substrate substrate and the projection of the common electrode on the substrate substrate have Stacked area. Thereby, a filter capacitor is formed between the metal line and the common electrode in the overlap region, so that the signal on the common electrode can be filtered, and the signal on the data signal line and the signal coupling on the common electrode are reduced, so that the common electrode is on the common electrode. The signal tends to be stable. Therefore, the phenomenon of Greenish is effectively improved and the picture quality of the display panel is improved. In addition, since the metal wires are disposed at positions at the gaps between adjacent groups of sub-pixel unit columns, it does not occupy the aperture ratio.

DRAWINGS

1 is a schematic diagram of voltage fluctuations of a common electrode in the prior art;

2 is a schematic structural diagram of a thin film transistor array substrate according to an embodiment of the present invention;

3 is an equivalent circuit diagram of a filter capacitor according to an embodiment of the present invention;

4 is a second schematic structural diagram of a thin film transistor array substrate according to an embodiment of the present invention;

5 is a circuit diagram of capacitance filtering of a thin film transistor array substrate according to an embodiment of the present invention; and

FIG. 6 is a schematic diagram of voltage fluctuations of a filtered common electrode according to an embodiment of the present invention.

detailed description

The specific embodiments of the thin film transistor array substrate, the liquid crystal display panel, and the display device provided by the embodiments of the present invention are described in detail below with reference to the accompanying drawings.

In the drawings, the shape and size of each region do not reflect the true scale of the thin film transistor array substrate, and the purpose thereof is merely to illustrate the contents of the present invention.

An embodiment of the present invention provides a thin film transistor array substrate, as shown in FIG. 2, comprising: a substrate, a common electrode disposed on the substrate, and a plurality of sub-arrays arranged in a matrix a pixel unit having two gate signal lines 001 between any adjacent two rows of sub-pixel units, and any adjacent two columns of sub-pixel units as a group of sub-pixel unit columns, each group of sub-pixel unit columns Sharing a data signal line 002 between two columns of sub-pixel units; the thin film transistor array substrate further comprising: at least one metal line connected to a low-level potential disposed at a gap between adjacent groups of sub-pixel unit columns 003, wherein the projection of the metal line 003 on the substrate substrate and the projection of the common electrode on the substrate substrate have overlapping regions.

In the above-mentioned thin film transistor array substrate provided by the embodiment of the present invention, since the projection of the metal line connected to the low-level potential on the substrate substrate and the projection of the common electrode on the substrate substrate have overlapping regions, in the overlapping region A filter capacitor is formed between the inner metal line and the common electrode. The filter capacitor can filter the signal on the common electrode to reduce the signal coupling on the signal signal line and the common electrode, so that the signal on the common electrode tends to be stable. This effectively improves the Greenish phenomenon and improves the picture quality of the display panel. In addition, since the metal wires are disposed at positions at the gaps between adjacent groups of sub-pixel unit columns, it does not occupy the aperture ratio.

In a specific embodiment, according to the thin film transistor array substrate provided by the embodiment of the present invention, in order to enable the filter capacitor formed between the metal line connected to the low-level potential and the common electrode to work normally, the metal line can be combined with the external printed circuit. The ground point on the board (PCB) is connected to make the ground signal a low level signal. The specific value chosen for the resulting filter capacitor will depend on the primary operating frequency on the PCB and the spectral frequency that affects the system.

In a specific embodiment, according to the thin film transistor array substrate provided by the embodiment of the present invention, the metal line and the data signal line may be disposed in the same layer, and the common electrode and the gate signal line are disposed in the same layer. Thus, there is no need to add an additional preparation process when preparing the TFT array substrate. Specifically, it is only necessary to form a pattern of metal lines and data signal lines by one patterning process, and a pattern of common electrode and gate signal lines can be formed by one patterning process. Thereby, the manufacturing cost can be saved, and the added value of the product can be improved.

It should be noted that since the metal lines are disposed in the same layer as the data signal lines, and the source and drain electrodes in the TFT are also disposed in the same layer as the data signal lines, the metal lines are also disposed in the same layer as the source and drain electrodes in the TFT. Moreover, since the common electrode and the gate signal line are disposed in the same layer, and the gate of the TFT is also disposed in the same layer as the gate signal line, the common electrode is also disposed in the same layer as the gate. The gate insulating layer between the gate and the source and drain of the TFT is a dielectric, so that a filter capacitor is formed between the metal line and the common electrode in the overlap region, thereby filtering the signal on the common electrode. The filter The equivalent circuit diagram of the wave capacitance is shown in FIG. 3, in which the resistance R is the equivalent resistance of the common electrode 004. When the filtering effect is adjusted by adjusting the size of the filter capacitor, the size of the filter capacitor can be controlled by the area of the overlap region. Specifically, C = ε · S / d, where C is the size of the filter capacitor, ε is the dielectric constant, S is the area of the overlap region, and d is the thickness of the insulating layer. The insulating layer herein may be a gate insulating layer, but is not limited to the gate insulating layer, and any insulating layer between the metal line and the common electrode may form a filtered insulating layer.

Further, the thin film transistor array substrate provided by the embodiment of the present invention, as shown in FIG. 4, may further include: disposed at a gap between adjacent sub-pixel unit columns, in addition to the disposed metal line 003 At least one vertical common electrode line 005, wherein each vertical common electrode line 005 is electrically connected to the corresponding common electrode 004 through at least one via. In the display mode, the common electrode signal is applied to the vertical common electrode line to lower the resistance of the common electrode, thereby further improving the Greenish phenomenon of the liquid crystal display panel. Moreover, since the vertical common electrode lines are disposed at positions at the gaps between adjacent groups of sub-pixel unit columns, it does not occupy the aperture ratio.

In a specific embodiment, in the above-mentioned thin film transistor array substrate provided by the embodiment of the present invention, the vertical common electrode line and the data signal line may be disposed in the same layer. Thus, there is no need to add an additional preparation process in the preparation of the TFT array substrate, and only a pattern of vertical common electrode lines and data signal lines can be formed by one patterning process. Thereby, the manufacturing cost can be saved, and the added value of the product can be improved.

In a specific embodiment, the thin film transistor array substrate provided by the embodiment of the present invention can be applied to an advanced Super Dimension Switch (ADS) type liquid crystal panel. Specifically, the common electrode in the thin film transistor array substrate is located as a plate electrode in the lower layer (closer to the substrate substrate), and the pixel electrode is located as the slit electrode in the upper layer (closer to the liquid crystal layer), that is, the pixel electrode is located above the common electrode. An insulating layer is provided between the pixel electrode and the common electrode. In addition, the common electrode has a plate-like structure at a position corresponding to the opening area of each sub-pixel unit.

In a specific embodiment, the thin film transistor array substrate provided by the embodiment of the present invention can also be applied to a high-grade Super Advanced Dimension Switch (HADS) type liquid crystal panel. Specifically, the pixel electrode in the thin film transistor array substrate is located as a plate electrode in the lower layer (closer to the substrate substrate), and the common electrode is located as the slit electrode in the upper layer (closer to the liquid crystal layer), that is, the pixel electrode is located below the common electrode, An insulating layer is provided between the pixel electrode and the common electrode. In addition, the common electrode is in each The positions corresponding to the opening areas of the sub-pixel units have a slit shape or a mesh structure. As shown in FIG. 5, the common electrode 004 has a mesh structure at a position corresponding to an opening area of each sub-pixel unit. Thus, the resistance of the common electrode can be lowered, thereby further improving the Greenish phenomenon of the liquid crystal display panel.

It should be noted that the number of the metal wires 003 connected to the low-level potential can be determined according to the size of the filter capacitor. It can also be said that the size of the filter capacitor can be adjusted by the number of metal wires. The specific number of metal wires is determined according to the specific situation and is not limited herein.

In a specific embodiment, the thin film transistor array substrate provided by the embodiment of the present invention generally has a structure such as a thin film transistor, a gate, a source drain, an active layer or a flat layer formed on the substrate. There may be many implementations of these specific structures, which are not limited herein.

The method for fabricating the thin film transistor array substrate provided by the embodiment of the present invention is described in detail below with reference to a specific example. The specific steps are as follows.

1. Forming a pattern including a common electrode, a gate, and a gate signal line on the base substrate

In a specific embodiment, a pattern including a common electrode, a gate, and a gate signal line is formed by a gate metal layer on a substrate by one patterning process, wherein there are two between adjacent two rows of sub-pixel units. Bar gate signal line.

2. Depositing a gate insulating layer on the base substrate on which the pattern of the common electrode is formed.

3. Forming a pattern including a active drain, a data line, a vertical common electrode line, and a metal line connecting the PCB ground point on the base substrate on which the gate insulating layer is formed

In a specific embodiment, a pattern of metal lines including active drains, data lines, vertical common electrode lines, and metal lines connecting PCB ground points is formed by a source-drain metal layer on the substrate substrate by one patterning process. Specifically, the adjacent two columns of sub-pixel units are a group of sub-pixel unit columns, and each group of sub-pixel unit columns share a data signal line between two columns of sub-pixel units, and adjacent column sub-pixel unit columns There is a metal line or a vertical common electrode line at the gap between them. In addition, the projection of the metal line on the substrate substrate and the projection of the common electrode on the substrate substrate have overlapping regions, and the vertical common electrode lines are electrically connected to the corresponding common electrodes through the plurality of via holes.

4. Forming an insulating layer and a pixel electrode having a pixel electrode via hole

In a specific embodiment, a pattern including an insulating layer of a pixel electrode via is formed on a base substrate by one patterning process; and a pattern of a slit-shaped pixel electrode is formed on the insulating layer by one patterning process, wherein The pixel electrode passes through the pixel electrode via and The drain electrodes are connected.

At this point, the above-mentioned steps 1 to 4 provided by the specific examples are used to fabricate the above-mentioned thin film transistor array substrate provided by the embodiment of the present invention.

Specifically, the voltage fluctuation test is performed on the common electrode of the thin film transistor array substrate provided by the embodiment of the present invention, and the test result shown in FIG. 6 is compared with the voltage fluctuation diagram shown in FIG. 1 in the prior art. It can be seen that by increasing the arrangement of the metal lines connected to the low-level potential, the DC voltage on the common electrode of the thin film transistor array substrate is less fluctuated and tends to be stable, thereby greatly improving the Greenish phenomenon and improving the picture quality. .

Based on the same inventive concept, an embodiment of the present invention further provides a liquid crystal display panel, including the above-mentioned thin film transistor array substrate provided by the embodiment of the present invention. For the implementation of the liquid crystal display panel, refer to the embodiment of the above-mentioned thin film transistor array substrate, and the repeated description is omitted.

Based on the same inventive concept, an embodiment of the present invention further provides a display device, including the liquid crystal display panel provided by the embodiment of the present invention. The display device can be any product or component having a display function, such as a mobile phone, a tablet computer, a television, a display, a notebook computer, a digital photo frame, a navigator, and the like. Other indispensable components of the display device are understood by those skilled in the art, and are not described herein, nor should they be construed as limiting the invention. For the implementation of the display device, reference may be made to the embodiments of the above liquid crystal display panel and the thin film transistor array substrate, and the repeated description is omitted.

Embodiments of the present invention provide a thin film transistor array substrate, a liquid crystal display panel, and a display device. The thin film transistor array substrate includes: a base substrate, a common electrode disposed on the base substrate, and a plurality of sub-pixel units arranged in a matrix, wherein the gate signals are provided between adjacent two rows of sub-pixel units a line, and the adjacent two columns of sub-pixel units are a set of sub-pixel unit columns, each set of sub-pixel unit columns sharing a data signal line between the two columns of sub-pixel units; the thin film transistor array substrate further includes a set At least one wire at a gap between adjacent sets of sub-pixel unit columns is connected to a metal line of a low-level potential, wherein the projection of the metal line on the substrate substrate and the projection of the common electrode on the substrate substrate have overlapping regions. A filter capacitor is formed between the metal line and the common electrode in the overlap region, so that the signal on the common electrode can be filtered, and the signal on the data signal line and the signal coupling on the common electrode are reduced, so that the signal on the common electrode tends to Stable. Thereby, the phenomenon of Greenish of the liquid crystal display panel is effectively improved and the picture quality is improved. In addition, due to metal The line is placed at a position at the gap between adjacent sub-pixel unit columns, so it does not occupy the aperture ratio.

It is apparent that those skilled in the art can make various modifications and variations to the invention without departing from the spirit and scope of the invention. Thus, it is intended that the present invention cover the modifications and modifications of the invention

Claims

A thin film transistor array substrate comprising: a substrate substrate, a common electrode disposed on the substrate substrate, and a plurality of sub-pixel units arranged in a matrix, wherein there are two between any adjacent two rows of sub-pixel units a gate signal line, and any adjacent two columns of sub-pixel units as a set of sub-pixel unit columns, each set of the sub-pixel unit columns sharing a data signal line between two columns of sub-pixel units; The thin film transistor array substrate further includes:

Providing at least one metal line connected to a low-level potential at a gap between adjacent sub-pixel unit columns, wherein a projection of the metal line on the base substrate and the common electrode are The projection on the substrate substrate has an overlap region.
The thin film transistor array substrate of claim 1, wherein the metal line is connected to a ground point on an external printed circuit board (PCB).
The thin film transistor array substrate of claim 2, wherein the metal line is disposed in the same layer as the data signal line;

The common electrode is disposed in the same layer as the gate signal line.
The thin film transistor array substrate according to claim 1, further comprising at least one vertical common electrode line disposed at a gap between adjacent sub-pixel unit columns, in addition to the disposed metal lines, wherein each of the plurality The vertical common electrode lines are electrically connected to the corresponding common electrodes through at least one via.
The thin film transistor array substrate of claim 4, wherein the vertical common electrode line is disposed in the same layer as the data signal line.
The thin film transistor array substrate according to any one of claims 1 to 5, wherein a pixel electrode in the thin film transistor array substrate is located above a common electrode, and the common electrode corresponds to an open area of each sub-pixel unit The position has a plate structure.
The thin film transistor array substrate according to any one of claims 1 to 5, wherein a pixel electrode in the thin film transistor array substrate is located below a common electrode, and the common electrode corresponds to an open area of each sub-pixel unit The position has a slit shape or a mesh structure.
A liquid crystal display panel comprising the thin film transistor array substrate according to any one of claims 1 to 7.
A display device comprising the liquid crystal display panel of claim 8.