WO2016142969A1 - データ処理装置、データ処理システム及びその方法 - Google Patents
データ処理装置、データ処理システム及びその方法 Download PDFInfo
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- WO2016142969A1 WO2016142969A1 PCT/JP2015/001374 JP2015001374W WO2016142969A1 WO 2016142969 A1 WO2016142969 A1 WO 2016142969A1 JP 2015001374 W JP2015001374 W JP 2015001374W WO 2016142969 A1 WO2016142969 A1 WO 2016142969A1
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
- G06F13/4004—Coupling between buses
- G06F13/4009—Coupling between buses with data restructuring
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
- G06F13/4004—Coupling between buses
- G06F13/4027—Coupling between buses using bus bridges
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
- G06F13/4204—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
- G06F13/4221—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus
Definitions
- the present invention relates to a data processing apparatus, a data processing system, and a method thereof, for example, a data processing apparatus, a data processing system, and a method thereof that compress and transmit data.
- the compressed data is transmitted after the data is compressed to reduce the data amount.
- image data is acquired from a device such as a camera, and the image data is compressed and transmitted to the terminal.
- a technique for example, displaying an image captured by a camera mounted on a vehicle such as a back monitor or a top view monitor of an automobile or the like on a display or the like.
- it is necessary to suppress a shift (a reduction in latency) between the timing at which the camera has taken an image and the timing at which the display displays an image.
- the transmission speed from the camera to the display can be increased by compressing and transmitting the image data from the camera.
- Japanese Patent Application Laid-Open No. 2005-228561 discloses an image transmission in which transmission of image data to the network and recording of image data to the HDD can be performed in parallel by a single system of encoding circuit and compression means.
- An apparatus is disclosed.
- each compressed data is divided into the compressed order and stored in the compressed data storage means, and then the compressed data requested from the terminal is read out from the compressed data storage means. Of compressed data can be transmitted.
- the data processing device includes a data selector circuit that divides a data group including a plurality of types of data into each of the plurality of types of data, and the data processing device according to the types of the plurality of types of data. And a plurality of compression circuits that respectively compress the plurality of types of data in parallel, and a data transmission circuit that transmits the plurality of types of compressed data to the terminal.
- a plurality of types of data can be transferred with low latency.
- FIG. 1 is a diagram showing a data processing system according to a first exemplary embodiment.
- 3 is a flowchart showing a data processing method in the data processing apparatus according to the first exemplary embodiment;
- FIG. 6 is a diagram showing a data processing system according to a first modification example of the first embodiment. 6 is a diagram showing a data processing system according to a second modification of the first embodiment.
- FIG. FIG. 10 is a diagram showing a data processing system according to a third modification example of the first embodiment. It is a figure which shows the data processing system concerning Embodiment 2.
- FIG. 6 is a flowchart showing a data processing method in the data processing apparatus according to the second exemplary embodiment;
- FIG. 6 is a flowchart showing a data processing method in the data processing apparatus according to the second exemplary embodiment;
- FIG. 6 is a flowchart showing a data processing method in the data processing apparatus according to the second exemplary embodiment;
- FIG. 10 is a diagram illustrating a data processing system according to a first modification example of the second embodiment.
- FIG. 6 illustrates a data processing system according to a third exemplary embodiment. It is a figure which shows the example which mounted the data processing system concerning Embodiment 3 in the vehicle.
- the constituent elements are not necessarily essential unless otherwise specified or apparently essential in principle.
- the shapes when referring to the shapes, positional relationships, etc. of the components, etc., the shapes are substantially the same unless otherwise specified, or otherwise apparent in principle. And the like are included. The same applies to the above numbers and the like (including the number, numerical value, quantity, range, etc.).
- each element described in the drawing as a functional block for performing various processes can be configured with a CPU (Central Processing Unit), a memory, and other circuits in terms of hardware. This is realized by a program loaded on the computer. Therefore, it is understood by those skilled in the art that these functional blocks can be realized in various forms by hardware only, software only, or a combination thereof, and is not limited to any one.
- CPU Central Processing Unit
- Non-transitory computer readable media include various types of tangible storage media.
- Examples of non-transitory computer-readable media include magnetic recording media (eg, flexible disks, magnetic tapes, hard disk drives), magneto-optical recording media (eg, magneto-optical disks), CD-ROM (Read Only Memory) CD-R, CD -R / W, including semiconductor memory (for example, mask ROM, PROM (Programmable ROM), EPROM (Erasable PROM), flash ROM, RAM (Random Access Memory)).
- the program may be supplied to the computer by various types of temporary computer readable media. Examples of transitory computer readable media include electrical signals, optical signals, and electromagnetic waves.
- the temporary computer-readable medium can supply the program to the computer via a wired communication path such as an electric wire and an optical fiber, or a wireless communication path.
- FIG. 1 is a diagram showing an outline of a data processing apparatus 1 according to the present embodiment.
- the data processing device 1 includes a data selector circuit 2, a first compression circuit 4 a, a second compression circuit 4 b, and a data transmission circuit 6.
- the first compression circuit 4a performs, for example, irreversible compression
- the second compression circuit 4b performs, for example, reversible compression, but is not limited thereto.
- the first compression circuit 4a may perform reversible compression
- the second compression circuit 4b may perform irreversible compression.
- both the first compression circuit 4a and the second compression circuit 4b may perform irreversible compression, or both may perform reversible compression.
- the data selector circuit 2 divides the data group a including a plurality of types of data into a plurality of types of data b1 and c1.
- the first compression circuit 4a and the second compression circuit 4b compress the plurality of types of data b1 and c1 in parallel according to the types of the plurality of types of data b1 and c1, respectively. Specifically, the first compression circuit 4a compresses the data b1 to obtain compressed data b2.
- the second compression circuit 4b compresses the data c1 to obtain compressed data c2.
- the data transmission circuit 6 transmits a plurality of types of compressed data to the terminal. That is, the data transmission circuit 6 transmits the compressed data b2 and the compressed data c2 to the terminal. Here, the data transmission circuit 6 may transmit the compressed data b2 and the compressed data c2 at the same timing or at separate timings.
- the data processing apparatus 1 according to the present embodiment divides the data group a including a plurality of types of data according to the types and compresses the divided data in parallel, the latency when transmitting to the terminal is increased. Will improve. That is, the data processing apparatus 1 according to the present embodiment can transfer a plurality of types of data with low latency.
- the data processing apparatus 1 can transfer a plurality of types of data with low latency, and thus can be effectively applied to the above-described system.
- FIG. 2 is a diagram illustrating the data processing system 10 according to the first embodiment.
- the data processing system 10 includes a camera 100, a data processing device 110, and receiving terminals 120 (receiving terminals 120a, 120b, and 120c).
- the data processing device 110 is communicably connected to the receiving terminal 120 via a communication path 50 such as a bus.
- the data processing device 110 includes a data selector circuit 111, a lossless compression circuit 112, a lossy compression circuit 113, a memory 114, and a data transmission circuit 115.
- the camera 100 can output a plurality of different types of data at the same timing. That is, the camera 100 outputs a data group including a plurality of different types of data.
- the camera 100 outputs camera data A1 as a data group to the data processing device 110.
- the camera data A1 is, for example, image data such as YUV color image data, IR (infrared) image data, distance data, and the like.
- the camera data A1 is transmitted via one data bus, but the number of data buses is arbitrary.
- the camera 100 further outputs a data control signal A2 related to the camera data A1 to the data processing device 110.
- the data control signal A2 will be described later.
- the data selector circuit 111 divides the data output from the camera 100 that is the data transmission source based on the data control signal A2. Specifically, the data selector circuit 111 analyzes the camera data A1 according to a predetermined setting, and converts the data into data B1 in which reversible compression is effective and data C1 in which irreversible compression is effective. To divide.
- the data for which reversible compression is effective is data that requires that the data does not change before and after compression.
- data for which irreversible compression is effective is data whose data compression rate can be increased by irreversible compression because the data is allowed to change before and after compression.
- the reversible compression circuit 112 and the irreversible compression circuit 113 are circuits for performing reversible compression and irreversible compression on the divided data, respectively.
- the reversible compression circuit 112 and the irreversible compression circuit 113 perform compression processing in parallel on each of the plurality of divided types of data.
- the data processing apparatus 110 includes the lossless compression circuit 112 and the irreversible compression circuit 113.
- the present invention is not limited to such a configuration. Both of the two compression circuits may perform reversible compression, or both may perform irreversible compression.
- the reversible compression circuit 112 compresses the data B1 in a reversible compression format (for example, Zip or gzip). Then, the lossless compression circuit 112 stores the obtained compressed data B2 in the memory 114. At this time, the lossless compression circuit 112 outputs a data transmission request signal R1 notifying that the compression is completed to the data transmission circuit 115.
- This data transmission request signal R1 includes information specifying an area in the memory 114 where the compressed data B2 is stored.
- the irreversible compression circuit 113 compresses the data C1 in an irreversible compression format (for example, JPEG or MPEG-2). Then, the irreversible compression circuit 113 stores the obtained compressed data C2 in the memory 114. At this time, the irreversible compression circuit 113 outputs a data transmission request signal R2 notifying that the compression is completed to the data transmission circuit 115.
- the data transmission request signal R2 includes information for designating an area in the memory 114 where the compressed data C2 is stored.
- the data transmission circuit 115 When the data transmission circuit 115 receives the data transmission request signal R1 from the lossless compression circuit 112, the data transmission circuit 115 reads the compressed data B2 from the memory 114. Specifically, the data transmission circuit 115 reads the compressed data B2 from the area specified in the data transmission request signal R1 in the memory 114. Then, the data transmission circuit 115 transmits the read compressed data B2 to the receiving terminal 120 via the communication path 50. Similarly, when the data transmission circuit 115 receives the data transmission request signal R2 from the lossy compression circuit 113, the data transmission circuit 115 reads the compressed data C2 from the memory 114. Specifically, the data transmission circuit 115 reads the compressed data C2 from the area specified in the data transmission request signal R2 in the memory 114. Then, the data transmission circuit 115 transmits the read compressed data C2 to the receiving terminal 120 via the communication path 50.
- the data transmission circuit 115 may transmit the compressed data B2 and the compressed data C2 separately. That is, for example, the data transmission circuit 115 may transmit the compressed data B2 when receiving the data transmission request signal R1, and may transmit the compressed data C2 when receiving the data transmission request signal R2. As described above, the data transmission circuit 115 may sequentially transfer the compressed data to the receiving terminal 120. The data transmission circuit 115 can also transmit a plurality of frames simultaneously. Note that the data transmission circuit 115 may transmit the compressed data B2 and the compressed data C2 at the same time. That is, the data transmission circuit 115 may store the compressed data B2 and the compressed data C2 in one or more communication frames and transmit these communication frames simultaneously. In this case, the data transmission circuit 115 may have a buffer for storing data that has been previously compressed.
- the receiving terminal 120 is, for example, a control chip or a computer (PC) to which a display is connected.
- the receiving terminal 120 receives the compressed data B2 and the compressed data C2 transmitted from the data processing device 110. Then, the receiving terminal 120 performs necessary processing such as restoring the compressed data B2 and the compressed data C2 to the original data B1 and data C1, and displaying the image data on the display.
- FIG. 3 is a flowchart of a data processing method in the data processing apparatus 110 according to the first embodiment.
- the data selector circuit 111 divides the camera data A1 including a plurality of different types of data for each of these data types based on the data control signal A2 (S100).
- the data processing device 110 performs reversible compression on the data (S102a).
- the data processing device 110 performs irreversible compression on the data (S102b).
- the data selector circuit 111 divides the camera data A1 into data B1 for which reversible compression is effective and data C1 for which irreversible compression is effective. Then, the data selector circuit 111 outputs the data B1 to the lossless compression circuit 112 and outputs the data C1 to the lossy compression circuit 113.
- the reversible compression circuit 112 performs reversible compression on the data B1.
- the irreversible compression circuit 113 performs irreversible compression on the data C1.
- the data control signal A2 output from the camera 100 includes, for example, a Valid signal indicating that the camera data A1 output at the same timing is valid data. Therefore, when the data selector circuit 111 receives the data control signal A2 including the Valid signal, the data selector circuit 111 performs processing on the camera data A1 output at the same timing as the data control signal A2. In this way, the data selector circuit 111 can perform processing at an appropriate timing. That is, when the data selector circuit 111 receives invalid data that is output when the camera 100 is in an idle state, the data selector circuit 111 can be prevented from processing the data.
- the camera data A1 includes, for example, YUV color image data and distance data.
- the YUV color image data is image data indicating a color image to be visually recognized by the user on the receiving terminal 120.
- the data selector circuit 111 sorts the YUV color image data into data C1 for which irreversible compression is effective.
- the distance data (numerical data indicating the distance from the camera 100 to the object) is used by the receiving terminal 120 for calculation by an arithmetic circuit such as a CPU. Therefore, the distance data is required not to change before and after compression. Therefore, it is effective to perform reversible compression on the distance data. Therefore, the data selector circuit 111 distributes the distance data to data B1 for which reversible compression is effective.
- the IR image data may be used for the user to visually recognize at the receiving terminal 120 or may be subject to arithmetic processing at the receiving terminal 120. Therefore, the data selector circuit 111 may distribute the IR image data to the data B1 or the data C1 according to the use in the receiving terminal 120.
- the data control signal A2 may include information specifying the data configuration of the camera data A1. This is suitable when the camera 100 can output the data control signal A2 including such information. Specifically, for example, when the camera data A1 is 24 bits, the upper 8 bits of the camera data A1 are data B1 (for example, distance data), and the lower 16 bits are data C1 (for example, image data), The data control signal A2 may include information indicating that. Then, the data selector circuit 111 divides the camera data A1 into data B1 in which reversible compression is effective and data C1 in which irreversible compression is effective using information specifying the data configuration. To do. With such a configuration, the data selector circuit 111 can easily divide the camera data A1.
- information specifying the data configuration of the camera data A1 may be set in the data selector circuit 111 in advance. Specifically, when the specification of the camera 100 is known, information specifying the configuration of the camera data A1 may be set in the data selector circuit 111 in accordance with the specification. With such a configuration, it becomes unnecessary to specify the data configuration in the data control signal A2. On the other hand, specifying the data configuration in the data control signal A2 eliminates the need for setting in the data selector circuit 111 in advance.
- the data B1 and data C1 distributed in the data selector circuit 111 are input to the lossless compression circuit 112 and the lossy compression circuit 113, respectively.
- the reversible compression circuit 112 and the irreversible compression circuit 113 perform data compression processing in parallel. That is, the process of S102a and the process of S102b are performed in parallel.
- the reversible compression circuit 112 continues the compression process until the compression is completed (NO in S103a).
- the lossless compression circuit 112 outputs the obtained compressed data B2 to the memory 114, and writes the compressed data B2 in a predetermined area of the memory 114.
- the lossless compression circuit 112 requests the data transmission circuit 115 to transmit data by outputting the data transmission request signal R1 to the data transmission circuit 115 (S104a).
- the irreversible compression circuit 113 continues the compression process until the compression is completed (NO in S103b).
- the irreversible compression circuit 113 outputs the obtained compressed data C2 to the memory 114, and writes the compressed data C2 in a predetermined area of the memory 114.
- the irreversible compression circuit 113 requests the data transmission circuit 115 to transmit data by outputting the data transmission request signal R2 to the data transmission circuit 115 (S104b). Note that the processes of S102a, S103a, and S104a are performed in parallel with the processes of S102b, S103b, and S104b.
- the data transmission circuit 115 starts transmission of the compressed data input from the memory 114 (S105). Specifically, when the data transmission circuit 115 receives the data transmission request signal R1, the data transmission circuit 115 extracts the compressed data B2 from the memory 114 and transmits the compressed data B2 to the reception terminal 120. On the other hand, when the data transmission circuit 115 receives the data transmission request signal R2, the data transmission circuit 115 extracts the compressed data C2 from the memory 114 and transmits the compressed data C2 to the reception terminal 120. Note that the data transmission circuit 115 can simultaneously transmit a plurality of frames of data to a plurality of receiving terminals 120.
- the time for which the two compressed data B2 and C2 are both output from the memory 114 to the data transmission circuit 115 is usually shorter than the time required for one compression. Therefore, before the next compressed data is output from the lossless compression circuit 112 and the lossy compression circuit 113, the data transmission circuit 115 can accept the compressed data B2 and C2. Therefore, it is possible to prevent data loss of compressed data. Even if the time when both of the two compressed data B2 and C2 are output from the memory 114 to the data transmission circuit 115 is longer than the time required for one compression, the memory 114 is temporarily Since the compressed data is stored, it is possible to prevent data loss regardless of the timing of transmitting the compressed data.
- the data transmission circuit 115 can transmit the compressed data B2 and the compressed data C2 to the receiving terminal 120 at an arbitrary timing.
- the data transmission circuit 115 can simultaneously transmit the compressed data B2 and the compressed data C2 to the receiving terminal 120.
- the data transmission circuit 115 can transmit the compressed data B2 and the compressed data C2 to the receiving terminal 120 at a timing when the receiving terminal 120 needs data.
- the data processing device 110 includes a data selector circuit 111 that divides a plurality of types of data, and includes two compression circuits provided in parallel. That is, in this embodiment, there are a plurality of compression paths. Therefore, the compression processing can be performed in parallel for each of the plurality of types of divided data. As a result, it is possible to reduce the latency when transferring a plurality of types of data as compared to the case of sequentially compressing a plurality of data.
- the data processing apparatus 110 is provided with two compression circuits that perform compression in mutually different compression formats.
- the first compression circuit (the irreversible compression circuit 113 in the present embodiment) is the first type of data in the first format (the irreversible compression format in the present embodiment). Compression is performed on (image data in this embodiment).
- the second compression circuit (in this embodiment, the reversible compression circuit 112) is a second type of data in a second format (in this embodiment, a reversible compression format) different from the first format. Compression is performed on (distance data in this embodiment).
- the data processing apparatus 110 is provided with a reversible compression circuit 112 and an irreversible compression circuit 113 in parallel. With such a configuration, the compression of the irreversible compression format and the compression of the reversible compression format can be performed in parallel.
- the data processing apparatus 110 is configured such that image data or the like (first type of data) to be visually recognized by the user at the receiving terminal 120 and distance data or the like are received at the receiving terminal 120.
- the data (second type of data) that is the target of the arithmetic processing can be processed separately.
- the distance data is used to perform arithmetic processing such as calculation in the receiving terminal 120, so that it is required that the data does not change before and after compression. Therefore, the data processing apparatus 110 according to the present embodiment can improve the compression efficiency by irreversible compression for image data, and can prevent the data from changing by reversible compression for distance data. .
- the lossless compression circuit 112 and the lossy compression circuit 113 output the data transmission request signals R1 and R2 to the data transmission circuit 115, respectively, and the data transmission circuit 115 receives the data transmission request signal.
- the compressed data is transmitted based on R1 and R2.
- a series of data processing until the data A1 input from the camera 100 is compressed and transmitted to the receiving terminal 120 is performed without using the processing of the CPU.
- data compression and data transfer can all be performed using hardware without intervention of software processing such as processing by the CPU, thereby enabling high-speed processing.
- data transmission request signals R1 and R2 are directly input to the data transmission circuit 115 from the lossless compression circuit 112 and the lossy compression circuit 113, respectively. This eliminates the need for interrupt processing and bus access processing in the CPU, thus enabling high-speed processing.
- FIG. 4 is a diagram illustrating a data processing system 10 according to a first modification of the first embodiment.
- FIG. 4 shows a case where there are three or more types of data input to the data processing device 110.
- the data processing system 10 includes two cameras 100a and 100b.
- the data processing apparatus 110 includes a lossless compression circuit 134 in addition to the lossless compression circuit 112 and the lossy compression circuit 113.
- the camera 100a outputs camera data A1 including YUV color image data and distance data, and a data control signal A2 related to the camera data A1, similarly to the camera 100 of FIG.
- the camera 100b outputs, for example, camera data A3 including IR image data and a data control signal A4 related to the camera data A3.
- the data control signal A4 has the same configuration as the data control signal A2.
- the data selector circuit 111 divides the camera data A1 into YUV color image data and distance data based on the data control signal A2. Then, the data selector circuit 111 outputs the distance data as data B1 to the lossless compression circuit 112, and outputs the YUV color image data as data C1 to the lossy compression circuit 113. Further, the data selector circuit 111 outputs IR image data included in the camera data A3 as data D1 to the lossless compression circuit 134 based on the data control signal A4. That is, in this example, the IR image data is data for which reversible compression is effective, that is, data that is a target of arithmetic processing in the receiving terminal 120.
- the processing for the reversible compression circuit 112 and the irreversible compression circuit 113 is the same as that described above with reference to FIG. Similar to the lossless compression circuit 112, the lossless compression circuit 134 performs lossless compression on the data D1, and stores the obtained compressed data D2 in the memory 114. Further, the lossless compression circuit 134 outputs a data transmission request signal R3 notifying that the compression is completed to the data transmission circuit 115. Thereby, the data transmission circuit 115 transmits the compressed data D2 to the receiving terminal 120.
- the present embodiment can be applied to the case where there are three types of data. If there are four or more types of data, the number of compression circuits may be increased in parallel as appropriate according to the number of types. Note that by providing a memory in the data selector circuit 111, it is possible to perform compression processing on each of a plurality of types of data without increasing the number of compression circuits.
- the irreversible compression circuit 134 is used instead of the irreversible compression circuit 134.
- a compression circuit may be used. 4 illustrates a case where there are a plurality of cameras 100, camera data A1 including three or more types of data may be output from one camera 100.
- FIG. 5 is a diagram illustrating the data processing system 10 according to the second modification of the first embodiment.
- a plurality of data transmission circuits are provided separately for each of the compressed data B2 from the lossless compression circuit 112 and the compressed data C2 from the lossy compression circuit 113.
- the data processing device 110 includes a data transmission circuit 141 for transmitting the compressed data B2 and a data transmission circuit 142 for transmitting the compressed data C2.
- the data processing device 110 may not include the memory 114.
- the lossless compression circuit 112 outputs the compressed data B2 to the data transmission circuit 141. At this time, the lossless compression circuit 112 outputs a data transmission request signal R1 notifying that the compression is completed to the data transmission circuit 141. In response to receiving the data transmission request signal R1, the data transmission circuit 141 transmits the compressed data B2 output from the lossless compression circuit 112 to the receiving terminal 120.
- the lossy compression circuit 113 outputs the compressed data C2 to the data transmission circuit 142.
- the irreversible compression circuit 113 outputs a data transmission request signal R2 notifying that the compression is completed to the data transmission circuit 142.
- the data transmission circuit 142 transmits the compressed data C2 output from the lossy compression circuit 113 to the receiving terminal 120 in response to receiving the data transmission request signal R2.
- a data transmission circuit 141 for transmitting the compressed data B2 and a data transmission circuit 142 for transmitting the compressed data C2 are provided separately. Therefore, the data processing device 110 can perform data loss on the compressed data B2 from the lossless compression circuit 112 and the compressed data C2 from the irreversible compression circuit 113 without a memory for temporarily storing the compressed data. It can be sent separately without occurring.
- FIG. 6 is a diagram illustrating a data processing system 10 according to a third modification example of the first embodiment.
- separate channels Ch1 and Ch2 are provided for transmitting the compressed data B2 from the lossless compression circuit 112 and the compressed data C2 from the lossy compression circuit 113, respectively.
- the data processing apparatus 110 includes a data transmission circuit 150 corresponding to the channel Ch1 and the channel Ch2.
- the data processing device 110 may not include the memory 114.
- the lossless compression circuit 112 outputs the compressed data B2 to the data transmission circuit 150. At this time, the lossless compression circuit 112 outputs a data transmission request signal R1 notifying that the compression is completed to the data transmission circuit 150. In response to receiving the data transmission request signal R1, the data transmission circuit 150 transmits the compressed data B2 to the receiving terminal 120 via the channel Ch1.
- the irreversible compression circuit 113 outputs the compressed data C2 to the data transmission circuit 150. At this time, the irreversible compression circuit 113 outputs a data transmission request signal R2 notifying that the compression is completed to the data transmission circuit 150. In response to accepting the data transmission request signal R2, the data transmission circuit 150 transmits the compressed data C2 to the receiving terminal 120 via the channel Ch2.
- the data processing device 110 can perform data loss on the compressed data B2 from the lossless compression circuit 112 and the compressed data C2 from the irreversible compression circuit 113 without a memory for temporarily storing the compressed data. It can be sent separately without occurring.
- FIG. 7 is a diagram illustrating the data processing system 20 according to the second embodiment.
- the data processing apparatus communicates with the receiving terminal in a format compliant with Ethernet (registered trademark).
- the data processing system 20 includes a camera 100, a data processing device 210, and a receiving terminal 120 (receiving terminals 120a, 120b, and 120c).
- the data processing device 210 is communicably connected to the receiving terminal 120 via a communication path 52 compliant with, for example, Ethernet.
- the data processing device 210 includes a data selector circuit 111, a lossless compression circuit 112, a lossy compression circuit 113, an Ethernet header addition circuit 212, an Ethernet header addition circuit 213, a memory 114, and an Ethernet communication circuit 215. . That is, in the second embodiment, the Ethernet header addition circuit 212 and the Ethernet header addition circuit 213 are added, and the data transmission circuit 115 is replaced with the Ethernet communication circuit 215. Since other configurations are the same as those in the first embodiment, description thereof is omitted.
- FIG. 8 is a flowchart of a data processing method in the data processing apparatus 210 according to the second embodiment.
- the description of the same processing (S100 to S103) as in the first embodiment is omitted.
- the operation of each circuit of the data processing apparatus 210 will be described with reference to FIG.
- the lossless compression circuit 112 When the compression is completed, the lossless compression circuit 112 outputs the compressed data B2 to the Ethernet header addition circuit 212.
- the Ethernet header addition circuit 212 adds an Ethernet header related to the compressed data B2 to the compressed data B2 (S202a). Then, the Ethernet header adding circuit 212 writes the compressed data B3 to which the Ethernet header is added in a predetermined area of the memory 114.
- the Ethernet header adding circuit 212 when the Ethernet header adding circuit 212 adds an Ethernet header, the Ethernet header adding circuit 212 outputs a data transmission request signal R1 to the Ethernet communication circuit 215. Thereby, the Ethernet header adding circuit 212 requests the Ethernet communication circuit 215 to transmit data (S204a).
- the lossy compression circuit 113 When the compression is completed, the lossy compression circuit 113 outputs the compressed data C2 to the Ethernet header addition circuit 213.
- the Ethernet header addition circuit 213 adds an Ethernet header related to the compressed data C2 to the compressed data C2 (S202b). Then, the Ethernet header addition circuit 213 writes the compressed data C3 to which the Ethernet header is added in a predetermined area of the memory 114.
- the Ethernet header adding circuit 213 when the Ethernet header adding circuit 213 adds an Ethernet header, the Ethernet header adding circuit 213 outputs a data transmission request signal R2 to the Ethernet communication circuit 215. As a result, the Ethernet header addition circuit 213 requests the Ethernet communication circuit 215 to transmit data (S204b).
- the Ethernet communication circuit 215 starts transmitting compressed data input from the memory 114 (S205). Specifically, when receiving the data transmission request signal R1, the Ethernet communication circuit 215 takes out the compressed data B3 to which the header is added from the memory 114. Then, the Ethernet communication circuit 215 transmits the compressed data B3 with the header added to the receiving terminal 120 in a format compliant with Ethernet. On the other hand, when receiving the data transmission request signal R2, the Ethernet communication circuit 215 takes out the compressed data C3 to which the header is added from the memory 114. Then, the Ethernet communication circuit 215 transmits the compressed data C3 with the header added to the receiving terminal 120 in a format compliant with Ethernet.
- the data processing device 210 can transmit compressed data to the receiving terminal 120 in a format compliant with Ethernet.
- a network configuration such as a bus type or a star type can be constructed for the plurality of data processing devices 210 and the plurality of receiving terminals 120 (120a, 120b, 120c).
- a cable used in Ethernet communication is more resistant to noise than a cable in an analog format and a cable in an LVDS (Low voltage differential signaling) format. Therefore, a shield film is not required for the cable used for Ethernet communication. Therefore, by transmitting the compressed data in a format compliant with Ethernet, the cable can be thinned, and wiring becomes easy.
- an inexpensive cable can be used. This is particularly effective when a digital camera is connected for in-vehicle use.
- an Ethernet header is added to the compressed data.
- the Ethernet header includes information such as a time stamp as defined in Ethernet (registered trademark) AVB or the like.
- the reversible compression circuit 112 and the irreversible compression circuit 113 are provided in parallel. Therefore, the second embodiment can provide substantially the same effect as the first embodiment.
- FIG. 9 is a diagram illustrating a data processing system 20 according to a first modification of the second embodiment.
- the arrangement of the memory and the Ethernet header addition circuit is reversed compared to FIG.
- the data processing device 210 includes a memory 220 instead of the memory 114, and includes an Ethernet header addition circuit 222 instead of the Ethernet header addition circuit 212 and the Ethernet header addition circuit 213.
- the lossless compression circuit 112 stores the compressed data B2 in the memory 220 as in the example of FIG. At this time, the lossless compression circuit 112 outputs a data transmission request signal R1 to the Ethernet communication circuit 215.
- the Ethernet header adding circuit 222 adds an Ethernet header to the stored compressed data B2.
- the compressed data B3 to which the Ethernet header is added is stored in the memory 220.
- the irreversible compression circuit 113 stores the compressed data C2 in the memory 220 as in the example of FIG. At this time, the irreversible compression circuit 113 outputs the data transmission request signal R2 to the Ethernet communication circuit 215.
- the Ethernet header adding circuit 222 adds an Ethernet header to the stored compressed data C2.
- the memory 220 stores the compressed data C3 to which the Ethernet header is added.
- the Ethernet communication circuit 215 receives the data transmission request signal R1 and extracts the compressed data B3 with the header added from the memory 220 and transmits it to the receiving terminal 120. On the other hand, as in the example of FIG. 7, the Ethernet communication circuit 215 retrieves the compressed data C3 with the header added from the memory 220 and transmits it to the receiving terminal 120 when receiving the data transmission request signal R2.
- FIG. 10 is a diagram illustrating a data processing system 30 according to the third embodiment.
- the third embodiment is different from the other embodiments in that a plurality of data processing devices 110 according to the first embodiment are provided.
- a plurality of data processing devices 210 according to the second embodiment may be provided.
- a network is constructed using a plurality of data processing devices according to the first or second embodiment.
- the data processing system 30 includes camera data processing units 301, 302, 303, and 304, a relay device 300, and a receiving terminal 120.
- the camera data processing unit 301 includes a camera 100a and a data processing device 110a.
- the camera data processing unit 302 includes a camera 100b and a data processing device 110b.
- the camera data processing unit 303 includes a camera 100c and a data processing device 110c.
- the camera data processing unit 304 includes a camera 100d and a data processing device 110d.
- the cameras 100a, 100b, 100c, and 100d have substantially the same function as the camera 100 shown in FIG.
- the data processing devices 110a, 110b, 110c, and 110d have substantially the same configuration as the data processing device 110 shown in FIG.
- the data processing devices 110a, 110b, 110c, and 110d transmit the compressed data (compressed data B2 and C2) to the relay device 300, respectively.
- the relay device 300 is, for example, a hub, a router, or a switching hub in Ethernet.
- the relay device 300 has a function for relaying the compressed data output from the data processing devices 110a, 110b, 110c, and 110d to the receiving terminal 120.
- the relay device 300 may bundle the compressed data output from the data processing devices 110a, 110b, 110c, and 110d and transmit the bundled data to the receiving terminal 120.
- the compressed data may be synchronized with respect to the camera data obtained at the same timing by the cameras 100a, 100b, 100c, and 100d.
- a network is constructed by a plurality of data processing devices. Therefore, various processes can be performed in the receiving terminal 120 using the camera data acquired from the plurality of cameras 100.
- an application example of the third embodiment will be described.
- FIG. 11 is a diagram illustrating an example in which the data processing system 30 according to the third embodiment is mounted on a vehicle 900. Although FIG. 11 shows an example applied to a vehicle-mounted top view system, the present invention is not limited to this.
- the vehicle 900 includes camera data processing units 301, 302, 303, and 304 and a top view receiving terminal 310.
- the top view receiving terminal 310 has the functions of the relay device 300 and the receiving terminal 120 shown in FIG.
- the camera 100a of the camera data processing unit 301 captures the front of the vehicle 900 and acquires image data relating to the front.
- the camera 100a of the camera data processing unit 301 measures the distance to an object in front of the vehicle 900, and acquires distance data indicating the measured value.
- the data processing device 110a of the camera data processing unit 301 acquires camera data including these image data and distance data, and performs compression processing as described above. Then, the data processing device 110a transmits the compressed data related to the front to the top view receiving terminal 310.
- the camera data processing unit 302 acquires image data and distance data related to the right side of the vehicle 900, performs compression processing, and transmits the compressed data related to the right side to the top view receiving terminal 310.
- the camera data processing unit 303 acquires image data and distance data related to the rear of the vehicle 900, performs compression processing, and transmits the compressed data related to the rear to the top view receiving terminal 310.
- the camera data processing unit 304 acquires image data and distance data related to the left side of the vehicle 900, performs compression processing, and transmits the compressed data related to the left side to the top view receiving terminal 310.
- the top-view receiving terminal 310 restores the compressed data related to the above four directions (front, rear, right side, left side) and performs various processes. For example, the top-view receiving terminal 310 generates image related to the top view by synthesizing the image data related to the four sides and displays the image on the display.
- the top-view receiving terminal 310 warns the user when there is an object (obstacle) within a certain distance from the vehicle 900 (camera 100) in a certain direction (for example, the left side). Do some processing. For example, in this case, the top-view receiving terminal 310 may output an alarm, or may change the color of image data relating to the direction (for example, the left side) (for example, change to red). As described above, by constructing the system according to the third embodiment, various processes can be performed in the receiving terminal 120.
- the data processing apparatus has the memory, but it may have a data selection logic circuit instead of the memory.
- the data selection logic circuit is a circuit that receives compressed data transmitted from a plurality of compression circuits and then transmits the compressed data to the data transmission circuit. Since the time to be output from the data selection logic circuit to the data transmission circuit 115 is earlier than the time required for one compression, the data transmission circuit is provided before the next compressed data is output from the compression circuit without providing a memory. It is possible to send compressed data to.
- the data selection logic circuit transmits the compressed data to the data transmission circuit by setting by inputting an external signal or the like. For example, when it is desired to always process from the distance data in the camera data, the distance data can be transmitted first even when the distance data and the YUV image data are received simultaneously.
- the data processing apparatus has the lossless compression circuit and the lossy compression circuit.
- the plurality of compression circuits included in the data processing apparatus may be both reversible compression circuits or may be both irreversible compression circuits.
- the camera outputs a data group including a plurality of different types of data.
- the device that outputs the data group is not limited to the camera.
- the present embodiment can be applied to any device that can output a data group.
- the scanner may output a data group, or the recording device may output the data group.
- the data group may include, for example, image data obtained by scanning and data indicating characteristics of the image data.
- data indicating a recorded video and data related to the video (recording time, position data indicating a recording location, etc.) may be included.
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Abstract
Description
本実施の形態の説明に先立って、本実施の形態の概要について説明する。図1は、本実施の形態にかかるデータ処理装置1の概要を示す図である。図1に示すように、データ処理装置1は、データセレクタ回路2と、第1圧縮回路4aと、第2圧縮回路4bと、データ送信回路6とを有する。なお、図1には、2つの圧縮回路(第1圧縮回路4a及び第2圧縮回路4b)が示されているが、圧縮回路は3つ以上であってもよい。また、第1圧縮回路4aは、例えば非可逆性の圧縮を行い、第2圧縮回路4bは、例えば可逆性の圧縮を行うが、これに限られない。第1圧縮回路4aが可逆性の圧縮を行い、第2圧縮回路4bが非可逆性の圧縮を行ってもよい。さらに、第1圧縮回路4a及び第2圧縮回路4bが、共に非可逆性の圧縮を行ってもよいし、共に可逆性の圧縮を行ってもよい。
図2は、実施の形態1にかかるデータ処理システム10を示す図である。データ処理システム10は、カメラ100と、データ処理装置110と、受信端末120(受信端末120a,120b,120c)とを有する。データ処理装置110は、受信端末120と、例えばバス等の通信路50を介して通信可能に接続されている。データ処理装置110は、データセレクタ回路111と、可逆圧縮回路112と、非可逆圧縮回路113と、メモリ114と、データ送信回路115とを有する。
図3は、実施の形態1にかかるデータ処理装置110におけるデータ処理方法を示すフローチャートである。まず、データセレクタ回路111は、データ制御信号A2に基づいて、複数の異なる種類のデータを含むカメラデータA1を、これらのデータの種類ごとに分割する(S100)。
図4は、実施の形態1の第1の変形例にかかるデータ処理システム10を示す図である。図4においては、データ処理装置110に入力されるデータの種類が3つ以上である場合について示されている。具体的には、図4においては、データ処理システム10は、2つのカメラ100a,100bを有する。また、図4においては、データ処理装置110は、可逆圧縮回路112及び非可逆圧縮回路113に加えて、可逆圧縮回路134を有する。
図7は、実施の形態2にかかるデータ処理システム20を示す図である。実施の形態2においては、データ処理装置が、イーサネット(登録商標)に準拠した形式で、受信端末と通信を行う。
図9は、実施の形態2の第1の変形例にかかるデータ処理システム20を示す図である。図9においては、図7と比較して、メモリ及びイーサネットヘッダ付加回路の配置が逆となっている。
図10は、実施の形態3にかかるデータ処理システム30を示す図である。実施の形態3においては、実施の形態1にかかるデータ処理装置110が複数設けられている点で、他の実施の形態と異なる。なお、実施の形態3においては、実施の形態2にかかるデータ処理装置210が複数設けられているようにしてもよい。このように、実施の形態3においては、実施の形態1又は実施の形態2にかかるデータ処理装置を複数台用いて、ネットワークが構築されている。
なお、本実施の形態は上記実施の形態に限られたものではなく、趣旨を逸脱しない範囲で適宜変更することが可能である。例えば、上述した実施の形態においては、データ処理装置がメモリを有するとしたが、メモリの代わりに、データ選択論理回路を有してもよい。データ選択論理回路は、複数の圧縮回路から送信された圧縮データを受信してからデータ送信回路に送信する回路である。データ選択論理回路からデータ送信回路115へ出力する時間は、1回の圧縮にかかる時間よりも早いため、メモリを設けることなく、次の圧縮データが圧縮回路より出力される前に、データ送信回路へ圧縮データを送信することが可能となる。 また、外部信号の入力等による設定により、データ選択論理回路が圧縮データをデータ送信回路に送信する順番を入れ替えるようにすることも可能である。例えば、カメラデータのうち必ず距離データから処理したい場合、距離データ及びYUV画像データが同時に受け付けられた場合でも、先に距離データを送信するということが可能になる。
2 データセレクタ回路
4a 第1圧縮回路
4b 第2圧縮回路
6 データ送信回路
10 データ処理システム
20 データ処理システム
30 データ処理システム
100 カメラ
110 データ処理装置
111 データセレクタ回路
112 可逆圧縮回路
113 非可逆圧縮回路
114 メモリ
115 データ送信回路
120 受信端末
134 可逆圧縮回路
141 データ送信回路
142 データ送信回路
150 データ送信回路
210 データ処理装置
212 イーサネットヘッダ付加回路
213 イーサネットヘッダ付加回路
215 イーサネット通信回路
220 メモリ
222 イーサネットヘッダ付加回路
300 中継装置
301 カメラデータ処理ユニット
302 カメラデータ処理ユニット
303 カメラデータ処理ユニット
304 カメラデータ処理ユニット
310 トップビュー用受信端末
Claims (19)
- 複数の種類のデータを含むデータ群を、前記複数の種類のデータそれぞれに分割するデータセレクタ回路と、
前記複数の種類のデータそれぞれの種類に応じて、前記複数の種類のデータをそれぞれ並行して圧縮する複数の圧縮回路と、
前記圧縮された複数の種類のデータを端末に送信するデータ送信回路と
を有するデータ処理装置。 - 前記複数の圧縮回路のうちの第1の圧縮回路は、前記複数の種類のデータのうちの第1の種類のデータを第1の形式で圧縮し、前記複数の圧縮回路のうちの第2の圧縮回路は、前記複数の種類のデータのうちの第2の種類のデータを前記第1の形式とは異なる第2の形式で圧縮する
請求項1に記載のデータ処理装置。 - 前記第1の形式は非可逆性の圧縮形式であり、前記第2の形式は可逆性の圧縮形式である
請求項2に記載のデータ処理装置。 - 前記第1の種類のデータは、前記端末においてユーザによる視認の対象となるデータであり、前記第2の種類のデータは、前記端末において演算処理の対象となるデータである
請求項3に記載のデータ処理装置。 - 前記複数の圧縮回路それぞれは、圧縮処理が終了したときに、前記データ送信回路に対してデータ送信要求信号を出力し、
前記データ送信回路は、前記データ送信要求信号に基づいて、前記圧縮された複数の種類のデータのそれぞれを端末に送信する
請求項1に記載のデータ処理装置。 - 前記複数の圧縮回路それぞれによって圧縮された複数の種類のデータを格納するメモリ
をさらに有する請求項1に記載のデータ処理装置。 - 前記データ送信回路は、イーサネット(登録商標)に準拠した形式で、前記圧縮された複数の種類のデータを前記端末に送信する
請求項1に記載のデータ処理装置。 - 前記複数の圧縮回路それぞれによって圧縮されたデータにイーサネットヘッダを付加するヘッダ付加回路
をさらに有し、
前記データ送信回路は、前記イーサネットヘッダが付加されたデータを、前記端末に送信する
請求項7に記載のデータ処理装置。 - 前記データ送信回路は、前記圧縮された複数の種類のデータそれぞれを、別個に送信する
請求項1に記載のデータ処理装置。 - 前記データセレクタ回路は、前記データ群の送信元からデータ制御信号を受信したときに、前記データ群を分割する
請求項1に記載のデータ処理装置。 - 前記データ制御信号は、前記データ群における前記複数の種類のデータそれぞれの構成を指定する情報を含み、
前記データセレクタ回路は、前記データ制御信号に基づいて、前記データ群を分割する
請求項10に記載のデータ処理装置。 - 前記データセレクタ回路には、前記データ群における前記複数の種類のデータそれぞれの構成を示す情報が予め設定されている
請求項1に記載のデータ処理装置。 - 請求項1に記載の複数のデータ処理装置と、
前記複数のデータ処理装置から送信された前記圧縮された複数の種類のデータを、端末に送信する中継装置と
を有するデータ処理システム。 - 複数の種類のデータを含むデータ群を、前記複数の種類のデータそれぞれに分割し、
前記複数の種類のデータそれぞれの種類に応じて、前記複数の種類のデータをそれぞれ並行して圧縮し、
前記圧縮された複数の種類のデータを端末に送信する
データ処理方法。 - 前記複数の種類のデータのうちの第1の種類のデータを第1の形式で圧縮し、前記複数の種類のデータのうちの第2の種類のデータを前記第1の形式とは異なる第2の形式で圧縮する
請求項14に記載のデータ処理方法。 - 前記第1の形式は非可逆性の圧縮形式であり、前記第2の形式は可逆性の圧縮形式である
請求項15に記載のデータ処理方法。 - 前記第1の種類のデータは、前記端末においてユーザによる視認の対象となるデータであり、前記第2の種類のデータは、前記端末において演算処理の対象となるデータである
請求項16に記載のデータ処理方法。 - イーサネット(登録商標)に準拠した形式で、前記圧縮された複数の種類のデータを前記端末に送信する
請求項14に記載のデータ処理方法。 - 前記圧縮されたデータにイーサネットヘッダを付加し、
前記イーサネットヘッダが付加されたデータを、前記端末に送信する
請求項18に記載のデータ処理方法。
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2015
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- 2015-03-12 KR KR1020167006323A patent/KR20170127345A/ko unknown
- 2015-03-12 JP JP2016507708A patent/JP6438456B2/ja active Active
- 2015-03-12 WO PCT/JP2015/001374 patent/WO2016142969A1/ja active Application Filing
- 2015-03-12 CN CN201580001866.7A patent/CN106164877B/zh active Active
- 2015-03-12 CN CN202110332377.7A patent/CN113157622A/zh active Pending
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2018
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US20180150428A1 (en) | 2018-05-31 |
CN106164877A (zh) | 2016-11-23 |
EP3091440A4 (en) | 2017-04-26 |
JP6438456B2 (ja) | 2018-12-12 |
US10268626B2 (en) | 2019-04-23 |
JPWO2016142969A1 (ja) | 2017-12-28 |
US9946678B2 (en) | 2018-04-17 |
CN106164877B (zh) | 2021-05-04 |
CN113157622A (zh) | 2021-07-23 |
US20170039160A1 (en) | 2017-02-09 |
KR20170127345A (ko) | 2017-11-21 |
EP3091440A1 (en) | 2016-11-09 |
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