WO2016125669A1 - Semiconductor module - Google Patents

Semiconductor module Download PDF

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Publication number
WO2016125669A1
WO2016125669A1 PCT/JP2016/052445 JP2016052445W WO2016125669A1 WO 2016125669 A1 WO2016125669 A1 WO 2016125669A1 JP 2016052445 W JP2016052445 W JP 2016052445W WO 2016125669 A1 WO2016125669 A1 WO 2016125669A1
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WO
WIPO (PCT)
Prior art keywords
semiconductor module
sealing resin
insulating base
semiconductor
lead terminals
Prior art date
Application number
PCT/JP2016/052445
Other languages
French (fr)
Japanese (ja)
Inventor
山本　祐樹
要一 守屋
Original Assignee
株式会社村田製作所
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 株式会社村田製作所 filed Critical 株式会社村田製作所
Priority to JP2016573311A priority Critical patent/JP6447842B2/en
Publication of WO2016125669A1 publication Critical patent/WO2016125669A1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/07—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/18—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different subgroups of the same main group of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/2612—Auxiliary members for layer connectors, e.g. spacers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/33—Structure, shape, material or disposition of the layer connectors after the connecting process of a plurality of layer connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/33—Structure, shape, material or disposition of the layer connectors after the connecting process of a plurality of layer connectors
    • H01L2224/331—Disposition
    • H01L2224/3318—Disposition being disposed on at least two different sides of the body, e.g. dual array
    • H01L2224/33181—On opposite sides of the body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Definitions

  • the present invention relates to a semiconductor module, and more particularly to a semiconductor module in which a lead terminal is bonded to an insulating base material and then sealed with a sealing resin.
  • Semiconductor modules such as inverters are used as power sources for in-vehicle equipment and industrial equipment.
  • a semiconductor module is configured by a combination of a plurality of semiconductor switching elements or a combination of a plurality of switching elements and a plurality of free-wheeling diodes.
  • FIG. 14A and 14B show a semiconductor module (semiconductor device) 500 disclosed in Patent Document 1.
  • FIG. 14A is a plan view of the semiconductor module 500 in which a sealing resin 108 and a heat radiating plate 107a described later are omitted.
  • FIG. 14B is a cross-sectional view of the semiconductor module 500, and shows a portion XX in FIG.
  • the semiconductor module 500 is a three-phase output inverter, and three sets of circuits Cir1, Cir2, and Cir3 having the same configuration are connected in parallel.
  • the circuit Cir1 will be described as an example. 14B shows a cross section of the circuit Cir1 portion of the semiconductor module 500.
  • the circuit Cir1 includes two semiconductor switching elements (IGBT) 101a and 101b, two diodes 102a and 102b, lead terminals 105a, 105b, 105c, 105d, and 105e, and heat sinks (heat sinks) 107a and 107b. It is configured.
  • IGBT semiconductor switching elements
  • one power electrode pad (not shown) of the semiconductor switching element 101 a is joined to the lead terminal 105 a by the solder 104, and the other power electrode pad (not shown) is joined to the heat radiating plate 107 a by the solder 104. It is joined to.
  • a signal electrode pad (not shown) of the semiconductor switching element 101a is wire-bonded to the lead terminal 105b by a wire 103a.
  • a diode 102a is connected in parallel with the semiconductor module 101a between the lead terminal 105a and the heat sink 107a.
  • one power electrode pad (not shown) of the semiconductor switching element 101b is joined to the lead terminal 105a by the solder 104, and the other power electrode pad (not shown) is joined to the heat sink 107b by the solder 104.
  • a signal electrode pad (not shown) of the semiconductor switching element 101b is wire-bonded to the lead terminal 105c by a wire 103b.
  • a diode 102b is connected in parallel with the semiconductor module 101b between the lead terminal 105a and the heat dissipation plate 107b.
  • the remaining two sets of circuits Cir2 and Cir3 also have the same structure as the circuit Cir1 described above. Therefore, in the semiconductor module 500, three sets of circuits Cir1, Cir2, and Cir3 are connected in parallel between the heat sinks 107a and 107b. As common lead terminals, the lead terminal 105d is connected to the heat radiating plate 107a, and the lead terminal 105e is connected to the heat radiating plate 107b.
  • a structure S in which three sets of circuits Cir1, Cir2, and Cir3 are connected in parallel between a heat sink 107a to which the lead terminal 105d is connected and a heat sink 107b to which the lead terminal 105e is connected is made of a sealing resin 108 is sealed.
  • Lead terminals 105a, 105b, 105c, 105d, and 105e are led out from the side surface of the sealing resin. Further, the heat radiating plates 107 a and 107 b are exposed on both main surfaces of the sealing resin 108.
  • a large number of lead terminals are led out from the sealing resin 108. That is, at least the lead terminals 105a, 105b, and 105c connected to the circuit Cir1, the lead terminals 105a, 105b, and 105c connected to the circuit Cir2, and the lead terminals 105a, 105b, and 105c connected to the circuit Cir3 are common. Lead terminals 105d and 105e are led out from the sealing resin 108 to the outside.
  • the semiconductor module 500 having a structure in which the large number of lead terminals 105a to 105e are arranged in the sealing resin 108 without being fixed is difficult to manufacture and easily causes poor quality such as poor connection.
  • the signal electrode pad (not shown) of the semiconductor switching element 101a and the lead terminal 105b are wire-bonded by the wire 103a, and the signal electrode pad (semiconductor switching element 101b) (Not shown) and the lead terminal 105c are wire-bonded by the wire 103b.
  • the lead terminals 105b and 105c are not fixed to something, the wire bonding is difficult, and the quality defect due to poor connection is also caused. Easy to wake up.
  • the sealing resin 108 is formed in the manufacturing process of the semiconductor module 500 by three sets of circuits Cir1 between the heat sink 107a to which the lead terminal 105d is connected and the heat sink 107b to which the lead terminal 105e is connected.
  • the structure S in which Cir2 and Cir3 are connected in parallel is housed in a mold (not shown) with the lead terminals 105a, 105b, 105c, 105d, and 105e led out to the outside, and resin is placed in the mold.
  • a method of forming by transfer molding is common.
  • the lead terminals 105a to 105e are not fixed, the lead terminals 105a to 105e are pushed and moved by the resin when the sealing resin 108 is formed by transfer molding the resin in the mold. Wire bonding by 103a and 103b may be disconnected, or bonding by the solder 104 may be disconnected, resulting in poor quality due to poor connection.
  • wire bonding between the lead terminal 105b by the wire 103a and the signal electrode pad of the semiconductor switching element 101a or wire bonding between the lead terminal 105c by the wire 103b and the signal electrode pad of the semiconductor switching element 101b may be disconnected. was there. Further, there is a possibility that the bonding between the lead terminal 105a and the other electrode pad of the semiconductor switching element 101a, the one electrode pad of the semiconductor switching element 101b, and the diodes 102a and 102b due to the solder 104 may be broken. Further, there is a possibility that the bonding between the lead terminal 105d and the heat radiating plate 107a and the bonding between the lead terminal 105e and the heat radiating plate 107b are disconnected by solder (not shown).
  • the semiconductor module 500 having a structure in which a large number of lead terminals 105a to 105e are not fixed and disposed in the sealing resin 108 is difficult to manufacture and easily causes poor quality such as poor connection. It was.
  • the semiconductor module of the present invention includes at least a plurality of semiconductor switching elements and a plurality of lead terminals in a sealing resin.
  • the sealing resin is further sealed with a plurality of plate-like insulating base materials, lead terminals are joined to the insulating base material, and the insulating base material is vertically moved in the sealing resin.
  • the lead terminals are also arranged in at least three layers at intervals in the vertical direction in the sealing resin by being arranged in at least three layers with a gap therebetween, and the semiconductor switching element is The signal electrode pad and one power electrode pad are formed on one main surface, the other power electrode pad is formed on the other main surface, and the power electrode pads formed on both main surfaces of the semiconductor switching element are directly Or indirectly, the signal electrode pad bonded to the predetermined lead terminal and formed on one main surface of the semiconductor switching element is wire-bonded to the predetermined lead terminal by a wire, and at least a part of the lead terminal is The lead is led out from the sealing resin.
  • an opening penetrating between both main surfaces is formed in the insulating base material, and at least a part of the lead terminal joined to the insulating base material is disposed in the opening.
  • a lead terminal joined to the insulating base material and a member arranged on the main surface side where the lead terminal of the insulating base material is not joined for example, a metal block, Bonding with solder or the like can be performed.
  • the insulating base material can be made of a resin containing a filler, and the sealing resin can be made of a resin not containing a filler.
  • the insulating base material and the sealing resin are made of a resin containing a filler, and the content volume ratio of the filler of the sealing resin can be lower than the content volume ratio of the filler of the insulating base material.
  • the insulating base material can be formed of a resin having a high strength and containing a sufficient amount of filler, and the sealing resin can be formed of a resin having high fluidity and easy to transfer mold. .
  • the insulating base is made of ceramic
  • the lead terminal is bonded to the insulating substrate through an alloy containing at least an active metal that reacts with the ceramic components, Ag, and Cu. Can do.
  • the lead terminal can be firmly bonded to the insulating substrate having high strength.
  • the lead terminals arranged in at least three layers are joined to two different insulating substrates on both main surfaces, and the two insulations
  • the sealing resin can be filled between the substrates.
  • the insulating base is formed of a resin containing a filler and the sealing resin is formed of a resin not containing a filler, or the insulating base and the sealing resin are resins containing a filler.
  • the volume fraction of filler in the insulating base material is higher than the volume fraction of filler in the sealing resin, the linear expansion coefficient of the insulating base material and the linear expansion coefficient of the sealing resin And will be different.
  • the linear expansion coefficient of the insulating base material is smaller than the linear expansion coefficient of the sealing resin.
  • the semiconductor switching element generates heat in the semiconductor module, if the linear expansion coefficient of the insulating base material and the linear expansion coefficient of the sealing resin are different, the interface between the two may be peeled off. If the interface between the insulating substrate and the sealing resin is peeled off, the wire bonding may be disconnected or the bonding by solder may be disconnected, resulting in a quality defect due to poor connection.
  • the lead terminal is bonded to two different insulating bases on both main surfaces and the sealing resin is filled between the two insulating bases, the lead terminal is sealed with the insulating base due to the difference in linear expansion coefficient. Separation of the interface with the stop resin can be suppressed.
  • a power electrode pad formed on one main surface of at least one semiconductor switching element may be bonded to a predetermined lead terminal via a metal block.
  • the distance between the semiconductor switching element and the lead terminal can be increased, wire bonding between the signal electrode pad of the semiconductor switching element and another lead terminal by a wire is facilitated.
  • the heat radiating plate may be exposed from at least one main surface of the sealing resin. In this case, the heat generated by the semiconductor switching element can be diffused efficiently.
  • a passive element may be further sealed in the sealing resin.
  • a passive element if a shunt resistor element is inserted between a semiconductor switching element and an intermediate terminal and sealed with a sealing resin, the voltage between both electrodes of the shunt resistor element is monitored. Abnormal current can be detected. Alternatively, abnormal heat generation of the semiconductor switching element can be detected by sealing a thermistor element connected to another circuit system with a sealing resin as a passive element.
  • a reflux diode may be further sealed in the sealing resin.
  • the semiconductor module can be an inverter, for example.
  • the semiconductor module of the present invention is easy to manufacture because the lead terminal is bonded to the insulating base material and then sealed with the sealing resin. For example, the process of wire bonding to the lead terminal and the process of forming the sealing resin by transfer molding are easy.
  • the semiconductor module of the present invention is sealed with the sealing resin after the lead terminals are bonded to the insulating base material, in the manufacturing process, the connection failure due to the disconnection of the wire bonding or the disconnection of the solder bonding Is less likely to occur and is highly reliable.
  • FIG. 1A is a perspective view showing the semiconductor module 100 according to the first embodiment.
  • FIG. 1B is a cross-sectional view showing the semiconductor module 100 and shows a portion XX in FIG.
  • FIG. 2 is an exploded perspective view showing the semiconductor module 100.
  • FIG. 3 is an equivalent circuit diagram of the semiconductor module 100.
  • 4 (A) and 4 (B) show the case where the insulating base is formed of one insulating base 6x having a large thickness and the case where the insulating base is formed of two insulating bases 6b and 6c having a small thickness. It is explanatory drawing which shows each interface stress.
  • FIG. 5 is a perspective view showing steps applied in an example of a method for manufacturing the semiconductor module 100.
  • FIG. 5 is a perspective view showing steps applied in an example of a method for manufacturing the semiconductor module 100.
  • FIG. 6 is a perspective view showing a process applied in an example of a manufacturing method of the semiconductor module 100.
  • FIG. 7 is a perspective view showing steps applied in an example of a method for manufacturing the semiconductor module 100.
  • FIG. 8 is a perspective view showing steps applied in an example of a method for manufacturing the semiconductor module 100.
  • FIG. 9 is a perspective view showing steps applied in an example of a method for manufacturing the semiconductor module 100.
  • FIG. 10 is a perspective view showing steps applied in an example of a method for manufacturing the semiconductor module 100.
  • FIG. 11 is a cross-sectional view showing a semiconductor module 200 according to the second embodiment.
  • FIG. 12 is a perspective view showing a semiconductor module 300 according to the third embodiment.
  • FIG. 13A is a perspective view showing a semiconductor module 400 according to the fourth embodiment.
  • FIG. 13B is an equivalent circuit diagram of the semiconductor module 400.
  • FIG. 14A is a plan view showing a conventional semiconductor module 500 disclosed in Patent Document 1.
  • FIG. 14B is a cross-sectional view showing the semiconductor module 500, and shows a portion XX in FIG.
  • First Embodiment 1A, 1B, 2 and 3 show a semiconductor module 100 according to a first embodiment of the present invention.
  • FIG. 1A is a perspective view of the semiconductor module 100.
  • FIG. 1B is a cross-sectional view of the semiconductor module 100 and shows a portion XX in FIG. Note that FIG. In (B), illustration of the sealing resin 8 described later is omitted, and the portion is indicated by a broken line.
  • FIG. 2 is an exploded perspective view of the semiconductor module 100.
  • the sealing resin 8 is not shown.
  • FIG. 3 is an equivalent circuit diagram of the semiconductor module 100.
  • the semiconductor module 100 is an inverter.
  • the semiconductor module 100 includes four rectangular and plate-like insulating bases 6a, 6b, and 6c6d.
  • the insulating bases 6a to 6d are made of, for example, a resin such as epoxy or polyimide filled with a filler for increasing the strength.
  • a rectangular opening 7a is formed so as to penetrate between both main surfaces.
  • Two rectangular openings 7b and 7c are formed in the central portion of the insulating base 6b so as to penetrate between both main surfaces.
  • a rectangular opening 7d is formed in the central portion of the insulating base 6c so as to penetrate between both main surfaces.
  • Two rectangular openings 7e and 7f are formed in the central portion of the insulating base 6d so as to penetrate between both main surfaces.
  • the opening areas of the openings 7a, 7b, 7d, and 7e are larger than the opening areas of the openings 7c and 7f.
  • An L-shaped plate-like lead terminal 51a is fixed to one main surface (the upper main surface in FIG. 2) of the insulating base 6a.
  • the lead terminal 51a is exposed from the opening 7a to the other main surface (lower main surface in FIG. 2) of the insulating base 6a.
  • the insulating base 6b and the insulating base 6c are integrated by fixing six lead terminals 52a, 52b, 52c, 52d, 52e, 52f between them.
  • the widths of the lead terminals 52a, 52b, and 52c are larger than the widths of the lead terminals 52d, 52e, and 52f.
  • the lead terminals 52a, 52b, 52c are led out from the insulating bases 6b and 6c along one side of the insulating bases 6b and 6c, and the other ends are exposed from the openings 7b and 7d.
  • the lead terminals 52d, 52e, 52f have one end led out from the insulating bases 6b and 6c along the other side of the insulating bases 6b and 6c, and the other end exposed from the opening 7c. It is fixed.
  • An L-shaped plate-like lead terminal 53a is fixed to the other main surface (lower main surface in FIG. 2) of the insulating base 6d.
  • the lead terminal 53a is exposed from the opening 7e to the one main surface (upper main surface in FIG. 2) side of the insulating base 6d.
  • three lead terminals 53b, 53c, 53d are fixed to the other main surface of the insulating base 6d.
  • the widths of the lead terminals 53b, 53c, and 53d are the same as the widths of the lead terminals 52d, 52e, and 52f.
  • the lead terminals 53b, 53c, 53d have one end led out from the insulating base 6d along one side of the insulating base 6d, and the other end of the lead terminals 53b, 53c, 53d from the opening 7f.
  • the main surface is exposed and fixed.
  • metals such as Cu, Fe, Ni, Sn, Mg, Al, Cr, and Zr are used.
  • the semiconductor module 100 includes six semiconductor switching elements 1a, 1b, 1c, 1d, 1e, and 1f.
  • MOSFETs are used as the semiconductor switching elements 1a to 1f. Since the semiconductor module 100 uses MOSFETs for the semiconductor switching elements 1a to 1f, an inverter is configured without using a free-wheeling diode.
  • Each of the semiconductor switching elements 1a to 1f has one main surface (upper main surface in FIG. 2), one power electrode pad (not shown), and a signal electrode pad (shown with reference numerals).
  • the other power supply electrode pad (not shown) is formed on the other main surface (the lower main surface in FIG. 2).
  • the other power electrode pad is joined to the lead terminal 52a fixed between the insulating bases 6b and 6c at the opening 7b portion by the solder 4.
  • the other power electrode pad is joined to the lead terminal 52b fixed between the insulating bases 6b and 6c at the opening 7b portion by the solder 4.
  • the other power electrode pad is joined by solder 4 to a lead terminal 52c fixed between the insulating bases 6b and 6c at the opening 7b portion.
  • the semiconductor switching elements 1d, 1e, and 1f are joined to the lead terminals 53a fixed to the insulating base 6d by the solder 4 at the openings 7e.
  • the signal electrode pad of the semiconductor switching element 1a is wire-bonded to the lead terminal 52d fixed between the insulating bases 6b and 6c at the opening 7c portion by the wire 3a.
  • the signal electrode pad of the semiconductor switching element 1b is wire-bonded to the lead terminal 52e fixed between the insulating base materials 6b and 6c at the opening 7c portion by the wire 3b.
  • the signal electrode pad of the semiconductor switching element 1c is wire-bonded to the lead terminal 52f fixed between the insulating base materials 6b and 6c at the opening 7c portion by the wire 3c.
  • the signal electrode pad of the semiconductor switching element 1d is wire-bonded to the lead terminal 53b fixed to the insulating base 6d at the opening 7f portion by the wire 3d.
  • the signal electrode pad of the semiconductor switching element 1e is wire-bonded to the lead terminal 53c fixed to the insulating base 6d at the opening 7f portion by the wire 3e.
  • the signal electrode pad of the semiconductor switching element 1f is wire-bonded to the lead terminal 53d fixed to the insulating base 6d at the opening 7f by the wire 3f.
  • a metal such as Al, Au, or Cu is used.
  • a rectangular parallelepiped metal block 2 a is joined to one power supply electrode pad of the semiconductor switching element 1 a by solder 4.
  • a rectangular parallelepiped metal block 2b is joined to one power supply electrode pad of the semiconductor switching element 1b by solder 4.
  • a rectangular parallelepiped metal block 2c is joined to one power electrode pad of the semiconductor switching element 1c by solder 4.
  • a rectangular parallelepiped metal block 2d is joined by solder 4 to one power supply electrode pad of the semiconductor switching element 1d.
  • a rectangular parallelepiped metal block 2e is joined by solder 4 to one power supply electrode pad of the semiconductor switching element 1e.
  • a rectangular parallelepiped metal block 2 f is joined to one power supply electrode pad of the semiconductor switching element 1 f by solder 4.
  • metals such as Cu, Al, Fe, and Ag are used.
  • the metal blocks 2a, 2b, and 2c are joined by solder 4 to the lead terminals 51a fixed to the insulating base 6a at the opening 7a portion.
  • the metal block 2d is joined to the lead terminal 52a fixed between the insulating base materials 6b and 6c by the solder 4 at the opening 7d portion.
  • the metal block 2e is joined to the lead terminal 52b fixed between the insulating base materials 6b and 6c by the solder 4 at the opening 7d portion.
  • the metal block 2f is joined to the lead terminal 52c fixed between the insulating base materials 6b and 6c by the solder 4 at the opening 7d portion.
  • the semiconductor switching elements 1a to 1f, the metal blocks 2a to 2f, the lead terminals 51a to 53d, the insulating bases 6a to 6d, and the like are integrated to form the structure S.
  • the structure S is sealed in the sealing resin 8 with the lead terminals 51a to 53d led out from the side.
  • the sealing resin 8 for example, epoxy, polyimide or the like is used.
  • the sealing resin 8 Since the sealing resin 8 is formed by transfer molding as described later, high fluidity is required. Therefore, the sealing resin 8 does not contain a filler, or even if contained, the volume content of the filler of the sealing resin 8 is the content volume of the filler of the resin used for the insulating base materials 6a to 6d. It is set lower than the rate.
  • the sealing resin 8 is also filled between the insulating base 6b and the insulating base 6c.
  • This structure has a function of preventing peeling at the interface between the insulating bases 6b and 6c and the sealing resin 8.
  • the resin used for the insulating bases 6a to 6d is filled with a filler to increase the strength.
  • the filler does not contain, or even if contained, the volume ratio of the filler is the insulating base materials 6a to 6d. It is set lower than the content volume ratio of the filler of the resin used.
  • a difference occurs between the linear expansion coefficient of the insulating base materials 6a to 6d and the linear expansion coefficient of the sealing resin 8.
  • the linear expansion coefficient of the insulating base materials 6a to 6d is about 10 to 15 ppm / ° C.
  • the linear expansion coefficient of the sealing resin 8 is 20 ppm / ° C. or more.
  • the insulating base 6x is divided into two insulating bases 6b and 6c having a small thickness and sealed between the insulating bases 6b and 6c. Resin 8 was filled. As a result, the difference in volume displacement between the sealing resin 8 and the insulating base materials 6b and 6c is reduced, and the interface stress is reduced, so that the insulating base materials 6b and 6c are prevented from peeling off from the sealing resin 8. If the interface between the insulating bases 6b and 6c and the sealing resin 8 is peeled off, the wire bondings 3a to 3f may be disconnected or the bonding by the solder 4 may be disconnected, resulting in poor connection. There is no such fear.
  • the semiconductor module 100 according to the first embodiment of the present invention having the above structure constitutes an inverter having the equivalent circuit shown in FIG.
  • the lead terminal 53a corresponds to the P-side terminal
  • the lead terminal 51a corresponds to the N-side terminal
  • the lead terminals 52a, 52b, and 52c correspond to intermediate terminals, respectively.
  • the lead terminals 52d, 52e, 52f, 53b, 53c, and 53d correspond to gate terminals, respectively.
  • the semiconductor module 100 according to the first embodiment can be manufactured by, for example, the method shown in FIGS. 5 to 10 are perspective views.
  • insulating base materials 6a to 6d and lead terminals 51a to 53d are prepared.
  • An opening 7a is previously formed in the insulating base 6a.
  • Openings 7b and 7c are formed in the insulating base 6b in advance.
  • An opening 7d is formed in advance in the insulating base 6d.
  • Openings 7e and 7f are formed in advance in the insulating base 6d.
  • the lead terminals 51a to 53d are fixed to the insulating bases 6a to 6d. Fixing is performed by, for example, an adhesive. The state after fixing is shown in FIG.
  • the semiconductor switching elements 1a to 1f are prepared. Subsequently, as shown in FIG. 7, the other power supply electrode pads (formed on the lower main surface of the semiconductor switching elements 1a to 1f in FIG. 7) of the semiconductor switching elements 1a to 1f are soldered (see FIG. 7). To the lead terminals 52a to 52c and 53a. More specifically, in the opening 7b, the other power electrode pad of the semiconductor switching element 1a is used as the lead terminal 52a, the other power electrode pad of the semiconductor switching element 1b is used as the lead terminal 52b, and the other power supply of the semiconductor switching element 1c is used. The electrode pads are bonded to the lead terminals 52c, respectively. Further, in the opening 7e, the other power electrode pads of the semiconductor switching elements 1d to 1f are respectively joined to the lead terminals 53a.
  • the lead terminals 52a to 52c are fixed to the insulating bases 6b and 6c in advance and the lead terminal 53a is fixed to the insulating base 6d, the lead terminals are arranged individually without being fixed.
  • the semiconductor switching elements 1a to 1f are more easily joined to the lead terminals 52a to 52c and 53a than in the case of the above. That is, the semiconductor module 100 is easier to manufacture than the conventional one.
  • the metal blocks 2a to 2f are prepared. Subsequently, as shown in FIG. 8, solder (not shown) is applied to one power supply electrode pad (formed on the upper main surface of each semiconductor switching element 1a to 1f in FIG. 8) of the semiconductor switching elements 1a to 1f.
  • the metal blocks 2a to 2f are joined together. More specifically, the metal block 2a is provided on one power electrode pad of the semiconductor switching element 1a, the metal block 2b is provided on one power electrode pad of the semiconductor switching element 1b, and the metal block is provided on one power electrode pad of the semiconductor switching element 1c.
  • the signal electrode pads (not shown but provided with reference numerals) of the semiconductor switching elements 1a to 1f and the lead terminals 52d to 52f and 53b to 53d are connected to the wires 3a to 3d. Wire bonding is performed by 3f. More specifically, in the opening 7c portion, the signal electrode pad of the semiconductor switching element 1a and the lead terminal 52d are connected by the wire 3a, and the signal electrode pad of the semiconductor switching element 1b and the lead terminal 52e are connected by the wire 3b, thereby the semiconductor switching element 1c. The signal electrode pads and the lead terminals 52f are wire-bonded with the wires 3c.
  • the signal electrode pad of the semiconductor switching element 1d and the lead terminal 53b are connected by the wire 3d
  • the signal electrode pad of the semiconductor switching element 1e and the lead terminal 53c are connected by the wire 3e and the signal electrode of the semiconductor switching element 1f.
  • the pad and the lead terminal 53d are wire-bonded with the wire 3f.
  • the lead terminals 52a to 52f are fixed to the insulating bases 6b and 6c in advance, and the lead terminals 53a to 53d are fixed to the insulating base 6d.
  • wire bonding of the wires 3a to 3f is easier than in the case where the semiconductor switching element is bonded to such a lead terminal. That is, the semiconductor module 100 is easier to manufacture than the conventional one.
  • the metal blocks 2a to 2f and the lead terminals 51a and 52a to 52c are joined by solder (not shown). More specifically, the metal blocks 2a to 2c and the lead terminal 51a are joined to each other at the opening 7b. Further, in the openings 7b and 7d, the metal block 2d and the lead terminal 52a, the metal block 2e and the lead terminal 52b, and the metal block 2f and the lead terminal 52c are joined, respectively. As a result, the insulating bases 6a to 6d to which the lead terminals 51a to 53d are fixed, the semiconductor switching elements 1a to 1f, the metal blocks 2a to 2f, and the like are integrated to form the structure S.
  • the metal blocks 2d to 2f and the metal blocks 2d to 2f are used rather than the case where the lead terminals are individually arranged without being fixed. It is easy to join the lead terminals 52a to 52c with solder. That is, the semiconductor module 100 is easier to manufacture than the conventional one.
  • the structure S is housed in a mold with the lead terminals 51a to 53d led out to the outside. Subsequently, the resin is transfer-molded in the mold to form the sealing resin 8, the lead terminals 51a to 53d are led out to the outside, and the structure S is sealed in the sealing resin 8, The semiconductor module 100 according to one embodiment is completed.
  • the lead terminal 51a is fixed to the insulating base 6a in advance, the lead terminals 52a to 52f are fixed to the insulating bases 6b and 6c, and the lead terminals 53a to 53d are fixed to the insulating base 6d. Therefore, it is easy to accommodate them in the mold. Further, by being fixed to the insulating bases 6a to 6d, the lead terminals 51a to 53d are restrained from being moved by being pushed by the resin when the resin is transfer-molded into the mold, and wire bonding is prevented. The disconnection or the disconnection by soldering is suppressed. That is, the semiconductor module 100 is easier to manufacture and more reliable than the conventional one.
  • FIG. 11 shows a semiconductor module 200 according to the second embodiment.
  • FIG. 11 is a cross-sectional view of the semiconductor module 200.
  • MOSFETs are used for the semiconductor switching elements 1a to 1s. Therefore, in the semiconductor module 100, an inverter is configured without using a reflux diode.
  • IGBTs Insulated Gate Bipolar Transistors
  • diodes 9a to 9f are used in the semiconductor module 200 (only the diodes 9c and 9f are shown in FIG. 11).
  • lead terminals 51s and 51t are fixed to the insulating base 6a. Also, lead terminals 52s and 52t are fixed between the insulating bases 6b and 6c. Furthermore, lead terminals 53s, 53t, and 53u are fixed to the insulating base 6d.
  • a semiconductor switching element (IGBT) 1c having a metal block 2c fixed thereto is inserted between the lead terminals 51t and 52s.
  • a signal electrode pad (not shown) of the semiconductor switching element 1c is wire-bonded to the lead terminal 52t by a wire 3c.
  • a semiconductor switching element (IGBT) 1f to which a metal block 2f is fixed is inserted between the lead terminals 52s and 53t.
  • a signal electrode pad (not shown) of the semiconductor switching element 1f is wire-bonded to the lead terminal 53u by a wire 3f.
  • a diode 9c having a metal block 12c fixed by solder 4 is inserted between the lead terminals 51s and 52s.
  • a diode 9f having a metal block 12f fixed by solder 4 is inserted between the lead terminals 52s and 53s.
  • the inverter is configured by using IGBTs for the semiconductor switching elements 1a to 1s and further using the diodes 9a to 9f.
  • FIG. 12 is a cross-sectional view of the semiconductor module 300.
  • the heat sinks 10a and 10b are added to the semiconductor module 100 according to the first embodiment shown in FIGS.
  • the insulating base 6f is newly fixed to the main surface of the lead terminal 51a of the semiconductor module 100 where the insulating base 6a is not fixed, and the heat radiating plate 10a is fixed to the insulating base 6f.
  • the heat sink 10 a is exposed to the outside from the upper main surface of the sealing resin 8.
  • the insulating base 6g was newly fixed on the main surface of the lead terminals 53a and 53d of the semiconductor module 100 where the insulating base 6d is not fixed, and the heat sink 10b was fixed to the insulating base 6g.
  • the heat radiating plate 10 b is exposed to the outside from the lower main surface of the sealing resin 8.
  • the other configuration of the semiconductor module 300 is the same as the configuration of the semiconductor module 100.
  • the heat sinks 10a and 10b are provided as in the semiconductor module 300, the heat generated by the switching elements 1a to 1f can be efficiently dissipated.
  • FIGS. 13A is a cross-sectional view of the semiconductor module 400.
  • FIG. 13B is an equivalent circuit diagram of the semiconductor module 400.
  • the semiconductor module 400 In the semiconductor module 400 according to the fourth embodiment, three shunt resistor elements 20 are added to the semiconductor module 100 according to the first embodiment shown in FIGS. Specifically, as shown in FIG. 13A, the semiconductor module 400 has a shunt resistor element 20 added thereto.
  • the semiconductor module 400 shortens one lead terminal 52c that is fixed between the insulating bases 6b and 6c in the semiconductor module 100 according to the first embodiment, A lead terminal 52g is newly fixed between the lead terminals 52c and 52f.
  • a shunt resistance element 20 having a pair of electrode pads formed on the bottom surface is prepared, and one electrode pad is joined to the lead terminal 52c and the other electrode pad is joined to the lead terminal 52g by the solder 4.
  • the other power electrode pad (not shown) of the semiconductor switching element 1c is joined to the lead terminal 52g instead of the lead terminal 52c joined in the semiconductor module 100 according to the first embodiment.
  • Two more shunt resistor elements 20 are also added to the semiconductor module 400 by the same method.
  • the semiconductor module 400 includes an equivalent circuit shown in FIG. That is, the shunt resistor element 20 is inserted between the connection point of the semiconductor switching elements 1a and 1d and the lead terminal 52a that is an intermediate terminal. Further, the shunt resistor element 20 is inserted between the connection point of the semiconductor switching elements 1b and 1e and the lead terminal 52b which is an intermediate terminal. Further, the shunt resistor element 20 is inserted between the connection point of the semiconductor switching elements 1c and 1f and the lead terminal 52c which is an intermediate terminal.
  • the semiconductor module 400 can detect the occurrence of an abnormal current by monitoring the voltage between both power supply electrode pads of each shunt resistance element 20.
  • the material of the components of the semiconductor module 100 according to the first embodiment is partially changed. Since the structure itself is not changed, the semiconductor module 500 will be described with reference to FIGS. 1 and 2 illustrating the semiconductor module 100.
  • a resin such as epoxy or polyimide filled with filler is used for the insulating bases 6a to 6d.
  • ceramics are used for the insulating bases 6a to 6d. More specifically, for example, a ceramic mainly composed of silicon nitride, aluminum nitride, alumina, or the like is used as the ceramic constituting the insulating bases 6a to 6d.
  • an adhesive is used for joining the lead terminals 51a, 52a to 52f, 53a to 53d to the insulating bases 6a to 6d.
  • an alloy (not shown) containing at least an active metal that reacts with the constituent components of the ceramic, Ag, and Cu is used for bonding of this portion.
  • Ti is contained in the alloy as an active metal that reacts with the constituent components of the ceramic.
  • the active metal that reacts with the components contained in the ceramic is not limited to Ti, and may be other metals such as Zr.
  • the active metal which reacts with the structural component of ceramics, the alloy containing Ag and Cu may be called an active metal brazing material.
  • Ti, Zn, Sn, In, Ni, Mn, Cd, etc. are used to adjust the melting point as necessary.
  • One or more selected metals may be added.
  • Ti added as an active component that reacts with components contained in the ceramic also plays a role of adjusting the melting point.
  • the addition amount of Ti is 3 weight% or less with respect to the total weight of an alloy. This is because if the Ti content exceeds 3% by weight, the alloy itself may become brittle.
  • the compounding ratio of the alloy 6 is set to Ag 60 to 80% by weight, Cu 20 to 40% by weight, and Ti 1 to 3% by weight.
  • the other configuration of the semiconductor module 500 is the same as that of the semiconductor module 100.
  • a paste made of an active metal brazing material is applied to the lead terminals 51a, 52a to 52f, 53a to 53d in advance.
  • the coating can be performed by bringing the coated surface into contact with the insulating substrates 6a to 6d and performing a heat treatment at a temperature equal to or higher than the melting point of the active metal brazing material.
  • An alloy containing an active metal that reacts with the components of the ceramic, Ag, and Cu firmly bonds the lead terminals 51a, 52a to 52f, and 53a to 53d to the insulating bases 6a to 6d.
  • silicon nitride is used for the insulating bases 6a to 6d
  • Cu is used for the lead terminals 51a, 52a to 52f, 53a to 53d, and both are joined by an alloy containing Ag and Cu to which Ti is added, TiN and MN are formed in the vicinity of the alloy insulating substrates (silicon nitride substrates) 6a to 6d (where M is an alloy of Si, Cu, and Ti).
  • the Ti concentration in the vicinity of the insulating substrates 6a to 6d of the alloy is higher than the Ti concentration in other portions of the alloy.
  • the lead terminals 2a to 2e and the insulating substrates 6a to 6d are bonded with high strength.
  • an alloy containing an active metal that reacts with a constituent component of ceramic, Ag, and Cu generally has a higher thermal conductivity than an adhesive. Therefore, the semiconductor module 500 is more efficient for the heat generated by the semiconductor switching elements 1a to 1f via the lead terminals 51a, 52a to 52f, 53a to 53d, and further via the insulating bases 6a to 6d. Can be dissipated.
  • the lead terminals 51a, 52a to 52f, and 53a to 53d are formed on the insulating bases 6a to 6d made of ceramics having high strength, and the ceramic components are included. Since it is firmly joined through an alloy containing an active metal that reacts, Ag, and Cu, it has high strength. Moreover, it is excellent also in heat dissipation.
  • the circuit configuration of the semiconductor module of the present invention is arbitrary, and is not limited to the equivalent circuit of the semiconductor modules 100 to 500.
  • the shunt resistor element 20 is additionally sealed in the sealing resin 8 as a passive element.
  • a thermistor element for monitoring abnormal heat generation is used as the sealing resin. 8 may be sealed.

Abstract

A semiconductor module is provided which is easily manufactured and is not prone to poor quality resulting from defective connections. In this semiconductor module, semiconductor switching elements 1a-1f and lead terminals 52a-53d are sealed by a sealing resin 8, and plate-form insulating substrates 6a-6d are also sealed in the sealing resin 8. The lead terminals 52a-53d are bonded to the insulating substrates 6a-6d, so by arranging the insulating substrates 6a-6d in the sealing resin 8 so as to be divided into at least three layers and vertically separated by gaps, the lead terminals 52a-53d are also arranged in the sealing resin 8 so as to be divided into at least three layers and vertically separated by gaps.

Description

半導体モジュールSemiconductor module
　本発明は、半導体モジュールに関し、さらに詳しくは、リード端子が絶縁基材に接合されたうえで、封止樹脂に封止された半導体モジュールに関する。 The present invention relates to a semiconductor module, and more particularly to a semiconductor module in which a lead terminal is bonded to an insulating base material and then sealed with a sealing resin.
　インバータ等の半導体モジュールが、車載機器、産業用機器等の電源に使用されている。 Semiconductor modules such as inverters are used as power sources for in-vehicle equipment and industrial equipment.
　半導体モジュールは、特許文献１（特開２０１４－１８３０７８号公報）に開示されるように、複数の半導体スイッチング素子の組合せ、あるいは、複数のスイッチング素子と複数の還流ダイオードとの組合せで回路が構成される。また、半導体モジュールに、周辺回路の受動素子が組込まれる場合もある。 As disclosed in Patent Document 1 (Japanese Patent Application Laid-Open No. 2014-183078), a semiconductor module is configured by a combination of a plurality of semiconductor switching elements or a combination of a plurality of switching elements and a plurality of free-wheeling diodes. The In some cases, passive elements of peripheral circuits are incorporated in the semiconductor module.
　図１４（Ａ）、（Ｂ）に、特許文献１に開示された半導体モジュール（半導体装置）５００を示す。ただし、図１４（Ａ）は、後述する封止樹脂１０８および放熱板１０７ａを省略して示した、半導体モジュール５００の平面図である。また、図１４（Ｂ）は、半導体モジュール５００の断面図であり、図１４（Ａ）のＸ-Ｘ部分を示している。 14A and 14B show a semiconductor module (semiconductor device) 500 disclosed in Patent Document 1. FIG. However, FIG. 14A is a plan view of the semiconductor module 500 in which a sealing resin 108 and a heat radiating plate 107a described later are omitted. FIG. 14B is a cross-sectional view of the semiconductor module 500, and shows a portion XX in FIG.
　半導体モジュール５００は、３相出力のインバータであり、３組の同一構成の回路Ｃｉｒ１、Ｃｉｒ２、Ｃｉｒ３が、並列に接続されている。 The semiconductor module 500 is a three-phase output inverter, and three sets of circuits Cir1, Cir2, and Cir3 having the same configuration are connected in parallel.
　回路Ｃｉｒ１を例にとって説明する。なお、図１４（Ｂ）は、半導体モジュール５００の回路Ｃｉｒ１部分の断面を示している。 The circuit Cir1 will be described as an example. 14B shows a cross section of the circuit Cir1 portion of the semiconductor module 500.
　回路Ｃｉｒ１は、２個の半導体スイッチング素子（ＩＧＢＴ）１０１ａ、１０１ｂと、２個のダイオード１０２ａ、１０２ｂと、リード端子１０５ａ、１０５ｂ、１０５ｃ、１０５ｄ、１０５ｅと、放熱板（ヒートシンク）１０７ａ、１０７ｂとで構成されている。 The circuit Cir1 includes two semiconductor switching elements (IGBT) 101a and 101b, two diodes 102a and 102b, lead terminals 105a, 105b, 105c, 105d, and 105e, and heat sinks (heat sinks) 107a and 107b. It is configured.
　具体的には、半導体スイッチング素子１０１ａの一方の電源電極パッド（図示せず）が、はんだ１０４によりリード端子１０５ａに接合され、他方の電源電極パッド（図示せず）が、はんだ１０４により放熱板１０７ａに接合されている。また、半導体スイッチング素子１０１ａの信号電極パッド（図示せず）が、ワイヤー１０３ａによりリード端子１０５ｂにワイヤーボンディングされている。さらに、リード端子１０５ａと放熱板１０７ａとの間には、ダイオード１０２ａが、半導体モジュール１０１ａと並列に接続されている。 Specifically, one power electrode pad (not shown) of the semiconductor switching element 101 a is joined to the lead terminal 105 a by the solder 104, and the other power electrode pad (not shown) is joined to the heat radiating plate 107 a by the solder 104. It is joined to. A signal electrode pad (not shown) of the semiconductor switching element 101a is wire-bonded to the lead terminal 105b by a wire 103a. Furthermore, a diode 102a is connected in parallel with the semiconductor module 101a between the lead terminal 105a and the heat sink 107a.
　同様に、半導体スイッチング素子１０１ｂの一方の電源電極パッド（図示せず）が、はんだ１０４によりリード端子１０５ａに接合され、他方の電源電極パッド（図示せず）が、はんだ１０４により放熱板１０７ｂに接合されている。また、半導体スイッチング素子１０１ｂの信号電極パッド（図示せず）が、ワイヤー１０３ｂによりリード端子１０５ｃにワイヤーボンディングされている。さらに、リード端子１０５ａと放熱板１０７ｂとの間には、ダイオード１０２ｂが、半導体モジュール１０１ｂと並列に接続されている。 Similarly, one power electrode pad (not shown) of the semiconductor switching element 101b is joined to the lead terminal 105a by the solder 104, and the other power electrode pad (not shown) is joined to the heat sink 107b by the solder 104. Has been. A signal electrode pad (not shown) of the semiconductor switching element 101b is wire-bonded to the lead terminal 105c by a wire 103b. Furthermore, a diode 102b is connected in parallel with the semiconductor module 101b between the lead terminal 105a and the heat dissipation plate 107b.
　残りの２組の回路Ｃｉｒ２、Ｃｉｒ３も、上述した回路Ｃｉｒ１と同じ構造からなる。したがって、半導体モジュール５００においては、放熱板１０７ａと１０７ｂとの間に、３組の回路Ｃｉｒ１、Ｃｉｒ２、Ｃｉｒ３が、並列に接続されていることになる。そして、共通のリード端子として、放熱板１０７ａにリード端子１０５ｄが、放熱板１０７ｂにリード端子１０５ｅが、それぞれ接続されている。 The remaining two sets of circuits Cir2 and Cir3 also have the same structure as the circuit Cir1 described above. Therefore, in the semiconductor module 500, three sets of circuits Cir1, Cir2, and Cir3 are connected in parallel between the heat sinks 107a and 107b. As common lead terminals, the lead terminal 105d is connected to the heat radiating plate 107a, and the lead terminal 105e is connected to the heat radiating plate 107b.
　リード端子１０５ｄが接続された放熱板１０７ａと、リード端子１０５ｅが接続された放熱板１０７ｂとの間に、３組の回路Ｃｉｒ１、Ｃｉｒ２、Ｃｉｒ３が並列に接続された構造体Ｓは、封止樹脂１０８に封止されている。封止樹脂１０８の側面からは、リード端子１０５ａ、１０５ｂ、１０５ｃ、１０５ｄ、１０５ｅが導出されている。また、封止樹脂１０８の両主面には、放熱板１０７ａ、１０７ｂが露出されている。 A structure S in which three sets of circuits Cir1, Cir2, and Cir3 are connected in parallel between a heat sink 107a to which the lead terminal 105d is connected and a heat sink 107b to which the lead terminal 105e is connected is made of a sealing resin 108 is sealed. Lead terminals 105a, 105b, 105c, 105d, and 105e are led out from the side surface of the sealing resin. Further, the heat radiating plates 107 a and 107 b are exposed on both main surfaces of the sealing resin 108.
特開２０１４－１８３０７８号公報JP 2014-183078 A
　上述した半導体モジュール５００においては、封止樹脂１０８から、多数のリード端子が外部に導出されている。すなわち、少なくとも、回路Ｃｉｒ１に接続されたリード端子１０５ａ、１０５ｂ、１０５ｃと、回路Ｃｉｒ２に接続されたリード端子１０５ａ、１０５ｂ、１０５ｃと、回路Ｃｉｒ３に接続されたリード端子１０５ａ、１０５ｂ、１０５ｃと、共通のリード端子１０５ｄ、１０５ｅが、それぞれ、封止樹脂１０８から外部に導出されている。 In the semiconductor module 500 described above, a large number of lead terminals are led out from the sealing resin 108. That is, at least the lead terminals 105a, 105b, and 105c connected to the circuit Cir1, the lead terminals 105a, 105b, and 105c connected to the circuit Cir2, and the lead terminals 105a, 105b, and 105c connected to the circuit Cir3 are common. Lead terminals 105d and 105e are led out from the sealing resin 108 to the outside.
　しかしながら、多数のリード端子１０５ａ～１０５ｅが固定されずに封止樹脂１０８内に配置された構造からなる半導体モジュール５００は、製造が困難であるとともに、接続不良などの品質不良を起こしやすい。 However, the semiconductor module 500 having a structure in which the large number of lead terminals 105a to 105e are arranged in the sealing resin 108 without being fixed is difficult to manufacture and easily causes poor quality such as poor connection.
　すなわち、まず、半導体モジュール５００の製造工程においては、半導体スイッチング素子１０１ａの信号電極パッド（図示せず）とリード端子１０５ｂとの間をワイヤー１０３ａによりワイヤーボンディングし、半導体スイッチング素子１０１ｂの信号電極パッド（図示せず）とリード端子１０５ｃとの間をワイヤー１０３ｂによりワイヤーボンディングするが、リード端子１０５ｂ、１０５ｃが何かに固定されていないと、これらのワイヤーボンディングは困難であり、接続不良による品質不良も起こしやすい。 That is, first, in the manufacturing process of the semiconductor module 500, the signal electrode pad (not shown) of the semiconductor switching element 101a and the lead terminal 105b are wire-bonded by the wire 103a, and the signal electrode pad (semiconductor switching element 101b) (Not shown) and the lead terminal 105c are wire-bonded by the wire 103b. However, if the lead terminals 105b and 105c are not fixed to something, the wire bonding is difficult, and the quality defect due to poor connection is also caused. Easy to wake up.
　また、半導体モジュール５００の製造工程における封止樹脂１０８の形成は、リード端子１０５ｄが接続された放熱板１０７ａと、リード端子１０５ｅが接続された放熱板１０７ｂとの間に、３組の回路Ｃｉｒ１、Ｃｉｒ２、Ｃｉｒ３が並列に接続された構造体Ｓを、リード端子１０５ａ、１０５ｂ、１０５ｃ、１０５ｄ、１０５ｅを外部に導出した状態で金型（図示せず）内に収容し、金型内に樹脂をトランスファーモールドして形成する方法が一般的である。 In addition, the sealing resin 108 is formed in the manufacturing process of the semiconductor module 500 by three sets of circuits Cir1 between the heat sink 107a to which the lead terminal 105d is connected and the heat sink 107b to which the lead terminal 105e is connected. The structure S in which Cir2 and Cir3 are connected in parallel is housed in a mold (not shown) with the lead terminals 105a, 105b, 105c, 105d, and 105e led out to the outside, and resin is placed in the mold. A method of forming by transfer molding is common.
　しかしながら、リード端子１０５ａ～１０５ｅが固定されていないため、構造体Ｓを金型内に収容する作業は非常に困難である。 However, since the lead terminals 105a to 105e are not fixed, it is very difficult to accommodate the structure S in the mold.
　また、リード端子１０５ａ～１０５ｅが固定されていないため、金型内に樹脂をトランスファーモールドして封止樹脂１０８を形成する際に、リード端子１０５ａ～１０５ｅが樹脂に押されて動いてしまい、ワイヤー１０３ａ、１０３ｂによるワイヤーボンディングが断線したり、はんだ１０４による接合が外れたりし、接続不良による品質不良が発生する虞があった。 Further, since the lead terminals 105a to 105e are not fixed, the lead terminals 105a to 105e are pushed and moved by the resin when the sealing resin 108 is formed by transfer molding the resin in the mold. Wire bonding by 103a and 103b may be disconnected, or bonding by the solder 104 may be disconnected, resulting in poor quality due to poor connection.
　たとえば、ワイヤー１０３ａによるリード端子１０５ｂと半導体スイッチング素子１０１ａの信号電極パッドとの間のワイヤーボンディングや、ワイヤー１０３ｂによるリード端子１０５ｃと半導体スイッチング素子１０１ｂの信号電極パッドとの間のワイヤーボンディングが断線する虞があった。また、はんだ１０４による、リード端子１０５ａと、半導体スイッチング素子１０１ａの他方の電極パッド、半導体スイッチング素子１０１ｂの一方の電極パッド、ダイオード１０２ａ、１０２ｂとの接合が外れる虞があった。さらに、はんだ（図示せず）による、リード端子１０５ｄと放熱板１０７ａとの接合や、リード端子１０５ｅと放熱板１０７ｂとの接合が外れる虞があった。 For example, wire bonding between the lead terminal 105b by the wire 103a and the signal electrode pad of the semiconductor switching element 101a or wire bonding between the lead terminal 105c by the wire 103b and the signal electrode pad of the semiconductor switching element 101b may be disconnected. was there. Further, there is a possibility that the bonding between the lead terminal 105a and the other electrode pad of the semiconductor switching element 101a, the one electrode pad of the semiconductor switching element 101b, and the diodes 102a and 102b due to the solder 104 may be broken. Further, there is a possibility that the bonding between the lead terminal 105d and the heat radiating plate 107a and the bonding between the lead terminal 105e and the heat radiating plate 107b are disconnected by solder (not shown).
　以上のように、多数のリード端子１０５ａ～１０５ｅが固定されずに封止樹脂１０８内に配置された構造からなる半導体モジュール５００は、製造が困難であるとともに、接続不良などの品質不良を起こしやすかった。 As described above, the semiconductor module 500 having a structure in which a large number of lead terminals 105a to 105e are not fixed and disposed in the sealing resin 108 is difficult to manufacture and easily causes poor quality such as poor connection. It was.
　本発明は、上述した従来の問題を解決するためになされたものであり、その手段として本発明の半導体モジュールは、少なくとも、複数の半導体スイッチング素子と、複数のリード端子とが、封止樹脂に封止され、封止樹脂には、さらに、複数の板状の絶縁基材が封止され、絶縁基材には、リード端子が接合され、絶縁基材が、封止樹脂内において、上下方向に間隔を空けて、少なくとも３層に分けて配置されることにより、リード端子も、封止樹脂内において、上下方向に間隔を空けて、少なくとも３層に分けて配置され、半導体スイッチング素子は、一方の主面に信号電極パッドと一方の電源電極パッドが形成され、他方の主面に他方の電源電極パッドが形成され、半導体スイッチング素子の両主面に形成された電源電極パッドは、直接または間接に、所定のリード端子に接合され、半導体スイッチング素子の一方の主面に形成された信号電極パッドは、ワイヤーにより、所定のリード端子にワイヤーボンディングされ、リード端子の少なくとも一部のものが、封止樹脂から外部に導出されるようにした。 The present invention has been made to solve the above-described conventional problems, and as a means thereof, the semiconductor module of the present invention includes at least a plurality of semiconductor switching elements and a plurality of lead terminals in a sealing resin. The sealing resin is further sealed with a plurality of plate-like insulating base materials, lead terminals are joined to the insulating base material, and the insulating base material is vertically moved in the sealing resin. The lead terminals are also arranged in at least three layers at intervals in the vertical direction in the sealing resin by being arranged in at least three layers with a gap therebetween, and the semiconductor switching element is The signal electrode pad and one power electrode pad are formed on one main surface, the other power electrode pad is formed on the other main surface, and the power electrode pads formed on both main surfaces of the semiconductor switching element are directly Or indirectly, the signal electrode pad bonded to the predetermined lead terminal and formed on one main surface of the semiconductor switching element is wire-bonded to the predetermined lead terminal by a wire, and at least a part of the lead terminal is The lead is led out from the sealing resin.
　なお、絶縁基材に、両主面間を貫通した開口が形成され、その開口に、その絶縁基材に接合されたリード端子の少なくとも一部分が配置されていることが好ましい。この場合には、その開口部分において、その絶縁基材に接合されたリード端子と、その絶縁基材のリード端子が接合されていない主面の側に配置された部材、たとえば金属ブロックとの、はんだ等による接合を行うことができる。 In addition, it is preferable that an opening penetrating between both main surfaces is formed in the insulating base material, and at least a part of the lead terminal joined to the insulating base material is disposed in the opening. In this case, in the opening portion, a lead terminal joined to the insulating base material and a member arranged on the main surface side where the lead terminal of the insulating base material is not joined, for example, a metal block, Bonding with solder or the like can be performed.
　また、絶縁基材がフィラーの含有された樹脂からなり、封止樹脂がフィラーの含有されていない樹脂からなるものとすることができる。あるいは、絶縁基材および封止樹脂がフィラーの含有された樹脂からなり、その封止樹脂のフィラーの含有体積率を、その絶縁基材のフィラーの含有体積率よりも低いものとすることができる。これらの場合には、絶縁基材を、フィラーが十分に含有された高い強度を備えた樹脂で形成し、封止樹脂を、流動性の高い、トランスファーモールドをしやすい樹脂で形成することができる。 Further, the insulating base material can be made of a resin containing a filler, and the sealing resin can be made of a resin not containing a filler. Alternatively, the insulating base material and the sealing resin are made of a resin containing a filler, and the content volume ratio of the filler of the sealing resin can be lower than the content volume ratio of the filler of the insulating base material. . In these cases, the insulating base material can be formed of a resin having a high strength and containing a sufficient amount of filler, and the sealing resin can be formed of a resin having high fluidity and easy to transfer mold. .
　また、絶縁基材がセラミックスからなり、リード端子が、少なくとも、セラミックスの構成成分と反応する活性な金属と、Ａｇと、Ｃｕとを含む合金を介して、絶縁基板に接合されたものとすることができる。この場合には、高い強度を備えた絶縁基板に、リード端子を強固に接合することができる。 In addition, the insulating base is made of ceramic, and the lead terminal is bonded to the insulating substrate through an alloy containing at least an active metal that reacts with the ceramic components, Ag, and Cu. Can do. In this case, the lead terminal can be firmly bonded to the insulating substrate having high strength.
　また、少なくとも３層に分けて配置されたリード端子のうち、少なくとも１層に配置されたリード端子が、両主面において、異なる２枚の絶縁基材に接合されており、その２枚の絶縁基材の間に、封止樹脂が充填されたものとすることができる。上述のように、たとえば、絶縁基材をフィラーの含有された樹脂、封止樹脂をフィラーの含有されていない樹脂で形成した場合、あるいは、絶縁基材および封止樹脂をフィラーの含有された樹脂で形成するが、その絶縁基材のフィラーの含有体積率を、その封止樹脂のフィラーの含有体積率よりも高いものとした場合、絶縁基材の線膨張率と封止樹脂の線膨張率とが異なってしまう。すなわち、絶縁基材の線膨張率が、封止樹脂の線膨張率よりも小さくなってしまう。しかしながら、半導体モジュールは、半導体スイッチング素子が発熱するため、絶縁基材の線膨張率と封止樹脂の線膨張率とが異なると、両者の界面が剥離してしまう虞がある。そして、絶縁基材と封止樹脂との界面が剥離すると、ワイヤーボンディングが断線したり、はんだによる接合が外れたりし、接続不良による品質不良が発生する虞がある。しかしながら、リード端子を、両主面において、異なる２枚の絶縁基材に接合し、その２枚の絶縁基材の間に封止樹脂が充填すると、線膨張率の差による絶縁基材と封止樹脂との界面の剥離を抑制することができる。 In addition, among the lead terminals arranged in at least three layers, the lead terminals arranged in at least one layer are joined to two different insulating substrates on both main surfaces, and the two insulations The sealing resin can be filled between the substrates. As described above, for example, when the insulating base is formed of a resin containing a filler and the sealing resin is formed of a resin not containing a filler, or the insulating base and the sealing resin are resins containing a filler. However, if the volume fraction of filler in the insulating base material is higher than the volume fraction of filler in the sealing resin, the linear expansion coefficient of the insulating base material and the linear expansion coefficient of the sealing resin And will be different. That is, the linear expansion coefficient of the insulating base material is smaller than the linear expansion coefficient of the sealing resin. However, since the semiconductor switching element generates heat in the semiconductor module, if the linear expansion coefficient of the insulating base material and the linear expansion coefficient of the sealing resin are different, the interface between the two may be peeled off. If the interface between the insulating substrate and the sealing resin is peeled off, the wire bonding may be disconnected or the bonding by solder may be disconnected, resulting in a quality defect due to poor connection. However, if the lead terminal is bonded to two different insulating bases on both main surfaces and the sealing resin is filled between the two insulating bases, the lead terminal is sealed with the insulating base due to the difference in linear expansion coefficient. Separation of the interface with the stop resin can be suppressed.
　また、少なくとも１個の半導体スイッチング素子の一方の主面に形成された電源電極パッドを、金属ブロックを介して、所定のリード端子に接合するようにしても良い。この場合には、半導体スイッチング素子とリード端子との間の距離を大きくすることができるため、ワイヤーによる半導体スイッチング素子の信号電極パッドと他のリード端子との間のワイヤーボンディングが容易になる。 Further, a power electrode pad formed on one main surface of at least one semiconductor switching element may be bonded to a predetermined lead terminal via a metal block. In this case, since the distance between the semiconductor switching element and the lead terminal can be increased, wire bonding between the signal electrode pad of the semiconductor switching element and another lead terminal by a wire is facilitated.
　また、封止樹脂の少なくとも一方の主面から、放熱板が露出されたものとしても良い。この場合には、半導体スイッチング素子の発熱を、効率良く拡散させることができる。 Further, the heat radiating plate may be exposed from at least one main surface of the sealing resin. In this case, the heat generated by the semiconductor switching element can be diffused efficiently.
　封止樹脂に、さらに受動素子を封止するようにしても良い。たとえば、受動素子として、半導体スイッチング素子と中間端子との間にシャント抵抗素子を挿入し封止樹脂に封止すれば、シャント抵抗素子の両電極間の電圧を監視することにより、半導体スイッチング素子の異常電流を検知することができる。あるいは、受動素子として、別回路系統に接続されたサーミスタ素子を封止樹脂に封止すれば、半導体スイッチング素子の異常発熱を検知することができる。 A passive element may be further sealed in the sealing resin. For example, as a passive element, if a shunt resistor element is inserted between a semiconductor switching element and an intermediate terminal and sealed with a sealing resin, the voltage between both electrodes of the shunt resistor element is monitored. Abnormal current can be detected. Alternatively, abnormal heat generation of the semiconductor switching element can be detected by sealing a thermistor element connected to another circuit system with a sealing resin as a passive element.
　また、封止樹脂に、さらに還流ダイオードを封止するようにしても良い。 Further, a reflux diode may be further sealed in the sealing resin.
　半導体モジュールは、たとえば、インバータとすることができる。 The semiconductor module can be an inverter, for example.
　本発明の半導体モジュールは、リード端子が絶縁基材に接合されたうえで封止樹脂に封止されているので、製造が容易である。たとえば、リード端子にワイヤーボンディングする工程や、封止樹脂をトランスファーモールドにより形成する工程が容易である。 The semiconductor module of the present invention is easy to manufacture because the lead terminal is bonded to the insulating base material and then sealed with the sealing resin. For example, the process of wire bonding to the lead terminal and the process of forming the sealing resin by transfer molding are easy.
　また、本発明の半導体モジュールは、リード端子が絶縁基材に接合されたうえで封止樹脂に封止されているので、製造工程において、ワイヤーボンディングの断線や、はんだ接合が外れることによる接続不良が起こりにくく、信頼性が高いものになっている。 In addition, since the semiconductor module of the present invention is sealed with the sealing resin after the lead terminals are bonded to the insulating base material, in the manufacturing process, the connection failure due to the disconnection of the wire bonding or the disconnection of the solder bonding Is less likely to occur and is highly reliable.
図１（Ａ）は、第１実施形態にかかる半導体モジュール１００を示す斜視図である。図１（Ｂ）は、半導体モジュール１００を示す断面図であり、図１（Ａ）のＸ-Ｘ部分を示している。FIG. 1A is a perspective view showing the semiconductor module 100 according to the first embodiment. FIG. 1B is a cross-sectional view showing the semiconductor module 100 and shows a portion XX in FIG. 図２は、半導体モジュール１００を示す分解斜視図である。FIG. 2 is an exploded perspective view showing the semiconductor module 100. 図３は、半導体モジュール１００の等価回路図である。FIG. 3 is an equivalent circuit diagram of the semiconductor module 100. 図４（Ａ）、（Ｂ）は、絶縁基材を、厚みの大きい１枚の絶縁基材６ｘで形成した場合と、厚みの小さい２枚の絶縁基材６ｂ、６ｃで形成した場合の、それぞれの界面応力を示す説明図である。4 (A) and 4 (B) show the case where the insulating base is formed of one insulating base 6x having a large thickness and the case where the insulating base is formed of two insulating bases 6b and 6c having a small thickness. It is explanatory drawing which shows each interface stress. 図５は、半導体モジュール１００の製造方法の一例において適用される工程を示す斜視図である。FIG. 5 is a perspective view showing steps applied in an example of a method for manufacturing the semiconductor module 100. 図６は、半導体モジュール１００の製造方法の一例において適用される工程を示す斜視図である。FIG. 6 is a perspective view showing a process applied in an example of a manufacturing method of the semiconductor module 100. 図７は、半導体モジュール１００の製造方法の一例において適用される工程を示す斜視図である。FIG. 7 is a perspective view showing steps applied in an example of a method for manufacturing the semiconductor module 100. 図８は、半導体モジュール１００の製造方法の一例において適用される工程を示す斜視図である。FIG. 8 is a perspective view showing steps applied in an example of a method for manufacturing the semiconductor module 100. 図９は、半導体モジュール１００の製造方法の一例において適用される工程を示す斜視図である。FIG. 9 is a perspective view showing steps applied in an example of a method for manufacturing the semiconductor module 100. 図１０は、半導体モジュール１００の製造方法の一例において適用される工程を示す斜視図である。FIG. 10 is a perspective view showing steps applied in an example of a method for manufacturing the semiconductor module 100. 図１１は、第２実施形態にかかる半導体モジュール２００を示す断面図である。FIG. 11 is a cross-sectional view showing a semiconductor module 200 according to the second embodiment. 図１２は、第３実施形態にかかる半導体モジュール３００を示す斜視図である。FIG. 12 is a perspective view showing a semiconductor module 300 according to the third embodiment. 図１３（Ａ）は、第４実施形態にかかる半導体モジュール４００を示す斜視図である。図１３（Ｂ）は、半導体モジュール４００の等価回路図である。FIG. 13A is a perspective view showing a semiconductor module 400 according to the fourth embodiment. FIG. 13B is an equivalent circuit diagram of the semiconductor module 400. 図１４（Ａ）は、特許文献１に開示された従来の半導体モジュール５００を示す平面図である。図１４（Ｂ）は、半導体モジュール５００を示す断面図であり、図１４（Ａ）のＸ-Ｘ部分を示している。FIG. 14A is a plan view showing a conventional semiconductor module 500 disclosed in Patent Document 1. FIG. FIG. 14B is a cross-sectional view showing the semiconductor module 500, and shows a portion XX in FIG.
　以下、図面とともに、本発明を実施するための形態について説明する。 Hereinafter, embodiments for carrying out the present invention will be described with reference to the drawings.
　［第１実施形態］
　図１（Ａ）、（Ｂ）、図２、図３に、本発明の第１実施形態にかかる半導体モジュール１００を示す。 [First Embodiment]
1A, 1B, 2 and 3 show a semiconductor module 100 according to a first embodiment of the present invention.
　ただし、図１（Ａ）は、半導体モジュール１００の斜視図である。図１（Ｂ）は、半導体モジュール１００の断面図であり、図１（Ａ）のＸ-Ｘ部分を示している。なお、図１
（Ｂ）においては、後述する封止樹脂８の図示を省略して、その部分を破線で示している。　 However, FIG. 1A is a perspective view of the semiconductor module 100. FIG. 1B is a cross-sectional view of the semiconductor module 100 and shows a portion XX in FIG. Note that FIG.
In (B), illustration of the sealing resin 8 described later is omitted, and the portion is indicated by a broken line.
　図２は、半導体モジュール１００の分解斜視図である。なお、図２においても、封止樹脂８の図示を省略している。図３は、半導体モジュール１００の等価回路図である。 FIG. 2 is an exploded perspective view of the semiconductor module 100. In FIG. 2, the sealing resin 8 is not shown. FIG. 3 is an equivalent circuit diagram of the semiconductor module 100.
　半導体モジュール１００はインバータである。 The semiconductor module 100 is an inverter.
　半導体モジュール１００は、４枚の矩形、板状の絶縁基材６ａ、６ｂ、６ｃ６ｄを備える。絶縁基材６ａ～６ｄは、たとえば、強度を高めるためのフィラーが充填されたエポキシ、ポリイミド等の樹脂からなる。 The semiconductor module 100 includes four rectangular and plate-like insulating bases 6a, 6b, and 6c6d. The insulating bases 6a to 6d are made of, for example, a resin such as epoxy or polyimide filled with a filler for increasing the strength.
　絶縁基材６ａの中央部分には、両主面間を貫通して、矩形の開口７ａが形成されている。絶縁基材６ｂの中央部分には、両主面間を貫通して、２つの矩形の開口７ｂ、７ｃが形成されている。絶縁基材６ｃの中央部分には、両主面間を貫通して、矩形の開口７ｄが形成されている。絶縁基材６ｄの中央部分には、両主面間を貫通して、２つの矩形の開口７ｅ、７ｆが形成されている。開口７ａ、７ｂ、７ｄ、７ｅの開口面積は、開口７ｃ、７ｆの開口面積よりも大きい。絶縁基材６ａの一方の主面（図２において上側の主面）には、Ｌ字形状で、板状のリード端子５１ａが固定されている。リード端子５１ａは、開口７ａから、絶縁基材６ａの他方の主面（図２において下側の主面）側に露出されている。 In the central part of the insulating base 6a, a rectangular opening 7a is formed so as to penetrate between both main surfaces. Two rectangular openings 7b and 7c are formed in the central portion of the insulating base 6b so as to penetrate between both main surfaces. A rectangular opening 7d is formed in the central portion of the insulating base 6c so as to penetrate between both main surfaces. Two rectangular openings 7e and 7f are formed in the central portion of the insulating base 6d so as to penetrate between both main surfaces. The opening areas of the openings 7a, 7b, 7d, and 7e are larger than the opening areas of the openings 7c and 7f. An L-shaped plate-like lead terminal 51a is fixed to one main surface (the upper main surface in FIG. 2) of the insulating base 6a. The lead terminal 51a is exposed from the opening 7a to the other main surface (lower main surface in FIG. 2) of the insulating base 6a.
　絶縁基材６ｂと絶縁基材６ｃとは、間に６本のリード端子５２ａ、５２ｂ、５２ｃ、５２ｄ、５２ｅ、５２ｆが固定されることにより一体化されている。リード端子５２ａ、５２ｂ、５２ｃの幅は、リード端子５２ｄ、５２ｅ、５２ｆの幅よりも大きい。リード端子５２ａ、５２ｂ、５２ｃは、絶縁基材６ｂおよび６ｃの一方の辺に沿って、それぞれの一端が絶縁基材６ｂおよび６ｃから導出されるとともに、それぞれの他端が開口７ｂおよび７ｄから露出されて固定されている。リード端子５２ｄ、５２ｅ、５２ｆは、絶縁基材６ｂおよび６ｃの他方の辺に沿って、それぞれの一端が絶縁基材６ｂおよび６ｃから導出されるとともに、それぞれの他端が開口７ｃから露出されて固定されている。 The insulating base 6b and the insulating base 6c are integrated by fixing six lead terminals 52a, 52b, 52c, 52d, 52e, 52f between them. The widths of the lead terminals 52a, 52b, and 52c are larger than the widths of the lead terminals 52d, 52e, and 52f. The lead terminals 52a, 52b, 52c are led out from the insulating bases 6b and 6c along one side of the insulating bases 6b and 6c, and the other ends are exposed from the openings 7b and 7d. Has been fixed. The lead terminals 52d, 52e, 52f have one end led out from the insulating bases 6b and 6c along the other side of the insulating bases 6b and 6c, and the other end exposed from the opening 7c. It is fixed.
　絶縁基材６ｄの他方の主面（図２において下側の主面）には、Ｌ字形状で、板状のリード端子５３ａが固定されている。リード端子５３ａは、開口７ｅから、絶縁基材６ｄの一方の主面（図２において上側の主面）側に露出されている。さらに、絶縁基材６ｄの他方の主面には、３本のリード端子５３ｂ、５３ｃ、５３ｄが固定されている。リード端子５３ｂ、５３ｃ、５３ｄの幅は、リード端子５２ｄ、５２ｅ、５２ｆの幅と同じ大きさである。リード端子５３ｂ、５３ｃ、５３ｄは、絶縁基材６ｄの一方の辺に沿って、それぞれの一端が絶縁基材６ｄから導出されるとともに、それぞれの他端が開口７ｆから絶縁基材６ｄの一方の主面側に露出されて固定されている。 An L-shaped plate-like lead terminal 53a is fixed to the other main surface (lower main surface in FIG. 2) of the insulating base 6d. The lead terminal 53a is exposed from the opening 7e to the one main surface (upper main surface in FIG. 2) side of the insulating base 6d. Further, three lead terminals 53b, 53c, 53d are fixed to the other main surface of the insulating base 6d. The widths of the lead terminals 53b, 53c, and 53d are the same as the widths of the lead terminals 52d, 52e, and 52f. The lead terminals 53b, 53c, 53d have one end led out from the insulating base 6d along one side of the insulating base 6d, and the other end of the lead terminals 53b, 53c, 53d from the opening 7f. The main surface is exposed and fixed.
　リード端子５１ａ～５３ｄには、たとえば、Ｃｕ、Ｆｅ、Ｎｉ、Ｓｎ、Ｍｇ、Ａｌ、Ｃｒ、Ｚｒ等の金属が使用される。 For the lead terminals 51a to 53d, for example, metals such as Cu, Fe, Ni, Sn, Mg, Al, Cr, and Zr are used.
　半導体モジュール１００は、６個の半導体スイッチング素子１ａ、１ｂ、１ｃ、１ｄ、１ｅ、１ｆを備える。本実施形態においては、半導体スイッチング素子１ａ～１ｆとしてＭＯＳＦＥＴを使用した。半導体モジュール１００は、半導体スイッチング素子１ａ～１ｆにＭＯＳＦＥＴを使用しているため、還流ダイオードを使用することなく、インバータが構成されている。 The semiconductor module 100 includes six semiconductor switching elements 1a, 1b, 1c, 1d, 1e, and 1f. In the present embodiment, MOSFETs are used as the semiconductor switching elements 1a to 1f. Since the semiconductor module 100 uses MOSFETs for the semiconductor switching elements 1a to 1f, an inverter is configured without using a free-wheeling diode.
　半導体スイッチング素子１ａ～１ｆは、それぞれ、一方の主面（図２において上側の主面）に、一方の電源電極パッド（図示せず）と、信号電極パッド（図示しているが符号は付与していない）とが形成され、他方の主面（図２において下側の主面）に、他方の電源電極パッド（図示せず）が形成されている。 Each of the semiconductor switching elements 1a to 1f has one main surface (upper main surface in FIG. 2), one power electrode pad (not shown), and a signal electrode pad (shown with reference numerals). The other power supply electrode pad (not shown) is formed on the other main surface (the lower main surface in FIG. 2).
　半導体スイッチング素子１ａは、はんだ４により、他方の電源電極パッドが、開口７ｂ部分において、絶縁基材６ｂと６ｃとの間に固定されたリード端子５２ａに接合されている。 In the semiconductor switching element 1a, the other power electrode pad is joined to the lead terminal 52a fixed between the insulating bases 6b and 6c at the opening 7b portion by the solder 4.
　半導体スイッチング素子１ｂは、はんだ４により、他方の電源電極パッドが、開口７ｂ部分において、絶縁基材６ｂと６ｃとの間に固定されたリード端子５２ｂに接合されている。 In the semiconductor switching element 1b, the other power electrode pad is joined to the lead terminal 52b fixed between the insulating bases 6b and 6c at the opening 7b portion by the solder 4.
　半導体スイッチング素子１ｃは、はんだ４により、他方の電源電極パッドが、開口７ｂ部分において、絶縁基材６ｂと６ｃとの間に固定されたリード端子５２ｃに接合されている。 In the semiconductor switching element 1c, the other power electrode pad is joined by solder 4 to a lead terminal 52c fixed between the insulating bases 6b and 6c at the opening 7b portion.
　半導体スイッチング素子１ｄ、１ｅ、１ｆは、それぞれ、はんだ４により、開口７ｅ部分において、絶縁基材６ｄに固定されたリード端子５３ａに接合されている。 The semiconductor switching elements 1d, 1e, and 1f are joined to the lead terminals 53a fixed to the insulating base 6d by the solder 4 at the openings 7e.
　また、半導体スイッチング素子１ａの信号電極パッドは、ワイヤー３ａにより、開口７ｃ部分において、絶縁基材６ｂと６ｃとの間に固定されたリード端子５２ｄにワイヤーボンディングされている。 Further, the signal electrode pad of the semiconductor switching element 1a is wire-bonded to the lead terminal 52d fixed between the insulating bases 6b and 6c at the opening 7c portion by the wire 3a.
　半導体スイッチング素子１ｂの信号電極パッドは、ワイヤー３ｂにより、開口７ｃ部分において、絶縁基材６ｂと６ｃとの間に固定されたリード端子５２ｅにワイヤーボンディングされている。 The signal electrode pad of the semiconductor switching element 1b is wire-bonded to the lead terminal 52e fixed between the insulating base materials 6b and 6c at the opening 7c portion by the wire 3b.
　半導体スイッチング素子１ｃの信号電極パッドは、ワイヤー３ｃにより、開口７ｃ部分において、絶縁基材６ｂと６ｃとの間に固定されたリード端子５２ｆにワイヤーボンディングされている。 The signal electrode pad of the semiconductor switching element 1c is wire-bonded to the lead terminal 52f fixed between the insulating base materials 6b and 6c at the opening 7c portion by the wire 3c.
　半導体スイッチング素子１ｄの信号電極パッドは、ワイヤー３ｄにより、開口７ｆ部分において、絶縁基材６ｄに固定されたリード端子５３ｂにワイヤーボンディングされている。 The signal electrode pad of the semiconductor switching element 1d is wire-bonded to the lead terminal 53b fixed to the insulating base 6d at the opening 7f portion by the wire 3d.
　半導体スイッチング素子１ｅの信号電極パッドは、ワイヤー３ｅにより、開口７ｆ部分において、絶縁基材６ｄに固定されたリード端子５３ｃにワイヤーボンディングされている。 The signal electrode pad of the semiconductor switching element 1e is wire-bonded to the lead terminal 53c fixed to the insulating base 6d at the opening 7f portion by the wire 3e.
　半導体スイッチング素子１ｆの信号電極パッドは、ワイヤー３ｆにより、開口７ｆ部分において、絶縁基材６ｄに固定されたリード端子５３ｄにワイヤーボンディングされている。 The signal electrode pad of the semiconductor switching element 1f is wire-bonded to the lead terminal 53d fixed to the insulating base 6d at the opening 7f by the wire 3f.
　ワイヤー３ａ～３ｆには、たとえば、Ａｌ、Ａｕ、Ｃｕ等の金属が使用される。 For the wires 3a to 3f, for example, a metal such as Al, Au, or Cu is used.
　また、半導体スイッチング素子１ａの一方の電源電極パッドに、はんだ４により、直方体の金属ブロック２ａが接合されている。 Further, a rectangular parallelepiped metal block 2 a is joined to one power supply electrode pad of the semiconductor switching element 1 a by solder 4.
　半導体スイッチング素子１ｂの一方の電源電極パッドに、はんだ４により、直方体の金属ブロック２ｂが接合されている。 A rectangular parallelepiped metal block 2b is joined to one power supply electrode pad of the semiconductor switching element 1b by solder 4.
　半導体スイッチング素子１ｃの一方の電源電極パッドに、はんだ４により、直方体の金属ブロック２ｃが接合されている。 A rectangular parallelepiped metal block 2c is joined to one power electrode pad of the semiconductor switching element 1c by solder 4.
　半導体スイッチング素子１ｄの一方の電源電極パッドに、はんだ４により、直方体の金属ブロック２ｄが接合されている。 A rectangular parallelepiped metal block 2d is joined by solder 4 to one power supply electrode pad of the semiconductor switching element 1d.
　半導体スイッチング素子１ｅの一方の電源電極パッドに、はんだ４により、直方体の金属ブロック２ｅが接合されている。 A rectangular parallelepiped metal block 2e is joined by solder 4 to one power supply electrode pad of the semiconductor switching element 1e.
　半導体スイッチング素子１ｆの一方の電源電極パッドに、はんだ４により、直方体の金属ブロック２ｆが接合されている。 A rectangular parallelepiped metal block 2 f is joined to one power supply electrode pad of the semiconductor switching element 1 f by solder 4.
　金属ブロック２ａ～２ｆには、たとえば、Ｃｕ、Ａｌ、Ｆｅ、Ａｇ等の金属が使用される。 For the metal blocks 2a to 2f, for example, metals such as Cu, Al, Fe, and Ag are used.
　そして、金属ブロック２ａ、２ｂ、２ｃが、はんだ４により、開口７ａ部分において、絶縁基材６ａに固定されたリード端子５１ａに接合されている。 The metal blocks 2a, 2b, and 2c are joined by solder 4 to the lead terminals 51a fixed to the insulating base 6a at the opening 7a portion.
　金属ブロック２ｄが、はんだ４により、開口７ｄ部分において、絶縁基材６ｂと６ｃの間に固定されたリード端子５２ａに接合されている。 The metal block 2d is joined to the lead terminal 52a fixed between the insulating base materials 6b and 6c by the solder 4 at the opening 7d portion.
　金属ブロック２ｅが、はんだ４により、開口７ｄ部分において、絶縁基材６ｂと６ｃの間に固定されたリード端子５２ｂに接合されている。 The metal block 2e is joined to the lead terminal 52b fixed between the insulating base materials 6b and 6c by the solder 4 at the opening 7d portion.
　金属ブロック２ｆが、はんだ４により、開口７ｄ部分において、絶縁基材６ｂと６ｃの間に固定されたリード端子５２ｃに接合されている。 The metal block 2f is joined to the lead terminal 52c fixed between the insulating base materials 6b and 6c by the solder 4 at the opening 7d portion.
　この結果、半導体スイッチング素子１ａ～１ｆ、金属ブロック２ａ～２ｆ、リード端子５１ａ～５３ｄ、絶縁基材６ａ～６ｄ等が一体化され、構造体Ｓが形成される。構造体Ｓは、側面からリード端子５１ａ～５３ｄを外部に導出させて、封止樹脂８内に封止されている。封止樹脂８には、たとえば、エポキシ、ポリイミド等が使用される。 As a result, the semiconductor switching elements 1a to 1f, the metal blocks 2a to 2f, the lead terminals 51a to 53d, the insulating bases 6a to 6d, and the like are integrated to form the structure S. The structure S is sealed in the sealing resin 8 with the lead terminals 51a to 53d led out from the side. For the sealing resin 8, for example, epoxy, polyimide or the like is used.
　封止樹脂８は、後述するように、トランスファーモールドにより形成されるため、高い流動性が求められる。したがって、封止樹脂８には、フィラーが含有されないか、あるいは、含有されるとしても、封止樹脂８のフィラーの含有体積率は、絶縁基材６ａ～６ｄに使用した樹脂のフィラーの含有体積率よりも低く設定される。 Since the sealing resin 8 is formed by transfer molding as described later, high fluidity is required. Therefore, the sealing resin 8 does not contain a filler, or even if contained, the volume content of the filler of the sealing resin 8 is the content volume of the filler of the resin used for the insulating base materials 6a to 6d. It is set lower than the rate.
　なお、半導体モジュール１００においては、絶縁基材６ｂと絶縁基材６ｃとの間にも、封止樹脂８が充填されている。この構造は、絶縁基材６ｂ、６ｃと、封止樹脂８との界面の剥離を防止する機能を有する。 In the semiconductor module 100, the sealing resin 8 is also filled between the insulating base 6b and the insulating base 6c. This structure has a function of preventing peeling at the interface between the insulating bases 6b and 6c and the sealing resin 8.
　上述のように、絶縁基材６ａ～６ｄに使用する樹脂には、強度を高めるためにフィラーが充填されている。これに対し、封止樹脂８に使用する樹脂には、流動性が求められるため、フィラーが含有されないか、あるいは、含有されるとしても、そのフィラーの含有体積率は、絶縁基材６ａ～６ｄに使用した樹脂のフィラーの含有体積率よりも低く設定される。この結果、絶縁基材６ａ～６ｄの線膨張率と、封止樹脂８の線膨張率とに差が発生してしまう。たとえば、絶縁基材６ａ～６ｄの線膨張率は１０～１５ｐｐｍ／℃程度になり、封止樹脂８の線膨張率は２０ｐｐｍ／℃以上になる。 As described above, the resin used for the insulating bases 6a to 6d is filled with a filler to increase the strength. On the other hand, since the resin used for the sealing resin 8 is required to have fluidity, the filler does not contain, or even if contained, the volume ratio of the filler is the insulating base materials 6a to 6d. It is set lower than the content volume ratio of the filler of the resin used. As a result, a difference occurs between the linear expansion coefficient of the insulating base materials 6a to 6d and the linear expansion coefficient of the sealing resin 8. For example, the linear expansion coefficient of the insulating base materials 6a to 6d is about 10 to 15 ppm / ° C., and the linear expansion coefficient of the sealing resin 8 is 20 ppm / ° C. or more.
　しかしながら、絶縁基材６ａ～６ｄの線膨張率と、封止樹脂８の線膨張率とに差があると、絶縁基材６ａ～６ｄと封止樹脂８との界面の剥離の原因になる場合がある。すなわち、半導体モジュール１００は、半導体スイッチング素子１ａ～１ｆが高い熱を発生させるため、封止樹脂８は内部ほど高温になる。 However, if there is a difference between the linear expansion coefficient of the insulating base materials 6a to 6d and the linear expansion coefficient of the sealing resin 8, it may cause separation at the interface between the insulating base materials 6a to 6d and the sealing resin 8. There is. That is, in the semiconductor module 100, since the semiconductor switching elements 1a to 1f generate high heat, the temperature of the sealing resin 8 increases toward the inside.
　このとき、図４（Ａ）に示すように、封止樹脂８の内部に、厚みの大きい絶縁基材６ｘを封止していると、封止樹脂８と絶縁基材６ｘとの体積変位差により、大きな界面応力が発生し、絶縁基材６ｘが封止樹脂８から剥離してしまう。 At this time, as shown in FIG. 4A, if a thick insulating base 6x is sealed inside the sealing resin 8, a difference in volume displacement between the sealing resin 8 and the insulating base 6x. As a result, a large interfacial stress is generated, and the insulating base 6x is peeled off from the sealing resin 8.
　そこで、半導体モジュール１００では、図４（Ｂ）に示すように、絶縁基材６ｘを、厚みの小さい２枚の絶縁基材６ｂ、６ｃに分け、絶縁基材６ｂと６ｃとの間に封止樹脂８を充填するようにした。この結果、封止樹脂８と絶縁基材６ｂ、６ｃとの体積変位差が小さくなり、界面応力が小さくなるため、絶縁基材６ｂ、６ｃが封止樹脂８から剥離することが防止される。絶縁基材６ｂ、６ｃと封止樹脂８との界面が剥離すると、ワイヤーボンディング３ａ～３ｆが断線したり、はんだ４による接合が外れたりし、接続不良の原因となるが、半導体モジュール１００においてはそのような虞がない。以上の構造からなる、本発明の第１実施形態にかかる半導体モジュール１００は、図３に示す等価回路を備えたインバータを構成している。半導体モジュール１００は、リード端子５３ａがＰ側端子に該当し、リード端子５１ａがＮ側端子に該当する。また、リード端子５２ａ、５２ｂ、５２ｃが、それぞれ、中間端子に該当する。また、リード端子５２ｄ、５２ｅ、５２ｆ、５３ｂ、５３ｃ、５３ｄが、それぞれ、ゲート端子に該当する。 Therefore, in the semiconductor module 100, as shown in FIG. 4B, the insulating base 6x is divided into two insulating bases 6b and 6c having a small thickness and sealed between the insulating bases 6b and 6c. Resin 8 was filled. As a result, the difference in volume displacement between the sealing resin 8 and the insulating base materials 6b and 6c is reduced, and the interface stress is reduced, so that the insulating base materials 6b and 6c are prevented from peeling off from the sealing resin 8. If the interface between the insulating bases 6b and 6c and the sealing resin 8 is peeled off, the wire bondings 3a to 3f may be disconnected or the bonding by the solder 4 may be disconnected, resulting in poor connection. There is no such fear. The semiconductor module 100 according to the first embodiment of the present invention having the above structure constitutes an inverter having the equivalent circuit shown in FIG. In the semiconductor module 100, the lead terminal 53a corresponds to the P-side terminal, and the lead terminal 51a corresponds to the N-side terminal. The lead terminals 52a, 52b, and 52c correspond to intermediate terminals, respectively. The lead terminals 52d, 52e, 52f, 53b, 53c, and 53d correspond to gate terminals, respectively.
　第１実施形態にかかる半導体モジュール１００は、たとえば、図５～１０に示す方法で製造することができる。なお、図５～１０は斜視図である。 The semiconductor module 100 according to the first embodiment can be manufactured by, for example, the method shown in FIGS. 5 to 10 are perspective views.
　まず、図５に示すように、絶縁基材６ａ～６ｄと、リード端子５１ａ～５３ｄとを準備する。絶縁基材６ａには、予め開口７ａが形成されている。絶縁基材６ｂには、予め開口７ｂ、７ｃが形成されている。絶縁基材６ｄには、予め開口７ｄが形成されている。絶縁基材６ｄには、予め開口７ｅ、７ｆが形成されている。 First, as shown in FIG. 5, insulating base materials 6a to 6d and lead terminals 51a to 53d are prepared. An opening 7a is previously formed in the insulating base 6a. Openings 7b and 7c are formed in the insulating base 6b in advance. An opening 7d is formed in advance in the insulating base 6d. Openings 7e and 7f are formed in advance in the insulating base 6d.
　続いて、リード端子５１ａ～５３ｄを、絶縁基材６ａ～６ｄに固定する。固定は、たとえば、接着剤によりおこなう。固定後の状態を、図６に示す。 Subsequently, the lead terminals 51a to 53d are fixed to the insulating bases 6a to 6d. Fixing is performed by, for example, an adhesive. The state after fixing is shown in FIG.
　次に、半導体スイッチング素子１ａ～１ｆを準備する。続いて、図７に示すように、半導体スイッチング素子１ａ～１ｆの他方の電源電極パッド（図７において各半導体スイッチング素子１ａ～１ｆの下側の主面に形成されている）を、はんだ（図示せず）により、リード端子５２ａ～５２ｃおよび５３ａに接合する。より詳細には、開口７ｂ部分において、半導体スイッチング素子１ａの他方の電源電極パッドをリード端子５２ａに、半導体スイッチング素子１ｂの他方の電源電極パッドをリード端子５２ｂに、半導体スイッチング素子１ｃの他方の電源電極パッドをリード端子５２ｃに、それぞれ接合する。また、開口７ｅ部分において、半導体スイッチング素子１ｄ～１ｆの他方の電源電極パッドを、リード端子５３ａに、それぞれ接合する。 Next, the semiconductor switching elements 1a to 1f are prepared. Subsequently, as shown in FIG. 7, the other power supply electrode pads (formed on the lower main surface of the semiconductor switching elements 1a to 1f in FIG. 7) of the semiconductor switching elements 1a to 1f are soldered (see FIG. 7). To the lead terminals 52a to 52c and 53a. More specifically, in the opening 7b, the other power electrode pad of the semiconductor switching element 1a is used as the lead terminal 52a, the other power electrode pad of the semiconductor switching element 1b is used as the lead terminal 52b, and the other power supply of the semiconductor switching element 1c is used. The electrode pads are bonded to the lead terminals 52c, respectively. Further, in the opening 7e, the other power electrode pads of the semiconductor switching elements 1d to 1f are respectively joined to the lead terminals 53a.
　なお、本工程においては、予めリード端子５２ａ～５２ｃが絶縁基材６ｂ、６ｃに固定され、リード端子５３ａが絶縁基材６ｄに固定されているため、リード端子が固定されずに個々に配置されている場合よりも、半導体スイッチング素子１ａ～１ｆのリード端子５２ａ～５２ｃ、５３ａへの接合が容易になっている。すなわち、半導体モジュール１００は、従来のものより製造が容易になっている。 In this step, since the lead terminals 52a to 52c are fixed to the insulating bases 6b and 6c in advance and the lead terminal 53a is fixed to the insulating base 6d, the lead terminals are arranged individually without being fixed. The semiconductor switching elements 1a to 1f are more easily joined to the lead terminals 52a to 52c and 53a than in the case of the above. That is, the semiconductor module 100 is easier to manufacture than the conventional one.
　次に、金属ブロック２ａ～２ｆを準備する。続いて、図８に示すように、半導体スイッチング素子１ａ～１ｆの一方の電源電極パッド（図８において各半導体スイッチング素子１ａ～１ｆの上側の主面に形成されている）に、はんだ（図示せず）により、金属ブロック２ａ～２ｆを接合する。より詳細には、半導体スイッチング素子１ａの一方の電源電極パッドに金属ブロック２ａを、半導体スイッチング素子１ｂの一方の電源電極パッドに金属ブロック２ｂを、半導体スイッチング素子１ｃの一方の電源電極パッドに金属ブロック２ｃを、半導体スイッチング素子１ｄの一方の電源電極パッドに金属ブロック２ｄを、半導体スイッチング素子１ｅの一方の電源電極パッドに金属ブロック２ｅを、半導体スイッチング素子１ｆの一方の電源電極パッドに金属ブロック２ｆを、それぞれ接合する。 Next, the metal blocks 2a to 2f are prepared. Subsequently, as shown in FIG. 8, solder (not shown) is applied to one power supply electrode pad (formed on the upper main surface of each semiconductor switching element 1a to 1f in FIG. 8) of the semiconductor switching elements 1a to 1f. The metal blocks 2a to 2f are joined together. More specifically, the metal block 2a is provided on one power electrode pad of the semiconductor switching element 1a, the metal block 2b is provided on one power electrode pad of the semiconductor switching element 1b, and the metal block is provided on one power electrode pad of the semiconductor switching element 1c. 2c, a metal block 2d on one power electrode pad of the semiconductor switching element 1d, a metal block 2e on one power electrode pad of the semiconductor switching element 1e, and a metal block 2f on one power electrode pad of the semiconductor switching element 1f. , Respectively.
　次に、図９に示すように、半導体スイッチング素子１ａ～１ｆの信号電極パッド（図示しているが符号は付与していない）と、リード端子５２ｄ～５２ｆおよび５３ｂ～５３ｄとを、ワイヤー３ａ～３ｆにより、ワイヤーボンディングする。より詳細には、開口７ｃ部分において、半導体スイッチング素子１ａの信号電極パッドとリード端子５２ｄとをワイヤー３ａにより、半導体スイッチング素子１ｂの信号電極パッドとリード端子５２ｅとをワイヤー３ｂにより、半導体スイッチング素子１ｃの信号電極パッドとリード端子５２ｆとをワイヤー３ｃにより、それぞれ、ワイヤーボンディングする。また、開口７ｆ部分において、半導体スイッチング素子１ｄの信号電極パッドとリード端子５３ｂとをワイヤー３ｄにより、半導体スイッチング素子１ｅの信号電極パッドとリード端子５３ｃとをワイヤー３ｅにより、半導体スイッチング素子１ｆの信号電極パッドとリード端子５３ｄとをワイヤー３ｆにより、それぞれ、ワイヤーボンディングする。 Next, as shown in FIG. 9, the signal electrode pads (not shown but provided with reference numerals) of the semiconductor switching elements 1a to 1f and the lead terminals 52d to 52f and 53b to 53d are connected to the wires 3a to 3d. Wire bonding is performed by 3f. More specifically, in the opening 7c portion, the signal electrode pad of the semiconductor switching element 1a and the lead terminal 52d are connected by the wire 3a, and the signal electrode pad of the semiconductor switching element 1b and the lead terminal 52e are connected by the wire 3b, thereby the semiconductor switching element 1c. The signal electrode pads and the lead terminals 52f are wire-bonded with the wires 3c. Further, in the opening 7f, the signal electrode pad of the semiconductor switching element 1d and the lead terminal 53b are connected by the wire 3d, and the signal electrode pad of the semiconductor switching element 1e and the lead terminal 53c are connected by the wire 3e and the signal electrode of the semiconductor switching element 1f. The pad and the lead terminal 53d are wire-bonded with the wire 3f.
　なお、本工程においては、予めリード端子５２ａ～５２ｆが絶縁基材６ｂ、６ｃに固定され、リード端子５３ａ～５３ｄが絶縁基材６ｄに固定されているため、リード端子が固定されずに個々に配置されるとともに、そのようなリード端子に半導体スイッチング素子が接合されている場合よりも、ワイヤー３ａ～３ｆのワイヤーボンディングが容易になっている。すなわち、半導体モジュール１００は、従来のものより製造が容易になっている。 In this step, the lead terminals 52a to 52f are fixed to the insulating bases 6b and 6c in advance, and the lead terminals 53a to 53d are fixed to the insulating base 6d. In addition, wire bonding of the wires 3a to 3f is easier than in the case where the semiconductor switching element is bonded to such a lead terminal. That is, the semiconductor module 100 is easier to manufacture than the conventional one.
　次に、図１０に示すように、金属ブロック２ａ～２ｆと、リード端子５１ａおよび５２ａ～５２ｃとを、はんだ（図示せず）により接合する。より詳細には、開口７ｂ部分において、金属ブロック２ａ～２ｃとリード端子５１ａとを、それぞれ接合する。また、開口７ｂおよび７ｄ部分において、金属ブロック２ｄとリード端子５２ａとを、金属ブロック２ｅとリード端子５２ｂとを、金属ブロック２ｆとリード端子５２ｃとを、それぞれ接合する。この結果、リード端子５１ａ～５３ｄが固定された絶縁基材６ａ～６ｄと、半導体スイッチング素子１ａ～１ｆ、金属ブロック２ａ～２ｆ等が一体化され、構造体Ｓが形成される。 Next, as shown in FIG. 10, the metal blocks 2a to 2f and the lead terminals 51a and 52a to 52c are joined by solder (not shown). More specifically, the metal blocks 2a to 2c and the lead terminal 51a are joined to each other at the opening 7b. Further, in the openings 7b and 7d, the metal block 2d and the lead terminal 52a, the metal block 2e and the lead terminal 52b, and the metal block 2f and the lead terminal 52c are joined, respectively. As a result, the insulating bases 6a to 6d to which the lead terminals 51a to 53d are fixed, the semiconductor switching elements 1a to 1f, the metal blocks 2a to 2f, and the like are integrated to form the structure S.
　なお、本工程においては、予めリード端子５２ａ～５２ｃが絶縁基材６ｂ、６ｃに固定されているため、リード端子が固定されずに個々に配置されている場合よりも、金属ブロック２ｄ～２ｆとリード端子５２ａ～５２ｃとの、はんだによる接合が容易になっている。すなわち、半導体モジュール１００は、従来のものより製造が容易になっている。 In this step, since the lead terminals 52a to 52c are fixed to the insulating bases 6b and 6c in advance, the metal blocks 2d to 2f and the metal blocks 2d to 2f are used rather than the case where the lead terminals are individually arranged without being fixed. It is easy to join the lead terminals 52a to 52c with solder. That is, the semiconductor module 100 is easier to manufacture than the conventional one.
　次に、図示しないが、構造体Ｓを、リード端子５１ａ～５３ｄを外部に導出させて、金型内に収容する。続いて、金型内に樹脂をトランスファーモールドして、封止樹脂８を形成し、リード端子５１ａ～５３ｄを外部に導出させて、構造体Ｓを封止樹脂８内に封止して、第１実施形態にかかる半導体モジュール１００を完成させる。 Next, although not shown, the structure S is housed in a mold with the lead terminals 51a to 53d led out to the outside. Subsequently, the resin is transfer-molded in the mold to form the sealing resin 8, the lead terminals 51a to 53d are led out to the outside, and the structure S is sealed in the sealing resin 8, The semiconductor module 100 according to one embodiment is completed.
　なお、本工程においては、予めリード端子５１ａが絶縁基材６ａに固定され、リード端子５２ａ～５２ｆが絶縁基材６ｂ、６ｃに固定され、リード端子５３ａ～５３ｄが絶縁基材６ｄに固定されているため、これらを金型内に収容するのが容易になっている。また、絶縁基材６ａ～６ｄに固定されることにより、リード端子５１ａ～５３ｄは、金型内に樹脂をトランスファーモールドする際に、樹脂に押されて動くことが抑制されており、ワイヤーボンディングが断線したり、はんだによる接合が外れたりすることが抑制されている。すなわち、半導体モジュール１００は、従来のものより製造が容易かつ信頼性の高いものになっている。 In this step, the lead terminal 51a is fixed to the insulating base 6a in advance, the lead terminals 52a to 52f are fixed to the insulating bases 6b and 6c, and the lead terminals 53a to 53d are fixed to the insulating base 6d. Therefore, it is easy to accommodate them in the mold. Further, by being fixed to the insulating bases 6a to 6d, the lead terminals 51a to 53d are restrained from being moved by being pushed by the resin when the resin is transfer-molded into the mold, and wire bonding is prevented. The disconnection or the disconnection by soldering is suppressed. That is, the semiconductor module 100 is easier to manufacture and more reliable than the conventional one.
　［第２実施形態］
　図１１に、第２実施形態にかかる半導体モジュール２００を示す。ただし、図１１は、半導体モジュール２００の断面図である。図１～３に示した第１実施形態にかかる半導体モジュール１００では、半導体スイッチング素子１ａ～１ｓにＭＯＳＦＥＴを使用した。そのため、半導体モジュール１００では、還流ダイオードを使用することなく、インバータが構成された。 [Second Embodiment]
FIG. 11 shows a semiconductor module 200 according to the second embodiment. However, FIG. 11 is a cross-sectional view of the semiconductor module 200. In the semiconductor module 100 according to the first embodiment shown in FIGS. 1 to 3, MOSFETs are used for the semiconductor switching elements 1a to 1s. Therefore, in the semiconductor module 100, an inverter is configured without using a reflux diode.
　これに対し、第２実施形態にかかる半導体モジュール２００では、半導体スイッチング素子１ａ～１ｓにＩＧＢＴ（Insulated Gate Bipolar Transistor；絶縁ゲートバイポー
ラトランジスタ）を使用した。したがって、半導体モジュール２００には、６個のダイオード９ａ～９ｆが使用されている（図１１において、ダイオード９ｃ、９ｆのみを図示）。 In contrast, in the semiconductor module 200 according to the second embodiment, IGBTs (Insulated Gate Bipolar Transistors) are used as the semiconductor switching elements 1a to 1s. Therefore, six diodes 9a to 9f are used in the semiconductor module 200 (only the diodes 9c and 9f are shown in FIG. 11).
　図１１に示すように、半導体モジュール２００では、絶縁基材６ａに、リード端子５１ｓ、５１ｔが固定されている。また、絶縁基材６ｂと６ｃとの間に、リード端子５２ｓ、５２ｔが固定されている。さらに、絶縁基材６ｄに、リード端子５３ｓ、５３ｔ、５３ｕが固定されている。 As shown in FIG. 11, in the semiconductor module 200, lead terminals 51s and 51t are fixed to the insulating base 6a. Also, lead terminals 52s and 52t are fixed between the insulating bases 6b and 6c. Furthermore, lead terminals 53s, 53t, and 53u are fixed to the insulating base 6d.
　そして、リード端子５１ｔと５２ｓとの間に、金属ブロック２ｃが固定された半導体スイッチング素子（ＩＧＢＴ）１ｃが挿入されている。なお、半導体スイッチング素子１ｃの信号電極パッド（図示せず）は、ワイヤー３ｃにより、リード端子５２ｔにワイヤーボンディングされている。 A semiconductor switching element (IGBT) 1c having a metal block 2c fixed thereto is inserted between the lead terminals 51t and 52s. A signal electrode pad (not shown) of the semiconductor switching element 1c is wire-bonded to the lead terminal 52t by a wire 3c.
　同様に、リード端子５２ｓと５３ｔとの間に、金属ブロック２ｆが固定された半導体スイッチング素子（ＩＧＢＴ）１ｆが挿入されている。なお、半導体スイッチング素子１ｆの信号電極パッド（図示せず）は、ワイヤー３ｆにより、リード端子５３ｕにワイヤーボンディングされている。 Similarly, a semiconductor switching element (IGBT) 1f to which a metal block 2f is fixed is inserted between the lead terminals 52s and 53t. A signal electrode pad (not shown) of the semiconductor switching element 1f is wire-bonded to the lead terminal 53u by a wire 3f.
　そして、リード端子５１ｓと５２ｓとの間に、はんだ４により金属ブロック１２ｃが固定されたダイオード９ｃが挿入されている。 A diode 9c having a metal block 12c fixed by solder 4 is inserted between the lead terminals 51s and 52s.
　同様に、リード端子５２ｓと５３ｓとの間に、はんだ４により金属ブロック１２ｆが固定されたダイオード９ｆが挿入されている。 Similarly, a diode 9f having a metal block 12f fixed by solder 4 is inserted between the lead terminals 52s and 53s.
　以上のように、半導体モジュール２００においては、半導体スイッチング素子１ａ～１ｓにＩＧＢＴを使用し、さらにダイオード９ａ～９ｆを使用して、インバータが構成されている。 As described above, in the semiconductor module 200, the inverter is configured by using IGBTs for the semiconductor switching elements 1a to 1s and further using the diodes 9a to 9f.
　［第３実施形態］
　第３実施形態にかかる半導体モジュール３００を、図１２に示す。ただし、図１２は、半導体モジュール３００の断面図である。 [Third Embodiment]
A semiconductor module 300 according to the third embodiment is shown in FIG. However, FIG. 12 is a cross-sectional view of the semiconductor module 300.
　第３実施形態にかかる半導体モジュール３００は、図１～３に示した第１実施形態にかかる半導体モジュール１００に、放熱板１０ａ、１０ｂを追加した。 In the semiconductor module 300 according to the third embodiment, the heat sinks 10a and 10b are added to the semiconductor module 100 according to the first embodiment shown in FIGS.
　具体的には、半導体モジュール１００のリード端子５１ａの絶縁基材６ａが固定されていない側の主面に、新たに絶縁基材６ｆを固定し、絶縁基材６ｆに放熱板１０ａを固定した。放熱板１０ａは、封止樹脂８の上側の主面から外部に露出されている。 Specifically, the insulating base 6f is newly fixed to the main surface of the lead terminal 51a of the semiconductor module 100 where the insulating base 6a is not fixed, and the heat radiating plate 10a is fixed to the insulating base 6f. The heat sink 10 a is exposed to the outside from the upper main surface of the sealing resin 8.
　同様に、半導体モジュール１００のリード端子５３ａ、５３ｄの絶縁基材６ｄが固定されていない側の主面に、新たに絶縁基材６ｇを固定し、絶縁基材６ｇに放熱板１０ｂを固定した。放熱板１０ｂは、封止樹脂８の下側の主面から外部に露出されている。 Similarly, the insulating base 6g was newly fixed on the main surface of the lead terminals 53a and 53d of the semiconductor module 100 where the insulating base 6d is not fixed, and the heat sink 10b was fixed to the insulating base 6g. The heat radiating plate 10 b is exposed to the outside from the lower main surface of the sealing resin 8.
　半導体モジュール３００の他の構成は、半導体モジュール１００の構成と同じにした。 The other configuration of the semiconductor module 300 is the same as the configuration of the semiconductor module 100.
　半導体モジュール３００のように、放熱板１０ａ、１０ｂを設けると、スイッチング素子１ａ～１ｆが発生させる熱を、効率良く放散させることができる。 When the heat sinks 10a and 10b are provided as in the semiconductor module 300, the heat generated by the switching elements 1a to 1f can be efficiently dissipated.
　［第４実施形態］
　第４実施形態にかかる半導体モジュール４００を、図１３（Ａ）、（Ｂ）に示す。ただし、図１３（Ａ）は、半導体モジュール４００の断面図である。図１３（Ｂ）は、半導体モジュール４００の等価回路図である。 [Fourth Embodiment]
A semiconductor module 400 according to the fourth embodiment is shown in FIGS. Note that FIG. 13A is a cross-sectional view of the semiconductor module 400. FIG. 13B is an equivalent circuit diagram of the semiconductor module 400.
　第４実施形態にかかる半導体モジュール４００は、図１～３に示した第１実施形態にかかる半導体モジュール１００に、３個のシャント抵抗素子２０を追加した。
具体的には、半導体モジュール４００は、図１３（Ａ）に示すように、シャント抵抗素子２０が追加されている。 In the semiconductor module 400 according to the fourth embodiment, three shunt resistor elements 20 are added to the semiconductor module 100 according to the first embodiment shown in FIGS.
Specifically, as shown in FIG. 13A, the semiconductor module 400 has a shunt resistor element 20 added thereto.
　半導体モジュール４００は、シャント抵抗素子２０を追加するために、第１実施形態にかかる半導体モジュール１００において絶縁基材６ｂと６ｃとの間に固定されていた１本のリード端子５２ｃを短くするとともに、リード端子５２ｃと５２ｆとの間に、新たにリード端子５２ｇを固定している。 In order to add the shunt resistance element 20, the semiconductor module 400 shortens one lead terminal 52c that is fixed between the insulating bases 6b and 6c in the semiconductor module 100 according to the first embodiment, A lead terminal 52g is newly fixed between the lead terminals 52c and 52f.
　そして、底面に１対の電極パッドが形成されたシャント抵抗素子２０を用意し、はんだ４により、一方の電極パッドをリード端子５２ｃに、他方の電極パッドをリード端子５２ｇに接合している。 Then, a shunt resistance element 20 having a pair of electrode pads formed on the bottom surface is prepared, and one electrode pad is joined to the lead terminal 52c and the other electrode pad is joined to the lead terminal 52g by the solder 4.
　なお、半導体スイッング素子１ｃの他方の電源電極パッド（図示せず）は、第１実施形態　にかかる半導体モジュール１００において接合されていたリード端子５２ｃに代えて、リード端子５２ｇに接合されている。 The other power electrode pad (not shown) of the semiconductor switching element 1c is joined to the lead terminal 52g instead of the lead terminal 52c joined in the semiconductor module 100 according to the first embodiment.
　あと２個のシャント抵抗素子２０も、同様の方法により、半導体モジュール４００に追加されている。 Two more shunt resistor elements 20 are also added to the semiconductor module 400 by the same method.
　半導体モジュール４００は、図１３（Ｂ）に示す等価回路を備えている。すなわち、半導体スイッチング素子１ａと１ｄの接続点と、中間端子であるリード端子５２ａとの間に、シャント抵抗素子２０が挿入されている。また、半導体スイッチング素子１ｂと１ｅの接続点と、中間端子であるリード端子５２ｂとの間に、シャント抵抗素子２０が挿入されている。また、半導体スイッチング素子１ｃと１ｆの接続点と、中間端子であるリード端子５２ｃとの間に、シャント抵抗素子２０が挿入されている。 The semiconductor module 400 includes an equivalent circuit shown in FIG. That is, the shunt resistor element 20 is inserted between the connection point of the semiconductor switching elements 1a and 1d and the lead terminal 52a that is an intermediate terminal. Further, the shunt resistor element 20 is inserted between the connection point of the semiconductor switching elements 1b and 1e and the lead terminal 52b which is an intermediate terminal. Further, the shunt resistor element 20 is inserted between the connection point of the semiconductor switching elements 1c and 1f and the lead terminal 52c which is an intermediate terminal.
　半導体モジュール４００は、各シャント抵抗素子２０の両電源極パッド間の電圧を監視することにより、異常電流の発生を検出することができる。 The semiconductor module 400 can detect the occurrence of an abnormal current by monitoring the voltage between both power supply electrode pads of each shunt resistance element 20.
　［第５実施形態］
　第５実施形態にかかる半導体モジュール５００は、第１実施形態にかかる半導体モジュール１００の構成要素の材質に一部変更を加えた。構造そのものには変更がないので、半導体モジュール１００を説明した図１、図２を援用して半導体モジュール５００を説明する。 [Fifth Embodiment]
In the semiconductor module 500 according to the fifth embodiment, the material of the components of the semiconductor module 100 according to the first embodiment is partially changed. Since the structure itself is not changed, the semiconductor module 500 will be described with reference to FIGS. 1 and 2 illustrating the semiconductor module 100.
　半導体モジュール１００では、絶縁基材６ａ～６ｄに、フィラーが充填されたエポキシ、ポリイミド等の樹脂を用いた。半導体モジュール５００では、これに代えて、絶縁基材６ａ～６ｄにセラミックスを用いた。より具体的には、絶縁基材６ａ～６ｄを構成するセラミックスに、たとえば、窒化珪素、窒化アルミニウム、アルミナなどを主成分とするセラミックスを用いた。 In the semiconductor module 100, a resin such as epoxy or polyimide filled with filler is used for the insulating bases 6a to 6d. In the semiconductor module 500, instead of this, ceramics are used for the insulating bases 6a to 6d. More specifically, for example, a ceramic mainly composed of silicon nitride, aluminum nitride, alumina, or the like is used as the ceramic constituting the insulating bases 6a to 6d.
　また、半導体モジュール１００では、リード端子５１ａ、５２ａ～５２ｆ、５３ａ～５３ｄの絶縁基材６ａ～６ｄへの接合に接着剤を用いた。半導体モジュール５００では、これに代えて、この部分の接合に、少なくとも、セラミックスの構成成分と反応する活性な金属と、Ａｇと、Ｃｕとを含む合金（図示せず）を用いた。本実施形態においては、具体的には、セラミックスの構成成分と反応する活性な金属として、合金にＴｉを含有させた。ただし、セラミックに含まれる成分と反応する活性な金属はＴｉには限定されず、Ｚｒなど、他の金属であっても良い。なお、セラミックスの構成成分と反応する活性な金属と、Ａｇと、Ｃｕとを含む合金は、活性金属ロウ材と呼ばれる場合がある。 Further, in the semiconductor module 100, an adhesive is used for joining the lead terminals 51a, 52a to 52f, 53a to 53d to the insulating bases 6a to 6d. In the semiconductor module 500, instead of this, an alloy (not shown) containing at least an active metal that reacts with the constituent components of the ceramic, Ag, and Cu is used for bonding of this portion. In the present embodiment, specifically, Ti is contained in the alloy as an active metal that reacts with the constituent components of the ceramic. However, the active metal that reacts with the components contained in the ceramic is not limited to Ti, and may be other metals such as Zr. In addition, the active metal which reacts with the structural component of ceramics, the alloy containing Ag and Cu may be called an active metal brazing material.
　セラミックスの構成成分と反応する活性な金属と、Ａｇと、Ｃｕとを含む合金には、必要に応じて、融点を調整するために、Ｔｉ、Ｚｎ、Ｓｎ、Ｉｎ、Ｎｉ、Ｍｎ、Ｃｄなどから選ばれる金属が、１種または複数種、添加される場合がある。なお、本実施形態においては、セラミックに含まれる成分と反応する活性成分として添加されたＴｉは、融点を調整する役割も果たしている。 For alloys containing active metals that react with ceramic constituents, Ag, and Cu, Ti, Zn, Sn, In, Ni, Mn, Cd, etc. are used to adjust the melting point as necessary. One or more selected metals may be added. In the present embodiment, Ti added as an active component that reacts with components contained in the ceramic also plays a role of adjusting the melting point.
　なお、合金にＴｉを添加する場合には、Ｔｉの添加量は、合金の全重量に対して３重量％以下であることが好ましい。Ｔｉの含有量が３重量％を超えると、合金自体が脆化する虞があるからである。本実施形態においては、合金６の配合比率を、Ａｇ６０～８０重量％、Ｃｕ２０～４０重量％、Ｔｉ１～３重量％とした。 In addition, when adding Ti to an alloy, it is preferable that the addition amount of Ti is 3 weight% or less with respect to the total weight of an alloy. This is because if the Ti content exceeds 3% by weight, the alloy itself may become brittle. In this embodiment, the compounding ratio of the alloy 6 is set to Ag 60 to 80% by weight, Cu 20 to 40% by weight, and Ti 1 to 3% by weight.
　半導体モジュール５００の他の構成は、半導体モジュール１００と同じにした。 The other configuration of the semiconductor module 500 is the same as that of the semiconductor module 100.
　リード端子５１ａ、５２ａ～５２ｆ、５３ａ～５３ｄの絶縁基材６ａ～６ｄへの接合は、予め、リード端子５１ａ、５２ａ～５２ｆ、５３ａ～５３ｄに活性金属ロウ材からなるペーストを塗布しておき、その塗布面を絶縁基材６ａ～６ｄへ当接させて、その活性金属ロウ材の融点以上の温度で熱処理することによりおこなうことができる。 For joining the lead terminals 51a, 52a to 52f, 53a to 53d to the insulating bases 6a to 6d, a paste made of an active metal brazing material is applied to the lead terminals 51a, 52a to 52f, 53a to 53d in advance. The coating can be performed by bringing the coated surface into contact with the insulating substrates 6a to 6d and performing a heat treatment at a temperature equal to or higher than the melting point of the active metal brazing material.
　セラミックスの構成成分と反応する活性な金属と、Ａｇと、Ｃｕとを含む合金は、リード端子５１ａ、５２ａ～５２ｆ、５３ａ～５３ｄを絶縁基材６ａ～６ｄへ強固に接合する。たとえば、絶縁基材６ａ～６ｄに窒化珪素を用い、リード端子５１ａ、５２ａ～５２ｆ、５３ａ～５３ｄにＣｕを用い、両者を、Ｔｉが添加されたＡｇとＣｕとを含む合金によって接合した場合、合金の絶縁基板（窒化珪素基板）６ａ～６ｄの近傍には、ＴｉＮや、ＭＮが形成される（ただしＭはＳｉ、Ｃｕ、Ｔｉの合金）。すなわち、合金の絶縁基板６ａ～６ｄ近傍のＴｉの濃度が、合金のその他の部分のＴｉの濃度よりも高くなっている。この結果、リード端子２ａ～２ｅと絶縁基板６ａ～６ｄとは、高い強度で接合されている。 An alloy containing an active metal that reacts with the components of the ceramic, Ag, and Cu firmly bonds the lead terminals 51a, 52a to 52f, and 53a to 53d to the insulating bases 6a to 6d. For example, when silicon nitride is used for the insulating bases 6a to 6d, Cu is used for the lead terminals 51a, 52a to 52f, 53a to 53d, and both are joined by an alloy containing Ag and Cu to which Ti is added, TiN and MN are formed in the vicinity of the alloy insulating substrates (silicon nitride substrates) 6a to 6d (where M is an alloy of Si, Cu, and Ti). That is, the Ti concentration in the vicinity of the insulating substrates 6a to 6d of the alloy is higher than the Ti concentration in other portions of the alloy. As a result, the lead terminals 2a to 2e and the insulating substrates 6a to 6d are bonded with high strength.
　また、セラミックスの構成成分と反応する活性な金属と、Ａｇと、Ｃｕとを含む合金は、一般に、接着剤よりも熱伝導率が高い。そのため、半導体モジュール５００は、半導体スイッチング素子1ａ～１ｆが発生させた熱を、リード端子５１ａ、５２ａ～５２ｆ、５３ａ～５３ｄを経由し、更に絶縁基材６ａ～６ｄを経由して、より効率的に放散させることがきる。 Further, an alloy containing an active metal that reacts with a constituent component of ceramic, Ag, and Cu generally has a higher thermal conductivity than an adhesive. Therefore, the semiconductor module 500 is more efficient for the heat generated by the semiconductor switching elements 1a to 1f via the lead terminals 51a, 52a to 52f, 53a to 53d, and further via the insulating bases 6a to 6d. Can be dissipated.
　以上のように、第５実施形態にかかる半導体モジュール５００は、高い強度を備えたセラミックスからなる絶縁基材６ａ～６ｄに、リード端子５１ａ、５２ａ～５２ｆ、５３ａ～５３ｄが、セラミックスの構成成分と反応する活性な金属と、Ａｇと、Ｃｕとを含む合金を介して強固に接合されているため、高い強度を備えている。また、放熱性においても優れている。 As described above, in the semiconductor module 500 according to the fifth embodiment, the lead terminals 51a, 52a to 52f, and 53a to 53d are formed on the insulating bases 6a to 6d made of ceramics having high strength, and the ceramic components are included. Since it is firmly joined through an alloy containing an active metal that reacts, Ag, and Cu, it has high strength. Moreover, it is excellent also in heat dissipation.
　以上、本発明の第１～５実施形態にかかる半導体モジュール１００～５００の構造、および製造方法の一例について説明した。しかしながら、本発明がこれらの内容に限定されることはなく、発明の趣旨に沿って、種々の変更を加えることができる。 The structure of the semiconductor modules 100 to 500 according to the first to fifth embodiments of the present invention and the example of the manufacturing method have been described above. However, the present invention is not limited to these contents, and various modifications can be made in accordance with the spirit of the invention.
　たとえば、本発明の半導体モジュールの回路構成は任意であり、半導体モジュール１００～５００の等価回路には限定されない。たとえば、半導体モジュール４００では、受動素子としてシャント抵抗素子２０を封止樹脂８内に追加して封止しているが、これに代えて、異常発熱の監視をするためのサーミスタ素子を封止樹脂８内に封止するようにしても良い。 For example, the circuit configuration of the semiconductor module of the present invention is arbitrary, and is not limited to the equivalent circuit of the semiconductor modules 100 to 500. For example, in the semiconductor module 400, the shunt resistor element 20 is additionally sealed in the sealing resin 8 as a passive element. Instead, a thermistor element for monitoring abnormal heat generation is used as the sealing resin. 8 may be sealed.
１ａ、１ｂ、１ｃ、１ｄ、１ｅ、１ｆ・・・半導体スイッチング素子
２ａ、２ｂ、２ｃ、２ｄ、２ｅ、２ｆ・・・金属ブロック
３ａ、３ｂ、３ｃ、３ｄ、３ｅ、３ｆ・・・ワイヤー
４・・・はんだ
５１ａ、５１ｓ、５１ｔ、５２ａ、５２ｂ、５２ｃ、５２ｄ、５２ｅ、５２ｆ、５２ｇ、５２ｓ、５２ｔ、５３ａ、５３ｂ、５３ｃ、５３ｄ、５３ｓ、５３ｔ、５３ｕ・・・リード端子
６ａ、６ｂ、６ｃ、６ｄ、６ｆ、６ｇ・・・絶縁基材
８・・・封止樹脂
９ａ、９ｂ・・・ダイオード
１０ａ、１０ｂ・・・放熱板
２０・・・シャント抵抗素子
１００、２００、３００、４００、５００・・・半導体モジュール  1a, 1b, 1c, 1d, 1e, 1f... Semiconductor switching elements 2a, 2b, 2c, 2d, 2e, 2f... Metal blocks 3a, 3b, 3c, 3d, 3e, 3f. .. Solders 51a, 51s, 51t, 52a, 52b, 52c, 52d, 52e, 52f, 52g, 52s, 52t, 53a, 53b, 53c, 53d, 53s, 53t, 53u ... lead terminals 6a, 6b, 6c 6d, 6f, 6g ... Insulating substrate 8 ... Sealing resin 9a, 9b ... Diode 10a, 10b ... Heat sink 20 ... Shunt resistor element 100, 200, 300, 400, 500 ... Semiconductor modules

Claims (11)

  1. 　少なくとも、複数の半導体スイッチング素子と、複数のリード端子とが、封止樹脂に封止された半導体モジュールであって、
    　前記封止樹脂には、さらに、複数の板状の絶縁基材が封止され、
    　前記絶縁基材には、前記リード端子が接合され、
    　前記絶縁基材が、前記封止樹脂内において、上下方向に間隔を空けて、少なくとも３層に分けて配置されることにより、前記リード端子も、前記封止樹脂内において、上下方向に間隔を空けて、少なくとも３層に分けて配置され、
    　前記半導体スイッチング素子は、一方の主面に信号電極パッドと一方の電源電極パッドが形成され、他方の主面に他方の電源電極パッドが形成され、
    　前記半導体スイッチング素子の両主面に形成された電源電極パッドは、直接または間接に、所定の前記リード端子に接合され、
    　前記半導体スイッチング素子の一方の主面に形成された信号電極パッドは、ワイヤーにより、所定の前記リード端子にワイヤーボンディングされ、
    　前記リード端子の少なくとも一部のものが、前記封止樹脂から外部に導出されている半導体モジュール。     At least a plurality of semiconductor switching elements and a plurality of lead terminals are semiconductor modules sealed with a sealing resin,
    In the sealing resin, a plurality of plate-like insulating base materials are further sealed,
    The lead terminal is joined to the insulating base material,
    The insulating base material is arranged in at least three layers with an interval in the vertical direction in the sealing resin, so that the lead terminals are also spaced in the vertical direction in the sealing resin. Vacant, arranged in at least three layers,
    In the semiconductor switching element, a signal electrode pad and one power electrode pad are formed on one main surface, and the other power electrode pad is formed on the other main surface.
    The power supply electrode pads formed on both main surfaces of the semiconductor switching element are directly or indirectly bonded to the predetermined lead terminal,
    The signal electrode pad formed on one main surface of the semiconductor switching element is wire-bonded to the predetermined lead terminal by a wire,
    A semiconductor module in which at least a part of the lead terminals is led out from the sealing resin.
  2. 　前記絶縁基材に、両主面間を貫通した開口が形成され、当該開口に、当該絶縁基材に接合された前記リード端子の少なくとも一部分が配置されている、請求項１に記載された半導体モジュール。　 The semiconductor according to claim 1, wherein an opening that penetrates between both main surfaces is formed in the insulating base, and at least a part of the lead terminal joined to the insulating base is disposed in the opening. module. *
  3. 　前記絶縁基材がフィラーの含有された樹脂からなり、前記封止樹脂がフィラーの含有されていない樹脂からなる、または、前記絶縁基材および前記封止樹脂がフィラーの含有された樹脂からなり、当該封止樹脂の前記フィラーの含有体積率が、当該絶縁基材の前記フィラーの含有体積率よりも低い、請求項１または２に記載された半導体モジュール。 The insulating base is made of a resin containing a filler, the sealing resin is made of a resin not containing a filler, or the insulating base and the sealing resin are made of a resin containing a filler, The semiconductor module according to claim 1, wherein a content volume ratio of the filler of the sealing resin is lower than a content volume ratio of the filler of the insulating base material.
  4. 　前記絶縁基材がセラミックスからなり、前記リード端子が、少なくとも、前記セラミックスの構成成分と反応する活性な金属と、Ａｇと、Ｃｕとを含む合金を介して、前記絶縁基板に接合された、請求項１または２に記載された半導体モジュール。 The insulating base is made of ceramics, and the lead terminals are bonded to the insulating substrate through an alloy containing at least an active metal that reacts with the constituents of the ceramics, Ag, and Cu. Item 3. The semiconductor module according to Item 1 or 2.
  5. 　前記少なくとも３層に分けて配置されたリード端子のうち、少なくとも１層に配置されたリード端子が、両主面において、異なる２枚の前記絶縁基材に接合されており、当該２枚の絶縁基材の間に、前記封止樹脂が充填されている、請求項１ないし４のいずれか１項に記載された半導体モジュール。 Among the lead terminals arranged in at least three layers, the lead terminals arranged in at least one layer are joined to two different insulating base materials on both main surfaces, and the two insulations The semiconductor module according to claim 1, wherein the sealing resin is filled between base materials.
  6. 　少なくとも１個の前記半導体スイッチング素子の一方の主面に形成された前記電源電極パッドが、金属ブロックを介して、所定の前記リード端子に接合されている、請求項１ないし５のいずれか１項に記載された半導体モジュール。 6. The power supply electrode pad formed on one main surface of at least one of the semiconductor switching elements is bonded to the predetermined lead terminal through a metal block. The semiconductor module described in 1.
  7. 　前記封止樹脂の少なくとも一方の主面から放熱板が露出されている、請求項１ないし６のいずれか１項に記載された半導体モジュール。 The semiconductor module according to any one of claims 1 to 6, wherein a heat sink is exposed from at least one main surface of the sealing resin.
  8. 　前記封止樹脂に、さらに受動素子が封止されている、請求項１ないし７のいずれか１項に記載された半導体モジュール。 The semiconductor module according to any one of claims 1 to 7, wherein a passive element is further sealed in the sealing resin.
  9. 　前記受動素子が、シャント抵抗素子、または／および、サーミスタ素子である、請求項８に記載された半導体モジュール。 The semiconductor module according to claim 8, wherein the passive element is a shunt resistor element or / and a thermistor element.
  10. 　前記封止樹脂に、さらに還流ダイオードが封止されている、請求項１ないし９のいずれか１項に記載された半導体モジュール。 10. The semiconductor module according to claim 1, wherein a reflux diode is further sealed in the sealing resin.
  11. 　前記半導体モジュールがインバータである、請求項１ないし１０のいずれか１項に記載された半導体モジュール。 The semiconductor module according to claim 1, wherein the semiconductor module is an inverter.
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