Classifications

• • B—PERFORMING OPERATIONS; TRANSPORTING
  • B81—MICROSTRUCTURAL TECHNOLOGY
  • B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
  • B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
  • B81C1/00349—Creating layers of material on a substrate
  • B81C1/00373—Selective deposition, e.g. printing or microcontact printing
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L21/02104—Forming layers
  • H01L21/02365—Forming inorganic semiconducting materials on a substrate
  • H01L21/02436—Intermediate layers between substrates and deposited layers
  • H01L21/02439—Materials
  • H01L21/02441—Group 14 semiconducting materials
  • H01L21/02447—Silicon carbide
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L21/02104—Forming layers
  • H01L21/02365—Forming inorganic semiconducting materials on a substrate
  • H01L21/02436—Intermediate layers between substrates and deposited layers
  • H01L21/02439—Materials
  • H01L21/02441—Group 14 semiconducting materials
  • H01L21/0245—Silicon, silicon germanium, germanium
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L21/02104—Forming layers
  • H01L21/02365—Forming inorganic semiconducting materials on a substrate
  • H01L21/02436—Intermediate layers between substrates and deposited layers
  • H01L21/02439—Materials
  • H01L21/02488—Insulating materials
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L21/02104—Forming layers
  • H01L21/02365—Forming inorganic semiconducting materials on a substrate
  • H01L21/02518—Deposited layers
  • H01L21/02521—Materials
  • H01L21/02524—Group 14 semiconducting materials
  • H01L21/02527—Carbon, e.g. diamond-like carbon
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L21/02104—Forming layers
  • H01L21/02365—Forming inorganic semiconducting materials on a substrate
  • H01L21/02518—Deposited layers
  • H01L21/02521—Materials
  • H01L21/02524—Group 14 semiconducting materials
  • H01L21/02529—Silicon carbide
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L21/02104—Forming layers
  • H01L21/02365—Forming inorganic semiconducting materials on a substrate
  • H01L21/02518—Deposited layers
  • H01L21/0257—Doping during depositing
  • H01L21/02573—Conductivity type
  • H01L21/02576—N-type
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L21/02104—Forming layers
  • H01L21/02365—Forming inorganic semiconducting materials on a substrate
  • H01L21/02612—Formation types
  • H01L21/02617—Deposition types
  • H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L21/02104—Forming layers
  • H01L21/02365—Forming inorganic semiconducting materials on a substrate
  • H01L21/02612—Formation types
  • H01L21/02617—Deposition types
  • H01L21/02636—Selective deposition, e.g. simultaneous growth of mono- and non-monocrystalline semiconductor materials
  • H01L21/02639—Preparation of substrate for selective deposition

Definitions

• M EMS micro-Jilektro-Mechanical Sensor
• LPCVD Low Pressure Chemical Vapor Deposition refers to a chemical process for the production of layers on substrates in the production of
• micromechanical sensors or semiconductor structures are micromechanical sensors or semiconductor structures.
• the LPCVD process according to the invention makes it possible to deposit thin carbon layers on a layer of silicon dioxide (SiO 2 ).
• the main idea of this LPCVD process is that in addition to the carbon precursor chlorine and silicon is used. As a result, no silicon and silicon-carbon compound separates, but a pure carbon layer from the selected process parameters on the Si0 2 , despite the silicon content in the process gas atmosphere.
• this process is not a plasma-assisted process, but a purely thermally activated process, which advantageously the deposition
• metal catalysts for the decomposition of carbon precursors as is the case for known carbon deposition processes.
• the invention is also particularly suitable for, in particular automated, mass production with high reliability and process reliability and allows low reject rates.
• the invention advantageously enables a planar and targeted deposition of a carbon layer on defined and selectable positions of a semiconductor material wafer.
• silicon dioxide Si0 2
• the carbon layer can be mechanically and electrically contacted in situ. It is an LPCVD process that requires no special system modifications and can be carried out with established process gases.
• the carbon layers produced by the process according to the invention have well-known, advantageous properties. These are u.a. a high electrical conductivity, high mobility of the charge carriers and a high mechanical strength of the few nanometers thick carbon layer.
• An advantageous property consists in a high electrical conductivity of the carbon layer combined with a high mobility of the charge carriers.
• the layers are suitable, for example, for the production of THz transistors, capacitors with high energy density and for storing large amounts of energy, so-called supercaps and batteries, the further Hall effect-based magnetic sensors and transparent interconnects or electrodes, for example for displays.
• the generated carbon layers continue to allow a chemical
• the carbon layers produced also have a high mechanical strength at low density with additional piezoresistive or also
• piezoelectric properties are thus suitable, for example, for use in spring structures for resonators, e.g. Micromirror or
• the method according to the invention comprises the steps
• the LPCVD process is under certain, deemed favorable
• Process conditions namely at a process temperature in a range between 700 ° C and 1300 ° C and at a process pressure in a range between 1 00 mTorr and 5000 mTorr is performed.
• a suitable combination of parameters is, for example, a process temperature of 1020 ° C with a process pressure of 875 mTorr.
• the starting structure in addition to the sections consisting of silicon dioxide, may have further sections, which may be e.g. made of silicon (Si) and / or silicon carbide (SiC).
• Si silicon
• SiC silicon carbide
• Hydrofluoric acid can be advantageously used for gas phase etching.
• methyltrichlorosilane can be advantageously used as starting material.
• methyltrichlorosilane can be advantageously used as starting material.
• silane, methane and hydrogen chloride can be used.
• other starting materials can be used, which among the Process conditions of the LPCVD process are comparable sources of carbon, silicon and chlorine.
• additional gases for example hydrogen as a carrier gas or ammonia, can be added as a source for doping the SiC layer.
• the invention is directed to a micromechanical structure or a
• Figure 1 is a schematic representation of a section through the layer structure of an inventively generated M EMS or semiconductor structure, which represents the initial structure for the selective carbon capture.
• FIG. 2 shows a schematic representation of a section through the layer structure of an M EMS or semiconductor structure produced according to the invention as an example of the variant in which silicon carbide (SiC) support structures were produced in addition to the carbon layer,
• SiC silicon carbide
• Figure 3 is a schematic representation of the structure of Figure 2, in the
• Figure 4 is a schematic representation of a section through a with the
• inventive method produced semiconductor structure using the example of a
• the present invention utilizes an LPCVD process to deposit thin carbon layers, which are, for example but not necessarily, crystalline and are on a layer of SiO 2.
• Essential in the deposition of this layer is that no pure carbon precursor (carbon precursor) is used, but a starting material or a starting material mixture is used, the or In addition to carbon and typically hydrogen, the process also provides chlorine and silicon. This can be achieved by using a single precursor, such as methyltrichlorosilane. It is also conceivable to use about three different precursors, each of which represents a source of carbon, silicon and chlorine, such as silane, methane and hydrogen chloride. It is essential that starting materials are used which, under the process conditions of the LPCVD process, are sources for the required elements of carbon, chlorine and silicon concentration. With, for example, this aforementioned gas combination silane, methane and
• Hydrogen chloride can be deposited in the LPCVD process on a simple silicon substrate thin layers of silicon carbide (SiC). However, if a layer of SiO 2 is present on the substrate, no SiC layer grows thereon under suitable process conditions, but instead a thin, pure carbon layer which, with suitably selected process parameters, sets in a desired carbon configuration.
• SiC silicon carbide
• Methytricholorsilan is still no silicon compound deposited on the SiO 2 layer, but a carbon layer. To achieve this selective process, moderate to high process temperatures (700 - 1300 ° C) and low process pressures (100 - 5000 mTorr) are required.
• the selectivity of the process over SiO 2 can advantageously also be used to the effect that on a starting layer of z.
• Si, SiC another layer
• FIG. 1 schematically and by way of example shows an initial structure 1 which is to be processed by the method according to the invention.
• the output structure 1 has a substrate 10 of, for example, silicon, over which a so-called start layer 11, for example consisting of silicon (Si) or silicon carbide (SiC), is arranged. Sectionally or in sections, the start layer 11 is covered with a layer of silicon oxide (SiO 2).
• starting structure 1 is introduced into the process space of an LPCVD installation in which the subsequent LPCVD process is carried out.
• the appropriate process parameters such as, in particular, the process pressure and process temperature are set in the abovementioned range, as well as the aforementioned provided (step 32) process chemicals (step 33).
• the semiconductor structure 1 'produced with the described LPCVD process comprises, in turn, the substrate 10, above which the start layer 11 and, in sections, the regions 12-x of silicon oxide which are mounted above it.
• silicon carbide portions 13-1, 13-2 and 13-3 are grown on the portions of the start layer located between the SiO 2 portions 12-x and immediately exposed to the LPCVD process.
• a layer 14-1, 14-2, 14-3 and 14-4 (hereinafter collectively 14-x) were respectively deposited from carbon.
• the silicon carbide layer and the carbon layer have very different thicknesses depending on the time of deposition.
• the carbon layers are only a few atomic layers a few nm thick ( ⁇ 20 nm, with process times of 60 min), the silicon carbide layers of the same process are several hundred nm thick.
• the resistivity of the silicon carbide layer is from the doping, by an addition of ammonia, depending, but it will reach no values less 10Ohmcm.
• the carbon layer may have a resistivity of 10 ohmcm, with a high degree of crystallinity.
• the carbon layers 14-x are mechanically and electrically connected to the respective adjacent silicon carbide sections 13-x.
• the silicon carbide layers or sections 13-1, 13-2, 13-3 can serve as supports for the respectively adjacent carbon layers 14-x, if these are used in a subsequent example
• the existence of an SiO 2 surface 13-x is essential, the layer thickness of which is irrelevant. This can, for example, be advantageously used to use extremely thin SiO 2 layers, for example in function as gate oxides.
• Step 35 is omitted to obtain the gate oxide.
• This layer 22-x is patterned to provide electrical wiring and the contacts for drain 23-1, source 23-2, and gate region 22-2. Subsequently, a thin SiO 2 layer 25 over the
• Gate 22-2 applied.
• the subsequent selective structuring according to the invention makes it possible for a carbon layer 24 to be formed on the gate oxide 25, which on the one hand constitutes the channel of the transistor 2 and, secondly, for the carbon layer to be drained via the depositing SiC 23-1 and 23-2 Source contacted.
• the channel on the surface and not the gate electrode In contrast to the normal transistors here lies the channel on the surface and not the gate electrode.
• sensors can be in this Configuration next to the channel-gate potential, additionally sense effects, influence conductivity in channel 24.

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• Engineering & Computer Science (AREA)
• Manufacturing & Machinery (AREA)
• Microelectronics & Electronic Packaging (AREA)
• Physics & Mathematics (AREA)
• Condensed Matter Physics & Semiconductors (AREA)
• General Physics & Mathematics (AREA)
• Computer Hardware Design (AREA)
• Power Engineering (AREA)
• Chemical Vapour Deposition (AREA)

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• 2015
  • 2015-01-22 DE DE102015201048.1A patent/DE102015201048A1/de not_active Withdrawn
  • 2015-11-20 WO PCT/EP2015/077240 patent/WO2016116195A1/de active Application Filing
  • 2015-11-20 EP EP15797674.7A patent/EP3248211A1/de not_active Withdrawn
  • 2015-11-20 CN CN201580074163.7A patent/CN107112202A/zh active Pending

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