WO2016078314A1 - 驱动电源、显示驱动电路和有机发光显示器 - Google Patents

驱动电源、显示驱动电路和有机发光显示器 Download PDF

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Publication number
WO2016078314A1
WO2016078314A1 PCT/CN2015/076833 CN2015076833W WO2016078314A1 WO 2016078314 A1 WO2016078314 A1 WO 2016078314A1 CN 2015076833 W CN2015076833 W CN 2015076833W WO 2016078314 A1 WO2016078314 A1 WO 2016078314A1
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Prior art keywords
voltage
driving
pulse
module
control signal
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PCT/CN2015/076833
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English (en)
French (fr)
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殷新社
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京东方科技集团股份有限公司
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Priority to EP15767406.0A priority Critical patent/EP3223269B1/en
Priority to US14/784,294 priority patent/US10283050B2/en
Priority to KR1020157030513A priority patent/KR101742414B1/ko
Priority to JP2017545994A priority patent/JP6679606B2/ja
Publication of WO2016078314A1 publication Critical patent/WO2016078314A1/zh

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3258—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the voltage across the light-emitting element
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3275—Details of drivers for data electrodes
    • G09G3/3291—Details of drivers for data electrodes in which the data driver supplies a variable data voltage for setting the current through, or the voltage across, the light-emitting elements
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0242—Compensation of deficiencies in the appearance of colours
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/02—Details of power systems and of start or stop of display operation
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/02—Details of power systems and of start or stop of display operation
    • G09G2330/021—Power management, e.g. power saving
    • G09G2330/023—Power management, e.g. power saving using energy recovery or conservation
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/02—Details of power systems and of start or stop of display operation
    • G09G2330/028—Generation of voltages supplied to electrode drivers in a matrix display other than LCD

Definitions

  • the present invention relates to the field of display technologies, and in particular, to a driving power source, a display driving circuit, and an organic light emitting display.
  • OLED Organic Light Emitting Diode
  • TFT-LCD Thin Film Transistor Liquid Crystal Display
  • the driving method of the organic light emitting display is divided into a passive matrix (active matrix) and an active matrix (active matrix).
  • active matrix organic light-emitting displays have the advantages of large display information, low power consumption, long device life, and high screen contrast.
  • a plurality of pixel unit driving circuits are provided, each of which is connected to a driving power source to collectively constitute a display driving circuit for performing display.
  • the pixel unit driving circuit includes: a switching transistor M1, a driving transistor M2, a storage capacitor C, and a light emitting device OLED.
  • the gate of the driving transistor M2 is connected to the drain of the switching transistor M1, and the source of the driving transistor M2 is connected to the driving power source 1 (the source of the driving transistor M2 of the plurality of pixel unit driving circuits is connected to the same driving power source 1),
  • the drain of the driving transistor M2 is connected to the light emitting device OLED, and when the switching transistor M1 is turned on under the control of the scanning signal Vscan, the data voltage Vdata is transferred to the gate of the driving transistor M2 through the switching transistor M1.
  • the driving power source 1 supplies a driving voltage VDD to the source of the driving transistor M2, and drives the transistor M2.
  • the gate-source voltage is Vgs, and the gate-source voltage Vgs determines the magnitude of the driving current flowing through the driving transistor M2 for driving the light-emitting device OLED to generate stable light.
  • the function of the storage capacitor C is to maintain the stability of the gate voltage of the driving transistor M2 for one frame time.
  • the driving power supply includes: a boosting module, one end of the boosting module is connected to the initial voltage input end, and the other end is connected to the pixel unit driving circuit.
  • the driving transistor M2 is connected, and the boosting module is configured to boost the initial voltage VCC input from the initial voltage input terminal to the driving voltage VDD, and output the driving voltage VDD to the driving transistor M2.
  • the boosting module includes: a boosting chip 2, a storage inductor L, a first switching transistor T1, a Schottky diode D, a first resistor RA, a second resistor RB, and a first filter capacitor C1, wherein the energy storage inductor L One end is connected to the initial voltage input end, and the other end of the energy storage inductor L is connected to the first end of the Schottky diode D and the second end of the first switch tube T1, and the input end of the boosting chip 2 and the initial voltage input end Connected, the feedback terminal of the boosting chip 2 is connected to the first resistor RA and the second resistor RB, and the control terminal of the boosting chip 2 is connected to the gate of the first switching transistor T1, and the first end of the Schottky diode D is A second pole of the switching transistor T1 is connected, and a second end of the Schottky diode D is connected to the first filter capacitor C1.
  • the boosting can be achieved by controlling the field effect transistor (not shown) integrated inside the boosting chip 2 to be turned on or off. Specifically, when the field effect crystal integrated in the boosting chip 2 is turned on, the Schottky diode D is reversely turned off, the current in the storage inductor L continues to increase, and the energy storage inductor L stores energy; when the boosting chip 2 When the internally integrated field effect crystal is turned off, the energy storage inductor L is output through the Schottky diode D to complete the energy transfer.
  • the feedback terminal of the boosting chip 2 controls the on-time and the off-time of the integrated field effect transistor according to the voltage division of the second resistor RB, thereby controlling the magnitude of the driving voltage VDD output by the boosting module.
  • FIG. 3 is a driving principle diagram of an active matrix organic light emitting display in the prior art
  • FIG. 4 is a relationship between brightness and a voltage drop of red, green, and blue organic electroluminescent devices.
  • the organic light emitting display includes three different color pixel units of red (R), green (G), and blue (B), wherein the red pixel unit is provided with red
  • the electroluminescent device OLEDR has a green organic electroluminescent device OLEDG disposed in the green pixel unit, and a blue organic electroluminescent device OLEDB disposed in the blue pixel unit, all of the pixel units adopt the same driving voltage VDD (the size is It is possible to drive the driving voltage for driving the blue organic electroluminescent device OLEDB when it is brightest.
  • the three different color organic electroluminescent devices have different voltage drops when they have the same brightness.
  • the blue organic electroluminescent device OLEDB generates the largest voltage drop
  • the red organic electroluminescent device OLEDR generates a voltage drop secondly
  • the green organic electroluminescent device OLEDG generates the smallest voltage drop.
  • the gate-source voltage of the driving transistors in the red pixel unit and the green pixel unit is large.
  • the voltage applied to the driving transistor is large, which not only causes the driving transistor to generate heat, but also affects the service life of the driving transistor, and also causes the display driving circuit to consume a large amount of power.
  • the invention provides a driving power source, a display driving circuit and an organic light emitting display, which are used for solving the problem that the voltage applied on the driving transistor is large in the prior art, the heating phenomenon of the driving transistor is serious, and the power consumption of the display driving circuit is large. problem.
  • the present invention provides a driving power supply, comprising: a boosting module and a voltage adjusting module, wherein the voltage adjusting module is connected to the boosting module;
  • the boosting module is configured to perform a boosting process on an initial voltage input to an initial voltage input end of the driving power source to form a reference voltage, and output the reference voltage to the voltage adjusting module;
  • the voltage adjustment module is configured to adjust a size of the reference voltage according to a color of a pixel unit to be driven to respectively form a plurality of driving voltages, wherein the driving voltages corresponding to pixel units of different colors are different.
  • the driving power source further includes: a plurality of driving voltage output ends for outputting the plurality of driving voltages, and the driving voltage output end is connected to the voltage adjusting module
  • Each of the driving voltage output terminals is configured to drive pixel units of the same color, and the driving voltages outputted by the driving voltage output terminals are different.
  • the voltage adjustment module includes: a pulse control module, a second switch tube and a second filter capacitor equal to the number of the drive voltage output ends, and the second switch tube and the drive voltage output end are one by one
  • the second filter capacitor has a one-to-one correspondence with the driving voltage output end
  • a gate of the second switch tube is connected to the pulse control module, a first pole of the second switch tube is connected to the boost module, and a second pole of the second switch tube is corresponding to the second pole
  • the driving voltage output end is connected to the first end of the second filter capacitor
  • the second end of the second filter capacitor is grounded
  • the pulse control module is configured to generate and respectively send a pulse control signal to each of the second switch tubes, the duty ratio of each pulse control signal being equal to the connection with the second switch tube receiving the pulse control signal The ratio of the driving voltage outputted by the driving voltage output terminal to the reference voltage.
  • the pulse control module includes: a pulse adjustment control sub-module, a pulse generator, a pulse width adjustment circuit, and a level conversion circuit, wherein the pulse width adjustment circuit and the pulse adjustment control sub-module, the pulse a generator and the level shifting circuit are connected;
  • the pulse adjustment control sub-module is configured to generate a plurality of pulse adjustment control signals according to the reference voltage and the driving voltage to be formed by the voltage adjustment module;
  • the pulse generator is configured to generate an initial pulse signal having a preset frequency
  • the pulse width adjustment circuit is configured to perform pulse width adjustment processing on the initial pulse signal according to the pulse adjustment control signals to form a plurality of initial pulse control signals;
  • the level conversion circuit is configured to perform level conversion processing on the initial pulse control signals to form a plurality of the pulse control signals, and the pulse control signals are used to respectively control the passage of the second switch tubes Broken.
  • the pulse adjustment control submodule includes: a storage device and a decoding circuit, wherein the decoding circuit is connected to both the storage device and the pulse width adjustment circuit;
  • the storage device stores data information of the reference voltage and data information of a driving voltage to be formed by the voltage adjustment module;
  • the decoding circuit is configured to perform decoding processing on data information of the reference voltage and data information of a driving voltage to be formed by the voltage adjustment module, to obtain a voltage value of the reference voltage and a driving to be formed by the voltage adjustment module
  • the voltage value of the voltage the decoding circuit is further configured to generate the pulse adjustment control signal according to a ratio of a voltage value of a driving voltage to be formed by the voltage adjustment module to a voltage value of the reference voltage.
  • the storage device is a read-only memory, and the read-only memory pre-stores data information of a driving voltage corresponding to different color pixel units and data information of the reference voltage.
  • the storage device is a register
  • the pulse adjustment control sub-module further includes: a signal receiver, wherein the signal receiver is connected to the decoding circuit;
  • the signal receiver is configured to receive a timing control signal sent by a timing controller outside the driving power source, where the timing control signal includes data information of the reference voltage and the voltage adjustment module to be formed Data information of the driving voltage;
  • the decoding circuit is further configured to decode data information of the reference voltage in the timing control signal and data information of a driving voltage to be formed by the voltage adjustment module, and decode the decoded data of the reference voltage Information and data information of a driving voltage to be formed by the voltage adjustment module are stored in the register.
  • the pulse adjustment control submodule includes: a first level signal input end and a voltage dividing resistor group equal to the number of the driving voltage output ends, each of the voltage dividing resistor groups comprising: a series connected Three resistors and a fourth resistor;
  • the first level signal input end is connected to the first end of the third resistor, the second end of the fourth resistor is grounded, the second end of the third resistor and the first end of the fourth resistor
  • the terminals are all connected to the pulse width adjusting circuit
  • the first level signal input end is configured to generate and input a first initial level signal to the voltage dividing resistor group
  • the voltage dividing resistor group is configured to perform a voltage dividing process on the first initial level signal to form the pulse adjustment control signal
  • the ratio of the resistance value of the third resistor in the different voltage dividing resistor group to the resistance value of the fourth resistor is different.
  • the pulse adjustment control submodule includes: a second level signal input end And a fifth resistor equal to the number of the driving voltage output ends, the second level signal input end is connected to the first end of the fifth resistor, and the second end of the fifth resistor is opposite to the pulse width Adjust the circuit connection;
  • the second level signal input end is configured to generate and input a second initial level signal to the fifth resistor
  • the fifth resistor is configured to perform a step-down process on the second initial level signal to form the pulse adjustment control signal
  • the resistance of each of the fifth resistors is different.
  • the pixel unit includes: a red pixel unit, a green pixel unit, and a blue pixel unit, and the number of the driving voltage output ends is three.
  • the pulse control signal comprises: a red pulse control signal, a green pulse control signal or a blue pulse control signal;
  • a phase difference between a rising edge of any one of the red pulse control signal, the green pulse control signal, and the blue pulse control signal and a rising edge of the other two pulse control signals is 120 degrees; or ,
  • the phase difference between the falling edge of any one of the red pulse control signal, the green pulse control signal and the blue pulse control signal and the falling edge of the other two pulse control signals is 120 degrees.
  • the pulse control module is a single chip microcomputer.
  • the voltage adjustment module includes: a linear regulator and a third filter capacitor equal in number to the output of the driving voltage, the linear regulator is in one-to-one correspondence with the output of the driving voltage, the third a filter capacitor is in one-to-one correspondence with the output of the driving voltage;
  • An input end of the linear regulator is connected to the boosting module, and an output end of the linear regulator is connected to the driving voltage output end and the first end of the third filter capacitor;
  • the second end of the third filter capacitor is grounded
  • the linear regulator is configured to perform a step-down process on the reference voltage to form the driving voltage
  • the present invention also provides a display driving circuit, including: A power source that uses the above-described driving power source.
  • the present invention also provides an organic light emitting display comprising: a display driving circuit using the above display driving circuit.
  • the present invention provides a driving power source, a display driving circuit, and an organic light emitting display driving power source, wherein the driving power source can provide a corresponding driving voltage according to the color of the pixel unit to be driven, thereby causing a driving transistor in the driving circuit of the pixel unit
  • the voltage divided is reduced relative to the voltage divided by the driving transistor in the prior art, which reduces the power consumption of the driving transistor, thereby reducing the power consumption of the entire display driving circuit, and at the same time reducing the heat generation of the driving transistor. Improve the reliability of the transistor.
  • FIG. 1 is a schematic diagram of a pixel unit driving circuit of an active matrix organic light emitting display in the prior art
  • FIG. 2 is a circuit diagram of the driving power supply of FIG. 1;
  • FIG. 3 is a schematic diagram of driving of an active matrix organic light emitting display in the prior art
  • Figure 4 is a graph showing the relationship between the brightness of red, green, and blue organic electroluminescent devices and their pressure drop
  • FIG. 5 is a schematic circuit diagram of a driving power supply according to Embodiment 1 of the present invention.
  • FIG. 6 is a schematic circuit diagram of a driving power supply according to Embodiment 2 of the present invention.
  • FIG. 7 is a timing diagram of a red pulse control signal, a green pulse control signal, and a blue pulse control signal in an embodiment of the present invention.
  • FIG. 8 is a schematic structural view of an alternative of the pulse control module of FIG. 6;
  • FIG. 9 is a schematic structural view of another alternative of the pulse control module of FIG. 6;
  • FIG. 10 is a schematic structural view of still another alternative of the pulse control module of FIG. 6;
  • FIG. 11 is a schematic circuit diagram of a driving power supply according to Embodiment 3 of the present invention.
  • FIG. 12 is a schematic circuit diagram of an organic light emitting display according to Embodiment 5 of the present invention.
  • FIG. 13 is a schematic diagram of driving of the organic light emitting display shown in FIG.
  • the driving power supply includes: a boosting module 3 and a voltage adjusting module 4, wherein the voltage adjusting module 4 is connected to the boosting module 3,
  • the boosting module 3 is configured to perform a boosting process on the initial voltage VCC input from the initial voltage input terminal of the driving power source to form the reference voltage VDD1, and output the reference voltage VDD1 to the voltage adjusting module 4;
  • the voltage adjusting module 4 is configured to The color of the driven pixel unit adjusts the magnitude of the reference voltage VDD1 to respectively form a plurality of driving voltages, wherein the driving voltages corresponding to the pixel units of different colors are different.
  • the reference voltage VDD1 in the present embodiment is equal to the driving voltage VDD in the prior art.
  • the driving power supply provided in this embodiment can generate a corresponding driving voltage according to the color of the pixel unit to be driven, thereby driving different pixel units of different colors by using different driving voltages.
  • the driving power source further includes: a plurality of driving voltage output ends for outputting a driving voltage, each driving voltage output end is connected to the voltage adjusting module 4, and each driving voltage output end is used to drive the same color.
  • the pixel unit has different driving voltages outputted by different driving voltage outputs.
  • the pixel unit includes red, green, and blue pixel units as an example for description.
  • the number of driving voltage output terminals of the driving power source corresponds to three, and the three driving voltage output terminals are assumed to be: a red driving voltage output terminal, a green driving voltage output terminal, and a blue driving voltage output terminal.
  • the red driving voltage output terminal is connected to the driving transistor in the driving circuit of the plurality of red pixel units
  • the green driving voltage output terminal is connected to the driving transistor in the driving circuit of the plurality of green pixel units
  • the blue driving voltage output terminal and the plurality of blue The driving transistors in the driving circuit of the color pixel unit are connected.
  • the driving voltage outputted by the red driving voltage output terminal is the red driving voltage VDDR
  • the green driving voltage is input.
  • the driving voltage outputted by the output terminal is the green driving voltage VDDG
  • the driving voltage outputted by the blue driving voltage output terminal is the blue driving voltage VDDB
  • the red driving voltage VDDR, the green driving voltage VDDG, and the blue driving voltage VDDB are both less than or equal to
  • the reference voltage VDD1 is different in magnitude from the red driving voltage VDDR, the green driving voltage VDDG, and the blue driving voltage VDDB.
  • the driving circuit of the red pixel unit can be driven by the red driving voltage VDDG
  • the driving circuit of the green pixel unit can be driven by the green driving voltage VDDG
  • the driving circuit of the blue pixel unit can be blue.
  • the driving voltage VDDB is driven, so that the driving power supply provided by the embodiment can effectively reduce the gate-source voltage of the driving transistor in the driving circuit of the red pixel unit and the green pixel unit, thereby avoiding the heating of the driving transistor. Phenomenon while reducing the power consumption of the drive transistor. For the entire display driving circuit, since the power consumption of a part of the driving transistors is lowered, the power consumption of the entire display driving circuit is lowered.
  • the first embodiment of the present invention provides a driving power supply, which can provide a corresponding driving voltage according to the color of the pixel unit to be driven, thereby making the voltage distributed on the driving transistor in the driving circuit of the pixel unit relatively
  • the voltage distributed on the driving transistor in the prior art is reduced, so that the power consumption of the driving transistor can be reduced, thereby reducing the power consumption of the entire display driving circuit.
  • the driving power supply includes: a boosting module 3 and a voltage adjusting module 4, wherein a connection relationship between the boosting module 3 and the voltage adjusting module 4 is shown.
  • a connection relationship between the boosting module 3 and the voltage adjusting module 4 is shown.
  • This embodiment provides a specific structure of the driving power supply in the first embodiment. In this embodiment, the number of driving voltage output terminals of the driving power source is three.
  • the voltage adjustment module 4 includes: a pulse control module 5, a second switch tube T2 and a second filter capacitor C2 that are equal in number to the drive voltage output end, and the second switch tube T2 has a one-to-one correspondence with the drive voltage output end.
  • the second filter capacitor C2 has a one-to-one correspondence with the driving voltage output end, that is, each driving voltage output end is connected with a pair of the second switching tube T2 and the second filter capacitor C2.
  • the gate of the second switch T2 is connected to the pulse control module 5, the first pole of the second switch T2 is connected to the boost module 3, and the second pole of the second switch T2 Connected to the corresponding driving voltage output terminal and the first end of the second filter capacitor C2, and the second end of the second filter capacitor C2 is grounded.
  • the pulse control module 5 is configured to generate and respectively send a pulse control signal to each of the second switch tubes T2, and the duty ratio of each pulse control signal is equal to the output of the drive voltage output terminal connected to the second switch tube T2 receiving the pulse control signal. The ratio of the drive voltage to the reference voltage VDD1.
  • the first pole of the second switch tube T2 refers to the source of the second switch tube T2
  • the second pole of the second switch tube T2 refers to the drain of the second switch tube T2.
  • the pulse control module 5 may include: a pulse adjustment control sub-module 9, a pulse generator 6, a pulse width adjustment circuit 7, and a level conversion circuit 8, wherein the pulse width adjustment circuit 7 and the pulse adjustment control sub-module 9, the pulse The generator 6 and the level shifting circuit 8 are both connected, and the pulse adjusting control sub-module 9 is configured to generate a plurality of pulse adjusting control signals according to the driving voltage to be formed by the reference voltage and voltage adjusting module 4.
  • the pulse generator 6 is configured to generate an initial pulse signal; the pulse width adjusting circuit 7 is configured to perform pulse width adjustment processing on the initial pulse signal according to each pulse adjustment control signal to form a plurality of initial pulse control signals DR, DG, DB; level shifting The circuit 8 is configured to perform level conversion processing on each of the initial pulse control signals to form a plurality of pulse control signals PR, PG, and PB, and each of the pulse control signals is used to control the on and off of each of the second switching tubes T2.
  • the pulse adjustment control sub-module 9 may include a storage device and a decoding circuit 10, and the decoding circuit 10 is connected to both the storage device and the pulse width adjustment circuit 7.
  • the storage device stores the data information of the reference voltage and the data information of the driving voltage to be formed by the voltage adjustment module 4; the decoding circuit 10 is configured to decode the data information of the reference voltage and the data information of the driving voltage to be formed to obtain a reference voltage.
  • the voltage value and the voltage value of the driving voltage to be formed, the decoding circuit 10 is further configured to generate a pulse adjustment control signal according to a ratio of a voltage value of the driving voltage to be formed to a voltage value of the reference voltage.
  • the storage device may be a register 11, and the pulse adjustment control sub-module 9 may further include: a signal receiver 12 connected to the decoding circuit 10, the signal receiver 12 for receiving the signal power supply
  • the timing controller sends a timing control signal, and the timing controller sends the timing control signal to the signal receiver 12 through the SPI interface or the I2C bus or the S-wire bus, and the timing control signal includes the reference voltage data information and the voltage adjustment module. 4 data information of the driving voltage to be formed
  • decoding The circuit 10 is further configured to decode the data information of the reference voltage in the timing control signal and the data information of the driving voltage to be formed, and store the data information of the decoded reference voltage and the data information of the driving voltage to be formed in the register. 11 in.
  • the signal receiver 12 receives the timing control signal sent by the timing controller, and sends the received timing control signal to the decoding circuit 10, which decodes the data information of the reference voltage in the timing control signal.
  • the data information of the driving voltage corresponding to the pixel unit to be driven that is, the data information of the driving voltage to be formed by the voltage adjusting module 4) is decoded and stored in the register 11.
  • the decoding circuit 10 further decodes the data information of the reference voltage in the register 11 and the data information of the driving voltage to be formed, and obtains the voltage value of the reference voltage and the voltage value of the driving voltage to be formed, and according to the decoded
  • a ratio of a voltage value of each of the driving voltages to be formed to a voltage value of the reference voltage generates a plurality of pulse adjustment control signals and is sent to the pulse width adjusting circuit 7; at the same time, the pulse generator 6 generates an initial pulse having a preset frequency. The signal is sent to the pulse width adjustment circuit 7.
  • the pulse width adjusting circuit 7 performs pulse width adjustment processing on the initial pulse signal according to each pulse adjustment control signal generated by the decoding circuit 10 to form a plurality of initial pulse control signals (whose voltage is much smaller than the reference voltage VDD1), each initial pulse
  • the duty ratio of the control signal is equal to the ratio of the voltage value of the corresponding driving voltage to the voltage value of the reference voltage. It should be noted that the voltage of the initial pulse control signal is insufficient to control the on and off of the second switching transistor T2.
  • the level conversion circuit 8 performs level conversion processing on each of the initial pulse control signals formed by the pulse width adjusting circuit 7 to form a plurality of pulse control signals (generally, the voltage thereof is close to the reference voltage VDD1), and each pulse control signal is respectively For controlling the on and off of each of the second switch tubes T2, it should be noted that the level shifting process causes the voltage of the initial pulse control signal to rise, so that the obtained pulse control signal is sufficient to control the on and off of the second switch tube T2. And the duty ratio of the pulse control signal is the same as the duty ratio of the initial pulse control signal.
  • each of the second switching tubes T2 (specifically, the ratio of controlling the on-off time) is controlled by each pulse control signal, and the on-off conditions of the second switching tubes T2 controlled by the different pulse control signals are different, Therefore, voltages of different sizes can be formed at the second pole of each of the second switching tubes T2. Then, through the filtering process of the second filter capacitor C2, respectively, the stable driving voltages of different sizes are outputted at the corresponding driving voltage output terminals. Wherein, the magnitude of the driving voltage is equal to the product of the reference voltage and the duty ratio of the pulse control signal.
  • the second switch T2 when the second switch T2 is an N-type transistor, if the pulse control signal is at a high level, the second switch T2 is turned on; if the pulse control signal is at a low level, the second The switch tube T2 is turned off.
  • the duty ratio of the above pulse control signal specifically refers to the percentage of the pulse control signal in a pulse period, which is at a high level for the entire pulse period.
  • the second switching transistor T2 is a P-type transistor, if the pulse control signal is at a high level, the second switching transistor T2 is turned off; if the pulse control signal is at a low level, the second switching transistor T2 is turned on.
  • the duty ratio of the above pulse control signal specifically refers to the percentage of the pulse control signal in a pulse period, which is at a low level for the entire pulse period.
  • the signal receiver 12 receives three kinds of timing control signals, and each timing control signal corresponds to a pixel unit of one color.
  • three initial pulse control signals having different duty ratios can be output, specifically: a red initial pulse control signal DR, a green initial pulse control signal DG, and a blue initial pulse control signal DB, wherein The duty ratio of the green initial pulse control signal DG is smaller than the duty ratio of the red initial pulse control signal DR, and the duty ratio of the red initial pulse control signal DR is smaller than the duty ratio of the blue initial pulse control signal DR.
  • the three initial pulse control signals are respectively subjected to level conversion processing by the level converting circuit 8 to form a red pulse control signal PR, a green pulse control signal PG, and a blue pulse control signal PB.
  • the duty ratio of the red pulse control signal PR is assumed to be 65. %
  • the duty ratio of the green pulse control signal PG is 50%
  • the duty ratio of the blue pulse control signal PB is 80%
  • the periods of the three pulse control signals are all T.
  • the red pulse control signal PR is at a high level for one period of 0.65T
  • the green pulse control signal PG is within one cycle.
  • the time at the high level is 0.50T, and the time at which the blue pulse control signal PB is at the high level for one period is 0.80T, preferably, the phase difference between the rising edge of any one of the red pulse control signal PR, the green pulse control signal PG, and the blue pulse control signal PB and the rising edges of the other two pulse control signals is 120 Degree (one-third pulse period, T/3), for example, the rising edge of the green pulse control signal PG shown in FIG. 7 lags the rising edge of the red pulse control signal PR by 120 degrees, and the blue pulse control signal The rising edge of PB lags the rising edge of the green pulse control signal PG by 120 degrees (that is, 120 degrees ahead of the rising edge of the red pulse control signal PR). It should be noted that the situation shown in FIG.
  • the phase difference between the rising edge of any one of the red pulse control signal PR, the green pulse control signal PG, and the blue pulse control signal PB and the rising edge of the other two pulse control signals is 120 degrees, which is effective Improve the efficiency of the entire power system.
  • the second switching transistor T2 is a P-type transistor
  • the time when the red pulse control signal PR is at a low level in one cycle is 0.65T
  • the time at which the green pulse control signal PG is at a low level in one cycle is 0.50T
  • the time when the blue pulse control signal PB is at a low level in one cycle is 0.80T
  • the drop of any one of the red pulse control signal PR, the green pulse control signal PG, and the blue pulse control signal PB is decreased.
  • the phase difference along the falling edges of the other two pulse control signals is 120 degrees, and a corresponding exemplary drawing is not given in this case.
  • pulse control module 5 in this embodiment is not limited to the structure shown in FIG. 6.
  • the pulse control module 5 includes: a pulse adjustment control sub-module 9, a pulse generator 6, a pulse width adjustment circuit 7, and electricity.
  • the pulse adjustment control sub-module 9 includes: a read-only memory 13 and a decoding circuit 10, and a drive corresponding to the red pixel unit, the green pixel unit, and the blue pixel unit is stored in advance in the read-only memory unit 13
  • the data information of the voltages VDDR, VDDG, VDDB, and the data information storing the reference voltage VDD1 the decoding circuit 10 can directly acquire the corresponding data information and perform decoding processing to generate corresponding pulse adjustment control signals.
  • the pulse width adjusting circuit 7 generates a red initial pulse control signal DR, a green initial pulse control signal DG or blue based on each pulse adjustment control signal. Color initial pulse control signal DB.
  • FIG. 9 is a schematic structural diagram of another alternative of the pulse control module 5.
  • the pulse control module 5 includes: a pulse adjustment control sub-module 9, a pulse generator 6, a pulse width adjustment circuit 7, and electricity.
  • the flat conversion circuit 8, the pulse adjustment control sub-module 9 includes: a first level signal input terminal 14 and a voltage dividing resistor group equal to the number of driving voltage output terminals, each voltage dividing resistor group comprising: a third resistor connected in series R3, R3', R3" and a fourth resistor R4, R4', R4", the first level signal input terminal 14 is connected to the first end of the third resistor R3, R3', R3", and the fourth resistor R4, The second ends of R4' and R4" are grounded, and the second ends of the third resistors R3, R3', R3" and the first ends of the fourth resistors R4, R4', R4" are connected to the pulse width adjusting circuit 7;
  • a level signal input terminal 14 is configured to generate and simultaneously input a first initial
  • the number of the voltage dividing resistor groups in FIG. 9 is three groups, and the ratio of the resistance value of the third resistor in each group of the piezoelectric resistor group to the resistance value of the fourth resistor is different, that is, The ratio of R3 to R4, the ratio of R3' to R4', the ratio of R3" to R4", and the three ratios are different. Therefore, the three-component piezoresistive group can output three voltage values to the pulse width adjusting circuit 7
  • the adjustment control signal, the pulse width adjustment circuit 7 can output three initial pulse control signals having different duty ratios according to the difference of the voltage values of the received adjustment control signals, that is, the red initial pulse control signal DR and the green initial pulse control signal. DG or blue initial pulse control signal DB.
  • the pulse control module 5 includes a pulse adjustment control sub-module 9, a pulse generator 6, a pulse width adjustment circuit 7, and a level.
  • the conversion circuit 8, the pulse adjustment control sub-module 9 includes: a second level signal input terminal 16 and a fifth resistor R5, R5', R5" equal to the number of driving voltage output terminals, and a second level signal input terminal 16 and The first ends of the five resistors R5, R5', R5" are connected, and the second ends of the fifth resistors R5, R5', R5" are connected to the pulse width adjusting circuit 7.
  • the second level signal input terminal 16 is used to generate and Each of the fifth resistors R5, R5', R5" simultaneously inputs a second initial level signal, and each of the fifth resistors R5, R5', R5" is used for a second initial level
  • the signal is stepped down to form a plurality of pulse adjustment control signals.
  • the resistance values R5, R5', and R5" of the respective fifth resistors are different, and the voltage values of the adjustment control signals formed are different.
  • the number of fifth resistors in FIG. 10 is three, and the resistance values of the fifth resistors are different, that is, the sizes of R5, R5', and R5" are different, so three
  • the second end of the fifth resistor can output three pulse adjustment control signals having different voltage values to the pulse width adjusting circuit 7.
  • the pulse width adjusting circuit 7 can output three in total according to the difference of the voltage values of the received pulse adjustment control signals.
  • An initial pulse control signal having a different duty ratio that is, a red initial pulse control signal DR, a green initial pulse control signal DG, or a blue initial pulse control signal DB.
  • the pulse control module 5 in this embodiment may also be a single-chip microcomputer, and the pulse control signals having different duty ratios may be output to the second switch tubes through the single-chip microcomputer, and the process is a prior art in the field, and is no longer Narration.
  • the second embodiment of the present invention provides a driving power supply, which can provide a corresponding driving voltage according to the color of the pixel unit to be driven, thereby making the voltage distributed on the driving transistor in the driving circuit of the pixel unit relatively
  • the voltage distributed on the driving transistor in the prior art is reduced, so that the power consumption of the driving transistor can be reduced, thereby reducing the power consumption of the entire display driving circuit.
  • FIG. 11 is a schematic circuit diagram of a driving power supply according to Embodiment 3 of the present invention.
  • the driving power supply includes: a boosting module 3 and a voltage adjusting module 4, wherein a connection relationship between the boosting module 3 and the voltage adjusting module 4 is provided.
  • This embodiment provides another specific structure of the driving power supply in the first embodiment.
  • the number of driving voltage output terminals of the driving power source is three.
  • the voltage adjustment module 4 includes: linear regulators 17, 18, 19 and a third filter capacitor C3 equal in number to the output of the driving voltage, and the linear regulators 17, 18, 19 are in one-to-one correspondence with the driving voltage output terminals.
  • the third filter capacitor C3 has a one-to-one correspondence with the drive voltage output terminal, the input end of the linear regulator is connected to the boost module 3, the output terminals of the linear regulators 17, 18, 19 and the drive voltage output terminal and the third filter capacitor The first end of C3 is connected, the third filter The second end of the wave capacitor C3 is grounded, and the linear regulator is used to step down the reference voltage VDD1 to form the driving voltages VDDR, VDDG, and VDDB, and different linear regulators have different step-down amplitudes.
  • the devices 17, 18, 19 can output three different driving voltages, three different driving voltages for driving pixel units of different colors, respectively.
  • the third embodiment of the present invention provides a driving power supply, which can provide a corresponding driving voltage according to the color of the pixel unit to be driven, thereby making the voltage distributed on the driving transistor in the driving circuit of the pixel unit relatively
  • the voltage distributed on the driving transistor in the prior art is reduced, so that the power consumption of the driving transistor can be reduced, thereby reducing the power consumption of the entire display driving circuit.
  • a fourth embodiment of the present invention provides a display driving circuit.
  • the display driving circuit includes a driving power source.
  • the driving power source is the driving power source according to any one of the first embodiment to the third embodiment. The descriptions in the first embodiment to the third embodiment are as described above.
  • the fourth embodiment of the present invention provides a display driving circuit, which includes the above-mentioned driving power supply, and the driving power supply can provide a corresponding driving voltage according to the color of the pixel unit to be driven, thereby enabling the driving circuit of the pixel unit.
  • the voltage distributed on the driving transistor is reduced relative to the voltage divided by the driving transistor in the prior art, so that the power consumption of the driving transistor can be reduced, thereby reducing the power consumption of the entire display driving circuit.
  • Embodiment 5 of the present invention provides an organic light emitting display, comprising: a display driving circuit, wherein the display driving circuit adopts the foregoing Display drive circuit.
  • FIG. 12 is a schematic circuit diagram of an organic light emitting display according to Embodiment 5 of the present invention
  • FIG. 13 is a driving schematic diagram of the organic light emitting display shown in FIG. 12, as shown in FIG. 12 and FIG. 13,
  • the organic light emitting display includes: a display panel 25
  • the power supply module 20 is connected to the timing controller 22, the data driving circuit 24, and the driving power source 21, and the timing controller 22 is connected to the driving power source 21, the scanning circuit 23, and the data driving circuit 24, and the scanning circuit 23 and the gate of the switching transistor M1. Connected, the data driving circuit 24 is connected to the source of the switching transistor M1.
  • the driving power source 21 can output different driving voltages to pixel units of different colors (or a plurality of pixel unit driving circuits) in the display panel 25, wherein pixel units of the same color correspond to driving voltages of the same size, pixel units of different colors Corresponding to different driving voltages.
  • the pixel unit in this embodiment includes: a red pixel unit (including a red organic electroluminescent device OLEDR), a green pixel unit (including a green organic electroluminescent device OLEDG), and a blue pixel unit (including blue Electroluminescent device OLEDB).
  • the driving power supply 21 can provide three different driving voltages: red driving voltage VDDR, green driving voltage VDDG and blue driving voltage VDDB, wherein VDDR, VDDG, The magnitude relationship of VDDB satisfies VDDG ⁇ VDDR ⁇ VDDB.
  • the red driving voltage VDDR is used to drive the red pixel unit
  • the green driving voltage VDDG is used to drive the green pixel unit
  • the blue driving voltage VDDB is used to drive the blue pixel unit. Therefore, in the prior art, when the driving voltage of the same size is used to drive the pixel units of different colors, the heating phenomenon of the driving transistors in the partial pixel units is caused.
  • the power supply module 20 can be integrated with the driving power source 21 in the same module, and the power supply module 20 is configured to provide the initial voltage VCC to the driving power source 21.
  • timing controller 22 The structure and working principle of the timing controller 22, the power supply module 20, the scanning circuit 23, and the data driving circuit 24 in this embodiment are the same as those in the prior art, and are not described herein again.
  • Embodiment 5 of the present invention provides an organic light emitting display, comprising the above display driving circuit, which can effectively reduce a gate-source voltage of a driving transistor in a pixel unit during operation, thereby avoiding driving a transistor
  • the phenomenon of heat generation, while reducing the power consumption of the driving transistor, causes the overall power consumption of the organic light emitting display to decrease.
  • the pixel unit includes: a red pixel unit, a green pixel unit, and a blue pixel unit, and the technical solution that the number of driving voltage output ends of the driving power source is three is only exemplary. There is no limitation to the technical solution of the present application.

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Abstract

一种驱动电源、显示驱动电路和有机发光显示器，其中该驱动电源包括：升压模块（3）和电压调整模块（4），电压调整模块（4）与升压模块（3）连接；升压模块（3）用于对驱动电源的初始电压输入端输入的初始电压（VCC）进行升压处理以形成参考电压（VDD1），并将参考电压（VDD1）输出至电压调整模块（4）；电压调整模块（4）用于根据待驱动的像素单元的颜色对参考电压（VDD1）的大小进行调整以分别形成多个驱动电压，与不同颜色的像素单元对应的驱动电压不同。该驱动电源可根据待驱动的像素单元的颜色来提供相应的驱动电压，从而使得像素单元的驱动电路中的驱动晶体管上所分得的电压相对于现有技术中驱动晶体管上所分得的电压减小，降低了驱动晶体管的功耗，进而降低了整个显示驱动电路的功耗。

Description

驱动电源、显示驱动电路和有机发光显示器 技术领域
本发明涉及显示技术领域，特别涉及一种驱动电源、显示驱动电路和有机发光显示器。
背景技术
有机发光显示器(Organic Light Emitting Diode，OLED)相比作为现在的主流显示技术的薄膜晶体管液晶显示器(Thin Film Transistor Liquid Crystal Display,TFT-LCD)，具有广视角、高亮度、高对比度、低能耗、体积更轻薄等优点，是目前平板显示技术关注的焦点。
有机发光显示器的驱动方法分为被动矩阵式(Passive Matrix)和主动矩阵式(Active Matrix)两种。而相比被动矩阵式有机发光显示器，主动矩阵式有机发光显示器具有显示信息量大、功耗低、器件寿命长、画面对比度高等优点。
在有机发光显示器中，设有多个像素单元驱动电路，每个像素单元驱动电路均与驱动电源连接，从而共同构成用于进行显示的显示驱动电路。
图1为现有技术中的主动矩阵式有机发光显示器的像素单元驱动电路的示意图，如图1所示，该像素单元驱动电路包括：开关晶体管M1、驱动晶体管M2、存储电容C以及发光器件OLED，其中驱动晶体管M2的栅极与开关晶体管M1的漏极连接，驱动晶体管M2的源极与驱动电源1连接(多个像素单元驱动电路的驱动晶体管M2的源极连接同一个驱动电源1)，驱动晶体管M2的漏极与发光器件OLED连接，当开关晶体管M1在扫描信号Vscan的控制下导通时，数据电压Vdata通过开关晶体管M1被传递至驱动晶体管M2的栅极。同时，驱动电源1向驱动晶体管M2的源极提供驱动电压VDD，驱动晶体管M2 的栅源电压为Vgs，该栅源电压Vgs决定了流过驱动晶体管M2的驱动电流的大小，该驱动电流用于驱动发光器件OLED产生稳定的光。而存储电容C的作用是在一帧的时间内维持驱动晶体管M2栅极电压的稳定。
在发光器件OLED发光的过程中，发光器件OLED所产生的压降VD1、驱动晶体管M2的负载电流路径(漏源路径)上的压降VDS以及驱动电源1所产生的驱动电压VDD满足如下关系：VDD＝VDS+VD1。
图2为图1中的驱动电源的电路示意图，如图2所示，该驱动电源包括：升压模块，该升压模块的一端与初始电压输入端连接，另一端与像素单元驱动电路内的驱动晶体管M2连接，升压模块用于将从初始电压输入端输入的初始电压VCC升压为驱动电压VDD，并将驱动电压VDD输出至驱动晶体管M2。该升压模块包括：升压芯片2、储能电感L、第一开关管T1、肖特基二极管D、第一电阻RA、第二电阻RB和第一滤波电容C1，其中，储能电感L的一端与初始电压输入端连接，储能电感L的另一端与肖特基二极管D的第一端和第一开关管T1的第二极连接，升压芯片2的输入端与初始电压输入端连接，升压芯片2的反馈端与第一电阻RA和第二电阻RB连接，升压芯片2的控制端与第一开关管T1的栅极连接，肖特基二极管D的第一端与第一开关管T1的第二极连接，肖特基二极管D的第二端与第一滤波电容C1连接。
通过控制升压芯片2内部集成的场效应晶体管(未示出)导通或截止可达到升压的目的。具体地，当该升压芯片2内部集成的场效应晶体导通时，肖特基二极管D反向截止，储能电感L中的电流持续增加，储能电感L储能；当升压芯片2内部集成的场效应晶体截止时，储能电感L通过肖特基二极管D进行输出，完成能量的传递。升压芯片2的反馈端根据第二电阻RB的分压大小控制集成的场效应晶体管的导通时间和截止时间，从而控制该升压模块输出的驱动电压VDD的大小。
图3为现有技术中的主动矩阵式有机发光显示器的驱动原理图，图4为红色、绿色、蓝色有机电致发光器件的亮度与其压降的关系曲 线图，如图3和图4所示，该有机发光显示器包括有红(R)、绿(G)、蓝(B)三种不同颜色的像素单元，其中，红色像素单元内设置有红色有机电致发光器件OLEDR，绿色像素单元内设置有绿色有机电致发光器件OLEDG，蓝色像素单元内设置有蓝色有机电致发光器件OLEDB，全部的像素单元均采用同一个驱动电压VDD(大小为能够在蓝色有机电致发光器件OLEDB最亮时对其进行驱动的驱动电压)进行驱动。
参见图4，由于三种不同颜色的有机电致发光器件的发光层的半导体材料不一样，因此，三种不同颜色的有机电致发光器件在其具有相同亮度时所产生的压降不一样。其中，蓝色有机电致发光器件OLEDB产生的压降最大，红色有机电致发光器件OLEDR产生的压降其次，绿色有机电致发光器件OLEDG产生的压降最小。此时，由于全部的像素单元均采用同一个驱动电压VDD进行驱动，因此红色像素单元和绿色像素单元内的驱动晶体管的栅源电压会较大。而驱动晶体管上加载的电压较大，不但会造成驱动晶体管发热，进而影响驱动晶体管的使用寿命，而且还会导致显示驱动电路功耗较大。
发明内容
本发明提供一种驱动电源、显示驱动电路和有机发光显示器，用于解决现有技术中驱动晶体管上加载的电压较大，导致驱动晶体管的发热现象严重，以及显示驱动电路功耗较大的技术问题。
为实现上述目的，本发明提供一种驱动电源，包括：升压模块和电压调整模块，所述电压调整模块与所述升压模块连接；
所述升压模块用于将所述驱动电源的初始电压输入端输入的初始电压进行升压处理以形成参考电压，并将所述参考电压输出至所述电压调整模块；并且
所述电压调整模块用于根据待驱动的像素单元的颜色对所述参考电压的大小进行调整以分别形成多个驱动电压，其中，与不同颜色的像素单元对应的所述驱动电压不同。
可选地，所述驱动电源还包括：多个用于输出所述多个驱动电压的驱动电压输出端，所述驱动电压输出端与所述电压调整模块连 接，每个驱动电压输出端用于驱动同一种颜色的像素单元，不同所述驱动电压输出端输出的所述驱动电压不同。
可选地，所述电压调整模块包括：脉冲控制模块、与所述驱动电压输出端的数量相等的第二开关管和第二滤波电容，所述第二开关管与所述驱动电压输出端一一对应，所述第二滤波电容与所述驱动电压输出端一一对应；
所述第二开关管的栅极与所述脉冲控制模块连接，所述第二开关管的第一极与所述升压模块连接，所述第二开关管的第二极与对应的所述驱动电压输出端和所述第二滤波电容的第一端连接；
所述第二滤波电容的第二端接地；并且
所述脉冲控制模块用于产生并分别向所述各第二开关管发送脉冲控制信号，每个脉冲控制信号的占空比等于与接收所述脉冲控制信号的所述第二开关管连接的所述驱动电压输出端输出的驱动电压与所述参考电压的比值。
可选地，所述脉冲控制模块包括：脉冲调整控制子模块、脉冲发生器、脉宽调整电路和电平转换电路，其中所述脉宽调整电路与所述脉冲调整控制子模块、所述脉冲发生器和所述电平转换电路均连接；
所述脉冲调整控制子模块用于根据所述参考电压和所述电压调整模块待形成的所述驱动电压来生成多个脉冲调整控制信号；
所述脉冲发生器用于产生具有预设频率的初始脉冲信号；
所述脉宽调整电路用于根据所述各脉冲调整控制信号对所述初始脉冲信号进行脉宽调整处理以形成多个初始脉冲控制信号；并且
所述电平转换电路用于对所述各初始脉冲控制信号进行电平转换处理以形成多个所述脉冲控制信号，所述各脉冲控制信号用于分别控制所述各第二开关管的通断。
可选地，所述脉冲调整控制子模块包括：存储器件和解码电路，所述解码电路与所述存储器件和所述脉宽调整电路均连接；
所述存储器件存储有所述参考电压的数据信息和所述电压调整模块待形成的驱动电压的数据信息；
所述解码电路用于对所述参考电压的数据信息和所述电压调整模块待形成的驱动电压的数据信息进行解码处理，得到所述参考电压的电压值和所述电压调整模块待形成的驱动电压的电压值，所述解码电路还用于根据所述电压调整模块待形成的驱动电压的电压值与所述参考电压的电压值的比值生成所述脉冲调整控制信号。
可选地，所述存储器件为只读内存器，所述只读内存器预先存储有不同颜色像素单元对应的驱动电压的数据信息和所述参考电压的数据信息。
可选地，所述存储器件为寄存器，所述脉冲调整控制子模块还包括：信号接收器，所述信号接收器与所述解码电路连接；
所述信号接收器用于接收位于所述驱动电源之外的时序控制器发送的时序控制信号，所述时序控制信号中包含有所述参考电压的数据信息和所述电压调整模块待形成的所述驱动电压的数据信息；
所述解码电路还用于将所述时序控制信号中的所述参考电压的数据信息和所述电压调整模块待形成的驱动电压的数据信息解码出来，并将解码后的所述参考电压的数据信息和所述电压调整模块待形成的驱动电压的数据信息存储于所述寄存器中。
可选地，所述脉冲调整控制子模块包括：第一电平信号输入端和与所述驱动电压输出端的数量相等的分压电阻组，每个所述分压电阻组包括：串联连接的第三电阻和第四电阻；
所述第一电平信号输入端与所述第三电阻的第一端连接，所述第四电阻的第二端接地，所述第三电阻的第二端和所述第四电阻的第一端均与所述脉宽调整电路连接；
所述第一电平信号输入端用于产生并向所述分压电阻组输入第一初始电平信号；
所述分压电阻组用于对所述第一初始电平信号进行分压处理以形成所述脉冲调整控制信号；并且
不同的所述分压电阻组中的所述第三电阻的电阻值与所述第四电阻的电阻值的比值不同。
可选地，所述脉冲调整控制子模块包括：第二电平信号输入端 和与所述驱动电压输出端的数量相等的第五电阻，所述第二电平信号输入端与所述第五电阻的第一端连接，所述第五电阻的第二端与所述脉宽调整电路连接；
所述第二电平信号输入端用于产生并向所述第五电阻输入第二初始电平信号；
所述第五电阻用于对所述第二初始电平信号进行降压处理以形成所述脉冲调整控制信号；并且
各个所述第五电阻的阻值均不同。
可选地，所述像素单元包括：红色像素单元、绿色像素单元和蓝色像素单元，所述驱动电压输出端的数量为3个。
可选地，所述脉冲控制信号包括：红色脉冲控制信号、绿色脉冲控制信号或蓝色脉冲控制信号；
所述红色脉冲控制信号、所述绿色脉冲控制信号和所述蓝色脉冲控制信号中的任意一个脉冲控制信号的上升沿与其他两个脉冲控制信号的上升沿的相位差均为120度；或者，
所述红色脉冲控制信号、所述绿色脉冲控制信号和所述蓝色脉冲控制信号中的任意一个脉冲控制信号的下降沿与其他两个脉冲控制信号的下降沿的相位差均为120度。
可选地，所述脉冲控制模块为单片机。
可选地，电压调整模块包括：与所述驱动电压输出端的数量相等的线性稳压器和第三滤波电容，所述线性稳压器与所述驱动电压输出端一一对应，所述第三滤波电容与所述驱动电压输出端一一对应；
所述线性稳压器的输入端与所述升压模块连接，所述线性稳压器的输出端与所述驱动电压输出端和所述第三滤波电容的第一端均连接；
所述第三滤波电容的第二端接地；
所述线性稳压器用于对所述参考电压进行降压处理以形成所述驱动电压；并且
不同的所述线性稳压器的降压幅度不同。
为实现上述目的，本发明还提供一种显示驱动电路，包括：驱 动电源，该驱动电源采用上述的驱动电源。
为实现上述目的，本发明还提供一种有机发光显示器，包括：显示驱动电路，该显示驱动电路采用上述的显示驱动电路。
本发明具有以下有益效果：
本发明提供了一种驱动电源、显示驱动电路和有机发光显示器该驱动电源，其中驱动电源可根据待驱动的像素单元的颜色来提供相应的驱动电压，从而使得像素单元的驱动电路中的驱动晶体管上所分得的电压相对于现有技术中驱动晶体管上所分得的电压有所减小，降低了驱动晶体管的功耗，进而降低了整个显示驱动电路的功耗，同时驱动晶体管的发热降低，提高晶体管的可靠性。
附图说明
图1为现有技术中的主动矩阵式有机发光显示器的像素单元驱动电路的示意图；
图2为图1中的驱动电源的电路示意图；
图3为现有技术中的主动矩阵式有机发光显示器的驱动原理图；
图4为红色、绿色、蓝色有机电致发光器件的亮度与其压降的关系曲线图；
图5为本发明实施例一提供的驱动电源的电路示意图；
图6为本发明实施例二提供的驱动电源的电路示意图；
图7为本发明实施例中红色脉冲控制信号、绿色脉冲控制信号和蓝色脉冲控制信号的时序图；
图8为图6中脉冲控制模块的一种可选方案的结构示意图；
图9为图6中脉冲控制模块的另一种可选方案的结构示意图；
图10为图6中脉冲控制模块的又一种可选方案的结构示意图；
图11为本发明实施例三提供的驱动电源的电路示意图；
图12为本发明实施例五提供有机发光显示器的电路示意图；
图13为图12所示的有机发光显示器的驱动原理图。
具体实施方式
为使本领域的技术人员更好地理解本发明的技术方案，下面结合附图对本发明提供的驱动电源、显示驱动电路和有机发光显示器进行详细描述。
实施例一
图5为本发明实施例一提供的驱动电源的电路示意图，如图5所示，该驱动电源包括：升压模块3和电压调整模块4，其中，电压调整模块4与升压模块3连接，升压模块3用于对从驱动电源的初始电压输入端输入的初始电压VCC进行升压处理以形成参考电压VDD1，并将参考电压VDD1输出至电压调整模块4；电压调整模块4用于根据待驱动的像素单元的颜色对参考电压VDD1的大小进行调整以分别形成多个驱动电压，其中，与不同颜色的像素单元对应的驱动电压不同。
需要说明的是，升压模块3的具体结构以及升压原理为现有技术，此处不再赘述，本实施例中的参考电压VDD1与现有技术中的驱动电压VDD的大小相等。
本实施例提供的驱动电源能根据待驱动的像素单元的颜色来产生对应的驱动电压，从而对不同颜色的像素单元采用不同的驱动电压进行驱动。
可选地，该驱动电源还包括：多个用于输出驱动电压的驱动电压输出端，每个驱动电压输出端均与电压调整模块4连接，且每个驱动电压输出端用于驱动同一种颜色的像素单元，不同驱动电压输出端输出的驱动电压不同。
本实施例中以像素单元包括：红色、绿色和蓝色像素单元为例进行说明。该驱动电源的驱动电压输出端的数量对应为3个，且假定这三个驱动电压输出端分别为：红色驱动电压输出端、绿色驱动电压输出端和蓝色驱动电压输出端。红色驱动电压输出端与多个红色像素单元的驱动电路中的驱动晶体管连接，绿色驱动电压输出端与多个绿色像素单元的驱动电路中的驱动晶体管连接，蓝色驱动电压输出端与多个蓝色像素单元的驱动电路中的驱动晶体管连接。其中，红色驱动电压输出端输出的驱动电压为红色驱动电压VDDR，绿色驱动电压输 出端输出的驱动电压为绿色驱动电压VDDG，蓝色驱动电压输出端输出的驱动电压为蓝色驱动电压VDDB，其中，红色驱动电压VDDR、绿色驱动电压VDDG和蓝色驱动电压VDDB均小于或等于参考电压VDD1，且红色驱动电压VDDR、绿色驱动电压VDDG、蓝色驱动电压VDDB三者的大小不一样。在本实施例中，红色像素单元的驱动电路中可采用红色驱动电压VDDG进行驱动，绿色像素单元的驱动电路中可采用绿色驱动电压VDDG进行驱动，蓝色像素单元的驱动电路中可采用蓝色驱动电压VDDB进行驱动，因此与现有技术相比，本实施例提供的驱动电源可有效的降低红色像素单元和绿色像素单元的驱动电路中的驱动晶体管的栅源电压，从而避免驱动晶体管的发热现象，同时降低驱动晶体管的功耗。对于整个显示驱动电路来说，由于其中的部分驱动晶体管的功耗降低，使得整个显示驱动电路的功耗得到降低。
本发明实施例一提供了一种驱动电源，该驱动电源可根据待驱动的像素单元的颜色来提供相应的驱动电压，进而可以使得像素单元的驱动电路中的驱动晶体管上所分得的电压相对现有技术中的驱动晶体管上所分得的电压有所减小，从而可以降低驱动晶体管的功耗，进而降低了整个显示驱动电路的功耗。
实施例二
图6为本发明实施例二提供的驱动电源的电路示意图，如图6所示，该驱动电源包括：升压模块3和电压调整模块4，其中升压模块3和电压调整模块4的连接关系以及功能可参见上述实施一，本实施例提供了上述实施例一中的驱动电源的一种具体结构，本实施例中仍以驱动电源的驱动电压输出端的数量为3个为例进行说明。本实施例中，该电压调整模块4包括：脉冲控制模块5、与驱动电压输出端的数量相等的第二开关管T2和第二滤波电容C2，第二开关管T2与驱动电压输出端一一对应，并且第二滤波电容C2与驱动电压输出端一一对应，即每个驱动电压输出端均与一个第二开关管T2和第二滤波电容C2对连接。第二开关管T2的栅极与脉冲控制模块5连接，第二开关管T2的第一极与升压模块3连接，第二开关管T2的第二极 与对应的驱动电压输出端和第二滤波电容C2的第一端连接，第二滤波电容C2的第二端接地。脉冲控制模块5用于产生并分别向各第二开关管T2发送脉冲控制信号，每个脉冲控制信号的占空比等于与接收该脉冲控制信号的第二开关管T2连接的驱动电压输出端输出的驱动电压与参考电压VDD1的比值。
其中，第二开关管T2的第一极指的是第二开关管T2的源极，第二开关管T2的第二极指的是第二开关管T2的漏极。
具体地，脉冲控制模块5可包括：脉冲调整控制子模块9、脉冲发生器6、脉宽调整电路7和电平转换电路8，其中，脉宽调整电路7与脉冲调整控制子模块9、脉冲发生器6和电平转换电路8均连接，脉冲调整控制子模块9用于根据参考电压和电压调整模块4待形成的驱动电压来生成多个脉冲调整控制信号。脉冲发生器6用于产生初始脉冲信号；脉宽调整电路7用于根据各脉冲调整控制信号对初始脉冲信号进行脉宽调整处理以形成多个初始脉冲控制信号DR、DG、DB；电平转换电路8用于对各初始脉冲控制信号进行电平转换处理以形成多个脉冲控制信号PR、PG、PB，各脉冲控制信号分别用于控制各第二开关管T2的通断。
进一步地，脉冲调整控制子模块9可包括：存储器件和解码电路10，解码电路10与存储器件和脉宽调整电路7均连接。存储器件存储有参考电压的数据信息和电压调整模块4待形成的驱动电压的数据信息；解码电路10用于对参考电压的数据信息和待形成的驱动电压的数据信息进行解码处理，得到参考电压的电压值和待形成的驱动电压的电压值，解码电路10还用于根据待形成的驱动电压的电压值与参考电压的电压值的比值生成脉冲调整控制信号。
更进一步地，该存储器件可以为寄存器11，脉冲调整控制子模块9还可包括：信号接收器12，信号接收器12与解码电路10连接，信号接收器12用于接收位于驱动电源之外的时序控制器发送的时序控制信号，时序控制器通过SPI接口或I2C总线或S-wire总线将时序控制信号发送至信号接收器12，该时序控制信号中包含有参考电压的数据信息和电压调整模块4待形成的驱动电压的数据信息，解码 电路10还用于将时序控制信号中的参考电压的数据信息和待形成的驱动电压的数据信息解码出来，并将解码后的参考电压的数据信息和待形成的驱动电压的数据信息存储于寄存器11中。
下面将结合附图来对本实施例提供的驱动电源的工作原理进行详细的说明。
参见图6所示，首先信号接收器12接收时序控制器发送的时序控制信号，并将接收到的时序控制信号发送至解码电路10，解码电路10将时序控制信号中的参考电压的数据信息和与待驱动的像素单元对应的驱动电压的数据信息(即，电压调整模块4待形成的驱动电压的数据信息)解码出来，并存储于寄存器11中。其次，解码电路10再对寄存器11中的参考电压的数据信息和待形成的驱动电压的数据信息进行解码处理，得到参考电压的电压值和待形成的驱动电压的电压值，并根据解码出的各待形成的驱动电压的电压值与参考电压的电压值的比值生成多个脉冲调整控制信号，并发送至脉宽调整电路7；与此同时，脉冲发生器6产生具有预设频率的初始脉冲信号并发送至脉宽调整电路7。然后，脉宽调整电路7根据解码电路10生成的各脉冲调整控制信号分别对初始脉冲信号进行脉宽调整处理以形成多个初始脉冲控制信号(其电压远小于参考电压VDD1)，每个初始脉冲控制信号的占空比等于其所对应的驱动电压的电压值与参考电压的电压值的比值，需要说明的是，此时初始脉冲控制信号的电压不足以控制第二开关管T2的通断。再然后，电平转换电路8对脉宽调整电路7形成的各初始脉冲控制信号分别进行电平转换处理以形成多个脉冲控制信号(一般其电压接近于参考电压VDD1)，各脉冲控制信号分别用于控制各第二开关管T2的通断，需要说明的是，电平转换处理使得初始脉冲控制信号的电压上升，从而使得所得到的脉冲控制信号足以控制第二开关管T2的通断，且该脉冲控制信号的占空比与初始脉冲控制信号的占空比相同。最后，通过各脉冲控制信号来控制各第二开关管T2的通断(具体地，控制通断时间的比例)，由于受不同脉冲控制信号控制的各第二开关管T2的通断情况不同，从而可在各第二开关管T2的第二极形成大小不同的电压，这些电压 再分别经过第二滤波电容C2的滤波处理，在对应的驱动电压输出端输出稳定的、大小不同的驱动电压。其中，驱动电压的大小等于参考电压与脉冲控制信号的占空比的乘积。
需要说明的，本实施例中当第二开关管T2为N型晶体管时，若脉冲控制信号处于高电平，则第二开关管T2导通；若脉冲控制信号处于低电平，则第二开关管T2截止。上述脉冲控制信号的占空比具体是指脉冲控制信号在一个脉冲周期内，处于高电平的时间占整个脉冲周期的百分比。当第二开关管T2为P型晶体管时，若脉冲控制信号处于高电平，则第二开关管T2截止；若脉冲控制信号处于低电平，则第二开关管T2导通。上述脉冲控制信号的占空比具体是指脉冲控制信号在一个脉冲周期内，处于低电平的时间占整个脉冲周期的百分比。
本实施例中，对应于红色像素单元、绿色像素单元和蓝色像素单元，信号接收器12接收到的时序控制信号有三种，每一种时序控制信号对应一种颜色的像素单元。在脉宽调整电路7的输出端能输出三种占空比不同的初始脉冲控制信号，具体为：红色初始脉冲控制信号DR、绿色初始脉冲控制信号DG和蓝色初始脉冲控制信号DB，其中，绿色初始脉冲控制信号DG的占空比小于红色初始脉冲控制信号DR的占空比，红色初始脉冲控制信号DR的占空比小于蓝色初始脉冲控制信号DR的占空比。该三种初始脉冲控制信号分别经电平转换电路8的电平转换处理后形成红色脉冲控制信号PR、绿色脉冲控制信号PG和蓝色脉冲控制信号PB。
图7为本发明实施例中红色脉冲控制信号、绿色脉冲控制信号和蓝色脉冲控制信号的时序图，如图7所示，本实施例中,假定红色脉冲控制信号PR的占空比为65％，绿色脉冲控制信号PG的占空比为50％，蓝色脉冲控制信号PB的占空比为80％，这三个脉冲控制信号的周期均为T。当第二开关管T2为N型晶体管(对应于图7所示的情况)时，红色脉冲控制信号PR在一个周期内处于高电平的时间为0.65T，绿色脉冲控制信号PG在一个周期内处于高电平的时间为0.50T，蓝色脉冲控制信号PB在一个周期内处于高电平的时间为 0.80T，优选地，红色脉冲控制信号PR、绿色脉冲控制信号PG和蓝色脉冲控制信号PB中的任意一个脉冲控制信号的上升沿与其他两个脉冲控制信号的上升沿的相位差均为120度(三分之一个脉冲周期，即T/3)，例如：图7中所示的绿色脉冲控制信号PG的上升沿滞后于红色脉冲控制信号PR的上升沿120度，蓝色脉冲控制信号PB的上升沿滞后于绿色脉冲控制信号PG的上升沿120度(也就是超前于红色脉冲控制信号PR的上升沿120度)。需要说明的是，图7所示的情况仅起到示意性的作用，并不对本申请的技术方案产生限制。通过使红色脉冲控制信号PR、绿色脉冲控制信号PG和蓝色脉冲控制信号PB中的任意一个脉冲控制信号的上升沿与其他两个脉冲控制信号的上升沿的相位差均为120度，可有效地提升整个电源系统的工作效率。
相应地，当第二开关管T2为P型晶体管时，红色脉冲控制信号PR在一个周期内处于低电平的时间为0.65T，绿色脉冲控制信号PG在一个周期内处于低电平的时间为0.50T，蓝色脉冲控制信号PB在一个周期内处于低电平的时间为0.80T，红色脉冲控制信号PR、绿色脉冲控制信号PG和蓝色脉冲控制信号PB中的任意一个脉冲控制信号的下降沿与其他两个脉冲控制信号的下降沿的相位差均为120度，此种情况未给出相应的示例性附图。
需要说明的是，本实施例中的脉冲控制模块5不仅限于图6中所示的结构。
图8为脉冲控制模块5的另一种可选方案的结构示意图，如图8所示，该脉冲控制模块5包括：脉冲调整控制子模块9、脉冲发生器6、脉宽调整电路7和电平转换电路8，该脉冲调整控制子模块9包括：只读内存器13和解码电路10，只读内存器13内预先存储有与红色像素单元、绿色像素单元和蓝色像素单元分别对应的驱动电压VDDR、VDDG、VDDB的数据信息，以及存储有参考电压VDD1的数据信息，解码电路10可直接获取相应的数据信息并进行解码处理，以生成相应的各脉冲调整控制信号。脉宽调整电路7基于各脉冲调整控制信号生成红色初始脉冲控制信号DR、绿色初始脉冲控制信号DG或蓝 色初始脉冲控制信号DB。
图9为脉冲控制模块5的另一种可选方案的结构示意图，如图9所示，该脉冲控制模块5包括：脉冲调整控制子模块9、脉冲发生器6、脉宽调整电路7和电平转换电路8，脉冲调整控制子模块9包括：第一电平信号输入端14和与驱动电压输出端的数量相等的分压电阻组，每个分压电阻组包括：串联连接的一个第三电阻R3、R3'、R3”和一个第四电阻R4、R4'、R4”，第一电平信号输入端14与第三电阻R3、R3'、R3”的第一端连接，第四电阻R4、R4'、R4”的第二端接地，第三电阻R3、R3'、R3”的第二端和第四电阻R4、R4'、R4”的第一端均与脉宽调整电路7连接；第一电平信号输入端14用于产生并向各分压电阻组同时输入第一初始电平信号，各分压电阻组用于对第一初始电平信号进行分压处理以形成多个脉冲调整控制信号，不同分压电阻组中的第三电阻的电阻值与第四电阻的电阻值的比值不同，从而形成的脉冲调整控制信号的电压值不同。
对应于三种不同颜色的像素单元，图9中分压电阻组的数量为3组，各组分压电阻组中的第三电阻的电阻值与第四电阻的电阻值的比值均不同，即R3与R4的比值、R3'与R4'的比值、R3”与R4”的比值，三个比值大小均不同，因此三组分压电阻组可向脉宽调整电路7共输出三种电压值不同的调整控制信号，脉宽调整电路7根据接收到的调整控制信号的电压值的不同总共可输出三种占空比不同的初始脉冲控制信号，即红色初始脉冲控制信号DR、绿色初始脉冲控制信号DG或蓝色初始脉冲控制信号DB。
图10为脉冲控制模块5的又一种可选方案的结构示意图，如图10所示，该脉冲控制模块5包括脉冲调整控制子模块9、脉冲发生器6、脉宽调整电路7和电平转换电路8，脉冲调整控制子模块9包括：第二电平信号输入端16和与驱动电压输出端的数量相等的第五电阻R5、R5'、R5”，第二电平信号输入端16与第五电阻R5、R5'、R5”的第一端连接，第五电阻R5、R5'、R5”的第二端与脉宽调整电路7连接。第二电平信号输入端16用于产生并向各第五电阻R5、R5'、R5”同时输入第二初始电平信号，各第五电阻R5、R5'、R5”用于对第二初始电平 信号进行降压处理以形成多个脉冲调整控制信号。其中，各个第五电阻的阻值R5、R5'、R5”均不同，从而形成的调整控制信号的电压值不同。
对应于三种不同颜色的像素单元，图10中第五电阻的数量为3个，各个第五电阻的阻值均不同，即R5、R5'、R5”三者的大小均不相同，因此三个第五电阻的第二端可向脉宽调整电路7共输出三种电压值不同的脉冲调整控制信号，脉宽调整电路7根据接收到的脉冲调整控制信号的电压值的不同总共可输出三种占空比不同的初始脉冲控制信号，即红色初始脉冲控制信号DR、绿色初始脉冲控制信号DG或蓝色初始脉冲控制信号DB。
此外，本实施例中的脉冲控制模块5还可以为单片机，通过单片机可向各第二开关管输出具有不同占空比的脉冲控制信号，该过程为本领域的现有技术，此处不再赘述。
本发明实施例二提供了一种驱动电源，该驱动电源可根据待驱动的像素单元的颜色来提供相应的驱动电压，进而可以使得像素单元的驱动电路中的驱动晶体管上所分得的电压相对现有技术中的驱动晶体管上所分得的电压有所减小，从而可以降低驱动晶体管的功耗，进而降低了整个显示驱动电路的功耗。
实施例三
图11为本发明实施例三提供的驱动电源的电路示意图，如图11所示，该驱动电源包括：升压模块3和电压调整模块4，其中升压模块3和电压调整模块4的连接关系以及功能可参见上述实施一，本实施例提供了上述实施例一中的驱动电源的又一种具体结构，本实施例中以驱动电源的驱动电压输出端的数量为3个为例进行描述。其中，电压调整模块4包括：与驱动电压输出端的数量相等的线性稳压器17、18、19和第三滤波电容C3，线性稳压器17、18、19与驱动电压输出端一一对应，第三滤波电容C3与驱动电压输出端一一对应，线性稳压器的输入端与升压模块3连接，线性稳压器17、18、19的输出端与驱动电压输出端和第三滤波电容C3的第一端均连接，第三滤 波电容C3的第二端接地，线性稳压器用于对参考电压VDD1进行降压处理以形成驱动电压VDDR、VDDG、VDDB，不同线性稳压器的降压幅度不同。
由于每个线性稳压器17、18、19的输入端输入的电压相同(均为参考电压VDD1)，同时不同线性稳压器17、18、19的降压幅度不同，因此三个线性稳压器17、18、19可输出三种不同的驱动电压，三种不同的驱动电压分别用于驱动不同颜色的像素单元。
需要说明的是，线性稳压器的结构及其工作原理均为本领域的现有技术，此处不再赘述。
本发明实施例三提供了一种驱动电源，该驱动电源可根据待驱动的像素单元的颜色来提供相应的驱动电压，进而可以使得像素单元的驱动电路中的驱动晶体管上所分得的电压相对现有技术中的驱动晶体管上所分得的电压有所减小，从而可以降低驱动晶体管的功耗，进而降低了整个显示驱动电路的功耗。
实施例四
本发明实施例四提供了一种显示驱动电路，该显示驱动电路包括：驱动电源，该驱动电源采用上述实施例一至实施例三中任一所述的驱动电源，该驱动电源的具体结构可参见上述实施例一至实施例三中的描述。
本发明实施例四提供了一种显示驱动电路，该显示驱动电路包括上述的驱动电源，该驱动电源可根据待驱动的像素单元的颜色来提供相应的驱动电压，进而可以使得像素单元的驱动电路中的驱动晶体管上所分得的电压相对现有技术中的驱动晶体管上所分得的电压有所减小，从而可以降低驱动晶体管的功耗，进而降低了整个显示驱动电路的功耗。
实施例五
本发明实施例五提供了一种有机发光显示器，该有机发光显示器包括：显示驱动电路，该显示驱动电路采用上述实施例四中所述的 显示驱动电路。
图12为本发明实施例五提供有机发光显示器的电路示意图，图13为图12所示的有机发光显示器的驱动原理图，如图12和图13所示，该有机发光显示器包括：显示面板25、供电模块20、时序控制器22、显示驱动电路、扫描电路23和数据驱动电路24，其中，显示面板25包括若干个像素单元，显示驱动电路至少包括：驱动电源21，以及由该驱动电源21驱动的多个像素单元驱动电路，而每个像素单元驱动电路包括：开关晶体管M1、驱动晶体管M2、存储电容以及发光器件OLEDR、OLEDF、OLEDB，其中开关晶体管M1、驱动晶体管M2、存储电容和发光器件均形成于显示面板25中衬底基板的上方，在图12中未示出。供电模块20与时序控制器22、数据驱动电路24和驱动电源21均连接，时序控制器22与驱动电源21、扫描电路23和数据驱动电路24均连接，扫描电路23与开关晶体管M1的栅极连接，数据驱动电路24与开关晶体管M1的源极连接。驱动电源21可向显示面板25中的不同颜色的像素单元(或者说多个像素单元驱动电路)输出不同的驱动电压，其中，相同颜色的像素单元对应相同大小的驱动电压，不同颜色的像素单元对应不同大小的驱动电压。
假定本实施例中的像素单元包括：红色像素单元(包括有红色有机电致发光器件OLEDR)、绿色像素单元(包括有绿色有机电致发光器件OLEDG)和蓝色像素单元(包括有蓝色有机电致发光器件OLEDB)。对应三种不同颜色的像素单元，驱动电源21可提供三种不同的驱动电压，这三种驱动电压分别为：红色驱动电压VDDR、绿色驱动电压VDDG和蓝色驱动电压VDDB，其中VDDR、VDDG、VDDB三者的大小关系满足VDDG<VDDR<VDDB。其中，红色驱动电压VDDR用于驱动红色像素单元，绿色驱动电压VDDG用于驱动绿色像素单元，蓝色驱动电压VDDB用于驱动蓝色像素单元。从而可避免现有技术中采用相同大小的驱动电压驱动不同颜色的像素单元时，造成部分像素单元内驱动晶体管的发热现象。
本实施例中，可选地，供电模块20可与驱动电源21集成于同一模块中，供电模块20用于向驱动电源21提供初始电压VCC。
本实施例中的时序控制器22、供电模块20、扫描电路23和数据驱动电路24的结构及工作原理与现有技术中的相同，此处不再赘述。
本发明实施例五提供了一种有机发光显示器，该有机发光显示器包括上述的显示驱动电路，该显示驱动电路可有效的减少像素单元中驱动晶体管在工作时的栅源电压，从而避免驱动晶体管的发热现象，同时降低驱动晶体管的功耗，进而使得有机发光显示器的整体功耗下降。
需要说明的是，上述各实施例中像素单元包括：红色像素单元、绿色像素单元和蓝色像素单元，且驱动电源的驱动电压输出端的数量为3个的技术方案仅仅起到示例性的作用，并不对本申请的技术方案产生限制。
可以理解的是，以上实施方式仅仅是为了说明本发明的原理而采用的示例性实施方式，然而本发明并不局限于此。对于本领域内的普通技术人员而言，在不脱离本发明的精神和实质的情况下，可以做出各种变型和改进，这些变型和改进也视为本发明的保护范围。

Claims (15)

  1. 一种驱动电源，包括：升压模块和电压调整模块，所述电压调整模块与所述升压模块连接；
    其中，所述升压模块用于对所述驱动电源的初始电压输入端输入的初始电压进行升压处理以形成参考电压，并将所述参考电压输出至所述电压调整模块；并且
    所述电压调整模块用于根据待驱动的像素单元的颜色对所述参考电压的大小进行调整以分别形成多个驱动电压，其中，与不同颜色的像素单元对应的所述驱动电压不同。
  2. 根据权利要求1所述的驱动电源，还包括：多个用于输出所述多个驱动电压的驱动电压输出端，所述驱动电压输出端与所述电压调整模块连接，每个驱动电压输出端用于驱动同一种颜色的像素单元，不同所述驱动电压输出端输出的所述驱动电压不同。
  3. 根据权利要求2所述的驱动电源，其中，所述电压调整模块包括：脉冲控制模块、与所述驱动电压输出端的数量相等的第二开关管和第二滤波电容，所述第二开关管与所述驱动电压输出端一一对应，所述第二滤波电容与所述驱动电压输出端一一对应；
    所述第二开关管的栅极与所述脉冲控制模块连接，所述第二开关管的第一极与所述升压模块连接，所述第二开关管的第二极与对应的所述驱动电压输出端和所述第二滤波电容的第一端连接；
    所述第二滤波电容的第二端接地；并且
    所述脉冲控制模块用于产生并分别向所述各第二开关管发送脉冲控制信号，每个脉冲控制信号的占空比等于与接收所述脉冲控制信号的所述第二开关管连接的所述驱动电压输出端输出的驱动电压与所述参考电压的比值。
  4. 根据权利要求3所述的驱动电源，其中，所述脉冲控制模块 包括：脉冲调整控制子模块、脉冲发生器、脉宽调整电路和电平转换电路，其中所述脉宽调整电路与所述脉冲调整控制子模块、所述脉冲发生器和所述电平转换电路均连接；
    所述脉冲调整控制子模块用于根据所述参考电压和所述电压调整模块待形成的所述驱动电压来生成多个脉冲调整控制信号；
    所述脉冲发生器用于产生具有预设频率的初始脉冲信号；
    所述脉宽调整电路用于根据所述各脉冲调整控制信号对所述初始脉冲信号进行脉宽调整处理以形成多个初始脉冲控制信号；并且
    所述电平转换电路用于对所述各初始脉冲控制信号进行电平转换处理以形成多个所述脉冲控制信号，所述各脉冲控制信号用于分别控制所述各第二开关管的通断。
  5. 根据权利要求4所述的驱动电源，其中，所述脉冲调整控制子模块包括：存储器件和解码电路，所述解码电路与所述存储器件和所述脉宽调整电路均连接；
    所述存储器件存储有所述参考电压的数据信息和所述电压调整模块待形成的驱动电压的数据信息；
    所述解码电路用于对所述参考电压的数据信息和所述电压调整模块待形成的驱动电压的数据信息进行解码处理，得到所述参考电压的电压值和所述电压调整模块待形成的驱动电压的电压值，所述解码电路还用于根据所述电压调整模块待形成的驱动电压的电压值与所述参考电压的电压值的比值生成所述脉冲调整控制信号。
  6. 根据权利要求5所述的驱动电源，其中，所述存储器件为只读内存器，所述只读内存器预先存储有不同颜色像素单元对应的驱动电压的数据信息和所述参考电压的数据信息。
  7. 根据权利要求5所述的驱动电源，其中，所述存储器件为寄存器，所述脉冲调整控制子模块还包括：信号接收器，所述信号接收器与所述解码电路连接；
    所述信号接收器用于接收位于所述驱动电源之外的时序控制器发送的时序控制信号，所述时序控制信号中包含有所述参考电压的数据信息和所述电压调整模块待形成的驱动电压的数据信息；
    所述解码电路还用于将所述时序控制信号中的所述参考电压的数据信息和所述电压调整模块待形成的驱动电压的数据信息解码出来，并将解码后的所述参考电压的数据信息和所述电压调整模块待形成的驱动电压的数据信息存储于所述寄存器中。
  8. 根据权利要求4所述的驱动电源，其中，所述脉冲调整控制子模块包括：第一电平信号输入端和与所述驱动电压输出端的数量相等的分压电阻组，每个所述分压电阻组包括：串联连接的第三电阻和第四电阻；
    所述第一电平信号输入端与所述第三电阻的第一端连接，所述第四电阻的第二端接地，所述第三电阻的第二端和所述第四电阻的第一端均与所述脉宽调整电路连接；
    所述第一电平信号输入端用于产生并向所述分压电阻组输入第一初始电平信号；
    所述分压电阻组用于对所述第一初始电平信号进行分压处理以形成所述脉冲调整控制信号；并且
    不同的所述分压电阻组中的所述第三电阻的电阻值与所述第四电阻的电阻值的比值不同。
  9. 根据权利要求4所述的驱动电源，其中，所述脉冲调整控制子模块包括：第二电平信号输入端和与所述驱动电压输出端的数量相等的第五电阻，所述第二电平信号输入端与所述第五电阻的第一端连接，所述第五电阻的第二端与所述脉宽调整电路连接；
    所述第二电平信号输入端用于产生并向所述第五电阻输入第二初始电平信号；
    所述第五电阻用于对所述第二初始电平信号进行降压处理以形成所述脉冲调整控制信号；并且
    各个所述第五电阻的阻值均不同。
  10. 根据权利要求3所述的驱动电源，其中，所述像素单元包括：红色像素单元、绿色像素单元和蓝色像素单元，所述驱动电压输出端的数量为3个。
  11. 根据权利要求10所述的驱动电源，其中，所述脉冲控制信号包括：红色脉冲控制信号、绿色脉冲控制信号或蓝色脉冲控制信号；
    所述红色脉冲控制信号、所述绿色脉冲控制信号和所述蓝色脉冲控制信号中的任意一个脉冲控制信号的上升沿与其他两个脉冲控制信号的上升沿的相位差均为120度；或者，
    所述红色脉冲控制信号、所述绿色脉冲控制信号和所述蓝色脉冲控制信号中的任意一个脉冲控制信号的下降沿与其他两个脉冲控制信号的下降沿的相位差均为120度。
  12. 根据权利要求3所述的驱动电源，其中，所述脉冲控制模块为单片机。
  13. 根据权利要求2所述的驱动电源，其中，电压调整模块包括：与所述驱动电压输出端的数量相等的线性稳压器和第三滤波电容，所述线性稳压器与所述驱动电压输出端一一对应，所述第三滤波电容与所述驱动电压输出端一一对应；
    所述线性稳压器的输入端与所述升压模块连接，所述线性稳压器的输出端与所述驱动电压输出端和所述第三滤波电容的第一端均连接；
    所述第三滤波电容的第二端接地；
    所述线性稳压器用于对所述参考电压进行降压处理以形成所述驱动电压；并且
    不同的所述线性稳压器的降压幅度不同。
  14. 一种显示驱动电路，包括：如权利要求1-13中任一项所述的驱动电源。
  15. 一种有机发光显示器，包括：如权利要求14中所述的显示驱动电路。
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