WO2016078297A1 - 像素结构及其制备方法、阵列基板、显示装置 - Google Patents

像素结构及其制备方法、阵列基板、显示装置 Download PDF

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WO2016078297A1
WO2016078297A1 PCT/CN2015/076267 CN2015076267W WO2016078297A1 WO 2016078297 A1 WO2016078297 A1 WO 2016078297A1 CN 2015076267 W CN2015076267 W CN 2015076267W WO 2016078297 A1 WO2016078297 A1 WO 2016078297A1
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storage capacitor
organic electroluminescent
plate
electroluminescent device
layer
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PCT/CN2015/076267
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English (en)
French (fr)
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刘利宾
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京东方科技集团股份有限公司
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Priority to US14/891,926 priority Critical patent/US9997580B2/en
Publication of WO2016078297A1 publication Critical patent/WO2016078297A1/zh

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/121—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
    • H10K59/1216—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements the pixel elements being capacitors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1255—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs integrated with passive devices, e.g. auxiliary capacitors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259—Multistep manufacturing methods
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/122—Pixel-defining structures or layers, e.g. banks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/131—Interconnections, e.g. wiring lines or terminals
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/1201—Manufacture or treatment

Definitions

  • the present invention belongs to the field of display technologies, and in particular, relates to a pixel structure, a method for fabricating the same, an array substrate, and a display device.
  • a pixel structure of an existing organic electroluminescence display panel for performing transparent display includes a display area and a transmission area, and the pixel structure further includes a pixel circuit including a thin film transistor, a storage capacitor, and an organic electroluminescence A device, wherein the thin film transistor, the storage capacitor, and the organic electroluminescent device are both disposed in a display area.
  • the size of the display panel is constant, the larger the area of the display area, the smaller the area of the transmission area.
  • the first plate and the second plate of the storage capacitor are usually formed of the same material by the same patterning process as the active layer and the gate of the thin film transistor, that is, Said that the storage capacitor is in a position that is not transparent.
  • the pixel circuit structure is more complicated than the LCD, and usually requires a plurality of thin film transistors and capacitors, which requires a large area of the display area to arrange electronic components of the pixel circuit structure, thereby causing The entire pixel size becomes larger. Therefore, the resolution of the existing organic electroluminescence display panel for performing transparent display is low, and an increase in the area of the display region causes a reduction in the area of the transmission region, so that the overall transmittance of the display panel is low.
  • the inventors have found that since the first plate and the second plate of the storage capacitor in the prior art are the same as the materials of the active layer and the gate, respectively, and are both opaque materials, the first plate of the storage capacitor and The second plate is opaque, thereby affecting the transmittance of the display panel, and the storage capacitor is located in the display area, resulting in a pixel size that is too large to achieve high-resolution transparent display.
  • the present invention provides a pixel structure having a large display area, a method for fabricating the same, an array substrate having the pixel structure, and a display device having the array substrate, in view of the above problems existing in the conventional organic electroluminescence display panel.
  • the technical solution adopted to solve the technical problem of the present invention is a pixel structure including a display area and a transmission area, and the pixel structure further has a pixel circuit including an organic electroluminescent device and at least one storage capacitor.
  • the organic electroluminescent device is located in the display area, wherein the at least one storage capacitor in the pixel circuit is located in the transmission region, and the first plate of the storage capacitor and The material of the second plate is a transparent conductive material, and the two are at least electrically insulated by a dielectric layer.
  • the storage capacitor of the pixel structure of the present invention is disposed in the transmission region, that is, the position of the storage capacitor is transparent, so that the light extraction rate of the pixel structure can be improved. At the same time, the resolution can be further improved due to the reduced area of the display area.
  • the first plate of the storage capacitor is disposed in the same layer as the anode of the organic electroluminescent device, and the materials are the same.
  • the pixel structure further includes a connection electrode electrically connected to the second plate of the storage capacitor, the connection electrode being disposed in the same layer as the anode of the organic electroluminescent device, and having the same material.
  • a first insulating layer is disposed under the layer where the anode of the organic electroluminescent device is located, and at least in the transmissive region, and the first plate of the storage capacitor is disposed at the first Below the insulation.
  • the layer in which the cathode of the organic electroluminescent device is located there is at least one layer structure having a step difference between a portion of the display region and a portion of the transmission region.
  • the second plate of the storage capacitor is disposed in the same layer and the same material as the cathode of the organic electroluminescent device.
  • the pixel structure further includes a passivation layer disposed under the anode of the organic electroluminescent device, the passivation layer having a thickness in the display region greater than a thickness thereof in the transmission region.
  • the dielectric layer includes at least one of a first insulating layer, a pixel defining layer, and a planarization layer.
  • the technical solution adopted to solve the technical problem of the present invention is a method for fabricating a pixel structure, the pixel structure including a display area and a transmission area, the pixel structure further comprising a pixel circuit, the pixel circuit including organic electroluminescence And a device and at least one storage capacitor, wherein the preparation method comprises:
  • the first plate and the second plate of the storage capacitor are both made of a transparent conductive material and are electrically insulated by a dielectric layer therebetween.
  • the anode of the organic electroluminescent device and the first plate of the storage capacitor are formed by the same patterning process.
  • a pattern of connecting electrodes for connecting to the second plate of the storage capacitor is formed while forming the anode of the organic electroluminescent device.
  • the following steps are further included:
  • a pattern of the passivation layer is formed by a patterning process, wherein the passivation layer has a thickness in the display region greater than a thickness thereof in the transmission region.
  • the following steps are sequentially included after forming the first plate of the storage capacitor:
  • the following steps are sequentially included after forming the first plate of the storage capacitor:
  • the technical solution adopted to solve the technical problem of the present invention is an array substrate including the above pixel structure.
  • a technical solution adopted to solve the technical problem of the present invention is a display device including the above array substrate.
  • Embodiment 1 is a plan view showing a pixel structure of Embodiment 1 of the present invention.
  • Figure 2 is a cross-sectional view taken along line A-A of the pixel structure shown in Figure 1;
  • FIG. 3 is a circuit diagram showing a pixel structure of an array substrate according to Embodiment 1 of the present invention.
  • the reference numerals are: 1, the substrate; 2, the buffer layer; 3, the first plate; 4, the first insulating layer; 5, the connecting electrode; 6, the pixel defining layer; 7, the second plate; Transistor; M2, drive transistor; D1, organic electroluminescent device; Cs, storage capacitor; Q1, transmission region; Q2, display area.
  • the embodiment provides a pixel structure including a display area and a transmission area, and the pixel structure further has a pixel circuit, the pixel circuit includes an organic electroluminescent device and at least one storage capacitor, wherein the organic electroluminescence The device is located in the display area, the at least one storage capacitor is located in the transmission region, and the materials of the first plate and the second plate of each storage capacitor are transparent conductive materials, and the two are at least electrically insulated by the dielectric layer open.
  • the material of the storage capacitor is a transparent conductive material and the storage capacitor is disposed in the transmission region, that is, the position where the storage capacitor is located may have light transmission, thereby improving the transparency of the pixel structure.
  • the area of the display area in the pixel structure of the embodiment can be relatively reduced. Accordingly, the area of the transmission area can be relatively increased, that is, the pixel structure of the embodiment has a high transmittance.
  • the display panel has a high aperture ratio.
  • At least one storage capacitor of the embodiment is disposed in the transmission region, and the size of the display region of the pixel structure can be appropriately reduced, so that the overall size of the pixel structure can be reduced, and thus, compared to the display in the prior art.
  • the display panel of the present invention facilitates the fabrication of more pixel structures, thereby improving the resolution of the display panel.
  • the first plate is disposed in the same layer as the anode of the organic electroluminescent device, and the materials are the same. Therefore, the first plate and the anode of the organic electroluminescent device can be formed by the same patterning process, thereby reducing the patterning process and saving cost.
  • the anode of the organic electroluminescent device is a film formed of a transparent conductive material selected from the group consisting of: ITO (indium tin oxide), IZO (indium zinc oxide), IGZO (indium gallium zinc oxide) or InGaSnO ( Indium gallium tin oxide).
  • the “same layer setting” in the embodiment means that different structures are formed by the same patterning process, and the structures are not formed on the visually identical plane.
  • a first insulating layer is disposed under the layer where the anode of the organic electroluminescent device is located, and at least in the transparent region, and the first plate is disposed at Below the first insulating layer. That is to say, the anode of the organic electroluminescent device may not be disposed in the same layer as the first plate. At this time, the first plate and the anode of the organic electroluminescent device can be separately fabricated, which can be realized only by adding one patterning process.
  • the material of the first insulating layer is a material having a high dielectric constant such as silicon nitride or silicon oxide to increase the storage capacity thereof.
  • the pixel structure further includes a connection electrode electrically connected to the second plate of the storage capacitor.
  • the pixel structure usually includes a transistor, and the transistor is connected to the driving power source, some connecting lines are formed at the same time as the film layers of the thin film transistor are formed, so that the transistor and the driving power source are connected through the connecting lines, so in this embodiment
  • the connection between the second plate of the storage capacitor and the driving power source can be realized by the connection of the connecting electrode and the connecting line.
  • connection electrode is disposed in the same layer as the anode of the organic electroluminescent device, and the materials are the same, which can reduce the number of patterning processes and save cost.
  • connection electrode and the anode of the organic electroluminescent device it is also feasible to separately fabricate the connection electrode and the anode of the organic electroluminescent device, but it is necessary to add a patterning process.
  • the thickness of the pixel defining layer in the display region is greater than the thickness of the transparent region (may not even be set in the transmissive region)
  • the pixel defining layer at this time, the pixel defining layer has a step difference between a portion of the display region and a portion of the transmissive region.
  • the cathode of the organic electroluminescent device is formed on the pixel defining layer by an evaporation process.
  • the cathode material film layer will be broken between the display region and the transmission region, and a continuous structure cannot be formed.
  • a cathode material film layer in the display region will be formed as the organic electroluminescent device.
  • the cathode, while the cathode material film layer in the transmission region will be formed as a second plate of storage capacitors. In other words, this can be used
  • the same patterning process forms a pattern of the cathode of the organic electroluminescent device and the second plate of the storage capacitor, thereby reducing the production cost of the display panel while improving production efficiency.
  • the second plate of the storage capacitor is disposed in the same layer as the cathode and has the same material.
  • the pixel structure further includes a passivation layer disposed under the cathode of the organic electroluminescent device, the blunt The thickness of the portion of the layer in the display region is greater than the thickness of the portion of the region. At this time, the passivation layer will form a step difference between the portion of the display region and the portion of the transmission region.
  • the second plate of the storage capacitor and the cathode of the organic electroluminescent device can be formed into a structure that is disconnected from each other by a single evaporation process, that is, the second plate of the storage capacitor and the organic electro-electrode
  • the cathode of the light emitting device is disposed in the same layer and of the same material.
  • the passivation layer may not have a portion disposed in the transmission region, so that a layer on which the cathode of the organic electroluminescent device is to be formed may be larger between the display region and the transmission region.
  • the step is so as to better form the anode and the second plate in one evaporation process.
  • the pixel structure of the embodiment of the present invention is applicable to both the top emission and the bottom emission organic electroluminescent devices, and the reflective electrode is disposed on the side away from the light exiting side of the organic electroluminescent device, and details are not described herein.
  • the dielectric layer includes at least one of a first insulating layer, a pixel defining layer, and a planarization layer. See the method below for details.
  • the embodiment provides a method for fabricating a pixel structure, the pixel structure includes a display area and a transmission area, and further includes a pixel circuit, the pixel circuit including an organic electroluminescent device and at least one storage capacitor.
  • the preparation method includes the steps of: forming an organic electroluminescent device in a display region, and forming the at least one storage capacitor in the transmission region; wherein the first and second plates of each storage capacitor Made of a transparent conductive material with at least between They are separated by electrical insulation of the dielectric layer.
  • the storage capacitor prepared by the preparation method of the embodiment is disposed in the transmission region, that is, the position where the storage capacitor is located may be transmitted through the light, thereby improving the transmittance of the pixel structure, that is, the pixel structure of the embodiment.
  • the area of the display area can be relatively reduced. Accordingly, the area of the transmission area can be relatively increased. That is to say, the pixel structure of the embodiment has a high transmittance, and the pixel structure is used for the display panel. In the middle, the display panel has a higher aperture ratio.
  • At least one capacitor of the embodiment is disposed in the transmission region, and the size of the display region of the pixel structure can be appropriately reduced, so that the overall size of the pixel structure can be reduced, and thus, compared to the display panel in the prior art,
  • the display panel of the present invention is advantageous for making more pixel structures, thereby improving the resolution of the display panel.
  • the present embodiment is described by taking a pixel circuit of 2T1C as an example.
  • this embodiment does not limit the specific structure of the pixel circuit, that is, the present invention is not limited to the pixel circuit of 2T1C. It can be a pixel circuit such as 6T2C or 7T2C, which is not listed here.
  • the present embodiment provides a method for fabricating a pixel structure including a switching transistor M1, a driving transistor M2, and an organic electroluminescent device D1 disposed in the display region Q2, and The storage capacitor Cs is disposed in the transmission area Q1.
  • the preparation method specifically includes the following steps:
  • Step 1 Plasma Enhanced Chemical Vapor Deposition (PECVD), Low Pressure Chemical Vapor Deposition (LPCVD), atmospheric pressure chemical vapor deposition (Atmospheric Pressure Chemical)
  • PECVD Plasma Enhanced Chemical Vapor Deposition
  • LPCVD Low Pressure Chemical Vapor Deposition
  • Atmospheric Pressure Chemical The buffer layer 2 is formed by a Vapor Deposition (APCVD) method or an Electron Cyclotron Resonance Chemical Vapor Deposition (ECR-CVD) method.
  • APCVD Vapor Deposition
  • ECR-CVD Electron Cyclotron Resonance Chemical Vapor Deposition
  • the buffer layer 2 may be made of a material similar to the lattice structure of Si to form an a-Si film (ie, an amorphous silicon film in the next step) over the buffer layer 2.
  • Step 2 forming an amorphous silicon film on the substrate 1 that completes the above steps,
  • the crystalline silicon film is crystallized to form a polysilicon film, and the polysilicon film is doped, and a pattern including the active layer of the switching transistor M1 and the driving transistor M2 is formed using the same patterning process.
  • an amorphous silicon film (a-Si) is formed on the buffer layer 2 by a deposition method including a plasma enhanced chemical vapor deposition method and a low pressure chemical vapor deposition method.
  • the amorphous silicon film is crystallized, and the crystallization method includes converting the amorphous silicon film into a polysilicon film (p-Si) by using an excimer laser crystallization method, a metal induced crystallization method or a solid phase crystallization method. Then, a polysilicon film (p-Si) is doped (P-type doping or N-type doping) to determine the channel region conductivity type of the thin film transistor TFT.
  • the excimer laser crystallization method and the metal induced crystallization method are two low-temperature polysilicon methods, which are commonly used to convert amorphous silicon into polycrystalline silicon.
  • the method for converting amorphous silicon into polycrystalline silicon according to the present invention is not limited to the method using low temperature polycrystalline silicon as long as the active layer of the switching transistor M1 and the driving transistor M2 can be converted into a desired polycrystalline silicon thin film.
  • a pattern including the active layers of the switching transistor M1 and the driving transistor M2 is formed using the first patterning process. That is, a photoresist is formed on the polysilicon film, the photoresist is exposed and developed, and then the polysilicon film is etched to form a pattern including the active layer of the switching transistor M1 and the driving transistor M2.
  • Step 3 On the substrate 1 on which the above steps are completed, a pattern of a gate insulating layer and a gate electrode are sequentially formed.
  • a gate insulating layer is formed by plasma enhanced chemical vapor deposition, low pressure chemical vapor deposition, atmospheric pressure chemical vapor deposition or electron cyclotron resonance chemical vapor deposition or sputtering;
  • a gate metal film is formed by a thermal evaporation method, a plasma enhanced chemical vapor deposition method, a low pressure chemical vapor deposition method, an atmospheric pressure chemical vapor deposition method, or an electron cyclotron resonance chemical vapor deposition method.
  • a patterning process is used to form a pattern including the gate.
  • Step 4 on the substrate 1 that completes the above steps, forming a pattern including a source and a drain of the switching transistor M1, a source and a drain of the driving transistor M2;
  • a sputtering method first, a thermal evaporation method, a plasma enhanced chemical vapor deposition (PECVD) method, a low pressure chemical vapor deposition (LPCVD) method, or a low pressure chemical vapor deposition (LPCVD) method
  • PECVD plasma enhanced chemical vapor deposition
  • LPCVD low pressure chemical vapor deposition
  • LPCVD low pressure chemical vapor deposition
  • a source/drain metal film is formed by an Atmospheric Pressure Chemical Vapor Deposition (APCVD) method or an Electron Cyclotron Resonance Chemical Vapor Deposition (ECR-CVD) method, and then formed by a patterning process including a switching transistor.
  • a first electrode lead line connected to the drain of the switching transistor M1 is formed while forming the source and drain of the switching transistor M1 and the pattern of the source and the drain of the driving transistor M2, respectively, and driving A second electrode lead line and a third electrode lead line connected to the source and the drain of the transistor M2.
  • Step four forming a passivation layer on the substrate 1 that completes the above steps;
  • the passivation layer is preferably only located in the display area Q2.
  • the passivation layer may also be a whole layer structure covering the display area Q2 and the transmission area Q1, and the passivation layer is The thickness of the display region Q2 is larger than the thickness of the transmission region Q1, and a via hole for connecting the anode and the third electrode lead-out line of the organic electroluminescent device, and the first plate 3 and the third connecting the storage capacitor Cs are formed later. A via of an electrode lead.
  • Second plate 7 If only the passivation layer is disposed in the display region Q2, there will be a large step difference between the display region Q2 and the transmission region Q1, thereby facilitating the formation of the cathode and the storage capacitor of the organic electroluminescent device in the following steps. Second plate 7.
  • the deposition is transparent by sputtering, thermal evaporation or plasma enhanced chemical vapor deposition, low pressure chemical vapor deposition, atmospheric pressure chemical vapor deposition or electron cyclotron resonance chemical vapor deposition.
  • Conductive film the material of the transparent conductive film is preferably ITO (indium tin oxide), IZO (indium zinc oxide), IGZO (indium gallium zinc oxide) or InGaSnO (indium gallium tin oxide).
  • a pattern of the first plate 3 including the storage capacitor Cs is then formed in the transmission region Q1 by a patterning process.
  • Step 6 On the substrate 1 that completes the above steps, using ion-enhanced chemistry Forming a first insulating layer 4 by a vapor deposition method, a low pressure chemical vapor deposition method, an atmospheric pressure chemical vapor deposition method or an electron cyclotron resonance chemical vapor deposition method, the first insulating layer 4 serving as a first layer structure in the dielectric layer, An insulating layer 4 covers at least the transmission region Q1 for insulating the subsequently formed second plate 7 from the first plate 3.
  • a via hole is formed at a position corresponding to the connection electrode 5 of the first insulating layer 4, and optionally, the first insulating layer material has a higher dielectric constant such as silicon nitride or silicon oxide. Materials to increase their storage capacity.
  • the step of separately forming the first insulating layer may be omitted, and the dielectric layer may be formed by using at least one of the subsequently formed flat layer and the pixel defining layer.
  • Step 7 On the substrate 1 that completes the above steps, a pattern of a planarization layer is formed by ion-enhanced chemical vapor deposition, low-pressure chemical vapor deposition, atmospheric pressure chemical vapor deposition or electron cyclotron resonance chemical vapor deposition.
  • the layer covers at least the display area Q2. Of course, it is preferable that the planarization layer covers only the display area Q2 such that the display area Q2 forms a larger step difference with the transmission area Q1. If a planarization layer is also provided in the transmission region Q1, the planarization layer can serve as a second layer structure of the dielectric layer.
  • Step 8 On the substrate 1 which has completed the above steps, a pattern including an anode of the organic electroluminescence device is formed by a patterning process in the display region Q2.
  • a conductive metal film such as ITO (indium tin oxide) is deposited by sputtering, thermal evaporation or plasma enhanced chemical vapor deposition, low pressure chemical vapor deposition, atmospheric pressure chemical vapor deposition or electron cyclotron resonance chemical vapor deposition. ), IZO (indium zinc oxide), IGZO (indium gallium zinc oxide) or InGaSnO (indium gallium tin oxide).
  • ITO indium tin oxide
  • IZO indium zinc oxide
  • IGZO indium gallium zinc oxide
  • InGaSnO indium gallium tin oxide
  • an inorganic metal oxide, an organic conductive polymer or a metal material having conductivity and a high work function value may be used.
  • the inorganic metal oxide includes indium tin oxide or zinc oxide
  • the organic conductive polymer includes PEDOT: SS, PANI.
  • Metal materials include gold, copper, silver or platinum.
  • a positive electrode including the organic electroluminescent device D1 is formed in the display region Q2.
  • a pattern including the connection electrode 5 is formed in the display region Q2, and the connection electrode 5 is connected to the second electrode lead-out line, thereby making the second electrode lead-out line and the second storage capacitor Cs
  • the plate 7 has better electrical contact.
  • Step IX On the substrate 1 that completes the above steps, a Pixel Define Layer (PDL) is further prepared, followed by evaporation or coating of an Emitting Layer (EL).
  • PDL Pixel Define Layer
  • EL Emitting Layer
  • the material of the pixel defining layer 6 is not present in the transmissive region Q1. However, if the pixel defining layer 6 is present in the transmissive region Q1, the pixel defining layer 6 can serve as a third layer structure of the dielectric layer.
  • Step 10 On the substrate 1 on which the above steps are completed, a pattern of the second plate 7 including the cathode of the organic electroluminescent device D1 and the storage capacitor Cs is formed by a single evaporation process.
  • the second electrode plate 7 of the storage capacitor Cs and the cathode of the organic electroluminescent device D1 are formed of at least one of lithium, magnesium, calcium, barium, aluminum, and indium.
  • the second plate 7 of the storage capacitor Cs may be connected to the connection electrode 5 through a via formed in the dielectric layer above the connection electrode 5, or directly connected to the connection electrode 5, and further through the second electrode.
  • the lead wire is connected to the drive power source.
  • the passivation layer is not formed in the transmissive region Q1 of the pixel structure.
  • the planarization layer and the pixel defining layer 6 may not be formed. Therefore, there is a gap between the display region Q2 and the transmissive region Q1.
  • the larger step is such that the cathode of the organic electroluminescent device D1 in the display region Q2 and the second plate 7 of the storage capacitor Cs in the transmission region Q1 are broken apart.
  • the structure of the dielectric layer may be a structure composed of at least one of the first insulating layer 4, the pixel defining layer 6, and the planarizing layer.
  • the dielectric layer includes only the first insulating layer, and the first insulating layer material is a material having a high dielectric constant such as silicon nitride or silicon oxide.
  • the first plate 3 and the second plate 7 of the storage capacitor Cs may each be a transparent material, so that the transmittance of the pixel structure can be greatly improved.
  • the present embodiment is described by taking a pixel structure having a top gate type thin film transistor as an example, and similarly having a pixel structure of a bottom gate type thin film transistor.
  • the preparation method is similar to the above method except that the order of preparation of the gate electrode and the active layer is reversed, and will not be described in detail herein.
  • the anode 10 of the organic electroluminescent device D1 and the first plate 3 of the storage capacitor Cs are formed by the same patterning process, that is, the above step 8 is omitted, and in the fifth step.
  • the anode of the organic electroluminescent device D1 is formed while forming the first plate 3.
  • the method for preparing a pixel structure disclosed in the embodiment of the present invention is applicable to a top emission and bottom emission type organic electroluminescence device, and a reflective electrode is formed on the side of the organic electroluminescence device away from the light exiting side, and details are not described herein again.
  • an array substrate is further provided, and the array substrate includes the above pixel structure.
  • This embodiment provides a display device including the array substrate in Embodiment 1.
  • the display device can be any product or component having a display function, such as a mobile phone, a tablet computer, a television, a display, a notebook computer, a digital photo frame, a navigator, and the like.
  • the display device of the present embodiment includes the array substrate of Embodiment 1, the display effect is better.

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Abstract

一种像素结构及其制备方法、阵列基板及显示装置，属于显示技术领域，并能够提高阵列基板的出光率。该像素结构包括显示区Q2和透过区Q1，并且该像素结构还具有像素电路，所述像素电路包括有机电致发光器件D1和至少一个存储电容Cs，其中，有机电致发光器件D1位于显示区Q2中，所述至少一个存储电容Cs位于透过区Q1中，各存储电容Cs第一极板(3)和第二极板(7)的材料均为透明导电材料，且两者至少通过介电层电学绝缘隔开。

Description

像素结构及其制备方法、阵列基板、显示装置 技术领域
本发明属于显示技术领域，具体涉及像素结构及其制备方法、阵列基板、显示装置。
背景技术
随着显示技术的发展，人们对显示画质的要求日益增长，高画质、高分辨率的平板显示装置的需求越来越普遍，也越来越得到显示面板厂家的重视。
现有的用于进行透明显示的有机电致发光显示面板的像素结构包括显示区和透过区，并且该像素结构还包括像素电路，该像素电路包括薄膜晶体管、存储电容、以及有机电致发光器件，其中，所述薄膜晶体管、存储电容、以及有机电致发光器件均设于显示区。在显示面板的尺寸一定的情况下，显示区的面积越大则透过区的面积越小。此外，在现有的有机电致发光显示面板中，存储电容的第一极板和第二极板通常分别与薄膜晶体管的有源层和栅极采用同一次构图工艺以相同材料形成，也就是说存储电容所在的位置为非透光的。
在有机电致发光显示面板中，其像素电路结构较LCD更为复杂，通常需要多个薄膜晶体管和电容，这决要求显示区域的面积较大，以排布像素电路结构的电子元件，从而导致整个像素尺寸变大。因此，现有的用于进行透明显示的有机电致发光显示面板的分辨率较低，并且显示区的面积的增大会导致透过区的面积减小，使得显示面板的整体透过率低。
发明人发现由于现有技术中存储电容的第一极板和第二极板分别与有源层和栅极的材料相同，且同为不透光的材料，因此存储电容的第一极板和第二极板均不透光，从而影响显示面板的透过率，且存储电容位于显示区导致像素尺寸过大而无法实现高分辨率的透明显示。
发明内容
本发明针对现有的有机电致发光显示面板存在的上述的问题，提供了显示区较大的像素结构及其制备方法、具有该像素结构的阵列基板、以及具有该阵列基板的显示装置。
解决本发明技术问题所采用的技术方案是一种像素结构，其包括显示区和透过区，并且该像素结构还具有像素电路，所述像素电路包括有机电致发光器件和至少一个存储电容，其中，所述有机电致发光器件位于所述显示区中，其特征在于，所述像素电路中的所述至少一个存储电容位于所述透过区中，所述存储电容的第一极板和第二极板的材料均为透明导电材料，且两者至少通过介电层电学绝缘隔开。
本发明的像素结构的存储电容设置在透过区中，也就是存储电容的位置是可以透光的，故可以提高该像素结构的出光率。同时由于显示区面积减小，还可以进一步提高分辨率。
优选的是，所述存储电容的第一极板与所述有机电致发光器件的阳极同层设置，且材料相同。
优选的是，所述像素结构还包括与所述存储电容的第二极板电连接的连接电极，所述连接电极与所述有机电致发光器件的阳极同层设置，且材料相同。
优选的是，在所述有机电致发光器件的阳极所在层的下方、且至少在所述透过区中设置有第一绝缘层，所述存储电容的第一极板设置在所述第一绝缘层下方。
优选的是，在所述有机电致发光器件的阴极所在层的下方，至少有一层结构在所述显示区的部分和在所述透过区的部分之间存在段差。
进一步优选的是，所述存储电容的第二极板与所述有机电致发光器件的阴极同层分隔设置、且材料相同。
优选的是，所述像素结构还包括设置于有机电致发光器件的阳极下方的钝化层，所述钝化层在显示区的厚度大于其在所述透过区的厚度。
优选的是，所述介电层包括第一绝缘层、像素限定层和平坦化层中的至少一层。
解决本发明技术问题所采用的技术方案是一种像素结构的制备方法，所述像素结构包括显示区和透过区，所述像素结构还进一步包括像素电路，所述像素电路包括有机电致发光器件和至少一个存储电容，其特征在于，所述制备方法包括：
在所述显示区形成所述有机电致发光器件；以及
在所述透过区形成至少一个存储电容，
其中，所述存储电容的第一极板和第二极板均采用透明导电材料制作，且在两者之间通过介电层电学绝缘隔开。
优选的是，所述有机电致发光器件的阳极与所述存储电容的第一极板采用同一次构图工艺形成。
优选的是，在形成所述有机电致发光器件的阳极的同时还形成有连接电极的图形，所述连接电极用于连接至所述存储电容的第二极板。
优选的是，在形成所述存储电容的第一极板之前还包括以下步骤：
通过构图工艺形成钝化层的图形，其中，所述钝化层在显示区的厚度大于其在所述透过区的厚度。
优选的是，在形成所述存储电容的第一极板之后还顺次包括以下步骤：
通过构图工艺在所述显示区中形成包括像素限定层的图形，在所述透过区形成第一绝缘层，以及在所述第一绝缘层中形成过孔；
在所述显示区中形成包括有机电致发光器件的发光层的图形；
通过蒸镀工艺形成包括所述存储电容的第二极板和有机电致发光器件的阴极的图形，所述存储电容的第二极板通过所述过孔与所述连接电极连接，所述存储电容的第二极板与所述有机电致发光器件的阴极形成为相互分隔开。
优选的是，在形成所述存储电容的第一极板之后还顺次包括以下步骤：
形成第一绝缘层；
通过构图工艺形成包括所述连接电极和所述有机电致发光器件的阳极的图形；
通过构图工艺在所述显示区中形成包括像素限定层的图形，以及在所述透过区中的第一绝缘层中形成过孔；
在所述显示区中形成包括所述有机电致发光器件的发光层的图形；以及
通过蒸镀工艺形成包括所述存储电容的第二极板和所述有机电致发光器件的阴极的图形，所述存储电容的第二极板通过所述过孔与所述连接电极连接，所述存储电容的第二极板与所述有机电致发光器件的阴极形成为相互分隔开。
解决本发明技术问题所采用的技术方案是一种阵列基板，其包括上述像素结构。
解决本发明技术问题所采用的技术方案是一种显示装置，其包括上述阵列基板。
附图说明
图1为本发明的实施例1的像素结构的俯视图；
图2为图1所示的像素结构的沿A-A线取的剖视图；
图3为本发明的实施例1的阵列基板的一个像素结构的电路示意图。
其中附图标记为：1、基底；2、缓冲层；3、第一极板；4、第一绝缘层；5、连接电极；6、像素限定层；7、第二极板；M1、开关晶体管；M2、驱动晶体管；D1、有机电致发光器件；Cs、存储电容；Q1、透过区；Q2、显示区。
具体实施方式
为使本领域技术人员更好地理解本发明的技术方案，下面结合附图和具体实施方式对本发明作进一步详细描述。
实施例1：
本实施例提供了一种像素结构，其包括显示区和透过区，并且该像素结构还具有像素电路，所述像素电路包括有机电致发光器件和至少一个存储电容，其中，有机电致发光器件位于显示区中，所述至少一个存储电容位于透过区中，各存储电容的第一极板和第二极板的材料均为透明导电材料，且两者至少通过介电层电学绝缘隔开。
由于在本实施例的像素结构中，存储电容的材料为透明导电材料且该存储电容设置在透过区中，也就是说存储电容所在的位置可以有光透过，从而提高了像素结构的透过率，即本实施例的像素结构中的显示区的面积可相对减小，相应地，透过区的面积可以相对增大，也就说本实施例的像素结构具有较高的透过率，同时将该像素结构用于显示面板中，则显示面板具有较高的开口率。此外，本实施例的至少一个存储电容设置在透过区中，像素结构的显示区的尺寸可适当减小，从而像素结构的整体尺寸可以减小，因此，相比于现有技术中的显示面板，本发明中的显示面板有利于制作更多的像素结构，进而可以提高显示面板的分辨率。
作为本实施例的一种可选实施方式，第一极板与所述有机电致发光器件的阳极同层设置，且材料相同。因此，第一极板与所述有机电致发光器件的阳极可以通过同一个构图工艺形成，从而可以减少构图工艺，节约了成本。可选的，有机电致发光器件的阳极为由透明导电材料形成的薄膜，透明导电材料选自：ITO(氧化铟锡)、IZO(氧化铟锌)、IGZO(氧化铟镓锌)或InGaSnO(氧化铟镓锡)。
需要说明的，本实施例中所述的“同层设置”是指不同的结构采用同一次构图工艺形成，而非这些结构形成在视觉上的绝对同一平面上。
作为本实施例的另一种可选实施方式，在所述有机电致发光器件的阳极所在层的下方、且至少在透过区内设置有第一绝缘层，所述第一极板设置在所述第一绝缘层下方。也就是说有机电致发光器件的阳极也可以不与第一极板同层设置。此时可以将第一极板与有机电致发光器件的阳极分别单独制作，这只需要增加一次构图工艺即可实现。可选地，第一绝缘层的材料为氮化硅、氧化硅等介电常数较高的材料以增大其存储能力。
可选地，所述像素结构还包括与存储电容的第二极板电连接的连接电极。
由于像素结构通常包括晶体管，而晶体管要与驱动电源连接，因此在形成薄膜晶体管的各膜层的同时将会形成一些连接线，使得晶体管与驱动电源通过这些连接线进行连接，所以在本实施例中可以借助连接电极与连接线的连接，实现存储电容的第二极板与驱动电源的连接。
进一步可选地，连接电极与所述有机电致发光器件的阳极同层设置、且材料相同，这样可以减少构图工艺数量、节约成本。当然，将连接电极与有机电致发光器件的阳极分别单独制作也是可行的，但需要增加一次构图工艺。
可选地，有机电致发光器件的阴极下方至少有一层结构在显示区的部分和在透光区的部分之间存在段差。例如针对设置在有机电致发光器件的阴极所在层与阳极所在层之间的像素限定层，该像素限定层在显示区的厚度大于其在透过区的厚度(甚至可以在透过区不设置像素限定层)，此时像素限定层在显示区的部分和在透过区的部分之间具有段差。由于像素限定层在显示区的部分和在透过区的部分之间存在段差，并且由于所述阴极的厚度较小，因此在通过蒸镀工艺在像素限定层上形成有机电致发光器件的阴极材料膜层时，该阴极材料膜层将会在显示区和透过区之间断开，不能形成连续的结构，此时在显示区的阴极材料膜层将会形成为所述有机电致发光器件的阴极，而在透过区的阴极材料膜层将可以形成为存储电容的第二极板。也就是说，此时可以采用 同一次构图工艺形成有机电致发光器件的阴极和存储电容的第二极板的图形，因此可以降低显示面板的生产成本，同时提高生产效率。
由上述可知，进一步可选地，存储电容的第二极板与所述阴极同层设置且材料相同。当然将存储电容的第二极板与有机电致发光器件的阴极分别单独制作也是可行的，但需要增加一次构图工艺。
为了在一次蒸镀工艺中形成有机电致发光器件的阴极和存储电容的第二极板，可选地，像素结构还包括设置在有机电致发光器件的阴极下方的钝化层，所述钝化层在显示区的部分的厚度大于在所述透过区的部分的厚度。此时该钝化层在显示区的部分和透过区的部分之间将会形成段差。由于该段差的存在使得存储电容的第二极板与有机电致发光器件的阴极可以通过一次蒸镀工艺形成为彼此断开的结构，也就是说，存储电容的第二极板与有机电致发光器件的阴极同层设置且材料相同。从而可以减小构图工艺次数，节约成本。需要说明的是，该钝化层可以不具有设置在透过区的部分，这样可以使得有机电致发光器件的阴极要形成在其上的一层在显示区和透过区之间存在更大的段差，从而更好的在一次蒸镀工艺中形成阳极和第二极板。
本发明实施例所述的像素结构适用于顶发射和底发射两种类型的有机电致发光器件，同时还需在有机电致发光器件远离出光侧设置反射电极，在此不再赘述。
在本实施例中，所述介电层包括第一绝缘层、像素限定层和平坦化层中至少一层结构。具体请见下述方法。
相应的，本实施例提供了一种像素结构的制备方法，所述像素结构包括显示区和透过区，还进一步包括像素电路，所述像素电路包括有机电致发光器件和至少一个存储电容，具体地，所述制备方法包括：在显示区形成有机电致发光器件的步骤，以及在透过区形成所述至少一个存储电容步骤；其中，各存储电容的第一极板和第二极板均采用透明导电材料制作，且在两者之间至少 通过介电层电学绝缘隔开。
由于通过本实施例的制备方法制备的存储电容设置在透过区中，也就是说存储电容所在的位置可以有光透过，从而提高了像素结构的透过率，即本实施例的像素结构中的显示区的面积可相对减小，相应地，透过区的面积可以相对增大，也就说本实施例的像素结构具有较高的透过率，同时将该像素结构用于显示面板中，则显示面板具有较高的开口率。此外，本实施例的至少一个电容设置在透过区中，像素结构的显示区的尺寸可适当减小，从而像素结构的整体尺寸可以减小，因此，相比于有技术中的显示面板，本发明中的显示面板有利于制作更多的像素结构，进而可以提高显示面板的分辨率。
为了更清楚的展现本实施例的有益效果，故以2T1C的像素电路为例对本实施例进行了描述，当然，本实施例不限制像素电路的具体结构，即本发明不局限于2T1C的像素电路，而可以是6T2C、7T2C等像素电路，在此不一一列举。
结合图1至图3所示，本实施例提供了一种像素结构的制备方法，所述像素结构包括设于显示区Q2中的开关晶体管M1、驱动晶体管M2和有机电致发光器件D1，以及设于透过区Q1中的存储电容Cs，如图2所示，所述制备方法具体包括如下步骤：
步骤一、在基底1上采用等离子体增强化学气相沉积(Plasma Enhanced Chemical Vapor Deposition：简称PECVD)方式、低压化学气相沉积(Low Pressure Chemical Vapor Deposition：简称LPCVD)方式、大气压化学气相沉积(Atmospheric Pressure Chemical Vapor Deposition：简称APCVD)方式或电子回旋谐振化学气相沉积(Electron Cyclotron Resonance Chemical Vapor Deposition:简称ECR-CVD)方式形成缓冲层2。
其中，缓冲层2可以选择与Si的晶格结构相近的材料制作，以便于在缓冲层2的上方形成a-Si薄膜(即下一步骤中的非晶硅膜)。
步骤二、在完成上述步骤的基底1上，形成非晶硅膜，对非 晶硅膜进行晶化以形成多晶硅膜，并对多晶硅膜进行掺杂，以及采用同一次构图工艺形成包括开关晶体管M1、驱动晶体管M2的有源层的图形。
在该步骤中，首先，通过沉积方式在缓冲层2上形成非晶硅膜(a-Si)，沉积方式包括等离子体增强化学气相沉积方式、低压化学气相沉积方式。
接着，对非晶硅膜进行晶化，晶化方式包括采用准分子激光晶化方式、金属诱导晶化方式或固相晶化方式，将非晶硅膜转变为多晶硅膜(p-Si)，然后，对多晶硅膜(p-Si)进行掺杂(P型掺杂或者N型掺杂)，以决定薄膜晶体管TFT的沟道区导电类型。其中，准分子激光晶化方式、金属诱导晶化方式为两种低温多晶硅的方法，是较为常用的把非晶硅转变为多晶硅的方法。然而，本发明将非晶硅转变为多晶硅的方法，并不限制于采用低温多晶硅的方法，只要能够将开关晶体管M1、驱动晶体管M2的有源层转变为所需的多晶硅薄膜就可以。
最后，采用第一次构图工艺，形成包括开关晶体管M1、驱动晶体管M2的有源层的图形。即在多晶硅膜上形成一层光刻胶，对光刻胶进行曝光和显影，然后对多晶硅膜进行刻蚀，以形成包括开关晶体管M1、驱动晶体管M2的有源层的图形。
步骤三、在完成上述步骤的基底1上，依次形成栅绝缘层和栅极的图形。
在该步骤中，首先，采用等离子体增强化学气相沉积方式、低压化学气相沉积方式、大气压化学气相沉积方式或电子回旋谐振化学气相沉积方式或溅射方式形成栅绝缘层；接着，采用溅射方式、热蒸发方式、等离子体增强化学气相沉积方式、低压化学气相沉积方式、大气压化学气相沉积方式或电子回旋谐振化学气相沉积方式形成栅金属薄膜。最后，采用构图工艺，形成包括栅极的图形。
步骤四、在完成上述步骤的基底1上，形成包括开关晶体管M1的源极和漏极、驱动晶体管M2的源极和漏极的图形；
在该步骤中，首先，采用溅射方式、热蒸发方式、等离子体增强化学气相沉积(Plasma Enhanced Chemical Vapor Deposition：简称PECVD)方式、低压化学气相沉积(Low Pressure Chemical Vapor Deposition：简称LPCVD)方式、大气压化学气相沉积(Atmospheric Pressure Chemical Vapor Deposition：简称APCVD)方式或电子回旋谐振化学气相沉积(Electron Cyclotron Resonance Chemical Vapor Deposition:简称ECR-CVD)方式形成源漏金属薄膜，然后通过构图工艺形成包括开关晶体管M1的源极和漏极、驱动晶体管M2的源极和漏极的图形。
当然，可选地，在形成开关晶体管M1的源极和漏极、驱动晶体管M2的源极和漏极的图形的同时形成与开关晶体管M1的漏极连接的第一电极引出线，分别与驱动晶体管M2源极和漏极连接的第二电极引出线、第三电极引出线。
步骤四、在完成上述步骤的基底1上形成钝化层；
需要说明的是，在本实施例中，钝化层优选的仅仅位于显示区Q2中，当然该钝化层也可以是覆盖显示区Q2和透过区Q1的整层结构，并且钝化层在显示区Q2的厚度大于透过区Q1的厚度，在后续要形成用于连接有机电致发光器件的阳极与第三电极引出线的过孔，以及连接存储电容Cs的第一极板3与第一电极引出线的过孔。若仅将钝化层设置在显示区Q2中，则将会在显示区Q2和透过区Q1存在较大的段差，从而有利于下述步骤中形成有机电致发光器件的阴极和存储电容的第二极板7。
步骤五、在完成上述步骤的基底1上，采用溅射方式、热蒸发方式或等离子体增强化学气相沉积方式、低压化学气相沉积方式、大气压化学气相沉积方式或电子回旋谐振化学气相沉积方式沉积透明导电薄膜。其中，透明导电薄膜的材料优选为：ITO(氧化铟锡)、IZO(氧化铟锌)、IGZO(氧化铟镓锌)或InGaSnO(氧化铟镓锡)。然后通过构图工艺在透过区Q1中形成包括存储电容Cs的第一极板3的图形。
步骤六、在完成上述步骤的基底1上，采用离子体增强化学 气相沉积方式、低压化学气相沉积方式、大气压化学气相沉积方式或电子回旋谐振化学气相沉积方式形成第一绝缘层4，该第一绝缘层4作为介电层中的第一层结构，所述第一绝缘层4至少覆盖所述透过区Q1，用于使得后续形成的第二极板7与第一极板3之间绝缘。此时可选地，在所述第一绝缘层4的与连接电极5相对应的位置处形成过孔，可选地，第一绝缘层材料为氮化硅、氧化硅等介电常数较高的材料以增大其存储能力。
当然，为简化工艺，第一绝缘层单独制作的步骤也可省略，介电层可以采用后续形成的平坦层和像素限定层中的至少一层形成。
步骤七、在完成上述步骤的基底1上，采用离子体增强化学气相沉积方式、低压化学气相沉积方式、大气压化学气相沉积方式或电子回旋谐振化学气相沉积方式形成平坦化层的图形，所述平坦化层至少覆盖所述显示区Q2，当然最好平坦化层只覆盖显示区Q2，使得显示区Q2与透过区Q1形成更大段差。若在透过区Q1也设置有平坦化层，则该平坦化层则可作为介电层的第二层结构。
步骤八、在完成上述步骤的基底1上，在显示区Q2通过构图工艺形成包括有机电致发光器件的阳极的图形。
具体的，采用溅射方式、热蒸发方式或等离子体增强化学气相沉积方式、低压化学气相沉积方式、大气压化学气相沉积方式或电子回旋谐振化学气相沉积方式沉积导电金属薄膜，如ITO(氧化铟锡)、IZO(氧化铟锌)、IGZO(氧化铟镓锌)或InGaSnO(氧化铟镓锡)。当然，也可以采用具有导电性能及高功函数值的无机金属氧化物、有机导电聚合物或金属材料形成，无机金属氧化物包括氧化铟锡或氧化锌，有机导电聚合物包括PEDOT:SS、PANI，金属材料包括金、铜、银或铂。然后，通过对导电金属薄膜执行曝光、显影、刻蚀而形成包括有机电致发光器件的阳极的图形。
可选地，在显示区Q2中形成包括有机电致发光器件D1的阳 极10的图形的同时，还在显示区Q2中形成包括连接电极5的图形，所述连接电极5与所述第二电极引出线相连，进而使得第二电极引出线与存储电容Cs的第二极板7更好的电性接触。
步骤九、在完成上述步骤的基底1上，进一步制备像素限定层6(Pixel Define Layer，简称PDL)，接着蒸镀或者涂覆发光层(Emitting Layer：简称EL)。可选地，像素限定层6的材料在透过区Q1中不存在。然而，若在透过区Q1中存在像素限定层6，该像素限定层6则可作为介电层的第三层结构。
步骤十、在完成上述步骤的基底1上，通过一次蒸镀工艺形成包括有机电致发光器件D1的阴极和存储电容Cs的第二极板7图形。其中，存储电容Cs的第二极板7、有机电致发光器件D1的阴极是采用锂、镁、钙、锶、铝、铟中的至少一种材料形成的。此时所述存储电容Cs的第二极板7可通过形成在连接电极5上方的介电层中的过孔与连接电极5连接，或者直接与所述连接电极5连接，进而通过第二电极引出线与驱动电源连接。
在本实施例中，像素结构的透过区Q1中未形成钝化层，可选地，也可以未形成平坦化层和像素限定层6，因此，显示区Q2与透过区Q1之间存在较大的段差，从而使得显示区Q2中的有机电致发光器件D1的阴极与透过区Q1中的存储电容Cs的第二极板7是相断裂分开的图形。且从上述是实施例中可以得知，介电层的结构可以是由第一绝缘层4、像素限定层6和平坦化层中至少一层构成的结构，当然，在本发明实施例中，考虑到存储电容的容量大小，优选只包含第一绝缘层4、像素限定层6和平坦化层中的一层，这样形成的存储电容的容量较大。更为优选地，介电层只包括第一绝缘层，第一绝缘层材料为氮化硅、氧化硅等介电常数较高的材料。
在本实施例中，存储电容Cs的第一极板3与第二极板7均可以是透明材料，因此能够大大提高像素结构的透过率。
需要说明的是，本实施例是以具有顶栅型薄膜晶体管的像素结构为例进行说明的，同理具有底栅型薄膜晶体管的像素结构的 制备方法与上述方法相似，只不过是栅极与有源层的制备顺序相互颠倒即可，在此不再详细描述。
在上述步骤中，可选地，有机电致发光器件D1的阳极10与存储电容Cs的第一极板3采用同一次构图工艺形成，也就说省去上述的步骤八，而在步骤五中形成第一极板3的同时形成有机电致发光器件D1的阳极。
本发明的实施例公开的制备像素结构的方法适用于顶发射和底发射型有机电致发光器件，并且在有机电致发光器件远离出光侧形成有反射电极，在此不再赘述。
相应的，本实施例中还提供了一种阵列基板，该阵列基板包括上述像素结构。
实施例2：
本实施例提供一种显示装置，其包括实施例1中的阵列基板。该显示装置可以为：手机、平板电脑、电视机、显示器、笔记本电脑、数码相框、导航仪等任何具有显示功能的产品或部件。
由于本实施例的显示装置包括实施例1的阵列基板，故其显示效果更好。
当然，本实施例的显示装置中还可以包括其他常规结构，如显示驱动单元等。
可以理解的是，以上实施方式仅仅是为了说明本发明的原理而采用的示例性实施方式，然而本发明并不局限于此。对于本领域内的普通技术人员而言，在不脱离本发明的精神和实质的情况下，可以做出各种变型和改进，这些变型和改进也视为本发明的保护范围。

Claims (16)

  1. 一种像素结构，其包括显示区和透过区，并且该像素结构还具有像素电路，所述像素电路包括有机电致发光器件和至少一个存储电容，其中，所述有机电致发光器件位于所述显示区中，其特征在于，所述像素电路中的所述至少一个存储电容位于所述透过区中，所述存储电容的第一极板和第二极板的材料均为透明导电材料，且两者至少通过介电层电学绝缘隔开。
  2. 根据权利要求1所述的像素结构，其特征在于，所述存储电容的第一极板与所述有机电致发光器件的阳极同层设置，且材料相同。
  3. 根据权利要求1所述的像素结构，其特征在于，在所述有机电致发光器件的阳极所在层的下方、且至少在所述透过区中设置有第一绝缘层，所述存储电容的第一极板设置在所述第一绝缘层下方。
  4. 根据权利要求2或3所述的像素结构，其特征在于，所述像素结构还包括与所述存储电容的第二极板电连接的连接电极，所述连接电极与所述有机电致发光器件的阳极同层设置，且材料相同。
  5. 根据权利要求1至3中任意一项所述的像素结构，其特征在于，在所述有机电致发光器件的阴极所在层的下方，至少有一层结构在所述显示区的部分和在所述透过区的部分之间存在段差。
  6. 根据权利要求5所述的像素结构，其特征在于，所述存储电容的第二极板与所述有机电致发光器件的阴极同层分隔设置、 且材料相同。
  7. 根据权利要求1所述的像素结构，其特征在于，所述像素结构还包括设置于所述有机电致发光器件的阳极下方的钝化层，所述钝化层在显示区的厚度大于其在所述透过区的厚度。
  8. 根据权利要求1所述的像素结构，其特征在于，所述介电层包括第一绝缘层、像素限定层和平坦化层中的至少一层。
  9. 一种像素结构的制备方法，所述像素结构包括显示区和透过区，所述像素结构还进一步包括像素电路，所述像素电路包括有机电致发光器件和至少一个存储电容，其特征在于，所述制备方法包括：
    在所述显示区形成所述有机电致发光器件；以及
    在所述透过区形成至少一个存储电容，
    其中，所述存储电容的第一极板和第二极板均采用透明导电材料制作，且在两者之间通过介电层电学绝缘隔开。
  10. 根据权利要求9所述的像素结构的制备方法，其特征在于，所述有机电致发光器件的阳极与所述存储电容的第一极板采用同一次构图工艺形成。
  11. 根据权利要求10所述的像素结构的制备方法，其特征在于，在形成所述有机电致发光器件的阳极的同时还形成有连接电极的图形，所述连接电极用于连接至所述存储电容的第二极板。
  12. 根据权利要求10或11所述的像素结构的制备方法，其特征在于，在形成所述存储电容的第一极板之前还包括以下步骤：
    通过构图工艺形成钝化层的图形，其中，所述钝化层在显示区的厚度大于其在所述透过区的厚度。
  13. 根据权利要求12所述的像素结构的制备方法，其特征在于，在形成所述存储电容的第一极板之后还顺次包括以下步骤：
    通过构图工艺在所述显示区中形成包括像素限定层的图形，在所述透过区形成第一绝缘层，以及在所述第一绝缘层中形成过孔；
    在所述显示区中形成包括有机电致发光器件的发光层的图形；
    通过蒸镀工艺形成包括所述存储电容的第二极板和有机电致发光器件的阴极的图形，所述存储电容的第二极板通过所述过孔与所述连接电极连接，所述存储电容的第二极板与所述有机电致发光器件的阴极形成为相互分隔开。
  14. 根据权利要求9所述的像素结构的制备方法，其特征在于，在形成所述存储电容的第一极板之后还顺次包括以下步骤：
    形成第一绝缘层；
    通过构图工艺形成包括所述连接电极和所述有机电致发光器件的阳极的图形；
    通过构图工艺在所述显示区中形成包括像素限定层的图形，以及在所述透过区中的第一绝缘层中形成过孔；
    在所述显示区中形成包括所述有机电致发光器件的发光层的图形；以及
    通过蒸镀工艺形成包括所述存储电容的第二极板和所述有机电致发光器件的阴极的图形，所述存储电容的第二极板通过所述过孔与所述连接电极连接，所述存储电容的第二极板与所述有机电致发光器件的阴极形成为相互分隔开。
  15. 一种阵列基板，其特征在于，所述阵列基板包括权利要求1至8中任意一项所述的像素结构。
  16. 一种显示装置，其特征在于，所述显示装置权利要求15所述的阵列基板。
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