WO2016016970A1 - Semiconductor device, method for manufacturing semiconductor device, and power conversion device - Google Patents
Semiconductor device, method for manufacturing semiconductor device, and power conversion device Download PDFInfo
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- WO2016016970A1 WO2016016970A1 PCT/JP2014/070109 JP2014070109W WO2016016970A1 WO 2016016970 A1 WO2016016970 A1 WO 2016016970A1 JP 2014070109 W JP2014070109 W JP 2014070109W WO 2016016970 A1 WO2016016970 A1 WO 2016016970A1
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Definitions
- the present invention relates to a semiconductor device, a semiconductor device manufacturing method, and a power conversion device.
- a module for an electric railway generally has a configuration in which a silicon IGBT (Insulated Gate Bipolar Transistor) and a PN diode for circulation are combined.
- a silicon IGBT Insulated Gate Bipolar Transistor
- PN diode for circulation
- many currents are classified into classes of 600 A to 1800 A as current values and withstand voltages of 1.7 kV to 6.5 kV.
- circuit configurations in the module depending on the application, such as a 1 in 1 type that constitutes one arm of the inverter and a 2 in 1 type that incorporates two arms.
- the internal structure of these modules is, for example, a power module for electric railways that is typical for high withstand voltage and large current applications, and a plurality of IGBT chips connected in parallel to increase current capacity, Are mounted on one insulating substrate, and a plurality of the insulating substrates are mounted in a package.
- the IGBT and the freewheeling diode are connected using wire bonding and circuit wiring on the insulating substrate so that they are electrically connected in antiparallel.
- Each insulating substrate is mounted on a base plate that is connected to a heat sink later, and a main terminal and an auxiliary terminal are connected thereto.
- Each insulating substrate is sealed by a case having a structure covering the upper surface of the base plate, and a silicone gel is sealed in a space in the case.
- the amount of heat generated by the loss of the module itself that performs power conversion passively fluctuates in accordance with fluctuations in power supplied to a load such as a motor. Since the heat generation and cooling cycles generate stresses between the constituent materials having different thermal expansion coefficients, this leads to poor reliability due to cracks or peeling of the connecting portions.
- a portion that is likely to be broken by thermal expansion and contraction is a bonding portion between a semiconductor chip and a metal wire bonding.
- the joining portion is typically formed by joining an aluminum wire having a diameter of several hundreds of micrometers to an aluminum electrode film having a thickness of several micrometers on the chip surface by ultrasonic bonding. In addition to being in contact, the area of the joint is not large, so it tends to be a weak point.
- Patent Document 1 discloses a method for reinforcing the wire joint portion and improving the reliability with respect to a heat generation and cooling cycle (power cycle). According to this document, it is possible to enhance the power cycle reliability by reinforcing the joint by a method of coating the joint with resin using a liquid resin.
- the present invention has been made in view of the above-described circumstances, and provides a semiconductor device, a method of manufacturing a semiconductor device, and a power conversion device that can easily and reliably cover a wire bonding portion with a resin. With the goal.
- a semiconductor chip on which a surface electrode to which a wire is connected is formed, a first resin film that covers a joint between the wire and the surface electrode, and the surface electrode
- the thickness of the second resin film is made larger than that of the first resin film, the coating of the wire bonding portion with the resin can be easily realized with high reliability.
- FIG. 1 is an exploded perspective view of a power semiconductor module according to a first embodiment of the present invention. It is a top view of the insulated substrate 22 in 1st Embodiment. 4 is a cross-sectional view of a place where a PN diode chip 12 is mounted on an insulating substrate 22.
- FIG. 11 is a cross-sectional view in the manufacturing process of the chip 12.
- FIG. 12 is a cross-sectional view of another manufacturing process of the chip 12.
- FIG. 12 is a cross-sectional view of another manufacturing process of the chip 12.
- FIG. 12 is a cross-sectional view of another manufacturing process of the chip 12.
- FIG. 3 is a plan view of the chip 12.
- FIG. It is an expanded sectional view of the principal part of FIG.
- the module case 25 is formed in a substantially rectangular parallelepiped box shape, and four insulating substrates 22,..., 22 are fixed to the bottom plate by soldering.
- the electrode main terminals 21 and 21 are soldered to the insulating substrates 22.
- the inside of the case 25 is filled with silicone gel, and the upper surface of the case 25 is covered with a cover 26 having a substantially rectangular plate shape.
- Each of the electrode main terminals 21 and 21 is formed with two (total four) plate-like heads 21a,..., 21a, and the cover 26 is opposed to the heads 21a,.
- Slits 26a,... 26a are formed at the locations. Thereby, when the cover 26 covers the upper surface of the case 25, the heads 21a, ..., 21a are exposed from the slits 26a, ... 26a.
- a substantially rectangular common emitter (source) circuit pattern 27 is formed at the center of the insulating substrate 22.
- a main terminal contact 28 soldered to the electrode main terminal 21 is fixed to the central portion of the insulating substrate 22 in order to connect the circuit pattern 27 and the electrode main terminal 21 (see FIG. 1).
- four silicon IGBT chips 11,..., 11 and four silicon PN diode chips 12,..., 12 are soldered onto an insulating substrate 22 so as to sandwich the circuit pattern 27 from the left and right. ing.
- These IGBT chip and PN diode chip are connected to the circuit pattern 27 by a plurality of wires 13,.
- the wires 13,..., 13 are aluminum wires having a diameter of 400 ⁇ m, and some of them are not shown.
- connection portion 57 A wire reinforcing resin 40 (first resin film) is coated around the joint portion 57.
- the film thickness of the wire reinforcing resin 40 is about 10 ⁇ m at the flat portion, but about several tens ⁇ m to 100 ⁇ m is sucked up by the wire 13 around the joint portion 57 due to the surface tension at the time of application. Thereby, the wire reinforcing resin 40 covers the joint portion 57 in a shape that can locally reinforce.
- a diffusion preventing resin 34 (second resin film) for preventing unnecessary diffusion at the time of applying the wire reinforcing resin 40 is applied to the periphery of the upper surface of the chip 12 in a bank shape.
- the film thickness of the diffusion preventing resin 34 is about 50 ⁇ m to 500 ⁇ m at the thickest portion, and is sufficiently high to prevent flow when the wire reinforcing resin 40 is applied.
- the space above the chip 12 and the wire 13 in the package is filled with a silicone gel 36 as a sealing material.
- a polyamideimide resin is used as the wire reinforcing resin 40.
- the polyamide-imide resin is excellent in heat resistance, adhesion, and coating film hardness, and has characteristics suitable as a resin that reinforces the joint portion 57 through a heat treatment step such as soldering.
- the dielectric breakdown electric field strength is typically as good as about 150 kV / mm, which is suitable for high-voltage power semiconductor module applications.
- a high-purity product having an impurity content such as metal ions of 1 ppm or less is used.
- the amount of the wire reinforcing resin 40 applied is such that the flat portion has a film thickness of 10 ⁇ m or less. Since the wire reinforcing resin 40 is a liquid having a low viscosity of 1 Pa ⁇ s at the time of application, when it is dropped on the chip, the resin is thickly coated by the surface tension in the vicinity of the joint portion 57, and the flat portion can be realized in a thin state.
- the diffusion preventing resin 34 is preferably at least several times thicker than the wire reinforcing resin 40 for that purpose, and thus a thick resin is formed by applying a paste-like and high-viscosity resin to the periphery of the upper surface of the chip with a dispenser. It is formed.
- the viscosity of the diffusion preventing resin 34 is desirably 10 Pa ⁇ s or more.
- a polyamide-imide resin whose viscosity at the time of application is adjusted to 30 Pa ⁇ s was used.
- a high-purity product having a content of impurities such as metal ions of 1 ppm or less is used for semiconductors.
- the film thickness of the anti-diffusion resin 34 is about 50 ⁇ m in a state of being shrink-hardened by heat treatment after coating, and the coating width t 1 is 1 mm.
- FIG. 4 is a cross-sectional view of the PN diode chip 12 mounted on the insulating substrate 22. As described above, the high-temperature lead solder 35 is used for bonding the chip 12 to the insulating substrate 22.
- the diffusion preventing resin 34 is applied to the periphery of the upper surface of the chip 12 using a dispenser. That is, as shown in FIG. 5, the nozzle 42 of the dispenser is positioned above the peripheral edge of the upper surface of the chip 12, and the diffusion preventing resin 34 is discharged while the nozzle 42 is scanned.
- the line width and film thickness of the application region of the diffusion preventing resin 34 can be controlled by adjusting the gap length between the nozzle 42 and the chip 12, the nozzle diameter, the nozzle scanning speed, the resin discharge pressure, and the temperature.
- the film thickness of the diffusion preventing resin 34 immediately after coating is about 500 ⁇ m at the maximum.
- the diffusion preventing resin 34 is cured to some extent. This is called “temporary curing” in the present embodiment.
- a heat treatment of “100 ° C., 30 minutes” and subsequently “150 ° C., 1 hour” is performed, whereby the diffusion preventing resin 34 is cured to a degree sufficient to withstand the subsequent steps.
- the resin of the same system is selected as the diffusion preventing resin 34 and the wire reinforcing resin 40, common components are contained in both solvents. Accordingly, if the wire reinforcing resin 40 is applied without temporarily curing the diffusion preventing resin 34, the diffusion preventing resin 34 may be largely eluted at that time. In the present embodiment, since the diffusion preventing resin 34 is temporarily cured before the wire reinforcing resin 40 is applied, such a situation can be prevented in advance.
- FIG. 6 shows a state where the wire bonding is performed.
- the wire 13 is bonded to the aluminum electrode 31 by an ultrasonic bonding technique.
- the application area of the dispenser and the spread of the resin after application are controlled so that the resin does not enter the area where the joint 57 in FIG. 6 is formed. ing.
- the diffusion preventing resin 34 is applied in a paste state having a high viscosity of about 30 Pa ⁇ s, unnecessary resin spreading can be suppressed.
- the wire reinforcing resin 40 is applied.
- the state is shown in FIG.
- the wire reinforcing resin 40 is also applied by a dispenser.
- the viscosity of the wire reinforcing resin 40 at the time of application is as low as about 1 Pa ⁇ s, that is, it has good fluidity.
- the wire reinforcing resin 40 expands by itself and exists around the dropping part.
- the plurality of wire bonding joints 57 are distributed.
- the thick portion 58 is formed by the wire reinforcing resin 40 being sucked up by the surface tension.
- the film thickness of the wire reinforcing resin 40 is larger than that in other regions, thereby increasing the effect of reinforcing the joint portion 57.
- the wire reinforcing resin 40 extends over the entire region surrounded by the diffusion preventing resin 34, the inner surface of the diffusion preventing resin 34 is in contact with the wire reinforcing resin 40 over the entire circumference. And in the contact location of the spreading
- FIG. 8 shows a plan view of the chip 12 in a state where the two wires 13 and 13 are bonded and the main curing is completed.
- the peripheral edge of the chip 12 is a place where high voltage is applied during blocking.
- the withstand voltage reliability decreases.
- the relative dielectric constant of the diffusion preventing resin 34 is “the relative dielectric constant of the underlayer SiO 2 film 65 ⁇ the protective film (polyimide film 66) and the relative dielectric constant of the diffusion preventing resin 34 ⁇ the upper layer silicone. It is desirable to satisfy the relationship of “relative dielectric constant of gel 36”. By reducing the relative dielectric constant difference between each other, the influence of charge accumulation is suppressed.
- the specific dielectric constant of each component is about 3.8 to 4.1 for the underlying inorganic material layer SiO 2 film 65, about 2.9 for the protective polyimide film 66, and prevents diffusion.
- the polyamideimide as the main component of the resin 34 is approximately 3.3, and the relative dielectric constant of the silicone gel 36 serving as the upper sealing material is approximately 2.7.
- the diffusion preventing resin 34 is applied and temporarily cured before the wire reinforcing resin 40 is applied, the diffusion of the wire reinforcing resin 40 outside the chip is prevented, and the wire reinforcing resin is prevented.
- a coating amount of 40 can be stabilized.
- power cycle reliability can be stabilized by ensuring the worst coating amount of the wire reinforcing resin 40 to a certain value or more.
- the wire reinforcing resin 40 can be prevented from leaching out to the connection portions of various terminals and the back surface of the insulating substrate 22, the effect of improving the yield of the assembly process and improving the reliability can be obtained.
- the effect of facilitating the automation of the assembly process can be obtained by arranging the diffusion preventing resin 34. Since the low-viscosity wire reinforcing resin 40 spreads over a wide range in the region surrounded by the diffusion preventing resin 34 on the chip, the accuracy of the dropping position is not limited and the robustness is increased. Can be applied.
- the module of the second embodiment has a breakdown voltage of 3.3 kV and a current capacity of 1200 A, a silicon IGBT as a switching element group, and an SBD (Schottky Barrier Diode), hereinafter referred to as SiC- SBD) is a SiC hybrid power semiconductor module.
- SiC- SBD Schottky Barrier Diode
- an insulating substrate 23 shown in FIG. 10 is used instead of the insulating substrate 22 in the first embodiment. 10, four IGBT chips 11,..., 11 and 10 SiC-SBD chips 14,.
- FIG. 11 shows a cross section of the insulating substrate 23 at a place where one SiC-SBD chip 14 is mounted.
- the wire 13 is connected to the upper surface of the SiC-SBD chip 14 by bonding to form the joint portion 57, and then the wire reinforcing resin 40 is applied.
- the SiC-SBD chip 14 has the Schottky electrode 71 formed on the chip surface, the wire 13 is connected to the Schottky electrode 71.
- SiC has the characteristics of lower loss than silicon in principle, the manufacturing technology is immature compared to silicon, and this is because a small chip is selected in consideration of device yield.
- the PN diode chip 12 in the first embodiment described above is about 13 mm ⁇ 8 mm, whereas the SiC-SBD chip 14 is configured to be about 6 mm ⁇ 6 mm, for example.
- the area of the Schottky electrode 71 in FIG. 11 becomes an area where wire bonding can be effectively performed, and the wire reinforcing resin 40 diffuses out of the chip by spreading after the wire reinforcing resin 40 is dropped. Cases occur with a probability that cannot be ignored.
- the viscosity of the wire reinforcing resin 40 at the time of application is increased, the spread after dripping can be suppressed, but the viscosity is adjusted so as to be a coat film thickness (less than a fraction of the diameter of the wire 13) suitable for wire reinforcement. Therefore, it cannot be set freely. For this reason, the effect of the anti-diffusion resin is particularly great for small-diameter chips.
- SiC wide band gap semiconductors represented by SiC. Since SiC has a higher breakdown field strength than silicon, it can be designed to increase the electric field strength inside the chip, and the termination area (electric field relaxation area) 72 at the periphery of the upper surface of the chip can be reduced, resulting in an expensive chip area cost. Can be reduced. At this time, since the electric field strength applied to the sealing material of the package in contact with SiC also increases, the SiC sealing material is required to have a high dielectric breakdown electric field strength.
- the diffusion preventing resin 34 is applied just above the termination region 32 of the silicon PN diode chip 12.
- the diffusion preventing resin 34 is not provided.
- the dielectric breakdown of the silicone gel 36 does not occur.
- silicon carbide (SiC) is used for the chip and the chip is downsized, the electric field strength often exceeds the electric field resistance (dielectric breakdown field strength) of the silicone gel 36.
- the diffusion preventing resin 74 having a high dielectric breakdown electric field strength by using the diffusion preventing resin 74 having a high dielectric breakdown electric field strength, the electric field strength in the silicone gel 36 can be suppressed within the range of electric field resistance. Thereby, the reliability of the power semiconductor module using SiC can be improved.
- the diffusion preventing resin 74 having a high dielectric breakdown electric field strength the polyamideimide resin used in the first embodiment is also suitable, but a polyetheramide resin and a polyimide resin are more preferable.
- the diffusion preventing resin 74 a polyether amide resin having a high viscosity using a filler is used. This is because the viscosity is 100 Pa ⁇ s, a level suitable for thick film coating, and the electric field strength of the dielectric breakdown is high, so that a high-purity material for a semiconductor can be obtained.
- the coating thickness of the diffusion preventing resin 74 is 100 ⁇ m at the maximum in the cured state after the heat treatment, which is sufficient for relaxing the high electric field from SiC.
- the diffusion preventing resin 74 of this embodiment uses a polyetheramide resin, it has a high breakdown field strength of about 230 kV / mm.
- the polyamide resin is used for the wire reinforcing resin 40 as in the first embodiment, the dielectric breakdown electric field strength is about 150 kV / mm. Although this value is slightly lower than that of the diffusion preventing resin 74, it is considerably higher than the dielectric breakdown electric field strength of the silicone gel 36 of 14 kV / mm.
- the silicon gel 36 will not break down.
- the electric field increases and the risk of dielectric breakdown increases.
- the wire reinforcing resin 40 is in close contact with the diffusion preventing resin 74 without a gap, even if a failure occurs in the diffusion preventing resin 74, the wire reinforcing resin 40 is applied to the electric field of the diffusion preventing resin 74.
- the suppression function can be supplemented. That is, the effect of suppressing the electric field applied to the silicone gel 36 and reducing the possibility of dielectric breakdown can be exhibited.
- the present invention is not limited to the first and second embodiments described above, and various modifications are possible as follows, for example.
- the example in which the present invention is applied to the power semiconductor module has been described.
- the present invention is not limited to the power semiconductor module and can be applied to various power conversion devices.
- a configuration in which a cycloconverter and a matrix converter are configured by including an inverter and a converter in one package is also included in the scope of the present invention.
- the wide band gap semiconductor is not limited to SiC, and for example, gallium nitride or diamond is used. May be.
- Electrode main terminals 22 and 23 Insulating substrate 27 Common emitter (source) circuit pattern (circuit pattern) 28 Main terminal contact 31 Aluminum electrode (surface electrode) 32 Termination region 34 Anti-diffusion resin (second resin film) 35 High-temperature lead solder 36 Silicone gel (gel sealant) 37 Circuit wiring metal 40 Wire reinforcing resin (first resin film) 57 Bonding part 58 Thick part 65 SiO 2 film (silicon dioxide layer) 66 Polyimide film 71 Schottky electrode 72 Termination region 74 Diffusion prevention resin (second resin film)
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Abstract
Description
パワー半導体モジュールは、用途に応じて各種のパワー半導体セルを単独ないしは組み合わせてパッケージ化したものである。例えば電気鉄道用のモジュールでは、シリコンのIGBT(絶縁ゲートバイポーラトランジスタ、Insulated Gate Bipolar Transistor)と、環流用のPNダイオードを組み合わせた構成が一般的である。実際の製品では、例えば電流値として600A~1800A、耐圧は1.7kV~6.5kVのクラスに分類されるものが多い。モジュール内部の回路構成も、インバータ1相の1アームを構成する1in1型から、2アーム分を内蔵する2in1型など、用途に応じて組み合わせに種類がある。 Among power conversion devices represented by inverters, power semiconductors are used as main components having a rectifying function and a switching function. In recent years, silicon carbide (SiC), which has excellent material properties, is being introduced in addition to the mainstream silicon as a power semiconductor material.
The power semiconductor module is obtained by packaging various power semiconductor cells singly or in combination according to the application. For example, a module for an electric railway generally has a configuration in which a silicon IGBT (Insulated Gate Bipolar Transistor) and a PN diode for circulation are combined. In actual products, for example, many currents are classified into classes of 600 A to 1800 A as current values and withstand voltages of 1.7 kV to 6.5 kV. There are also various types of circuit configurations in the module depending on the application, such as a 1 in 1 type that constitutes one arm of the inverter and a 2 in 1 type that incorporates two arms.
この発明は上述した事情に鑑みてなされたものであり、樹脂によるワイヤ接合部の被覆を、高い信頼性で、かつ容易に実現できる半導体装置、半導体装置の製造方法および電力変換装置を提供することを目的とする。 However, according to the above-described technique, there is a problem that the resin that is desired to be dropped only in the vicinity of the wire connection portion spreads on the upper surface of the chip and sometimes overflows from the periphery of the chip, resulting in poor connection and poor reliability.
The present invention has been made in view of the above-described circumstances, and provides a semiconductor device, a method of manufacturing a semiconductor device, and a power conversion device that can easily and reliably cover a wire bonding portion with a resin. With the goal.
〈第1実施形態の構成〉
次に、本発明の第1実施形態のパワー半導体モジュールの構成を図1を参照し説明する。なお、本モジュールは、耐圧3.3kVで電流容量1200Aの、スイッチング素子群としてのIGBTと、ダイオード素子群としてのPNダイオードとが搭載されたものである。 [First embodiment]
<Configuration of First Embodiment>
Next, the configuration of the power semiconductor module according to the first embodiment of the present invention will be described with reference to FIG. This module is mounted with an IGBT as a switching element group and a PN diode as a diode element group having a breakdown voltage of 3.3 kV and a current capacity of 1200 A.
PNダイオードチップ12は、高温鉛ハンダ35により絶縁基板22上の回路配線金属37に接合されている。PNダイオードチップ12の上面にはアルミ電極31が形成されており、ここにワイヤ13が超音波ボンディング技術により接合されている。この接合部分を「接合部57」と呼ぶ。接合部57の周辺にはワイヤ補強樹脂40(第1の樹脂膜)がコートされている。ワイヤ補強樹脂40の膜厚は平坦部で10μmほどであるが、接合部57の周辺では塗布時の表面張力により数十μm~百μm程度がワイヤ13に吸い上げられている。これにより、ワイヤ補強樹脂40は、接合部57を局所的に補強できる形状で被覆している。 Next, details of a connection portion between one
The
(チップの搭載)
次に、上述した構造を実現するための製造工程について説明する。図4はPNダイオードチップ12を絶縁基板22に搭載した状態の断面図である。上述のように、チップ12の絶縁基板22への接合には、高温鉛ハンダ35が用いられている。 <Manufacturing process of the first embodiment>
(Chip mounting)
Next, a manufacturing process for realizing the above-described structure will be described. FIG. 4 is a cross-sectional view of the
次に、ディスペンサを用いて、チップ12の上面周縁部に拡散防止樹脂34が塗布される。すなわち、図5に示すようにディスペンサのノズル42をチップ12の上面周縁部の上方に位置させ、ノズル42を走査させつつ拡散防止樹脂34を吐出させる。拡散防止樹脂34の塗布領域の線幅や膜厚は、ノズル42とチップ12とのギャップ長、ノズル径、ノズルの走査速度、樹脂の吐出圧や温度を調整することで制御できる。塗布直後の拡散防止樹脂34の膜厚は最大で500μm程度である。 (Application of anti-diffusion resin 34)
Next, the
次に、拡散防止樹脂34をある程度硬化させる。そのことを、本実施形態においては「仮硬化」と呼ぶ。最初に「100℃,30分」、引き続いて「150℃,1時間」の熱処理が実施され、これによって拡散防止樹脂34は後続する工程に充分に耐えられる程度に硬化される。本実施形態においては、拡散防止樹脂34およびワイヤ補強樹脂40として同系統の樹脂を選択したため、両者の溶剤にも共通成分が含まれる。従って、仮に、拡散防止樹脂34を仮硬化させることなくワイヤ補強樹脂40を塗布すると、その際に拡散防止樹脂34が大きく溶出する可能性がある。本実施形態においては、ワイヤ補強樹脂40を塗布する前に拡散防止樹脂34を仮硬化させたため、そのような事態を未然に防止できる。 (Temporary curing of diffusion preventing resin 34)
Next, the
拡散防止樹脂34の仮硬化が完了すると、ワイヤ13がチップ12の上面のアルミ電極31にボンディングされる。このワイヤボンディングを実施した状態を図6に示す。ワイヤ13は超音波ボンディング技術によりアルミ電極31に接合されるが、接合部57に樹脂が付着していると接合不良が起こる。このため、上述した「拡散防止樹脂34の塗布」の工程では図6の接合部57が形成される領域には樹脂が侵入しないように、ディスペンサーの塗布領域と、塗布後の樹脂拡がりが制御されている。本実施形態においては、拡散防止樹脂34は30Pa・s程度の高粘度なペースト状態で塗布されるから、不要な樹脂拡がりは抑制できる。 (Wire bonding)
When the temporary curing of the
ワイヤボンディングが完了すると、ワイヤ補強樹脂40が塗布される。その状態を図7に示す。ワイヤ補強樹脂40も、拡散防止樹脂34と同様にディスペンサによって塗布される。但し、塗布時のワイヤ補強樹脂40の粘度は1Pa・s程度と低く、すなわち流動性がよく、これをチップ12の上面中央付近に滴下すると、ワイヤ補強樹脂40は自ら拡がり、滴下部周囲に存在する複数のワイヤボンディングの接合部57に行き渡る。また、接合部57の周辺においてワイヤ13がアルミ電極31から立ち上がる箇所においては、ワイヤ補強樹脂40が表面張力で吸い上げられることにより、肉厚部58が形成される。肉厚部58では、他の領域と比較してワイヤ補強樹脂40の膜厚が大きくなっており、これによって接合部57を補強する効果が増している。 (Application of wire reinforcing resin 40)
When the wire bonding is completed, the
ワイヤ補強樹脂40の塗布が完了すると、拡散防止樹脂34とワイヤ補強樹脂40に対する本硬化が行われる。すなわち、最初に「100℃,30分」、引き続いて「200℃,1時間」の熱処理が実施され、これによって拡散防止樹脂34とワイヤ補強樹脂40が本硬化される。2本のワイヤ13,13をボンディングし、本硬化後が終了した状態のチップ12の平面図を図8に示す。 (Full cure)
When the application of the
ワイヤ補強樹脂40のコート厚さを所望の値以下に制御するためには、粘性の低い液体状の樹脂を用いることが望ましい。仮に、拡散防止樹脂34を設けなかったとすると、ワイヤ13の接合部57近傍のみに滴下したい樹脂がチップ上面に拡がり、場合によってはチップ周辺から溢れ出るなどの問題が生じ得る。チップ外へ漏れ出たワイヤ補強樹脂40が絶縁基板22上の端子接続領域にかかると、各種端子(主端子や補助端子など)のハンダ接合やメタルボンディング接合に影響を与えるため、接続不良や信頼性不良につながるため、このような事態は避けることが望ましい。また、基板周辺へ溢れ出た樹脂が絶縁基板22の裏面にかかると絶縁基板22のベースプレートへの接合に影響を与えるため、このような事態も避けることが望ましい。一方、樹脂形成工程は自動化されており、チップ上にディスペンサー等でワイヤ補強樹脂40が自動滴下されるため、接合部のみを狙って樹脂を局所微量滴下するような制御は難しく、簡易な方法で樹脂形成を行う技術が求められていた。 <Effects of First Embodiment>
In order to control the coat thickness of the
〈第2実施形態の構成〉
次に、本発明の第2実施形態のパワー半導体モジュールの構成を説明する。なお、第2実施形態において、第1実施形態の各部に対応する部分には同一の符号を付し、その説明を省略する。
第2実施形態のモジュールは、耐圧3.3kVで電流容量1200Aの、スイッチング素子群としてのシリコンのIGBTと、ダイオード素子群としてのSiC(シリコンカーバイド)を用いたSBD(Schottky Barrier Diode、以下SiC-SBD)とを搭載して成るSiCハイブリッドパワー半導体モジュールである。 [Second Embodiment]
<Configuration of Second Embodiment>
Next, the configuration of the power semiconductor module according to the second embodiment of the present invention will be described. In the second embodiment, the same reference numerals are given to the portions corresponding to the respective parts of the first embodiment, and the description thereof is omitted.
The module of the second embodiment has a breakdown voltage of 3.3 kV and a current capacity of 1200 A, a silicon IGBT as a switching element group, and an SBD (Schottky Barrier Diode), hereinafter referred to as SiC- SBD) is a SiC hybrid power semiconductor module.
上述のように、本実施形態の拡散防止樹脂74は、ポリエーテルアミド系樹脂を用いたため、230kV/mm程度という高い絶縁破壊電界強度を有している。一方、ワイヤ補強樹脂40は第1実施形態と同様にポリアミドイミド系樹脂を用いたため、絶縁破壊電界強度は150kV/mm程度になる。この値は、拡散防止樹脂74よりは若干下がるものの、シリコーンゲル36の絶縁破壊電界強度14kV/mmと比較すると、相当に高い値である。 <Effects of Second Embodiment>
As described above, since the
本発明は上述した第1,第2実施形態に限定されるものではなく、例えば以下のように種々の変形が可能である。
・第1,第2実施形態においては、本発明をパワー半導体モジュールに適用した例を説明したが、本発明はパワー半導体モジュールに限られず、種々の電力変換装置に適用することができる。例えば、一つのパッケージの中にインバータ、コンバータなどを含めてサイクロコンバータ、マトリックスコンバータを構成したものなども本発明の範疇に含まれる。 [Modification]
The present invention is not limited to the first and second embodiments described above, and various modifications are possible as follows, for example.
In the first and second embodiments, the example in which the present invention is applied to the power semiconductor module has been described. However, the present invention is not limited to the power semiconductor module and can be applied to various power conversion devices. For example, a configuration in which a cycloconverter and a matrix converter are configured by including an inverter and a converter in one package is also included in the scope of the present invention.
12,…,12 PNダイオードチップ(半導体チップ)
13,…,13 ワイヤ
14,…,14 SiC-SBDチップ(半導体チップ)
21 電極主端子
22,23 絶縁基板
27 共通エミッタ(ソース)回路パターン(回路パターン)
28 主端子コンタクト
31 アルミ電極(表面電極)
32 ターミネーション領域
34 拡散防止樹脂(第2の樹脂膜)
35 高温鉛ハンダ
36 シリコーンゲル(ゲル状封止材)
37 回路配線金属
40 ワイヤ補強樹脂(第1の樹脂膜)
57 接合部
58 肉厚部
65 SiO2膜(二酸化ケイ素層)
66 ポリイミド膜
71 ショットキー電極
72 ターミネーション領域
74 拡散防止樹脂(第2の樹脂膜) 11, ..., 11 IGBT chip (semiconductor chip)
12, ..., 12 PN diode chip (semiconductor chip)
13, ..., 13
21 Electrode
28
32
35 High-
37
57
66
Claims (9)
- ワイヤが接続される表面電極を形成した半導体チップと、
前記ワイヤと前記表面電極との接合部を被覆する第1の樹脂膜と、
前記表面電極の形成面の周縁部を被覆し、前記第1の樹脂膜に接するとともに前記第1の樹脂膜よりも膜厚の厚い第2の樹脂膜と、
前記半導体チップ、前記第1の樹脂膜および前記第2の樹脂膜を覆うゲル状封止材と、
を有することを特徴とする半導体装置。 A semiconductor chip on which surface electrodes to which wires are connected are formed;
A first resin film covering a joint between the wire and the surface electrode;
A second resin film that covers a peripheral portion of the surface electrode formation surface, is in contact with the first resin film, and is thicker than the first resin film;
A gel-like sealing material covering the semiconductor chip, the first resin film, and the second resin film;
A semiconductor device comprising: - 前記半導体チップは、前記表面電極の形成面の周縁部に二酸化ケイ素層を形成して成るものであり、
前記第2の樹脂膜の誘電率は、前記二酸化ケイ素層の誘電率以下であり、かつ、前記ゲル状封止材の誘電率以上である
ことを特徴とする請求項1に記載の半導体装置。 The semiconductor chip is formed by forming a silicon dioxide layer on the periphery of the surface electrode formation surface,
2. The semiconductor device according to claim 1, wherein a dielectric constant of the second resin film is equal to or lower than a dielectric constant of the silicon dioxide layer and equal to or higher than a dielectric constant of the gel sealing material. - 前記第1の樹脂膜は、少なくともポリアミドイミド樹脂を含むことを特徴とする請求項1に記載の半導体装置。 2. The semiconductor device according to claim 1, wherein the first resin film includes at least a polyamideimide resin.
- 前記第2の樹脂膜は、少なくともポリエーテルアミド樹脂を含むことを特徴とする請求項1または2に記載の半導体装置。 3. The semiconductor device according to claim 1, wherein the second resin film includes at least a polyetheramide resin.
- 前記第2の樹脂膜は、少なくともポリイミド系樹脂を含むことを特徴とする請求項1または2に記載の半導体装置。 3. The semiconductor device according to claim 1, wherein the second resin film includes at least a polyimide resin.
- 前記半導体チップは、ワイドバンドギャップ半導体から成ることを特徴とする請求項1または2に記載の半導体装置。 3. The semiconductor device according to claim 1, wherein the semiconductor chip is made of a wide band gap semiconductor.
- 前記半導体チップは、シリコンカーバイドから成ることを特徴とする請求項1または2に記載の半導体装置。 3. The semiconductor device according to claim 1, wherein the semiconductor chip is made of silicon carbide.
- ワイヤが接続される表面電極を形成した半導体チップに対して、前記表面電極の形成面の周縁部を被覆する第2の樹脂膜を形成する過程と、
前記ワイヤを前記表面電極に接続する過程と、
前記ワイヤと前記表面電極との接合部を被覆するとともに、前記第2の樹脂膜よりも膜厚の薄い第1の樹脂膜を形成する過程と
を有することを特徴とする半導体装置の製造方法。 Forming a second resin film covering a peripheral portion of the surface electrode forming surface on the semiconductor chip on which the surface electrode to which the wire is connected is formed;
Connecting the wire to the surface electrode;
And a step of forming a first resin film having a thickness smaller than that of the second resin film while covering a joint portion between the wire and the surface electrode. - 少なくとも一の半導体装置を有する電力変換装置であって、
前記半導体装置は、
ワイヤが接続される表面電極を形成した半導体チップと、
前記ワイヤと前記表面電極との接合部を被覆する第1の樹脂膜と、
前記表面電極の形成面の周縁部を被覆し、前記第1の樹脂膜に接するとともに前記第1の樹脂膜よりも膜厚の厚い第2の樹脂膜と、
前記半導体チップ、前記第1の樹脂膜および前記第2の樹脂膜を覆うゲル状封止材と、
を有することを特徴とする電力変換装置。 A power conversion device having at least one semiconductor device,
The semiconductor device includes:
A semiconductor chip on which surface electrodes to which wires are connected are formed;
A first resin film covering a joint between the wire and the surface electrode;
A second resin film that covers a peripheral portion of the surface electrode formation surface, is in contact with the first resin film, and is thicker than the first resin film;
A gel-like sealing material covering the semiconductor chip, the first resin film, and the second resin film;
The power converter characterized by having.
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