JP7496724B2 - Semiconductor Device - Google Patents

Description

The present invention relates to a semiconductor device.

A semiconductor device (semiconductor module) is generally configured by bonding an insulating substrate with a wiring pattern formed on a heat dissipation base with solder or the like, and then mounting a power semiconductor chip on the wiring pattern of the insulating substrate with solder or the like. The power semiconductor chip is equipped with a metal-oxide-semiconductor field-effect transistor (MOSFET) or an insulated gate bipolar transistor (IGBT) as a switching element. A semiconductor device equipped with a power semiconductor chip with such a switching function is used as a component of a power conversion device. A power conversion device performs the function of converting DC power supplied from a DC power source into AC power for supplying to an inductive load such as a motor, and the function of converting AC power generated by a motor into DC power for supplying to a DC power source.

A power semiconductor chip has a drain electrode (in the case of a unipolar transistor), collector electrode (in the case of a bipolar transistor) or cathode electrode (in the case of a freewheeling diode) on the back side as the back side electrode through which the main current flows, and a gate electrode on the front side through which a control current flows, and a source electrode (in the case of a unipolar transistor), emitter electrode (in the case of a bipolar transistor) or anode electrode (in the case of a freewheeling diode) as the front side electrode through which the main current flows.

The back electrode is connected to the wiring pattern on the insulating substrate, and the front electrode is connected to the wiring pattern on the insulating substrate via a wire or the like. In semiconductor devices for high power applications such as railways, multiple power semiconductor chips are mounted on an insulating substrate, and multiple insulating substrates are further mounted to enable the device to handle large currents.

For example, semiconductor devices used to drive the motors of electric vehicles have a voltage resistance of 600V or more and a current capacity of 300A or more. In the case of electric railways, the voltage resistance is 3.3kV or more and the current capacity is 1200A or more. In order to handle these large currents, it is necessary to pass several hundred amperes of current per power semiconductor chip, which usually requires the joining of multiple thick wires with diameters of about 300μm to 550μm per chip.

As an example of a conventional semiconductor device, Patent Document 1 describes a semiconductor device having a semiconductor chip on which a surface electrode to which a wire is connected is formed, a first resin film covering the joint between the wire and the surface electrode, a second resin film covering the peripheral portion of the surface on which the surface electrode is formed, contacting the first resin film and having a thickness greater than that of the first resin film, and a gel-like sealing material covering the semiconductor chip, the first resin film, and the second resin film. Polyamideimide is used for the first resin film (wire reinforcing resin) that covers the joint between the surface electrode and the wire. Figure 8 describes a configuration in which two wires are bonded to one surface electrode and covered with wire reinforcing resin.

International Publication No. 2016/016970

In recent years, there has been an increasing demand for improved current capacity in semiconductor devices, and the current flowing per chip has increased, which has resulted in increased heat generation and exposed the joints around the chip to greater temperature fluctuations. This has led to the challenge of extending the breakdown life caused by repeated thermal stress. Also, in order to handle large currents, it has become necessary to join multiple wires to one electrode.

In conventional semiconductor devices, the bond between the surface electrode and the wire is reinforced by applying an aluminum-based wire to the surface electrode made of an aluminum-based material with a resin such as polyamideimide (PAI) as an adhesive, then drying and solidifying. If the resin is not applied evenly, the strength of the bond between the wire and the surface electrode decreases due to unevenness in the resin application, and there is a problem that the life against the high level of thermal stress required in recent years cannot be realized. In particular, when multiple wires are bonded to a single wide electrode, as in Patent Document 1, for example, unevenness in the resin that reinforces the bond between the surface electrode and the wire is likely to occur.

In view of the above circumstances, the present invention aims to provide a semiconductor device that can eliminate unevenness in the application of resin that reinforces the bond between the surface electrode and the wire, and achieves improved heat resistance and a longer life.

In order to solve the above problem, the semiconductor device of the present invention is a semiconductor device including a semiconductor chip and a plurality of wires connected to the semiconductor chip, wherein a partition formed by a first resin layer is provided on a surface of a first surface electrode which is mainly composed of aluminum and through which a main current of the semiconductor chip flows, the partition divides the surface of the first surface electrode into two or more subdivided regions, one of the wires is connected to each of the subdivided regions, and a second resin layer is filled in the subdivided regions, a second surface electrode which is formed on the first surface electrode and divided into each of the subdivided regions and has a thickness smaller than that of the partition, the wires are connected to the second surface electrode, and the second surface electrode is a nickel plating film formed only on a portion of the first surface electrode which is not covered by the first resin layer .

The present invention provides a semiconductor device that can eliminate unevenness in the resin that reinforces the bond between the surface electrode and the wire, and achieves high heat resistance and a long life.

FIG. 1 is a top view showing a configuration of a semiconductor device according to a first embodiment; 1A sectional view taken along the line A-A′ of FIG. FIG. 1B is an enlarged view of the upper portion of the semiconductor layer 1. FIG. 1 is a diagram showing a configuration of a semiconductor device according to a second embodiment; 2A sectional view taken along the line A-A′ of FIG. FIG. 2 is a top view of a semiconductor device showing the minimum distance L from the end of the bonding portion of the main current wire 9 to the first resin layer. Graph showing the relationship between the lifespan of the first surface electrode 2 and L in response to thermal stress FIG. 13 is a diagram showing a configuration of a semiconductor device according to a third embodiment; 5A sectional view taken along the line A-A′ of FIG.

The following describes the embodiments of the present invention in detail with reference to the drawings. FIG. 1A is a top view showing the configuration of the semiconductor device of Example 1, FIG. 1B is an A-A' cross-sectional view, and FIG. 1C is an enlarged view of the upper part of the semiconductor layer 1 in FIG. 1B. As shown in FIGS. 1A to 1C, the semiconductor device 100a of this example has a structure in which a heat dissipation base 17, an insulating substrate 15, a first semiconductor chip (switching element) 6, and a second semiconductor chip (diode element) 7 are stacked in this order. A substrate bonding layer 16 is provided between the heat dissipation base 17 and the insulating substrate 15, and a chip bonding layer 8 is provided between the insulating substrate 15 and the first semiconductor chip 6 and the second semiconductor chip 7. The surface of the heat dissipation base 17 and the configuration other than the heat dissipation base 17 are sealed with sealing resin 18.

In addition to the above components, the semiconductor device 100a requires a resin case to cover the above components, but this is omitted since it is not directly related to the technical content disclosed in this embodiment. Also, in FIG. 1A (top view), the main current wire 9 and gate wire 10 are shown only at their junctions with the first surface electrode 2, gate electrode 3, or wiring layer 13, and the rest are omitted. The sealing resin 18 is also omitted. Each component will be described in detail below.

The semiconductor chip (switching element) 6 has a semiconductor layer 1, a first surface electrode 2 formed on the surface side of the semiconductor layer 1 (surface of the semiconductor chip) and through which a main current flows, a gate electrode 3 provided on the surface of the semiconductor layer 1 and through which a gate current flows, a back electrode 4 formed on the back surface of the semiconductor layer 1 and through which a main current flows, and a first resin layer (partition) 5. In the case of a unipolar transistor, the first surface electrode 2 is sometimes called a source electrode and the back electrode 4 is sometimes called a drain electrode, and in the case of a bipolar transistor, the first surface electrode 2 is sometimes called an emitter electrode and the back electrode 4 is sometimes called a collector electrode, but they each have the same function.

The semiconductor chip (diode element) 7 has a semiconductor layer 1, a first surface electrode 2 formed on the surface side of the semiconductor layer 1 (surface of the semiconductor chip) and through which the main current flows, a back electrode 4 formed on the back surface of the semiconductor chip and through which the main current flows, and a first resin layer 5. The first surface electrode 2 is sometimes called the anode electrode, and the back electrode 4 is sometimes called the cathode electrode. The insulating substrate 15 has a wiring layer 13 on the semiconductor chip side of the insulating layer 12, and a back metal layer 14 on the side opposite the semiconductor chip.

The semiconductor chip (switching element) 6 and the back electrode 4 of the semiconductor chip (diode element) 7 are joined to the wiring layer 13 of the insulating substrate 15 by the chip joining layer 8. The back metal layer 14 of the insulating substrate 15 is joined to the heat dissipation base 17 by the substrate joining layer 16.

A main current wire (wiring) 9 is bonded to the surfaces of the semiconductor chip (switching element) 6 and the first surface electrode 2 of the semiconductor chip (diode element) 7, and is electrically connected to an external device. A gate wire 10 is bonded to the surface of the gate electrode 3 of the semiconductor chip (switching element) 6.

A second resin layer 11 is provided at the joint between the first surface electrode 2 and the main current wire 9 and at the joint between the gate electrode 3 and the gate wire 10 to reinforce the joint.

The semiconductor chip (switching element) 6, semiconductor chip (diode element) 7, chip bonding layer 8, main current wire 9, gate wire 10, second resin layer 11, insulating substrate 15, and substrate bonding layer 16 stacked on the heat dissipation base 17 are sealed with sealing resin 18.

The feature of this embodiment is that the surface of the first surface electrode 2 through which the main current flows is divided into a plurality of regions by partitions formed by the first resin layer 5 provided on the surface of the first surface electrode 2, one main current wire 9 is connected to each divided region, and the divided regions are filled with the second resin layer. As shown in FIG. 1B, the wire may be joined not only at its end but also at its middle, and in this case, the main current wire 9 is joined at one point for each divided region, which includes the state in which one main current wire 9 is connected to each divided region.

The above-mentioned configuration forms a box-shaped section with the first surface electrode 2, through which the main current of the semiconductor chip (switching element) 6 and the semiconductor chip (diode element) 7 flows, as the bottom surface and the first resin layer 5 as the side wall, and this box-shaped section serves as a receptacle when the second resin layer 11 is filled, allowing the second resin layer 11 to be filled evenly and without gaps at the joint between the first surface electrode 2 and the main current wire 9. As a result, the effect of improving the life of the semiconductor device against thermal stress is achieved.

In conventional semiconductor devices, the first resin layer is only on the outer periphery of the semiconductor chip, and there are multiple connection parts for the main current wires 9 on the surface of the first surface electrode, which is not subdivided. The second resin layer is applied in liquid form onto the semiconductor chip after the main current wires are connected, but if the viscosity of the second resin layer is high, it will not spread evenly over the semiconductor chip, resulting in uneven application, or it will not penetrate into small gaps, resulting in gaps at the junctions between the first surface electrodes and the main current wires, resulting in reduced lifespan against thermal stress. On the other hand, if the viscosity of the second resin layer is low, it may overflow and spill out from the semiconductor chip.

According to the features of the present invention, as described above, each joint of the main current wire 9 has a box-shaped section in which the second resin layer is filled, so that the second resin layer 11 can be stably supplied to the joint between the first surface electrode 2 and the main current wire 9, thereby reducing variation in life span.

The manner in which the first surface electrode 2 is divided by the side walls of the first resin layer 5 is not limited to the manner shown in Figures 1A and 1B. In this embodiment, when viewed from above, the surface of the first surface electrode 2 is divided into three vertical and four horizontal regions, but the number and arrangement of the regions are not limited to this.

There are no particular limitations on the materials of the first resin layer 5 and the second resin layer 11, but PAI (polyamideimide) is preferred for the first resin layer 5, and PI (polyimide) is preferred for the second resin layer 11.

The semiconductor layer 1 can be made of Si (silicon) or SiC (silicon carbide), which can operate at high temperatures. The front and back electrodes are preferably made of a metal or alloy mainly composed of aluminum (Al).

It is preferable to use sintered metal for the chip bonding layer 8. As the sintered metal, it is preferable to use sintered copper made by sintering fine particles of Cu. Sintered copper has higher heat resistance than conventional solder, and can provide a semiconductor device with a long life even when operated at high temperatures. It is also possible to use sintered silver instead of sintered copper for the chip bonding layer 8.

The insulating substrate 15 preferably uses aluminum nitride (AlN) having a thickness of about 0.63 mm as the insulating layer 12. Alternatively, ceramic materials such as silicon _nitride ( _Si3N4 ) and _aluminum oxide ( _Al2O3 ) may be used depending on the withstand voltage and application. The back metal layer 14 is preferably made of a Cu layer having a thickness of about 0.2 mm. The wiring layer 13 is preferably made of a Cu layer having a thickness of about 0.3 mm.

The heat dissipation base 17 has the role of transferring heat generated from the semiconductor chip (switching element) 6 and the semiconductor chip (diode element) 7 to an external cooler, and also of providing the rigidity of the entire semiconductor device 100a. For example, Al-SiC is suitable for the heat dissipation base 17. However, this is not a limitation, and Cu or Al can also be used as long as it has the necessary thermal conductivity and rigidity.

It is preferable to use, for example, silicone gel as the sealing resin 18. By sealing with silicone gel, discharge inside the semiconductor device 100a can be prevented. However, this is not the only option, and sealing with epoxy resin may also be used. When a relatively hard epoxy resin is used as the sealing resin 18, the chip bonding layer 8 described above may be replaced with solder. However, when the sealing resin 18 is a relatively soft silicone gel, it is preferable to use sintered metal for the bonding layer, since solder cannot suppress distortion.

Conventional methods can be used to form each layer. The first resin layer 5 can be formed by patterning using photolithography.

Figure 2A is a top view showing the configuration of the semiconductor device of Example 2, and Figure 2B is a cross-sectional view taken along the line A-A' of Figure 2A. As shown in Figure 2, the semiconductor device 100b of this example is obtained by adding a second surface electrode 19 to the configuration of the semiconductor device 100a of Example 1. The second surface electrode 19 is formed on the surface of the first surface electrode 2 or the gate electrode 3, is formed by dividing each of the subdivided regions of the first surface electrode 2, and has a thickness smaller than that of the partition formed by the first resin layer 5. The main current wire 9 is connected onto the second surface electrode 19.

Since the second surface electrode 19 has a thickness less than that of the partition formed by the first resin layer 5, the box-shaped portion with the second surface electrode 19 as the bottom and the first resin layer as the sidewall acts as a tray, allowing the second resin layer 11 to be filled evenly and without gaps at the joint between the second surface electrode 19 and the main current wire 9, thereby improving the lifespan against thermal stress. In addition, the second surface electrode 19 can relieve the thermal stress applied to the first surface electrode 2, improving the lifespan against thermal stress. Furthermore, since the second surface electrode 19 is subdivided, cracks due to pressure when connecting the wires are eliminated.

The second surface electrode 19 can be formed by plating nickel (Ni) after forming the first resin layer 5. Therefore, the second surface electrode 19 is segmented because it is formed only in the part of the first surface electrode 2 that is not covered by the first resin layer 5. In the conventional semiconductor device, the second surface electrode is not segmented for each joint of the main current wire, and multiple joints of the main current wire are provided on a wide surface. When the main current wire is wire-bonded to a wide surface, pressure is applied to the hard Ni, and the soft first surface electrode, which is mainly composed of aluminum under the Ni, is dented by the pressure, which may cause cracks in the Ni. If the part where the Ni cracks is close to the joint of the main current wire, there is a problem that the life against thermal stress is reduced. In this embodiment, the area where the second surface electrode 19 is formed is segmented, so that thermal stress can be alleviated.

Figure 3 is a diagram showing the minimum distance L from the end of the bonding portion of the main current wire 9 to the first resin layer in a top view of the semiconductor device. As shown in Figure 3, in one area, the shortest distance from the end of the bonding portion (bonding portion) of the main current wire 9 to the end of the second surface electrode 19 (partition wall of the first resin layer 5) is L. In the semiconductor device of the above-mentioned embodiment, L was changed to evaluate the life against thermal stress. Figure 4 is a graph showing the relationship between the life against thermal stress of the first surface electrode 2 and L. As shown in Figure 4, it can be seen that when L is less than 200 μm, the life decreases with the decrease in L. On the other hand, when L is 200 μm or more, the life remains at the maximum value. In other words, the maximum life improvement effect can be obtained by making the distance from the end of the bonding portion of the main current wire 9 to the end of the second surface electrode 19 200 μm or more.

In addition, to prevent cracking of the second surface electrode 19, it is better that one area after division is not too wide, so it is preferable that the distance from the end of the joint of the main current wire 9 to the end of the second surface electrode 19 is 400 μm or less. The range of L described in Figures 3 and 4 is the same in Example 3 described later.

Figure 5A shows the configuration of a semiconductor device of Example 3, and Figure 5B is a cross-sectional view of Figure 5A taken along the line A-A'. As shown in Figure 5A, the semiconductor device 100c of this example is obtained by adding a third surface electrode 20 to the configuration of Example 2. The third surface electrode 20 is formed by dividing the second surface electrode 19 into smaller regions, and the sum of the thicknesses of the second surface electrode 19 and the third surface electrode 20 is thinner than the partition formed by the first resin layer 5. The main current wire 9 is connected to the surface above the third surface electrode 20.

According to this embodiment, the second surface electrode 19 and the third surface electrode 20 can relieve the thermal stress on the first surface electrode 2, improving the life against thermal stress. In addition, since the second surface electrode 19 and the third surface electrode 20 are subdivided, cracks due to pressure during wire connection are eliminated.

In addition, the sum of the thicknesses of the second surface electrode 19 and the third surface electrode 20 is less than the thickness of the partition wall formed by the first resin layer 5, so that the box-shaped portion with the third surface electrode 20 as the bottom and the first resin layer as the side wall acts as a tray, allowing the second resin layer 11 to be filled evenly and without gaps at the joint between the third surface electrode 20 and the main current wire 9, thereby improving the life against thermal stress.

The third surface electrode 20 can be formed by forming the first resin layer 5, plating Ni as the second surface electrode 19, and then plating Cu on this surface as the third surface electrode 20. Therefore, the second surface electrode 19 and the third surface electrode 20 are segmented because they are formed only in the parts of the first surface electrode 2 that are not covered by the first resin layer 5. As a result, cracking of the electrodes can be prevented, as in Example 2.

In the above-described embodiments 1 to 3, the main current wire 9 can be made of aluminum wire, copper wire, etc., but the use of copper wire can extend the life even further. However, since copper wire is hard and aluminum electrodes are soft, when using copper wire, it is preferable to use Ni electrodes as in embodiments 2 and 3.

As explained above, the present invention has been shown to provide a semiconductor device that can eliminate unevenness in the resin that reinforces the joint between the surface electrode and the wire, and achieves improved heat resistance and a longer life.

The present invention is not limited to the above-mentioned embodiments, but includes various modified examples. The above-mentioned embodiments are provided to explain the present invention in an easy-to-understand manner, and are not necessarily limited to those having all of the configurations described. It is also possible to replace part of the configuration of one embodiment with the configuration of another embodiment, and it is also possible to add the configuration of another embodiment to the configuration of one embodiment. It is also possible to add, delete, or replace part of the configuration of each embodiment with other configurations.

100a, 100b, 100c...semiconductor device, 1...semiconductor layer, 2...first surface electrode, 3...gate electrode, 4...back surface electrode, 5...first resin layer, 6...semiconductor chip (switching element), 7...semiconductor chip (diode element), 8...chip bonding layer, 9...main current wire, 10...gate wire, 11...second resin layer, 12...insulating layer, 13...wiring layer, 14...back surface metal layer, 15...insulating substrate, 16...substrate bonding layer, 17...heat dissipation base, 18...encapsulating resin, 19...second surface electrode, 20...third surface electrode.

Claims (6)

A semiconductor device including a semiconductor chip and a plurality of wires connected to the semiconductor chip,
a partition formed of a first resin layer is provided on a surface of a first surface electrode , the first surface electrode being mainly composed of aluminum and through which a main current of the semiconductor chip flows, the partition dividing the surface of the first surface electrode into two or more subdivided regions;
One of the wires is connected to each of the subdivided regions; and
A second resin layer is filled in the divided region ,
A second surface electrode is formed on the first surface electrode, the second surface electrode being divided into each of the divided regions and having a thickness smaller than that of the partition wall;
the wire is connected to the second surface electrode;
The semiconductor device according to claim 1, wherein the second surface electrode is a nickel plating film formed only on a portion of the first surface electrode that is not covered with the first resin layer . A semiconductor device including a semiconductor chip and a plurality of wires connected to the semiconductor chip,
a partition formed of a first resin layer is provided on a surface of a first surface electrode, the first surface electrode being mainly composed of aluminum and through which a main current of the semiconductor chip flows, the partition dividing the surface of the first surface electrode into two or more subdivided regions;
One of the wires is connected to each of the subdivided regions; and
A second resin layer is filled in the divided region,
a second surface electrode formed by dividing the first surface electrode into the divided regions, and a third surface electrode formed on the second surface electrode;
the wire is connected to the third surface electrode, and a sum of the thicknesses of the second surface electrode and the third surface electrode is smaller than the thickness of the partition wall;
The semiconductor device according to claim 1, wherein the second surface electrode is a nickel plating film formed only on a portion of the first surface electrode that is not covered with the first resin layer. 3. The semiconductor device according to claim 1 , wherein a distance from an end of a joint between the semiconductor chip and the wire to an end of the second surface electrode is 200 [mu]m or more and 400 [mu]m or less. 3. The semiconductor device according to claim 1, wherein the first resin layer is made of polyimide. 3. The semiconductor device according to claim 1, wherein the second resin layer is made of polyamide-imide. 3. The semiconductor device according to claim 2 , wherein the third surface electrode is a copper plating film.

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