WO2015178305A1 - Élément de conversion photoélectrique, et procédé de fabrication de celui-ci - Google Patents

Élément de conversion photoélectrique, et procédé de fabrication de celui-ci Download PDF

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Publication number
WO2015178305A1
WO2015178305A1 PCT/JP2015/064014 JP2015064014W WO2015178305A1 WO 2015178305 A1 WO2015178305 A1 WO 2015178305A1 JP 2015064014 W JP2015064014 W JP 2015064014W WO 2015178305 A1 WO2015178305 A1 WO 2015178305A1
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photoelectric conversion
amorphous silicon
type amorphous
silicon layer
conversion element
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PCT/JP2015/064014
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English (en)
Japanese (ja)
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督章 國吉
敏彦 酒井
賢治 木本
親扶 岡本
利人 菅沼
神川　剛
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シャープ株式会社
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02—Details
    • H01L31/0216—Coatings
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers
    • H01L31/072—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN heterojunction type
    • H01L31/0745—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN heterojunction type comprising a AIVBIV heterojunction, e.g. Si/Ge, SiGe/Si or Si/SiC solar cells
    • H01L31/0747—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN heterojunction type comprising a AIVBIV heterojunction, e.g. Si/Ge, SiGe/Si or Si/SiC solar cells comprising a heterojunction of crystalline and amorphous materials, e.g. heterojunction with intrinsic thin layer
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy

Definitions

  • the present invention relates to a photoelectric conversion element and a manufacturing method thereof.
  • solar cells as photoelectric conversion elements have attracted attention.
  • An example of a solar cell is a back junction solar cell.
  • a back junction solar cell is disclosed in, for example, Patent Document 1 (Japanese Patent Laid-Open No. 2007-281156).
  • the back junction solar cell is formed on the back surface of the crystal semiconductor, the n-type amorphous semiconductor layer formed on the back surface of the crystal semiconductor opposite to the sunlight irradiation surface, and the back surface.
  • an object of the present invention is to provide a photoelectric conversion element that can improve the effect of passivation to a semiconductor substrate.
  • Another object of the present invention is to provide a method for manufacturing a photoelectric conversion element capable of improving the effect of passivation to a semiconductor substrate.
  • the photoelectric conversion element of the present invention that solves the above problems converts light into electric power, and is formed in contact with a semiconductor substrate and a surface on the light incident side of the semiconductor substrate.
  • the concentration of oxygen existing between the first semiconductor film and the dielectric film is 1 ⁇ 10 19 cm ⁇ 3 or less.
  • the oxygen concentration present at the interface between the first semiconductor film and the dielectric film is 1 ⁇ 10 19 cm ⁇ 3 or less, the interface state between the first semiconductor film and the dielectric film Decrease. As a result, the photoexcited carriers (electrons and holes) are difficult to recombine at the interface between the first semiconductor film and the dielectric film.
  • the oxygen concentration is 5 ⁇ 10 18 cm ⁇ 3 or less.
  • the carbon concentration present at the interface between the first semiconductor film and the dielectric film is 5 ⁇ 10 19 cm ⁇ 3 or less.
  • the photoelectric conversion element of the present invention is in contact with the surface opposite to the light incident side of the semiconductor substrate, has a second semiconductor film having a conductivity type opposite to the semiconductor substrate, and has the same conductivity type as the semiconductor substrate. And a third semiconductor film adjacent to the second semiconductor film in an in-plane direction of the semiconductor substrate.
  • the conductivity type of the first semiconductor film of the photoelectric conversion element of the present invention may be i-type.
  • the dielectric film of the photoelectric conversion element of the present invention may be formed of SiN.
  • a step of forming a first semiconductor film having a first conductivity type or an i-type conductivity type in contact with a light incident side surface of a semiconductor substrate a step of forming a dielectric film in contact with the first semiconductor film.
  • the oxygen concentration present at the interface between the first semiconductor film and the dielectric film is 1 ⁇ 10 19 cm ⁇ 3 or less.
  • the first semiconductor film and the dielectric film are continuously formed on the semiconductor substrate.
  • the oxygen concentration existing between the first semiconductor film and the dielectric film becomes 1 ⁇ 10 19 cm ⁇ 3 or less.
  • the passivation effect on the semiconductor substrate can be improved.
  • the oxygen concentration present at the interface between the first semiconductor film and the dielectric film is 1 ⁇ 10 19 cm ⁇ 3 or less, the interface state between the first semiconductor film and the dielectric film is Decrease. As a result, the photoexcited carriers (electrons and holes) are difficult to recombine at the interface between the first semiconductor film and the dielectric film.
  • FIG. 1 is a cross-sectional view illustrating a configuration of the photoelectric conversion element according to the first embodiment.
  • FIG. 2A is a first process diagram illustrating a method for manufacturing the photoelectric conversion element illustrated in FIG. 1.
  • FIG. 2B is a second process diagram illustrating a method for manufacturing the photoelectric conversion element illustrated in FIG. 1.
  • FIG. 2C is a third process diagram illustrating the method for manufacturing the photoelectric conversion element illustrated in FIG. 1.
  • FIG. 2D is a fourth process diagram illustrating the method for manufacturing the photoelectric conversion element illustrated in FIG. 1.
  • FIG. 2E is a fifth process diagram illustrating the method for manufacturing the photoelectric conversion element illustrated in FIG. 1.
  • FIG. 2F is a sixth process diagram illustrating the method for manufacturing the photoelectric conversion element illustrated in FIG. 1.
  • FIG. 2A is a first process diagram illustrating a method for manufacturing the photoelectric conversion element illustrated in FIG. 1.
  • FIG. 2B is a second process diagram illustrating a method for manufacturing the photoelectric conversion element illustrated in FIG
  • FIG. 2G is a seventh process diagram illustrating the method for manufacturing the photoelectric conversion element illustrated in FIG. 1.
  • FIG. 3 is a cross-sectional view illustrating a configuration of the photoelectric conversion element of the second embodiment.
  • FIG. 4A is a first process diagram illustrating a method for manufacturing the photoelectric conversion element illustrated in FIG. 3.
  • FIG. 4B is a second process diagram illustrating the method of manufacturing the photoelectric conversion element illustrated in FIG. 3.
  • FIG. 4C is a third process diagram illustrating the method for manufacturing the photoelectric conversion element illustrated in FIG. 3.
  • FIG. 5 is a cross-sectional view illustrating a configuration of the photoelectric conversion element of the third embodiment.
  • FIG. 6A is a first process diagram illustrating a method for manufacturing the photoelectric conversion element illustrated in FIG. 5.
  • FIG. 5 is a first process diagram illustrating a method for manufacturing the photoelectric conversion element illustrated in FIG. 5.
  • FIG. 5 is a first process diagram illustrating a method for manufacturing the photoelectric conversion element illustrated in FIG. 5.
  • FIG. 6B is a second process diagram illustrating the method for manufacturing the photoelectric conversion element illustrated in FIG. 5.
  • FIG. 6C is a third process diagram illustrating the method for manufacturing the photoelectric conversion element illustrated in FIG. 5.
  • FIG. 6D is a fourth process diagram illustrating the method of manufacturing the photoelectric conversion element illustrated in FIG. 5.
  • FIG. 6E is a fifth process diagram illustrating the method for manufacturing the photoelectric conversion element illustrated in FIG. 5.
  • FIG. 6F is a sixth process diagram illustrating the method for manufacturing the photoelectric conversion element illustrated in FIG. 5.
  • FIG. 6G is a seventh process diagram illustrating the method for manufacturing the photoelectric conversion element illustrated in FIG. 5.
  • FIG. 7 is a schematic diagram illustrating an example of the configuration of the photoelectric conversion module according to the fourth embodiment.
  • FIG. 7 is a schematic diagram illustrating an example of the configuration of the photoelectric conversion module according to the fourth embodiment.
  • FIG. 8 is a schematic diagram illustrating an example of the configuration of the photovoltaic power generation system according to the fifth embodiment.
  • FIG. 9 is a schematic diagram illustrating another example of the configuration of the solar power generation system according to the fifth embodiment.
  • FIG. 10 is a schematic diagram showing an example of the configuration of the photoelectric conversion module array shown in FIG.
  • FIG. 11 is a schematic diagram illustrating an example of a configuration of a photovoltaic power generation system according to the sixth embodiment.
  • FIG. 12 is a schematic diagram illustrating another example of the configuration of the solar power generation system according to the sixth embodiment.
  • amorphous phase refers to a state in which silicon (Si) atoms and the like are randomly arranged. Further, although amorphous silicon is expressed as “a-Si”, this notation actually means that hydrogen (H) atoms are included.
  • FIG. 1 is a cross-sectional view showing a configuration of a photoelectric conversion element 100 according to Embodiment 1 of the present invention.
  • the photoelectric conversion element 100 of Embodiment 1 includes an n-type single crystal silicon substrate 1, an i-type amorphous silicon layer 2 on the light incident side, an n-type amorphous silicon layer 3, and an antireflection film as a dielectric film. 4, i-type amorphous silicon layers 5 a and 5 b on the side opposite to the light incident side, a plurality of p-type amorphous silicon layers 6, a plurality of n-type amorphous silicon layers 7, and a plurality of electrodes 8 .
  • the n-type single crystal silicon substrate 1 has, for example, a (100) plane orientation and a specific resistance of 0.1 to 10 ⁇ ⁇ cm.
  • the thickness of the n-type single crystal silicon substrate 1 is, for example, 100 to 300 ⁇ m.
  • the n-type single crystal silicon substrate 1 has a textured surface on the light incident side.
  • the i-type amorphous silicon layer 2 is provided in contact with the light incident surface of the n-type single crystal silicon substrate 1.
  • the i-type amorphous silicon layer 2 is made of an amorphous phase and is made of, for example, i-type a-Si.
  • the i-type amorphous silicon layer 2 has a thickness of 2 nm to several tens of nm, for example.
  • the n-type amorphous silicon layer 3 is formed in contact with the i-type amorphous silicon layer 2.
  • the n-type amorphous silicon layer 3 is made of an amorphous phase and is made of, for example, n-type a-Si.
  • the thickness of the n-type amorphous silicon layer 3 is, for example, 5 nm to several tens of nm.
  • the phosphorus (P) concentration of the n-type amorphous silicon layer 3 is, for example, 1 ⁇ 10 20 to 1 ⁇ 10 22 cm ⁇ 3 .
  • the antireflection film 4 is provided in contact with the n-type amorphous silicon layer 3.
  • the antireflection film 4 is made of, for example, silicon nitride (SiN), diamond-like carbon (DLC), silicon carbide (SiC), aluminum nitride (AlN), or the like.
  • the thickness of the antireflection film 4 is, for example, about 100 nm.
  • I-type amorphous silicon layers 5a and 5b are provided in contact with the surface of n-type single crystal silicon substrate 1 opposite to the light incident side.
  • i-type amorphous silicon layer 5 a and i-type amorphous silicon layer 5 b are arranged adjacent to each other in the in-plane direction of n-type single crystal silicon substrate 1.
  • the i-type amorphous silicon layers 5a and 5b are made of an amorphous phase, and are made of, for example, i-type a-Si.
  • the i-type amorphous silicon layers 5a and 5b have a thickness of 2 nm to several tens of nm, for example.
  • Each of the plurality of p-type amorphous silicon layers 6 is formed in contact with the i-type amorphous silicon layer 5a.
  • Each of the p-type amorphous silicon layers 6 is made of an amorphous phase and is made of, for example, p-type a-Si.
  • the thickness of the p-type amorphous silicon layer 6 is, for example, 10 nm to several tens of nm.
  • the boron (B) concentration of the p-type amorphous silicon layer 6 is, for example, 1 ⁇ 10 20 to 1 ⁇ 10 22 cm ⁇ 3 .
  • Each of the plurality of n-type amorphous silicon layers 7 is formed in contact with the i-type amorphous silicon layer 5b. Each of the plurality of n-type amorphous silicon layers 7 is arranged adjacent to the p-type amorphous silicon layer 6 in the in-plane direction of the n-type single crystal silicon substrate 1.
  • Each of the plurality of n-type amorphous silicon layers 7 is made of an amorphous phase, and is made of, for example, n-type a-Si.
  • the thickness of the n-type amorphous silicon layer 7 is, for example, 10 to several tens of nm.
  • the phosphorus (P) concentration of the n-type amorphous silicon layer 7 is, for example, 1 ⁇ 10 20 to 1 ⁇ 10 22 cm ⁇ 3 .
  • Each of the plurality of electrodes 8 is provided in contact with the p-type amorphous silicon layer 6 or the n-type amorphous silicon layer 7, respectively.
  • Each of the electrodes 8 is formed, for example, by laminating a transparent conductive film 8a and a metal film 8b.
  • the transparent conductive film 8a include an ITO (indium tin oxide) film.
  • the metal film 8b silver (Ag) is mentioned, for example.
  • the thickness of the transparent conductive film 8a is, for example, 70 to 100 nm.
  • the photoelectric conversion element 100 when sunlight is irradiated to the photoelectric conversion element 100 from the antireflection film 4 side, electrons and holes are photoexcited in the n-type single crystal silicon substrate 1.
  • the photoexcited holes and electrons diffuse into the p-type amorphous silicon layer 6 and the n-type amorphous silicon layer 7, respectively, thereby generating an electromotive force.
  • (Production method) 2A to 2G are process diagrams showing a method for manufacturing the photoelectric conversion element 100 shown in FIG.
  • an n-type single crystal silicon substrate 1 is prepared.
  • the texture structure 1a is formed on the entire light incident side surface of the n-type single crystal silicon substrate 1. It is formed.
  • an i-type amorphous silicon layer 2 is formed on the light incident side surface of the n-type single crystal silicon substrate 1.
  • the i-type amorphous silicon layer 2 is formed by, for example, plasma CVD.
  • the reaction gas is silane gas and hydrogen gas.
  • the temperature of the n-type single crystal silicon substrate 1 is, for example, 100 to 300 ° C.
  • an n-type amorphous silicon layer 3 is formed on the i-type amorphous silicon layer 2.
  • the n-type amorphous silicon layer 3 is formed by plasma CVD, for example.
  • the reactive gases are silane gas, hydrogen gas, and phosphine gas.
  • the temperature of the n-type single crystal silicon substrate 1 is, for example, 100 to 300 ° C.
  • the antireflection film 4 is formed by plasma CVD continuously after the formation of the n-type amorphous silicon layer 3.
  • the n-type amorphous silicon layer 3 and the antireflection film 4 are preferably formed in the same forming chamber.
  • an i-type amorphous silicon layer 5 ap and a p-type amorphous silicon layer 6 p are formed on the back surface of the n-type single crystal silicon substrate 1.
  • the i-type amorphous silicon layer 5ap and the p-type amorphous silicon layer 6p can be formed by plasma CVD, for example.
  • the formation conditions of the i-type amorphous silicon layer 5ap are the same as the formation conditions of the i-type amorphous silicon layer 2.
  • silane gas, hydrogen gas, and diborane gas are used as the reaction gas.
  • the temperature of the n-type single crystal silicon substrate 1 is, for example, 100 to 300 ° C.
  • a coating layer 10 as a mask is formed on the p-type amorphous silicon layer 6p.
  • the covering layer 10 is obtained, for example, by patterning a silicon nitride film formed on the p-type amorphous silicon layer 6p.
  • a silicon oxide film, a silicon oxynitride film, or the like may be used instead of the silicon nitride film.
  • the patterning is performed by, for example, a photolithography method.
  • Covering layer 10 covers a portion of p-type amorphous silicon layer 6p formed on i-type amorphous silicon layer 5ap that will later become p-type amorphous silicon layer 6.
  • portions of the i-type amorphous silicon layer 5ap and the p-type amorphous silicon layer 6p that are not covered with the coating layer 10 are removed.
  • the method for removing the p-type amorphous silicon layer 6p may be dry etching or wet etching. Thereby, the i-type amorphous silicon layer 5a and the p-type amorphous silicon layer 6 are formed. At this time, the covering layer 10 is formed on the p-type amorphous silicon layer 6.
  • an i-type amorphous silicon layer 5bp and an n-type amorphous silicon layer 7p are formed.
  • the i-type amorphous silicon layer 5bp and the n-type amorphous silicon layer 7p can be formed by plasma CVD, for example.
  • the formation conditions of the i-type amorphous silicon layer 5bp and the n-type amorphous silicon layer 7p are the same as the formation conditions of the i-type amorphous silicon layer 2 and the n-type amorphous silicon layer 3, respectively.
  • the covering layer 10, the i-type amorphous silicon layer 5bp, and the n-type amorphous silicon layer 7p formed on the p-type amorphous silicon layer 6 are removed. Thereby, as shown in FIG. 2F, an i-type amorphous silicon layer 5b and an n-type amorphous silicon layer 7 are formed.
  • a method for removing the covering layer 10 and the like formed on the p-type amorphous silicon layer 6 is, for example, wet etching.
  • a transparent conductive film such as ITO is formed on the n-type amorphous silicon layer 7 and the p-type amorphous silicon layer 6 side, and a metal such as Ag is further deposited. Then, the metal film and the transparent conductive film are patterned by photolithography and etching so as to correspond to each of the plurality of p-type amorphous silicon layers 6 and the n-type amorphous silicon layers 7, and the plurality of electrodes 8 are formed. Form. Thereby, the photoelectric conversion element 100 of Embodiment 1 is obtained.
  • the n-type amorphous silicon layer 3 and the antireflection film 4 are continuously formed, the n-type amorphous silicon layer 3 is exposed to the atmosphere without exposing the surface of the n-type amorphous silicon layer 3 to the atmosphere.
  • the surface of the quality silicon layer 3 is covered with the antireflection film 4. For this reason, it is suppressed that the surface of the n-type amorphous silicon layer 3 is oxidized by oxygen in the atmosphere to form an oxide film.
  • the oxygen concentration present at the interface between the n-type amorphous silicon layer 3 and the antireflection film 4 is 1 ⁇ 10 19 cm ⁇ 3 or less, preferably 5 ⁇ 10 18 cm ⁇ 3 or less, more preferably 1 ⁇ 10 18. cm ⁇ 3 or less. Moreover, it is suppressed that the organic substance in air
  • the carbon concentration present at the interface between the n-type amorphous silicon layer 3 and the antireflection film 4 is 5 ⁇ 10 19 cm ⁇ 3 or less, preferably 1 ⁇ 10 19 cm ⁇ 3 or less, more preferably 5 ⁇ 10 18. cm ⁇ 3 or less.
  • the passivation effect on the n-type single crystal silicon substrate 1 can be improved.
  • the n-type amorphous silicon layer 3 is provided on the i-type amorphous silicon layer 2 on the light incident side of the n-type single crystal silicon substrate 1.
  • a p-type amorphous silicon layer may be provided instead of the n-type amorphous silicon layer 3 on the i-type amorphous silicon layer 2 on the light incident side of the substrate 1.
  • the i-type amorphous silicon layer 2, the n-type amorphous silicon layer 3, or the p-type amorphous silicon layer may be provided as a single layer between the n-type single crystal silicon substrate 1 and the antireflection film. Good.
  • the texture structure 1a is provided on the light incident side surface of the n-type single crystal silicon substrate 1, but the texture structure is provided on the opposite side of the light incident side surface. May be.
  • the substrate used as the semiconductor substrate is not limited to the n-type single crystal silicon substrate 1, and a p-type single crystal silicon substrate may be used.
  • the substrate used as the semiconductor substrate is not limited to a single crystal silicon substrate, and an n-type or p-type polycrystalline silicon substrate may be used.
  • the texture structure on the light incident side surface can be formed by dry etching.
  • FIG. 3 is a cross-sectional view showing a configuration of a photoelectric conversion element 100A according to Embodiment 2 of the present invention.
  • the photoelectric conversion element 100A according to the second embodiment is different from the photoelectric conversion element 100 according to the first embodiment in that the i-type amorphous silicon layers 5a and 5b are changed to the i-type amorphous silicon layer 5A and the p-type amorphous silicon film 6 is used.
  • the n-type amorphous silicon film 7 is changed to a p-type amorphous silicon film 6A, and the electrode 8 is changed to an electrode 8A and an electrode 9A.
  • the i-type amorphous silicon layer 5A is provided in contact with the surface of the n-type single crystal silicon substrate 1 opposite to the light incident side.
  • the i-type amorphous silicon layer 5A is made of an amorphous phase, and is made of, for example, i-type a-Si.
  • the thickness of the i-type amorphous silicon layer 5A is, for example, 2 nm to several tens of nm.
  • the p-type amorphous silicon layer 6A is formed in contact with the i-type amorphous silicon layer 5A so as to cover the entire surface of the i-type amorphous silicon layer 5A.
  • the p-type amorphous silicon layer 6A is made of an amorphous phase, and is made of, for example, p-type a-Si.
  • the thickness of the p-type amorphous silicon layer 6A is, for example, 10 to several tens of nm.
  • the boron (B) concentration of the p-type amorphous silicon layer 6A is, for example, 1 ⁇ 10 20 to 1 ⁇ 10 22 cm ⁇ 3 .
  • the electrode 8A is provided in contact with the p-type amorphous silicon layer 6A.
  • the electrode 8A is formed, for example, by laminating a transparent conductive film 8a and a metal film 8b.
  • the transparent conductive film 8a include an ITO (indium tin oxide) film.
  • the metal film 8b silver (Ag) is mentioned, for example.
  • the electrode 9A is provided in contact with the n-type amorphous silicon layer 3 on the light incident side of the n-type amorphous silicon layer 3 where the antireflection film 4 is not provided.
  • the electrode 9A is made of, for example, silver (Ag).
  • (Production method) 4A to 4C are process diagrams showing a method for manufacturing the photoelectric conversion element 100A shown in FIG.
  • an n-type single crystal silicon substrate 1 is prepared as in the first embodiment, and an i-type amorphous silicon layer 2 and an n-type amorphous silicon layer are formed on the light incident side surface. 3 is formed. Further, similarly to the first embodiment, an antireflection film 4 is formed on the n-type amorphous silicon layer 3.
  • an i-type amorphous silicon layer 5A is formed on the back surface of the n-type single crystal silicon substrate 1 as in the first embodiment. Further, a p-type amorphous silicon layer 6A is formed on the i-type amorphous silicon layer 5A in the same manner as the i-type amorphous silicon film 6p of the first embodiment.
  • an electrode 8A is formed by forming a transparent conductive film 8a and a metal film 8b on the p-type amorphous silicon layer 6A. Further, after removing a part of the antireflection film 4, for example, an Ag paste is applied by a screen printing method and then baked to form an electrode 9A on the light incident side of the n-type single crystal silicon substrate 1. Either the electrode 8A or the electrode 9A may be formed first.
  • the n-type amorphous silicon layer 3 is provided on the i-type amorphous silicon layer 2 on the light incident side of the n-type single crystal silicon substrate 1, and the i-type on the opposite side to the light incident side.
  • the p-type amorphous silicon layer 6A is provided on the amorphous silicon layer 5A
  • a p-type amorphous silicon layer is provided on the i-type amorphous silicon layer 2 and is opposite to the light incident side.
  • An n-type amorphous silicon layer may be provided on the i-type amorphous silicon layer 5A on the side.
  • FIG. 5 is a cross-sectional view showing a configuration of a photoelectric conversion element 100B according to Embodiment 3 of the present invention.
  • the photoelectric conversion element 100B according to the third embodiment is similar to the photoelectric conversion element 100 according to the first embodiment except that the i-type amorphous silicon layer 5b and the n-type amorphous silicon layer 7 are provided instead of the n-type single crystal silicon substrate 1.
  • the n-type diffusion region 7B is formed on the surface.
  • the plurality of n-type diffusion regions 7B include phosphorous or the like in a portion where the i-type amorphous silicon layer 5a is not provided in a portion including the surface opposite to the light irradiation side of the n-type single crystal silicon substrate 1. Doped and formed.
  • the phosphorus (P) concentration in the n-type diffusion region 7B is, for example, 5 ⁇ 10 20 cm ⁇ 3 .
  • each of the plurality of electrodes 8 includes the p-type amorphous silicon layer 6 or n, respectively. It is provided in contact with the mold diffusion region 7B.
  • the photoelectric conversion element 100B when sunlight is irradiated to the photoelectric conversion element 100B from the antireflection film 4 side, electrons and holes are photoexcited in the n-type single crystal silicon substrate 1. The photoexcited holes and electrons are diffused into the p-type amorphous silicon layer 6 and the n-type diffusion region 7B, respectively, thereby generating an electromotive force.
  • (Production method) 6A to 6G are process diagrams showing a method for manufacturing the photoelectric conversion element 100B shown in FIG.
  • the n-type diffusion region 7B is formed by doping phosphorus on the surface opposite to the light incident side of the n-type single crystal silicon substrate 1 prepared in the same manner as in the first embodiment.
  • the method for doping phosphorus include an ion implantation method, a method of baking a dopant layer or a doping paste, and a method using thermal diffusion.
  • a protective film 30 is formed on the entire surface of the n-type single crystal silicon substrate 1 opposite to the light incident side.
  • the protective film 30 is formed of, for example, a silicon nitride film, a silicon oxide film, a silicon oxynitride film, or the like. Thereby, the surface of the n-type diffusion region is protected.
  • the i-type amorphous silicon layer 2, the n-type amorphous silicon layer 3, and the reflection are formed on the light incident side of the n-type single crystal silicon substrate 1.
  • the prevention film 4 is formed.
  • portions of the protective layer 30 on the side opposite to the light incident side of the n-type single crystal silicon substrate 1 other than the portion in contact with the n-type diffusion region 7 are etched away.
  • the i-type amorphous silicon layer 5ap and the p-type amorphous silicon layer 6p are formed on the back surface of the n-type single crystal silicon substrate 1 as in the first embodiment.
  • the protective layer 30, and the i-type amorphous silicon layer 5ap and the p-type amorphous silicon layer 6p as the upper layer are removed.
  • the method for removing the i-type amorphous silicon layer 5ap and the p-type amorphous silicon layer 6p may be dry etching or wet etching. Thereby, the i-type amorphous silicon layer 5a and the p-type amorphous silicon layer 6 are formed on the back surface of the n-type single crystal silicon substrate 1.
  • a plurality of electrodes 8 are formed in the same manner as in the first embodiment so as to correspond to each of the plurality of p-type amorphous silicon layers 6 and the n-type diffusion region 7B. Thereby, the photoelectric conversion element 100B of Embodiment 3 is obtained.
  • the n-type amorphous silicon layer 3 is provided on the i-type amorphous silicon layer 2 on the light incident side of the n-type single crystal silicon substrate 1.
  • the n-type amorphous silicon layer 3 may be provided in contact with the surface on the light incident side of the n-type single crystal silicon substrate 1 without providing the silicon layer 2.
  • the fourth embodiment is a photoelectric conversion module including at least one of the photoelectric conversion elements of the first to third embodiments and the modifications thereof.
  • FIG. 7 is a schematic diagram illustrating an example of the configuration of the photoelectric conversion module according to the present embodiment.
  • the photoelectric conversion module 1000 includes a plurality of photoelectric conversion elements 1001, a cover 1002, and output terminals 1013 and 1014.
  • a plurality of photoelectric conversion elements 1001 are arranged in an array and connected in series.
  • FIG. 7 illustrates an arrangement in which the photoelectric conversion elements 1001 are connected in series.
  • the arrangement and connection method are not limited to this, and the photoelectric conversion elements 1001 may be connected in parallel or may be combined in series and parallel. It is good also as an arrangement.
  • any one of the first to third embodiments and the photoelectric conversion elements of the modified examples is used.
  • the photoelectric conversion module 1000 is not limited to the above description as long as at least one of the plurality of photoelectric conversion elements 1001 includes any of the photoelectric conversion elements according to the first to third embodiments and modifications thereof, and may take any configuration. Shall. Further, the number of photoelectric conversion elements 1001 included in the photoelectric conversion module 1000 can be any integer of 2 or more.
  • the cover 1002 is composed of a weatherproof cover and covers the plurality of photoelectric conversion elements 1001.
  • the cover 1002 includes, for example, a transparent base material (for example, glass) provided on the light receiving surface side of the photoelectric conversion element 1001 and a back surface base material provided on the back surface side opposite to the light receiving surface side of the photoelectric conversion element 1001. (For example, glass, a resin sheet etc.) and the sealing material (for example, EVA etc.) which fills the clearance gap between the said transparent base material and the said resin base material.
  • a transparent base material for example, glass
  • a back surface base material provided on the back surface side opposite to the light receiving surface side of the photoelectric conversion element 1001.
  • the sealing material for example, EVA etc.
  • the output terminal 1013 is connected to a photoelectric conversion element 1001 arranged at one end of a plurality of photoelectric conversion elements 1001 connected in series.
  • the output terminal 1014 is connected to the photoelectric conversion element 1001 arranged at the other end of the plurality of photoelectric conversion elements 1001 connected in series.
  • the fifth embodiment is a photovoltaic power generation system including at least one of the photoelectric conversion elements of the first to third embodiments and the modifications thereof. Since the photoelectric conversion element of the present invention has high conversion efficiency, the photovoltaic power generation system of the present invention including the photoelectric conversion element can also have high conversion efficiency. Note that the solar power generation system is a device that appropriately converts the power output from the photoelectric conversion module and supplies the converted power to a commercial power system or an electric device.
  • FIG. 8 is a schematic diagram illustrating an example of the configuration of the photovoltaic power generation system according to the present embodiment.
  • the photovoltaic power generation system 2000 includes a photoelectric conversion module array 2001, a connection box 2002, a power conditioner 2003, a distribution board 2004, and a power meter 2005.
  • the photoelectric conversion module array 2001 includes a plurality of photoelectric conversion modules 1000 (Embodiment 4). Since the photoelectric conversion element of the present invention has high conversion efficiency, the photovoltaic power generation system of the present invention including the photoelectric conversion element can also have high conversion efficiency.
  • the solar power generation system 2000 is added with a function generally called “Home Energy Management System (HEMS)”, “Building Energy Management System (BEMS)”, or the like. can do. Accordingly, the energy consumption can be reduced by monitoring the power generation amount of the solar power generation system 2000, monitoring / controlling the power consumption amount of each electrical device connected to the solar power generation system 2000, and the like.
  • HEMS Home Energy Management System
  • BEMS Building Energy Management System
  • connection box 2002 is connected to the photoelectric conversion module array 2001.
  • the power conditioner 2003 is connected to the connection box 2002.
  • the distribution board 2004 is connected to the power conditioner 2003 and the electrical equipment 2011.
  • the power meter 2005 is connected to the distribution board 2004 and the commercial power system.
  • a storage battery 2100 may be connected to the power conditioner 2003 as shown in FIG. In this case, output fluctuation due to fluctuations in the amount of sunlight can be suppressed, and power stored in the storage battery 2100 can be supplied even in a time zone without sunlight.
  • the storage battery 2100 may be built in the power conditioner 2003.
  • the photoelectric conversion module array 2001 converts sunlight into electricity to generate DC power and supplies the DC power to the connection box 2002.
  • the power conditioner 2003 converts the DC power received from the connection box 2002 into AC power and supplies it to the distribution board 2004. Note that part or all of the DC power received from the connection box 2002 may be supplied to the distribution board 2004 as it is without being converted to AC power.
  • the power conditioner 2003 receives the direct current received from the connection box 2002. A part or all of the electric power can be appropriately converted into electric power and stored in the storage battery 2100.
  • the power stored in the storage battery 2100 is appropriately supplied to the power conditioner 2003 according to the amount of power generated by the photoelectric conversion module and the power consumption of the electrical equipment 2011, and is appropriately converted to the distribution board 2004. Supplied.
  • the distribution board 2004 supplies the electric equipment 2011 with at least one of the electric power received from the power conditioner 2003 and the commercial electric power received via the electric power meter 2005.
  • the distribution board 2004 supplies the AC power received from the power conditioner 2003 to the electrical equipment 2011 when the AC power received from the power conditioner 2003 is larger than the power consumption of the electrical equipment 2011. Then, surplus AC power is supplied to the commercial power system via the power meter 2005.
  • the distribution board 2004 receives the AC power received from the commercial power system and the AC power received from the power conditioner 2003 in the electrical equipment. To 2011.
  • the power meter 2005 measures the power in the direction from the commercial power system to the distribution board 2004 and measures the power in the direction from the distribution board 2004 to the commercial power system.
  • the photoelectric conversion module array 2001 will be described.
  • FIG. 10 is a schematic diagram showing an example of the configuration of the photoelectric conversion module array 2001 shown in FIG.
  • the photoelectric conversion module array 2001 includes a plurality of photoelectric conversion modules 1000 and output terminals 2013 and 2014.
  • FIG. 10 illustrates an arrangement in which the photoelectric conversion modules 1000 are connected in series.
  • the arrangement and connection method are not limited to this, and the photoelectric conversion modules 1000 may be connected in parallel or may be combined in series and parallel. It is good also as an arrangement.
  • the number of photoelectric conversion modules 1000 included in the photoelectric conversion module array 2001 can be any integer of 2 or more.
  • the output terminal 2013 is connected to the photoelectric conversion module 1000 located at one end of the plurality of photoelectric conversion modules 1000 connected in series.
  • the output terminal 2014 is connected to the photoelectric conversion module 1000 located at the other end of the plurality of photoelectric conversion modules 1000 connected in series.
  • At least one of the plurality of photoelectric conversion elements 1001 includes any of the photoelectric conversion elements of Embodiments 1 to 3 and its modifications. As long as it is not limited to the above description, any configuration can be used.
  • the sixth embodiment is a larger-scale solar power generation system than the solar power generation system described as the fifth embodiment.
  • the photovoltaic power generation system according to the sixth embodiment also includes at least one of the photoelectric conversion elements of the first to third embodiments and the modifications thereof. Since the photoelectric conversion element of the present invention has high conversion efficiency, the photovoltaic power generation system of the present invention including the photoelectric conversion element can also have high conversion efficiency.
  • FIG. 11 is a schematic diagram illustrating an example of the configuration of the photovoltaic power generation system according to the present embodiment.
  • solar power generation system 4000 includes a plurality of subsystems 4001, a plurality of power conditioners 4003, and a transformer 4004.
  • the photovoltaic power generation system 4000 is a larger scale photovoltaic power generation system than the photovoltaic power generation system 2000 shown in FIG. Since the photoelectric conversion element of the present invention has high conversion efficiency, the photovoltaic power generation system of the present invention including the photoelectric conversion element can also have high conversion efficiency.
  • the plurality of power conditioners 4003 are each connected to the subsystem 4001.
  • the number of the power conditioners 4003 and the subsystems 4001 connected thereto can be any integer of 2 or more.
  • a storage battery 4100 may be connected to the power conditioner 4003 as shown in FIG. In this case, output fluctuation due to fluctuations in the amount of sunshine can be suppressed, and power stored in the storage battery 4100 can be supplied even in a time zone without sunshine.
  • the storage battery 4100 may be built in the power conditioner 4003.
  • the transformer 4004 is connected to a plurality of power conditioners 4003 and a commercial power system.
  • Each of the plurality of subsystems 4001 includes a plurality of module systems 3000.
  • the number of module systems 3000 in the subsystem 4001 can be any integer greater than or equal to two.
  • Each of the plurality of module systems 3000 includes a plurality of photoelectric conversion module arrays 2001, a plurality of connection boxes 3002, and a current collection box 3004.
  • the number of the junction box 3002 in the module system 3000 and the photoelectric conversion module array 2001 connected to the junction box 3002 can be any integer of 2 or more.
  • the current collection box 3004 is connected to a plurality of connection boxes 3002.
  • the power conditioner 4003 is connected to a plurality of current collection boxes 3004 in the subsystem 4001.
  • the plurality of photoelectric conversion module arrays 2001 of the module system 3000 convert sunlight into electricity to generate DC power, and supply the DC power to the current collecting box 3004 via the connection box 3002.
  • a plurality of current collection boxes 3004 in the subsystem 4001 supplies DC power to the power conditioner 4003.
  • the plurality of power conditioners 4003 convert DC power into AC power and supply the AC power to the transformer 4004.
  • the power conditioner 4003 is received from the current collection box 3004. A part or all of the DC power can be appropriately converted into power and stored in the storage battery 4100.
  • the electric power stored in the storage battery 4100 is appropriately supplied to the power conditioner 4003 side according to the power generation amount of the subsystem 4001, appropriately converted into electric power, and supplied to the transformer 4004.
  • the transformer 4004 converts the voltage level of AC power received from a plurality of power conditioners 4003 and supplies it to the commercial power system.
  • the solar power generation system 4000 only needs to include at least one of the photoelectric conversion elements of the first to third embodiments and the modifications thereof, and all the photoelectric conversion elements included in the solar power generation system 4000 are the first embodiment. It is not necessary to be a photoelectric conversion element of .about.
  • all of the photoelectric conversion elements included in a certain subsystem 4001 are any of the photoelectric conversion elements of Embodiments 1 to 3 and modifications thereof, and some or all of the photoelectric conversion elements included in another subsystem 4001
  • the present invention is useful for a photoelectric conversion element and a manufacturing method thereof.

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Sustainable Energy (AREA)
  • Photovoltaic Devices (AREA)

Abstract

Selon l'invention, un élément de conversion photoélectrique (100) qui convertit une lumière en énergie électrique, est équipé : d'un substrat de silicium monocristallin de type n (1) (substrat semi-conducteur) ; d'une couche de silicium amorphe de type n (3) (premier film semi-conducteur possédant un premier type de conductivité ou une conductivité de type i) formée par contact avec une surface côté incidence de lumière du substrat de silicium monocristallin de type n (1) ; et d'un film anti réflexion (4) (film diélectrique) formé par contact avec la couche de silicium amorphe de type n (3). La concentration en oxygène présent à l'interface entre la couche de silicium amorphe de type n (3) et le film anti réflexion (4), est inférieure ou égale à 1×1019cm-3.
PCT/JP2015/064014 2014-05-23 2015-05-15 Élément de conversion photoélectrique, et procédé de fabrication de celui-ci WO2015178305A1 (fr)

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JP2014107293 2014-05-23

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP7506593B2 (ja) 2020-12-18 2024-06-26 株式会社カネカ 太陽電池の製造方法

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6165484A (ja) * 1984-08-29 1986-04-04 バリアン・アソシエイツ・インコーポレイテツド モノリシツク半導体デバイスと方法のための高オームコンダクタンス接合
WO2008050889A1 (fr) * 2006-10-27 2008-05-02 Kyocera Corporation Procédé de fabrication d'élément de cellule solaire et élément de cellule solaire
JP2009515336A (ja) * 2005-11-08 2009-04-09 エルジー・ケム・リミテッド 高効率の太陽電池及びその調製方法
JP2013239476A (ja) * 2012-05-11 2013-11-28 Mitsubishi Electric Corp 光起電力装置およびその製造方法、光起電力モジュール

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6165484A (ja) * 1984-08-29 1986-04-04 バリアン・アソシエイツ・インコーポレイテツド モノリシツク半導体デバイスと方法のための高オームコンダクタンス接合
JP2009515336A (ja) * 2005-11-08 2009-04-09 エルジー・ケム・リミテッド 高効率の太陽電池及びその調製方法
WO2008050889A1 (fr) * 2006-10-27 2008-05-02 Kyocera Corporation Procédé de fabrication d'élément de cellule solaire et élément de cellule solaire
JP2013239476A (ja) * 2012-05-11 2013-11-28 Mitsubishi Electric Corp 光起電力装置およびその製造方法、光起電力モジュール

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP7506593B2 (ja) 2020-12-18 2024-06-26 株式会社カネカ 太陽電池の製造方法

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