WO2015123793A1

WO2015123793A1 - Lü CHAOTIC SYSTEM SWITCHING METHOD AND CIRCUIT CONTAINING x2 WITH DIFFERENTFRACTIONAL ORDERS

Info

Publication number: WO2015123793A1
Application number: PCT/CN2014/000400
Authority: WO
Inventors: 梅增霞
Original assignee: 梅增霞
Priority date: 2014-02-22
Filing date: 2014-04-14
Publication date: 2015-08-27
Also published as: CN103780371B; CN103780371A

Abstract

Provided are an Lü chaotic system switching method and circuit containing x² with differentfractional orders. An operational amplifier U1, an operational amplifier U2 and a resistor and a capacitor are utilized for constituting an inverting adder and an inverting integrator with different fractional orders, a multiplier U3 and a multiplier U4 are utilized for achieving multiplication operation, and an analogue switch U5 is utilized for achieving selective output of analogue signals. LF347Ds are adopted for the operational amplifier U1 and the operational amplifier U2, AD633JNs are adopted for the multiplier U3 and the multiplier U4, and an ADG888 is adopted for the analogue switch U5. The operational amplifier U1 is connected to the multiplier U3, the multiplier U4 and the analogue switch U5, the operational amplifier U2 is connected to the multiplier U3 and the analogue switch U5, the multiplier U3 is connected to the operational amplifier U1, the multiplier U4 is connected to the operational amplifier U2, and the analogue switch U5 is connected to the operational amplifier U1 and the operational amplifier U2. Proposed are a novel switching method and circuit for a novel chaotic system, which provides a new thought for increasing chaotic system switching types and applying such a chaotic system to engineering practices.

Description

Fractional views different kinds of systems containing x Lii chaotic switching circuit ² and Method

Technical field

The present invention relates to a chaotic system and circuit implementation, particularly relates to a different fractional orders Lti chaotic method and circuit switching system comprising of X ^2.

Background technique

At present, the methods and circuits for switching chaotic systems mainly include switching between different linear or nonlinear terms in chaotic systems, and fractional order based on the two switching modes. The switching method and circuit of the system have not been proposed yet. The present invention proposes a Lii chaotic switching system method and circuit with different fractional orders. The present invention proposes a novel switching method and circuit for a novel chaotic system. Increasing the type of chaotic system switching and the application of this chaotic system to engineering practice provides a new idea.

Summary of the invention

The technical problem to be solved by the present invention is to provide a method and circuit for a Lii chaotic switching system with different fractions of X ² , and the present invention adopts the following technical means to achieve the object of the invention:

A different fractional orders of X ² Lii-containing chaotic switching system, which is characterized in that it comprises the following steps: (1) containing the equation of X ² Lii chaotic system i is:

Dxl dt = a(y - x)

Dy I dt = cy— xz a = 36, b = 3, c = 22

Dz / dt = x —bz

(2) The equation for the 0.9 order Lii chaotic system ii with x ² is:

(3) The equation for the 0.1th order Lii chaotic system iii with x ² is:

d ^0A x/dt° = a(yx)

d ^{0 l} y I dt ^0A = cy-xz a = 36, b = 3, c = 22

(4 g = f{x), where the expression iv of /(x) is:

(5) ii, iii and iv configured for Fractional containing different views of X ² Lii chaotic switching system V is: < d ^q yl df = cv - xz a = 36, b = 3, c = 22 , q = f(x) = { v

y 〈 l O.l x≤0

d ^q zl dt ^q = x one bz

(6) According to the fractional order of the Lii chaotic switching system V, the analog circuit system is constructed, and the operational amplifier U operational amplifier U2 and the resistor and capacitor are used to form an inverting adder and a fractional-order inverting integrator of different orders. The multiplier U3 and the multiplier U4 realize multiplication, and the analog switch U5 is used to realize the selection and output of the analog signal. The operational amplifier U1 and the operational amplifier U2 adopt LF347D, and the multiplier U3 and the multiplier U4 adopt AD633JN, the analog switch U5 adopts ADG888, the operational amplifier U1 is connected to a multiplier U3, a multiplier U4 and an analog switch U5, the operational amplifier U2 is connected to a multiplier U3 and an analog switch U5, and the multiplier U3 is connected to an operational amplifier U1, the multiplier U4 is connected to an operational amplifier U2, and the analog switch U5 is connected to the operational amplifier U1 and the operational amplifier U2;

The first pin of the operational amplifier U1 is connected to the second pin of the operational amplifier U1 via the resistor R3, and is connected to the sixth pin of the operational amplifier U1 via the resistor R7, and the third, fifth, and tenth of the operational amplifier U1. 12-pin ground, the 4th pin is connected to VCC, the 11th pin is connected to VEE, the 6th pin of the operational amplifier U1 is connected in parallel with the capacitor Cyl l through the resistor Ryl l, and the parallel connection of the resistor Ryl2 and the capacitor Cyl2 is connected. After the resistor Ryl 3 is connected in parallel with the capacitor Cyl 3, it is connected to the 7th pin of the analog switch U5, through the parallel connection of the resistor Ry21 and the capacitor Cy21, and connected in parallel with the resistor Ry22 and the capacitor Cy22, and then connected in parallel with the resistor Ry23 and the capacitor Cy23. , and then connect to the 5th pin of the analog switch U5. The 7th pin of the operational amplifier U1 is connected to the 13th pin of the operational amplifier U1 through the resistor R2, and is connected to the 2nd pin of the operational amplifier m through the resistor R4, and the operational amplifier U1. The 8th pin is connected to the 9th pin of the operational amplifier U1 through the resistor R5, connected to the 2nd pin of the operational amplifier U2, connected to the 1st pin of the multiplier U3, and connected to the 1st and 3rd pins of the multiplier U4. Amplifier lil The 9th pin is connected in parallel with the capacitor Cxl l through the resistor Rxl l, and the parallel connection of the resistor Rxl2 and the capacitor Cxl2, and then connected in parallel with the resistor Rxl 3 and the capacitor Cxl3, and then connected to the second pin of the analog switch U5, through the resistor Rx21 In parallel with the capacitor Cx21, the resistor Rx22 is connected in parallel with the capacitor Cx22, and then connected in parallel with the resistor Rx23 and the capacitor Cx23, and then connected to the fourth pin of the analog switch U5, and the 14th pin of the operational amplifier m is connected through the resistor R1. The 13th pin of amplifier U1 is connected to the 9th pin of operational amplifier U1 through resistor R6.

The sixth and seventh pins of the operational amplifier U2 are left floating, the third, fifth, ten, and twelve pins of the operational amplifier U2 are grounded, the fourth pin is connected to VCC, the eleventh pin is connected to VEE, and the operational amplifier U2 is The first pin is connected to the series ground of resistors R13 and R14, connected to the 8th and 9th pins of analog switch U5 through R13, and the 8th pin of operational amplifier U2 is connected to the 9th pin of operational amplifier U2 through resistor R11. The third pin of U3, the ninth pin of the operational amplifier U2 is connected in parallel with the capacitor Czl1 through the resistor Rzl l, the parallel connection of the resistor Rzl2 and the capacitor Czl2, and then the parallel connection of the resistor Rzl 3 and the capacitor Cz l3, and then Connect the 10th pin of analog switch U5, connect it in parallel with capacitor Cz21 through resistor Rz21. The parallel connection between the resistor Rz22 and the capacitor Cz22, and then the parallel connection of the resistor Rz23 and the capacitor Cz23, and then connected to the 12th pin of the analog switch U5, the 14th pin of the operational amplifier U2 is connected to the 13th pin of the operational amplifier U2 through the resistor R10. , connected to the ninth pin of the operational amplifier U2 through the resistor R12;

The first pin of the multiplier U3 is connected to the eighth pin of the operational amplifier U1, and the third pin is connected to the eighth pin of the operational amplifier U2. The second, fourth, and sixth pins are grounded, and the fifth pin is connected. VEE, the 7th pin is connected to the 6th pin of the operational amplifier U1 through the resistor R8, and the 8th pin is connected to VCC;

The first and third pins of the multiplier U4 are connected to the eighth pin of the operational amplifier U1, the second, fourth, and sixth pins are grounded, the fifth pin is connected to VEE, and the seventh pin is connected to the operational amplifier through the resistor R9. Pin 13 of U2, Pin 8 is connected to VCC; Pin 1 of the analog switch U5 is connected to VCC, Pin 16 is grounded, Pins 13, 14, and 15 are floating, and Pin 3 is connected to the operational amplifier. The 8th pin of U1, the 6th pin is connected to the 7th pin of the operational amplifier U1, and the 11th pin is connected to the 8th pin of the operational amplifier U2.

2. A fractional orders Lii different chaotic circuit containing switching system of X ^2, characterized in that the operational amplifier Ul, U2 of the operational amplifier and an inverting adder Fractional inverter and different orders of resistors and a capacitor The integrator performs multiplication by multiplier U3 and multiplier U4, and selects and outputs an analog signal by using analog switch U5. FF347D is used for operational amplifier U1 and operational amplifier U2, and AD633JN is used for multiplier U3 and multiplier U4. The analog switch U5 is an ADG888, and the operational amplifier U1 is connected to a multiplier U3, a multiplier U4, and an analog switch U5. The operational amplifier U2 is connected to a multiplier U3 and an analog switch U5. The multiplier U3 is connected to the operational amplifier U1. The multiplier U4 is connected to the operational amplifier U2, the analog switch U5 is connected to the operational amplifier U1 and the operational amplifier U2;

The first pin of the operational amplifier U1 is connected to the second pin of the operational amplifier U1 via the resistor R3, and is connected to the sixth pin of the operational amplifier U1 via the resistor R7, and the third, fifth, and tenth of the operational amplifier U1. 12-pin ground, the 4th pin is connected to VCC, the 11th pin is connected to VEE, the 6th pin of the operational amplifier U1 is connected in parallel with the capacitor Cyl l through the resistor Ryl l, and the parallel connection of the resistor Ryl2 and the capacitor Cyl2 is connected. After the resistor Ryl3 is connected in parallel with the capacitor Cyl3, it is connected to the 7th pin of the analog switch U5, through the parallel connection of the resistor Ry21 and the capacitor Cy21, and connected in parallel with the resistor Ry22 and the capacitor Cy22, and then connected in parallel with the resistor Ry23 and the capacitor Cy23, and then Connect the fifth pin of analog switch U5, the seventh pin of operational amplifier U1 is connected to the 13th pin of operational amplifier U1 through resistor R2, the second pin of operational amplifier U1 through resistor R4, the eighth pin of operational amplifier U1 The pin is connected to the ninth pin of the operational amplifier U1 through the resistor R5, to the second pin of the operational amplifier U2, to the first pin of the multiplier U3, to the first and third pins of the multiplier U4, and to the operational amplifier U1. The 9th pin is connected in parallel with the capacitor Cxl l through the resistor Rxl l. Connect the resistor Rxl2 and the capacitor Cxl2 in parallel, and then connect the resistor Rxl3 and the capacitor Cxl3 in parallel, then connect the second pin of the analog switch U5, connect the resistor Rx21 and the capacitor Cx21 in parallel, connect the resistor Rx22 and the capacitor Cx22 in parallel, and then Connected resistor Rx23 and capacitor Cx23 in parallel, then connected to the analog switch U5 4 pin, the 14th pin of the operational amplifier U1 is connected to the 13th pin of the operational amplifier U1 through the resistor R1, and is connected to the 9th pin of the operational amplifier U1 through the resistor R6;

The sixth and seventh pins of the operational amplifier U2 are left floating, the third, fifth, ten, and 12 pins of the operational amplifier U2 are grounded, the fourth pin is connected to VCC, the eleventh pin is connected to VEE, and the operational amplifier U2 is The first pin is connected to the series ground of resistors R13 and R14, connected to the 8th and 9th pins of analog switch U5 through R13, and the 8th pin of operational amplifier U2 is connected to the 9th pin of operational amplifier U2 through resistor R11. The third pin of U3, the ninth pin of the operational amplifier U2 is connected in parallel with the capacitor Czl1 through the resistor Rzl l, and the parallel connection of the resistor Rzl2 and the capacitor Czl2, and then connected in parallel with the resistor Rzl3 and the capacitor Czl3, and then connected to the analog The 10th pin of the switch 115 is connected in parallel with the capacitor Cz21 through the resistor Rz21 and the capacitor Cz21. Then, the parallel connection of the resistor Rz23 and the capacitor Cz23 is connected, and then the 12th pin of the analog switch U5 is connected, and the operational amplifier is connected. The 14th pin of U2 is connected to the 13th pin of the operational amplifier U2 through the resistor R10, and is connected to the 9th pin of the operational amplifier U2 through the resistor R12;

The first and third pins of the multiplier U4 are connected to the eighth pin of the operational amplifier U1, the second, fourth, and sixth pins are grounded, the fifth pin is connected to VEE, and the seventh pin is connected through the resistor R9. Pin 13 of amplifier U2, the 8th pin is connected to VCC; the first pin of the analog switch U5 is connected to VCC, the 16th pin is grounded, the 13th, 14th, and 15th pins are left floating, and the 3rd pin is connected. The 8th pin of amplifier U1, the 6th pin is connected to the 7th pin of the operational amplifier U1, and the 11th pin is connected to the 8th pin of the operational amplifier U2.

The beneficial effects of the invention are as follows: A novel switching method and circuit for a novel chaotic system is proposed, which provides a new idea for increasing the type of chaotic system switching and the application of the chaotic system to engineering practice.

DRAWINGS

FIG. 1 is a schematic diagram of a circuit connection structure according to a preferred embodiment of the present invention.

2 and 3 are actual connection diagrams of the circuit of the present invention.

detailed description

The present invention will now be described in further detail with reference to the accompanying drawings and preferred embodiments, to FIGS.

A method for a Lii chaotic switching system with X ² having different fractional orders, characterized in that it comprises the following steps:

(1) The equation for the Lii chaotic system i with X ² is:

Dx l dt = a{y - x)

\ dy I dt = cy - xz i a = 36, b = 3, c = 22

Dz I dt = X ² - bz (2) The equation for the 0.9 order Lii chaotic system ii with x ² is: ii _Ω = 36, b = 3, c = 22

(3) The equation for the 0.1th order Lii chaotic system iii with x ² is:

d ^0A x/ dt ⁰ - a(yx)

< d ^0A y / dt ^0A = cy-xz iii a = 36, b = 3, c = 22

d ^0A z / dt ^0A = x ² — bz

(4) Construct the switching function g = where /(x) the expression iv is:

Ίθ.9 χ>0

q = f(x) = { iv

[0Λ x≤0

(5) Constructing a fractional order different Li ² chaotic switching system v with ii, iii and iv is:

d ^q XI dt ^q = a(vx) _r

y ^{7 1} ίθ.9 χ>0

< d ^q y / dt ^q = cy— χζ α = 36, b = 3, c = 22 , q = f{x) = \ v

0.1 x ≤ 0

d ^q zl dt ^q ^x ² -bz

(6) depending on the order of fractional Lii chaotic switching system comprising analog circuitry v x ² configuration, the operational amplifier U of the operational amplifier U2 and resistors and a capacitor and an inverting adder different orders Fractional inverting integrator The multiplication operation is performed by the multiplier U3 and the multiplier U4, and the selection output of the analog signal is realized by the analog switch U5. The operational amplifier U1 and the operational amplifier U2 are LF347D, and the multiplier U3 and the multiplier U4 are AD633JN, The analog switch U5 adopts ADG888, and the operational amplifier U1 is connected to the multiplier U3, the multiplier U4 and the analog switch U5. The operational amplifier U2 is connected to the multiplier U3 and the analog switch U5, and the multiplier U3 is connected to the arithmetic unit U1. The multiplier U4 is connected to the operational amplifier U2, the analog switch U5 is connected to the operational amplifier U1 and the operational amplifier U2;

The first pin of the operational amplifier U1 is connected to the second pin of the operational amplifier U1 via the resistor R3, and is connected to the sixth pin of the operational amplifier U1 via the resistor R7, and the third, fifth, and tenth of the operational amplifier U1. 12-pin ground, the 4th pin is connected to VCC, the 11th pin is connected to VEE, the 6th pin of the operational amplifier U1 is connected in parallel with the capacitor Cyll through the resistor Ryll, the parallel connection of the resistor Ryl2 and the capacitor Cyl2, and then the resistor Ryi3 In parallel with the capacitor Cyl3, connect the 7th pin of the analog switch U5, connect the resistor Ry21 and the capacitor Cy21 in parallel, connect the resistor Ry22 and the capacitor Cy22 in parallel, and then connect the resistor Ry23 and the capacitor Cy23 in parallel, then connect the analog The fifth pin of the switch U5, the seventh pin of the operational amplifier U1 is connected to the 13th pin of the operational amplifier U1 through the resistor R2, the second pin of the operational amplifier U1 through the resistor R4, and the eighth pin of the operational amplifier U1. Connect the ninth pin of the operational amplifier U1 through the resistor R5, the second pin of the operational amplifier U2, the first pin of the multiplier U3, the first and third pins of the multiplier U4, and the first of the operational amplifier U1. 9 pins Connect the resistor Rxl l and the capacitor Cxl l in parallel, connect the resistor Rxl2 and the capacitor Cxl2 in parallel, and then connect the resistor Rxl3 and the capacitor Cxl3 in parallel, then connect the second pin of the analog switch U5, and connect the resistor Rx21 to the capacitor Cx21. Connect the resistor Rx22 and the capacitor Cx22 in parallel, and then connect the resistor Rx23 and the capacitor Cx23 in parallel, then connect the fourth pin of the analog switch U5. The 14th pin of the operational amplifier U1 is connected to the 13th of the operational amplifier U1 through the resistor R1. The pin is connected to the ninth pin of the operational amplifier U1 through the resistor R6;

The sixth and seventh pins of the operational amplifier U2 are left floating, the third, fifth, ten, and 12 pins of the operational amplifier U2 are grounded, the fourth pin is connected to VCC, the eleventh pin is connected to VEE, and the operational amplifier U2 is The first pin is connected to the series ground of the resistors R13 and R14, connected to the 8th and 9th pins of the analog switch U5 through R13, and the 8th pin of the operational amplifier U2 is connected to the 9th pin of the operational amplifier U2 through the resistor R11. The third pin of U3, the ninth pin of the operational amplifier U2 is connected in parallel with the capacitor Czl l through the resistor Rzl l, and the parallel connection of the resistor Rzl2 and the capacitor Czl2, and then connected in parallel with the resistor R _z 13 and the capacitor Czl3, and then Connect the 10th pin of the analog switch U5, connect the resistor Rz21 and the capacitor Cz21 in parallel, connect the resistor Rz22 and the capacitor Cz22 in parallel, connect the resistor Rz23 and the capacitor Cz23 in parallel, and then connect the 12th pin of the analog switch U5. The 14th pin of the operational amplifier U2 is connected to the 13th pin of the operational amplifier U2 through the resistor R10, and is connected to the 9th pin of the operational amplifier U2 through the resistor R12;

2. A fractional orders Lii different chaotic circuit containing switching system of X ^2, characterized in that the operational amplifier Ul, U2 of the operational amplifier and an inverting adder Fractional inverter and different orders of resistors and a capacitor The integrator performs multiplication by multiplier U3 and multiplier U4, and selects and outputs an analog signal by using analog switch U5. FF347D is used for operational amplifier U1 and operational amplifier U2, and AD633JN is used for multiplier U3 and multiplier 114. The analog switch U5 is an ADG888, and the operational amplifier U1 is connected to a multiplier U3, a multiplier U4, and an analog switch U5. The operational amplifier U2 is connected to a multiplier U3 and an analog switch U5. The multiplier L13 is connected to the operational amplifier U1. The multiplier U4 is connected to the operational amplifier U2, the analog switch U5 is connected to the operational amplifier U1 and the operational amplifier U2;

The first pin of the operational amplifier U1 is connected to the second pin of the operational amplifier L11 via the resistor R3, and is powered. Resistor R7 is connected to the 6th pin of the operational amplifier Ul, the 3rd, 5th, 10th, and 12th pins of the operational amplifier U1 are grounded, the 4th pin is connected to VCC, the 11th pin is connected to VEE, and the operational amplifier U1 is 6th. The pin is connected in parallel with the capacitor Cyl l through the resistor Ryl l, and the parallel connection between the resistor Ryl2 and the capacitor Cyl2, and then connected in parallel with the resistor Ryl3 and the capacitor Cyl 3, and then connected to the 7th pin of the analog switch U5, through the resistor Ry21 and the capacitor Parallel connection of Cy21, connect resistor Ry22 and capacitor Cy22 in parallel, then connect resistor Ry23 and capacitor Cy23 in parallel, then connect to the fifth pin of analog switch U5. The seventh pin of operational amplifier U1 is connected to operational amplifier U1 through resistor R2. The 13th pin is connected to the second pin of the operational amplifier U1 through the resistor R4, and the eighth pin of the operational amplifier U1 is connected to the ninth pin of the operational amplifier U1 via the resistor R5, and is connected to the second pin of the operational amplifier U2. The first pin of the multiplier U3 is connected to the first and third pins of the multiplier U4, and the ninth pin of the operational amplifier U1 is connected in parallel with the capacitor Cxl l through the resistor Rxl l and the parallel connection of the resistor Rxl2 and the capacitor Cxl2. Reconnect the resistor Rxl3 and the capacitor Cxl3 in parallel, then connect to the analog The second pin of U5 is connected in parallel with the capacitor Cx21 through the resistor Rx21, and the parallel connection between the resistor Rx22 and the capacitor Cx22. After the parallel connection between the resistor Rx23 and the capacitor Cx23, the fourth pin of the analog switch U5 is connected to the operational amplifier U1. The 14th pin is connected to the 13th pin of the operational amplifier U1 through the resistor R1, and is connected to the 9th pin of the operational amplifier U1 through the resistor R6;

The sixth and seventh pins of the operational amplifier U2 are left floating, the third, fifth, ten, and 12 pins of the operational amplifier U2 are grounded, the fourth pin is connected to VCC, the eleventh pin is connected to VEE, and the operational amplifier U2 is The first pin is connected to the series ground of resistors R13 and R14, connected to the 8th and 9th pins of analog switch U5 through R1.3, and the 8th pin of operational amplifier U2 is connected to the 9th pin of operational amplifier U2 through resistor R11. The third pin of the multiplier U3, the ninth pin of the operational amplifier U2 is connected in parallel with the capacitor Czl l through the resistor Rzl l , the parallel connection of the resistor Rz l2 and the capacitor Czl2, and then the resistor R _z 13 and the capacitor Cz l 3 After the parallel connection, the 10th pin of the analog switch U5 is connected, the parallel connection of the resistor Rz21 and the capacitor Cz21 is connected, the parallel connection of the resistor Rz22 and the capacitor Cz22 is connected, and then the parallel connection of the resistor Rz23 and the capacitor Cz23 is connected, and then the analog switch U5 is connected. The 12th pin, the 14th pin of the operational amplifier U2 is connected to the 13th pin of the operational amplifier U2 through the resistor R10, and is connected to the 9th pin of the operational amplifier U2 through the resistor R12;

The first and third pins of the multiplier U4 are connected to the eighth pin of the operational amplifier U1, the second, fourth, and sixth pins are grounded, the fifth pin is connected to VEE, and the seventh pin is connected to the operational amplifier through the resistor R9. Pin 13 of U2, the 8th pin is connected to VCC;

The first pin of the analog switch L15 is connected to VCC, the 16th pin is grounded, the 13th, 14th, and 15th pins are floating, the third pin is connected to the 8th pin of the operational amplifier U1, and the 6th pin is connected to the operational amplifier. The 7th pin of U1 and the 11th pin are connected to the 8th pin of the operational amplifier U2. 3⁄4 3⁄4 Φ 3⁄4 PI i?l = ?3 = = R7 = i?10 = i?12 = \0kQ , R8 = R9 = lk , R4 = 4.5kQ , R2 = R5 = 2 kQ , Rll = 33.3k , Λ 13 = 100 : Ω , Λ 14 = 80 Α : Ω , ΛΧΙ 1 = 1 = ?zl 1 = 62.84 Ω , Λχ 12 = yl2 = Rz\2 = 250 Α : Ω , RxU = Ry\3 = Rz\3 = 2.5kQ , Rx2l = Ry2\ = Rz2\ = 0.636 Ω, Rx22 = Ryll = RzTl = 0.3815 Ω,

Rx23 = Ry23 = i?z23 = 0.5672 Ω , Cxi 1 = yl 1 = Czl 1 = 1.2

Cxl2 = Cy\2 = Czl3 = 1.8 , Cxl3 = Cyl3 = Czl3 = 1.1/ , Cx21 = Cy2\ = Cz2\ = 15.75^ , Cx22 = C>22 = Cz22 = 0.1575 , Cx23 = Cy23 = Cz23 = 633.5nF.

The above description is not intended to limit the invention, and the invention is not limited to the above examples, and variations, modifications, additions or substitutions made by those skilled in the art within the scope of the invention also belong to the invention. protected range.

Claims

claims

1. A Lii chaotic switching system method containing X ² with different fractional orders, which is characterized by including the following steps:

(1) The equation of Lii chaotic system i containing X ² is:

dxl dt = a(y - x)

dy I dt = cy— xz i a = 36, b = 3, c = 22

dz I dt = x ² - bz

(2) The equation of the 0.9th order Lti chaotic system ii containing x ² is:

(3) The equation of the 0.1-order Lii chaotic system iii containing x ² is:

d ⁰ . ¹ x / dt ⁰ - a(yx)

^dol y/dt ^0A =cy-xz in _Ω = 36,b = 3,c = 22

d ^0A z I dt ⁰¹ = x ² - bz

(4) Construct the switching function g = /(JC), where the expression iv of /(x) is:

ίθ.9 >0

q = f(x) = < iv

[0.1 <0

(5) Construct a Lii chaotic switching system V containing with different fractional orders from ii, iii and iv as:

d ^q xldt ^q =a(yx) _r

^ ^J 「0.9 x>0

d ^q y I d =cy-xz a = 36,b = 3,c = 22 , q = f{x) = lv

0.1x<0

d ^q zl dt" =x ² -bz ¹

(6) Construct an analog circuit system based on the Lii chaotic switching system v containing jc ² with different fractional orders, and use operational amplifiers Ul, operational amplifier U2, resistors and capacitors to form an inverting adder and fractional-order inverted integrals of different orders. The multiplier U3 and the multiplier U4 are used to realize the multiplication operation, and the analog switch U5 is used to realize the selection of the analog signal. The operational amplifier U1 and the operational amplifier Z'2 adopt LF347D, and the multiplier U3 and the multiplier U4 adopt AD633JN. , the analog switch U5 adopts ADG888, the operational amplifier U1 is connected to the multiplier U3, the multiplier U4 and the analog switch 115, the operational amplifier U2 is connected to the multiplier U3 and the analog switch U5, the multiplier U3 is connected to the operational amplifier U1 , the multiplier U4 is connected to the operational amplifier U2, and the analog switch U5 is connected to the operational amplifier U1 and the operational amplifier U2;

The 1st pin of the operational amplifier U1 is connected to the 2nd pin of the operational amplifier U1 through the resistor R3, the 6th pin of the operational amplifier U1 is connected to the resistor R7, and the 3rd, 5th, and 10th pins of the operational amplifier U1 , 12 pins are connected to ground, the 4th pin is connected to VCC, the 11th pin is connected to VEE, the 6th pin of the operational amplifier U1 is connected in parallel through the resistor Ryll and the capacitor Cyll, connected in parallel with the resistor Ryl2 and the capacitor Cyl2, and then connected to the resistor Ryl3 After connecting in parallel with the capacitor Cyl3, then connect the analog switch The 7th pin of U5 is connected through the parallel connection of the resistor Ry21 and the capacitor Cy21, to the parallel connection of the resistor Ry22 and the capacitor Cy22, and then to the parallel connection of the resistor Ry23 and the capacitor Cy23, and then to the 5th pin of the analog switch U5, and the operational amplifier U1 The 7th pin of the operational amplifier U1 is connected to the 13th pin of the operational amplifier U1 through the resistor R2, the 2nd pin of the operational amplifier U1 is connected to the resistor R4, and the 8th pin of the operational amplifier U1 is connected to the 9th pin of the operational amplifier U1 through the resistor R5. Pin, connected to the 2nd pin of the operational amplifier U2, connected to the 1st pin of the multiplier U3, connected to the 1st and 3rd pins of the multiplier U4, the 9th pin of the operational amplifier U1 through the resistor Rxl l and the capacitor Cxl l In parallel, connect the resistor Rxl 2 and the capacitor Cxl2 in parallel, then connect the resistor Rxl3 and the capacitor Cxl3 in parallel, then connect the second pin of the analog switch U5, through the parallel connection of the resistor Rx21 and the capacitor Cx21, connect the resistor Rx22 and the capacitor Cx22 in parallel, then connect the resistor Rx23 and the capacitor Cx23 in parallel, then connect the 4th pin of the analog switch U5, the 14th pin of the operational amplifier U1 is connected to the 13th pin of the operational amplifier U1 through the resistor R1, and the 13th pin of the operational amplifier U1 is connected through the resistor R6. Pin 9 of operational amplifier U1;

The 6th and 7th pins of the operational amplifier U2 are floating, the 3rd, 5th, 10th and 12th pins of the operational amplifier U2 are connected to ground, the 4th pin is connected to VCC, the 11th pin is connected to VEE, and the 11th pin of the operational amplifier U2 is connected to the ground. The first pin is connected to the ground through the series connection of resistors R13 and R14, and is connected to the 8th and 9th pins of the analog switch U5 through R13. The 8th pin of the operational amplifier U2 is connected to the 9th pin of the operational amplifier U2 through the resistor R11, and is connected to the multiplication pin. The 3rd pin of the device U3, the 9th pin of the operational amplifier U2 are connected in parallel through the resistor Rz l l and the capacitor Czl l, then connected in parallel with the resistor Rzl2 and the capacitor Cz l2, and then connected in parallel with the resistor Rzl 3 and the capacitor Czl3, and then Connect the 10th pin of analog switch U5, connect the parallel connection of resistor Rz21 and capacitor Cz21, connect the parallel connection of resistor Rz22 and capacitor Cz22, then connect the parallel connection of resistor Rz23 and capacitor Cz23, and then connect the 12th pin of analog switch U5. The 14th pin of the operational amplifier U2 is connected to the 13th pin of the operational amplifier U2 through the resistor R10, and the 9th pin of the operational amplifier U2 is connected through the resistor R12;

The first pin of the multiplier U3 is connected to the 8th pin of the operational amplifier U1, the 3rd pin is connected to the 8th pin of the operational amplifier U2, the 2nd, 4th, and 6th pins are all connected to ground, and the 5th pin is connected to VEE, the 7th pin is connected to the 6th pin of the operational amplifier U1 through the resistor R8, and the 8th pin is connected to VCC;

The 1st and 3rd pins of the multiplier U4 are connected to the 8th pin of the operational amplifier U1, the 2nd, 4th and 6th pins are all connected to ground, the 5th pin is connected to VEE, and the 7th pin is connected to the operational amplifier through the resistor R9 The 13th and 8th pins of U2 are connected to VCC; the 1st pin of the analog switch U5 is connected to VCC, the 16th pin is connected to ground, the 13th, 14th and 15th pins are suspended, and the 3rd pin is connected to the operational amplifier The 8th pin and 6th pin of U1 are connected to the 7th pin of the operational amplifier U1, and the 11th pin is connected to the 8th pin of the operational amplifier U2.

2. A Lii chaotic switching system circuit containing c ² with different fractional orders, which is characterized by using operational amplifiers Ul, operational amplifier U2, resistors and capacitors to form an inverting adder and fractional-order inverters of different orders. The integrator uses the multiplier U3 and the multiplier U4 to realize the multiplication operation, and uses the analog switch U5 to realize the selective output of the analog signal. The operational amplifier U1 and the operational amplifier U2 adopt LF347D, the multiplier U3 and the multiplier U4 adopt the AD633JN, the analog switch U5 adopts the ADG888, the operational amplifier U1 is connected to the multiplier U3, the multiplier U4 and the analog switch L5, so The operational amplifier U2 is connected to the multiplier U3 and the analog switch U5, the multiplier is connected to the operational amplifier U1, the multiplier U4 is connected to the operational amplifier U2, and the analog switch U5 is connected to the operational amplifier U1 and the operational amplifier U2;

The 1st pin of the operational amplifier U1 is connected to the 2nd pin of the operational amplifier U1 through the resistor R3, the 6th pin of the operational amplifier U1 is connected to the resistor R7, and the 3rd, 5th, and 10th pins of the operational amplifier U1 , 12 pins are connected to ground, the 4th pin is connected to VCC, the 11th pin is connected to VEE, the 6th pin of the operational amplifier m is connected in parallel through the resistor Ryll and the capacitor Cyll, connected in parallel with the resistor Ryl2 and the capacitor Cyl2, and then connected to the resistor Ryl3 After parallel connection with capacitor Cyl3, then connect the 7th pin of analog switch U5, through the parallel connection of resistor Ry21 and capacitor Cy21, then connect the parallel connection of resistor Ry22 and capacitor Cy22, then connect the parallel connection of resistor Ry23 and capacitor Cy23, and then connect the analog The 5th pin of switch U5, the 7th pin of operational amplifier U1 are connected to the 13th pin of operational amplifier U1 through resistor R2, the 2nd pin of operational amplifier U1 is connected through resistor R4, and the 8th pin of operational amplifier U1 Connect the 9th pin of the operational amplifier U1 through the resistor R5, connect the 2nd pin of the operational amplifier U2, connect the 1st pin of the multiplier U3, connect the 1st and 3rd pins of the multiplier U4, and connect the 1st and 3rd pins of the operational amplifier U1. Pin 9 is connected in parallel through the resistor Rxll and the capacitor Cxll, then connected in parallel with the resistor Rxl2 and the capacitor Cxl2, and then connected in parallel with the resistor Rxl3 and the capacitor Cxl3, and then connected to the second pin of the analog switch U5, through the parallel connection of the resistor Rx21 and the capacitor Cx21. In parallel, connect the resistor Rx22 and the capacitor Cx22 in parallel, then connect the resistor Rx23 and the capacitor Cx23 in parallel, then connect the 4th pin of the analog switch U5, and the 14th pin of the operational amplifier U1 through the resistor R1. Pin 13, connected to pin 9 of operational amplifier U1 through resistor R6;

The 6th and 7th pins of the operational amplifier U2 are floating, the 3rd, 5th, 10th and 12th pins of the operational amplifier U2 are connected to ground, the 4th pin is connected to VCC, the 11th pin is connected to VEE, and the 11th pin of the operational amplifier U2 is connected to the ground. The first pin is connected to the ground through the series connection of resistors R13 and R14, and is connected to the 8th and 9th pins of the analog switch U5 through R13. The 8th pin of the operational amplifier U2 is connected to the 9th pin of the operational amplifier U2 through the resistor R11, and is connected to the multiplication The third pin of the device 113, the ninth pin of the operational amplifier U2 is connected in parallel through the resistor Rzll and the capacitor Czll, then connected in parallel with the resistor Rzl2 and the capacitor Czl2, and then connected in parallel with the resistor Rzl3 and the capacitor Czl3, and then connected to the analog switch U5 The 10th pin, through the parallel connection of the resistor _RZ21 and the capacitor Cz21, is connected to the parallel connection of the resistor Rz22 and the capacitor Cz22, and then connected to the parallel connection of the resistor Rz23 and the capacitor Cz23, and then connected to the 12th pin of the analog switch U5, operational amplifier The 14th pin of U2 is connected to the 13th pin of the operational amplifier U2 through the resistor R10, and the 9th pin of the operational amplifier U2 is connected through the resistor R12; .

The first pin of the multiplier U3 is connected to the 8th pin of the operational amplifier U1, the 3rd pin is connected to the 8th pin of the operational amplifier U2, the 2nd, 4th, and 6th pins are all connected to ground, and the 5th pin is connected to VEE, the 7th pin is connected to the 6th pin of the operational amplifier U1 through the resistor R8, and the 8th pin is connected to VCC; The 1st and 3rd pins of the multiplier IM are connected to the 8th pin of the operational amplifier U1, the 2nd, 4th and 6th pins are all connected to ground, the 5th pin is connected to VEE, and the 7th pin is connected to the operational amplifier through the resistor R9 The 13th pin and 8th pin of U2 are connected to VCC;

The 1st pin of the analog switch U5 is connected to VCC, the 16th pin is connected to ground, the 13th, 14th, and 15th pins are floating, the 3rd pin is connected to the 8th pin of the operational amplifier U1, and the 6th pin is connected to the operational amplifier The 7th pin and 11th pin of U 1 are connected to the 8th pin of the operational amplifier U2.