WO2015109574A1 - Led wafer-level encapsulation method - Google Patents

Led wafer-level encapsulation method Download PDF

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Publication number
WO2015109574A1
WO2015109574A1 PCT/CN2014/071502 CN2014071502W WO2015109574A1 WO 2015109574 A1 WO2015109574 A1 WO 2015109574A1 CN 2014071502 W CN2014071502 W CN 2014071502W WO 2015109574 A1 WO2015109574 A1 WO 2015109574A1
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WIPO (PCT)
Prior art keywords
led
recess
positive
led wafer
level packaging
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PCT/CN2014/071502
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French (fr)
Chinese (zh)
Inventor
裴小明
曹宇星
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上海瑞丰光电子有限公司
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Priority to PCT/CN2014/071502 priority Critical patent/WO2015109574A1/en
Publication of WO2015109574A1 publication Critical patent/WO2015109574A1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93—Batch processes
    • H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/483—Containers
    • H01L33/486—Containers adapted for surface mounting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008—Processes
    • H01L2933/0033—Processes relating to semiconductor body packages
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008—Processes
    • H01L2933/0033—Processes relating to semiconductor body packages
    • H01L2933/0058—Processes relating to semiconductor body packages relating to optical field-shaping elements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008—Processes
    • H01L2933/0033—Processes relating to semiconductor body packages
    • H01L2933/0066—Processes relating to semiconductor body packages relating to arrangements for conducting electric current to or from the semiconductor body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/52—Encapsulations
    • H01L33/54—Encapsulations having a particular shape

Definitions

  • the invention belongs to the technical field of LED packaging, and in particular relates to an LED wafer level packaging method.
  • the packaging method of the white LED product is to fix the LED chip on the support by means of solid crystal bonding or eutectic soldering, and the positive electrode of the wafer is connected to the positive electrode of the bracket by a gold wire, and the negative electrode of the chip is connected to the negative electrode of the bracket. , and then fill the phosphor that meets the target color zone. Due to the different thermal expansion coefficients of the wafer colloid, the reliability problems of the stent, the solid crystal glue, the gold wire, and the colloid are prone to occur.
  • the material of the positive and negative electrodes of the bonding bracket is PPA, PCT, EMC material, which has large defects in high temperature resistance and air tightness, which affects the reliability of LED products; ceramic brackets have better resistance. High temperature and good air tightness, but the cost of the bracket is close to the cost of the wafer, and the ceramic bracket package LED is expensive, the equipment investment is large, and the production capacity is small. In short, the LED lighting products of the bracket package structure have greatly hindered the replacement of the traditional lighting of the LED lighting products in terms of reliability and service life.
  • the object of the embodiments of the present invention is to provide an LED wafer level packaging method, wherein the LED packaged by the method can be directly soldered to the application end substrate, and the thermal resistance of the support layer required for the conventional package is subtracted, thereby facilitating the wafer PN junction. Cooling and enhancing the reliability of LED products.
  • a transparent substrate having a recess with the opening of the recess facing upward, the bottom surface of the recess being provided with two electrically isolated conductive layers, the conductive layer extending to the bottom surface of the transparent substrate via the side of the recess;
  • An LED chip having positive and negative conductors is placed in the recess, and the positive and negative conductors are fixed to the corresponding conductive layer.
  • a transparent substrate having a recess is obtained, and the recess opening is upward, and the bottom surface of the recess is provided with two electrically isolated conductive layers, and the conductive layer is extended to the transparent base through the side of the recess.
  • the LED thus packaged can be directly soldered to the application end substrate, which reduces the thermal resistance of the bracket layer required for the conventional package, facilitates heat dissipation of the PN junction of the wafer, and enhances the reliability of the LED product.
  • FIG. 1 is a flowchart of an implementation of an LED wafer level packaging method according to an embodiment of the present invention
  • FIG. 2 is a schematic structural view of a transparent substrate provided by an embodiment of the present invention (the upper surface is a flat surface);
  • FIG 3 is a schematic structural view of a transparent substrate provided by an embodiment of the present invention (the upper surface is a curved surface);
  • FIG. 4 is a schematic structural view of a transparent substrate provided by an embodiment of the present invention (the surface is roughened);
  • FIG. 5 is a schematic diagram of an LED wafer level packaging process (not filled with transparent silica gel or fluorescent glue) according to an embodiment of the present invention
  • FIG. 6 is a schematic structural view of an LED produced by an LED wafer level packaging method according to an embodiment of the present invention (unfilled with transparent silica gel or fluorescent glue, the upper surface of the LED is flat);
  • FIG. 7 is a schematic diagram of an LED wafer level packaging process (after filling a transparent silica gel or a fluorescent glue) according to an embodiment of the present invention
  • FIG. 8 is a schematic structural view of an LED produced by an LED wafer level packaging method according to an embodiment of the present invention (filled with transparent silica gel or fluorescent glue, the upper surface of the LED is flat);
  • FIG. 9 is a schematic structural view of an LED produced by an LED wafer level packaging method according to an embodiment of the present invention (filled with transparent silica gel or fluorescent glue, the upper surface of the LED is curved);
  • FIG. 10 is a schematic structural view of an LED produced by an LED wafer level packaging method according to an embodiment of the present invention (filled with transparent silica gel or fluorescent glue, and the upper surface of the LED is roughened).
  • a transparent substrate having a recess is obtained, and the recess opening is upward, and the bottom surface of the recess is provided with two electrically isolated conductive layers, and the conductive layer is extended to the transparent base through the side of the recess.
  • the LED thus packaged can be directly soldered to the application end substrate, which reduces the thermal resistance of the bracket layer required for the conventional package, facilitates heat dissipation of the PN junction of the wafer, and enhances the reliability of the LED product.
  • FIG. 1 shows an implementation flow of an LED wafer level packaging method according to an embodiment of the present invention, which is described in detail below.
  • step S101 a transparent substrate having a recess is obtained with the recess opening facing upward, and the bottom surface of the recess is provided with two electrically isolated conductive layers, and the conductive layer is extended to the side of the recess to The bottom surface of the transparent substrate.
  • the transparent substrate 2 having the recess 1 is first obtained, and the opening of the recess 1 is facing upward, and the bottom surface of the recess 1 is provided with two electrically conductive layers 3 electrically isolated from each other.
  • the side of the pocket 1 extends to the bottom surface of the transparent substrate 2.
  • the transparent substrate 2 is a high-transparent material that can be ball-stitched in a solid state, preferably a transparent glass, ceramic, sapphire or silicon carbide having a plurality of pockets 1 larger than the LED wafer 4,
  • the transparent glass, ceramic, sapphire or silicon carbide is plated with a conductive layer 3 at a suitable position, or a conductive layer is first plated on the bottom of the entire transparent substrate, and then the unnecessary conductive layer is removed.
  • the transparent glass, ceramic, sapphire or silicon carbide is divided to obtain a single LED product, as shown in FIGS. 2 to 4.
  • the pockets 1 are generally formed by physical or chemical methods such as etching.
  • the upper surface of the transparent substrate 2 can be formed into a curved surface which is advantageous for enhancing light extraction and reducing the light exit angle, as shown in FIG.
  • the upper surface of the transparent substrate 2 and the middle portion of the bottom surface of the recess 1 may be roughened in advance to enhance the light extraction efficiency and uniformity of the packaged LED, as shown in FIG. 4 .
  • step S102 an LED chip having positive and negative conductors is placed in the recess, and the positive and negative conductors are fixed to the corresponding conductive layer.
  • the LED chips 4 having the positive and negative conductors 6, 7 are placed in the recesses 1 of the transparent substrate, and the positive and negative conductors 6, 7 are fixed to the corresponding conductive layers 3.
  • the LED chip 4 having the positive and negative conductors 6, 7 is formed by gold balls soldered to the positive and negative electrodes 8, 9 of the LED wafer 4; the LED wafer 4 is hot pressed into the cavity 1 by a gold ball.
  • Each gold ball is fixed to the corresponding conductive layer 3 and forms an electrical connection, as shown in FIGS.
  • Gold ball welding is used instead of gold wire soldering, which greatly improves the reliability of the connection between the horizontal and positive wafer electrodes and the positive and negative terminals of the package.
  • the LED chip 4 is preferably a horizontal structure wafer or a vertical structure wafer which requires a bonding wire.
  • LED obtained in this way 12 does not contain fluorescent glue or transparent silica gel, and its illuminating color is the LED chip illuminating color.
  • the manufactured LED 12 is light in weight and suitable for backlighting and/or illumination of portable electronic products.
  • the stentless integrated package of the LED chip 4 (especially the horizontal structure wafer) is realized in this way, and the cost of the LED product is reduced through mass integration production.
  • the LED chip 4 and the transparent substrate 2 can be directly soldered on the application end substrate, the thermal resistance of the support layer in the conventional package is reduced, the heat conduction of the PN junction of the wafer is greatly shortened, and the thermal reliability of the LED product is improved, and the heat efficiency is effectively Controlling the junction temperature of the PN junction of the wafer greatly increases the efficiency and lifetime of the LED device.
  • the LED package product is soldered at the application end, and the bottom of the LED chip 4 is directly soldered to the heat sink to shorten the heat conduction path and reduce the thermal resistance.
  • the conductive layer drawn from both ends of the substrate is soldered to the corresponding electrode of the circuit board, and the package device is thermally and electrically separated. Improve the thermal and electrical reliability of the product.
  • the LED chip 4 having the positive and negative conductors 6, 7 is placed in the recess 1 and the positive and negative conductors 6, 7 are fixed to the corresponding conductive layer.
  • the step of 3 further comprises: filling the cavity 1 with a transparent silica gel or a fluorescent glue 11 until the fluorescent glue 11 is flush with the bottom surface of the LED wafer 4, and then curing the transparent silica gel or the fluorescent glue 11 as shown in the figure. 7 ⁇ 10 is shown.
  • LED The gap between the wafer 3 and the substrate recess 1 is a controllable uniform thickness space, and the transparent silica gel or the fluorescent glue 11 is filled in the space to obtain a uniform thickness of the fluorescent adhesive layer, which is excited by the blue light of the wafer. A uniform white light is obtained, and the blue light emitted from the wafer is utilized to the utmost, and there is no phenomenon that the luminous flux is low due to the uneven excitation of the blue light, and finally the maximum luminous flux is obtained.

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Led Device Packages (AREA)

Abstract

An LED wafer-level encapsulation method, which is suitable for the technical field of LED encapsulation. The method includes the following steps: acquiring a transparent base material provided with a recess, and enabling the recess to open upward, wherein two electrically isolated conducting layers are arranged on the bottom face of the recess and extend to the bottom face of the base material through the side face of the recess; and placing an LED wafer provided with positive-electrode and negative-electrode electric conductors into the recess, and enabling the positive-electrode and negative-electrode electric conductors to be fixedly connected to corresponding conducting layers. An LED encapsulated in this way can be directly welded on an application-end substrate, thereby reducing the thermal resistance of a support layer required in conventional encapsulation, facilitating heat dissipation of a PN junction of the wafer, and increasing the reliability of an LED product.

Description

[根据细则37.2由ISA制定的发明名称]　LED晶片级封装方法[Invention name established by ISA according to Rule 37.2] LED wafer level packaging method 技术领域Technical field
本发明属于LED封装技术领域，尤其涉及一种LED晶片级封装方法。The invention belongs to the technical field of LED packaging, and in particular relates to an LED wafer level packaging method.
背景技术Background technique
目前，白光LED产品的封装方式是将LED晶片通过固晶胶粘接或共晶焊接的方式固定在支架上，采用金线将晶片的正极连接于支架的正极，晶片的负极连接于支架的负极，再填充符合目标色区的荧光粉。由于支架，晶片胶体的热膨胀系数不同，在支架，固晶胶，金线，胶体等方面容易出现可靠性问题。且LED支架种类繁多，粘接支架正负极的材质为ＰＰＡ，ＰＣＴ，ＥＭＣ材质，在耐高温性，气密性均有较大缺陷，而影响LED产品可靠性；陶瓷支架具有较好的耐高温性和较好的气密性，但支架成本接近晶片成本，且陶瓷支架封装LED制费昂贵，设备投入大，产能小。总之，支架封装结构的LED照明产品在可靠性，使用寿命方面给LED照明产品替代传统照明带来较大阻碍。 At present, the packaging method of the white LED product is to fix the LED chip on the support by means of solid crystal bonding or eutectic soldering, and the positive electrode of the wafer is connected to the positive electrode of the bracket by a gold wire, and the negative electrode of the chip is connected to the negative electrode of the bracket. , and then fill the phosphor that meets the target color zone. Due to the different thermal expansion coefficients of the wafer colloid, the reliability problems of the stent, the solid crystal glue, the gold wire, and the colloid are prone to occur. And the variety of LED brackets, the material of the positive and negative electrodes of the bonding bracket is PPA, PCT, EMC material, which has large defects in high temperature resistance and air tightness, which affects the reliability of LED products; ceramic brackets have better resistance. High temperature and good air tightness, but the cost of the bracket is close to the cost of the wafer, and the ceramic bracket package LED is expensive, the equipment investment is large, and the production capacity is small. In short, the LED lighting products of the bracket package structure have greatly hindered the replacement of the traditional lighting of the LED lighting products in terms of reliability and service life.
技术问题technical problem
本发明实施例的目的在于提供一种LED晶片级封装方法，经该方法封装而成的LED可直接焊接于应用端基板上，减去了常规封装所需支架层的热阻，利于晶片PN结散热，增强LED产品可靠性。 The object of the embodiments of the present invention is to provide an LED wafer level packaging method, wherein the LED packaged by the method can be directly soldered to the application end substrate, and the thermal resistance of the support layer required for the conventional package is subtracted, thereby facilitating the wafer PN junction. Cooling and enhancing the reliability of LED products.
技术解决方案Technical solution
发明实施例是这样实现的，一种LED晶片级封装方法，包括以下步骤：The embodiment of the invention is achieved by an LED chip level packaging method comprising the following steps:
获取具有凹穴的透明基材，并使所述凹穴开口朝上，所述凹穴底面设有两个电隔离的导电层，所述导电层经凹穴侧面延至透明基材的底面；Obtaining a transparent substrate having a recess with the opening of the recess facing upward, the bottom surface of the recess being provided with two electrically isolated conductive layers, the conductive layer extending to the bottom surface of the transparent substrate via the side of the recess;
　　将具有正、负极导电体的LED晶片置于所述凹穴，并使所述正、负极导电体固接于相应导电层。An LED chip having positive and negative conductors is placed in the recess, and the positive and negative conductors are fixed to the corresponding conductive layer.
有益效果Beneficial effect
本发明实施例先获取具有凹穴的透明基材，并使所述凹穴开口朝上，所述凹穴底面设有两个电隔离的导电层，所述导电层经凹穴侧面延至透明基材的底面；然后将具有正、负极导电体的LED晶片置于所述凹穴，并使所述正、负极导电体固接于相应导电层。如此封装而成的LED可直接焊接于应用端基板上，减去了常规封装所需支架层的热阻，利于晶片PN结散热，增强LED产品可靠性。 In the embodiment of the present invention, a transparent substrate having a recess is obtained, and the recess opening is upward, and the bottom surface of the recess is provided with two electrically isolated conductive layers, and the conductive layer is extended to the transparent base through the side of the recess. The bottom surface of the material; then the LED wafer having the positive and negative conductors is placed in the recess, and the positive and negative conductors are fixed to the corresponding conductive layer. The LED thus packaged can be directly soldered to the application end substrate, which reduces the thermal resistance of the bracket layer required for the conventional package, facilitates heat dissipation of the PN junction of the wafer, and enhances the reliability of the LED product.
附图说明DRAWINGS
图1是本发明实施例提供的LED晶片级封装方法的实现流程图；1 is a flowchart of an implementation of an LED wafer level packaging method according to an embodiment of the present invention;
　　图2是本发明实施例提供的透明基材的结构示意图（上表面为平面）；2 is a schematic structural view of a transparent substrate provided by an embodiment of the present invention (the upper surface is a flat surface);
　　图3是本发明实施例提供的透明基材的结构示意图（上表面为弧面）；3 is a schematic structural view of a transparent substrate provided by an embodiment of the present invention (the upper surface is a curved surface);
　　图4是本发明实施例提供的透明基材的结构示意图（表面经粗化处理）；4 is a schematic structural view of a transparent substrate provided by an embodiment of the present invention (the surface is roughened);
　　图5是本发明实施例提供的LED晶片级封装过程示意图（未填充透明硅胶或荧光胶）；5 is a schematic diagram of an LED wafer level packaging process (not filled with transparent silica gel or fluorescent glue) according to an embodiment of the present invention;
　　图6是经本发明实施例提供的LED晶片级封装方法所制得LED的结构示意图（未填充透明硅胶或荧光胶，LED上表面为平面）；6 is a schematic structural view of an LED produced by an LED wafer level packaging method according to an embodiment of the present invention (unfilled with transparent silica gel or fluorescent glue, the upper surface of the LED is flat);
　　图7是本发明实施例提供的LED晶片级封装过程示意图（填充透明硅胶或荧光胶后）；7 is a schematic diagram of an LED wafer level packaging process (after filling a transparent silica gel or a fluorescent glue) according to an embodiment of the present invention;
　　图8是经本发明实施例提供的LED晶片级封装方法所制得LED的结构示意图（填充透明硅胶或荧光胶，LED上表面为平面）；8 is a schematic structural view of an LED produced by an LED wafer level packaging method according to an embodiment of the present invention (filled with transparent silica gel or fluorescent glue, the upper surface of the LED is flat);
　　图9是经本发明实施例提供的LED晶片级封装方法所制得LED的结构示意图（填充透明硅胶或荧光胶，LED上表面为弧面）；9 is a schematic structural view of an LED produced by an LED wafer level packaging method according to an embodiment of the present invention (filled with transparent silica gel or fluorescent glue, the upper surface of the LED is curved);
　　图10是经本发明实施例提供的LED晶片级封装方法所制得LED的结构示意图（填充透明硅胶或荧光胶，LED上表面经粗化处理）。FIG. 10 is a schematic structural view of an LED produced by an LED wafer level packaging method according to an embodiment of the present invention (filled with transparent silica gel or fluorescent glue, and the upper surface of the LED is roughened).
本发明的实施方式Embodiments of the invention
为了使本发明的目的、技术方案及优点更加清楚明白，以下结合附图及实施例，对本发明进行进一步详细说明。应当理解，此处所描述的具体实施例仅仅用以解释本发明，并不用于限定本发明。The present invention will be further described in detail below with reference to the accompanying drawings and embodiments. It is understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
　　本发明实施例先获取具有凹穴的透明基材，并使所述凹穴开口朝上，所述凹穴底面设有两个电隔离的导电层，所述导电层经凹穴侧面延至透明基材的底面；然后将具有正、负极导电体的LED晶片置于所述凹穴，并使所述正、负极导电体固接于相应导电层。如此封装而成的LED可直接焊接于应用端基板上，减去了常规封装所需支架层的热阻，利于晶片PN结散热，增强LED产品可靠性。In the embodiment of the present invention, a transparent substrate having a recess is obtained, and the recess opening is upward, and the bottom surface of the recess is provided with two electrically isolated conductive layers, and the conductive layer is extended to the transparent base through the side of the recess. The bottom surface of the material; then the LED wafer having the positive and negative conductors is placed in the recess, and the positive and negative conductors are fixed to the corresponding conductive layer. The LED thus packaged can be directly soldered to the application end substrate, which reduces the thermal resistance of the bracket layer required for the conventional package, facilitates heat dissipation of the PN junction of the wafer, and enhances the reliability of the LED product.
　　图1示出了本发明实施例提供的LED晶片级封装方法的实现流程，详述如下。FIG. 1 shows an implementation flow of an LED wafer level packaging method according to an embodiment of the present invention, which is described in detail below.
　　在步骤S101中，获取具有凹穴的透明基材，并使所述凹穴开口朝上，所述凹穴的底面设有两个电隔离的导电层，所述导电层经凹穴的侧面延至透明基材的底面。In step S101, a transparent substrate having a recess is obtained with the recess opening facing upward, and the bottom surface of the recess is provided with two electrically isolated conductive layers, and the conductive layer is extended to the side of the recess to The bottom surface of the transparent substrate.
　　本发明实施例先获取具有凹穴1的透明基材2，并使所述凹穴1开口朝上，所述凹穴1底面设有两个相互电隔离的导电层3，所述导电层经凹穴1侧面延至透明基材2的底面。其中，所述透明基材2为固态可植球焊接的高透光性材质，优选为具有多个尺寸较LED晶片4大的凹穴1的透明玻璃、陶瓷、蓝宝石或碳化硅，于所述透明玻璃、陶瓷、蓝宝石或碳化硅适当位置镀上导电层3，或者先在整个透明基材底部镀上导电层，然后移除不需要的导电层。所述LED晶片4封装好后对透明玻璃、陶瓷、蓝宝石或碳化硅进行分割，从而得到单个LED产品，如图2~4所示。应当说明的是，所述凹穴1一般由物理或化学的方法（如蚀刻）所形成。再者，所述透明基材2的上表面可成型为利于提升光取出和减小出光角度的弧面，如图3所示。此外，还可预先对所述透明基材2的上表面及其凹穴1的底面中部进行粗化处理，以提升封装而成的LED的出光效率及均匀度，如图4所示。In the embodiment of the present invention, the transparent substrate 2 having the recess 1 is first obtained, and the opening of the recess 1 is facing upward, and the bottom surface of the recess 1 is provided with two electrically conductive layers 3 electrically isolated from each other. The side of the pocket 1 extends to the bottom surface of the transparent substrate 2. The transparent substrate 2 is a high-transparent material that can be ball-stitched in a solid state, preferably a transparent glass, ceramic, sapphire or silicon carbide having a plurality of pockets 1 larger than the LED wafer 4, The transparent glass, ceramic, sapphire or silicon carbide is plated with a conductive layer 3 at a suitable position, or a conductive layer is first plated on the bottom of the entire transparent substrate, and then the unnecessary conductive layer is removed. After the LED chip 4 is packaged, the transparent glass, ceramic, sapphire or silicon carbide is divided to obtain a single LED product, as shown in FIGS. 2 to 4. It should be noted that the pockets 1 are generally formed by physical or chemical methods such as etching. Furthermore, the upper surface of the transparent substrate 2 can be formed into a curved surface which is advantageous for enhancing light extraction and reducing the light exit angle, as shown in FIG. In addition, the upper surface of the transparent substrate 2 and the middle portion of the bottom surface of the recess 1 may be roughened in advance to enhance the light extraction efficiency and uniformity of the packaged LED, as shown in FIG. 4 .
　　在步骤S102中，将具有正、负极导电体的LED晶片置于所述凹穴，并使所述正、负极导电体固接于相应导电层。In step S102, an LED chip having positive and negative conductors is placed in the recess, and the positive and negative conductors are fixed to the corresponding conductive layer.
　　本发明实施例将具有正、负极导电体6、7的LED晶片4置于透明基材各凹穴1，并使所述正、负极导电体6、7固接于相应导电层3。其中，所述具有正、负极导电体6、7的LED晶片4由金球焊接于LED晶片4的正、负电极8、9形成；所述LED晶片4经金球热压于凹穴1内，各金球固定于相应导电层3并形成电连接，如图5、6所示。此处 用金球焊接取代金线焊接，大大提升了水平正装晶片电极与封装体正、负极连接的可靠性。其中，所述LED晶片4优选为需要焊线的水平结构正装晶片或垂直结构正装晶片。这样得到的LED 12不含荧光胶或透明硅胶，其发光颜色即为LED晶片发光颜色，所制LED 12重量轻，适于便携电子产品的背光或/和照明。In the embodiment of the invention, the LED chips 4 having the positive and negative conductors 6, 7 are placed in the recesses 1 of the transparent substrate, and the positive and negative conductors 6, 7 are fixed to the corresponding conductive layers 3. The LED chip 4 having the positive and negative conductors 6, 7 is formed by gold balls soldered to the positive and negative electrodes 8, 9 of the LED wafer 4; the LED wafer 4 is hot pressed into the cavity 1 by a gold ball. Each gold ball is fixed to the corresponding conductive layer 3 and forms an electrical connection, as shown in FIGS. Here Gold ball welding is used instead of gold wire soldering, which greatly improves the reliability of the connection between the horizontal and positive wafer electrodes and the positive and negative terminals of the package. Wherein, the LED chip 4 is preferably a horizontal structure wafer or a vertical structure wafer which requires a bonding wire. LED obtained in this way 12 does not contain fluorescent glue or transparent silica gel, and its illuminating color is the LED chip illuminating color. The manufactured LED 12 is light in weight and suitable for backlighting and/or illumination of portable electronic products.
　　如此实现了LED晶片4（尤其是水平结构正装晶片）的无支架集成封装，通过大量集成生产，降低LED产品的成本。其中，LED晶片4与透明基材2可直接焊接于应用端基板上，减去了常规封装中支架层的热阻，大大缩短了晶片PN结的热导出，提升LED产品的热可靠性，有效控制晶片PN结的结温，极大地提升LED器件的效率和使用寿命。换言之，于应用端焊接本LED封装产品，LED晶片4底部直接焊接于热沉，缩短导热途径，减小热阻，基材两端引出的导电层焊接于线路板对应电极，封装器件热电分离，提升产品的热和电的可靠性。The stentless integrated package of the LED chip 4 (especially the horizontal structure wafer) is realized in this way, and the cost of the LED product is reduced through mass integration production. Wherein, the LED chip 4 and the transparent substrate 2 can be directly soldered on the application end substrate, the thermal resistance of the support layer in the conventional package is reduced, the heat conduction of the PN junction of the wafer is greatly shortened, and the thermal reliability of the LED product is improved, and the heat efficiency is effectively Controlling the junction temperature of the PN junction of the wafer greatly increases the efficiency and lifetime of the LED device. In other words, the LED package product is soldered at the application end, and the bottom of the LED chip 4 is directly soldered to the heat sink to shorten the heat conduction path and reduce the thermal resistance. The conductive layer drawn from both ends of the substrate is soldered to the corresponding electrode of the circuit board, and the package device is thermally and electrically separated. Improve the thermal and electrical reliability of the product.
　　作为本发明另一个实施例，所述将具有正、负极导电体6、7的LED晶片4置于所述凹穴1，并使所述正、负极导电体6、7固接于相应导电层3的步骤之后还包括：于所述凹穴1内填充透明硅胶或荧光胶11，直至所述荧光胶11与LED晶片4的底面平齐，而后固化所述透明硅胶或荧光胶11，如图7~10所示。因LED 晶片3与基材凹穴1之间的空隙为可控的均匀厚度空间，在此空间内填充所述透明硅胶或荧光胶11，即可得厚度均匀的荧光胶层，通过晶片蓝光激发，进而得到均匀的白光，最大限度地利用晶片发出的蓝光，不存在蓝光不均匀激发导致的光通量低的现象，最终获得最大的光通量。As another embodiment of the present invention, the LED chip 4 having the positive and negative conductors 6, 7 is placed in the recess 1 and the positive and negative conductors 6, 7 are fixed to the corresponding conductive layer. The step of 3 further comprises: filling the cavity 1 with a transparent silica gel or a fluorescent glue 11 until the fluorescent glue 11 is flush with the bottom surface of the LED wafer 4, and then curing the transparent silica gel or the fluorescent glue 11 as shown in the figure. 7~10 is shown. LED The gap between the wafer 3 and the substrate recess 1 is a controllable uniform thickness space, and the transparent silica gel or the fluorescent glue 11 is filled in the space to obtain a uniform thickness of the fluorescent adhesive layer, which is excited by the blue light of the wafer. A uniform white light is obtained, and the blue light emitted from the wafer is utilized to the utmost, and there is no phenomenon that the luminous flux is low due to the uneven excitation of the blue light, and finally the maximum luminous flux is obtained.
　　以上所述仅为本发明的较佳实施例而已，并不用以限制本发明，凡在本发明的精神和原则之内所作的任何修改、等同替换和改进等，均应包含在本发明的保护范围之内。The above is only the preferred embodiment of the present invention, and is not intended to limit the present invention. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present invention should be included in the protection of the present invention. Within the scope.

Claims (6)

  1. 一种LED晶片级封装方法，其特征在于，所述方法包括以下步骤： An LED wafer level packaging method, characterized in that the method comprises the following steps:
    　　获取具有凹穴的透明基材，并使所述凹穴开口朝上，所述凹穴底面设有两个电隔离的导电层，所述导电层经凹穴侧面延至透明基材的底面；Obtaining a transparent substrate having a recess with the opening of the recess facing upward, the bottom surface of the recess being provided with two electrically isolated conductive layers, the conductive layer extending to the bottom surface of the transparent substrate via the side of the recess;
    　　将具有正、负极导电体的LED晶片置于所述凹穴，并使所述正、负极导电体固接于相应导电层。An LED chip having positive and negative conductors is placed in the recess, and the positive and negative conductors are fixed to the corresponding conductive layer.
  2. 　　如权利要求1所述的LED晶片级封装方法，其特征在于，所述将具有正、负极导电体的LED晶片置于所述凹穴，并使所述正、负极导电体固接于相应导电层的步骤之后还包括：The LED wafer level packaging method according to claim 1, wherein the LED chip having positive and negative conductors is placed in the recess, and the positive and negative conductors are fixed to respective conductive materials. The steps of the layer also include:
    　　于所述凹穴内填充透明硅胶或荧光胶，直至所述荧光胶与LED晶片的底面平齐，而后固化所述透明硅胶或荧光胶。The transparent cavity or the fluorescent glue is filled in the cavity until the fluorescent glue is flush with the bottom surface of the LED chip, and the transparent silica gel or fluorescent glue is post-cured.
  3. 　　如权利要求1或2所述的LED晶片级封装方法，其特征在于，所述透明基材为具有多个尺寸较LED晶片大的凹穴的透明玻璃、陶瓷、蓝宝石或碳化硅，所述导电层镀于透明玻璃、陶瓷、蓝宝石或碳化硅；所述LED晶片封装好后对透明玻璃、陶瓷、蓝宝石或碳化硅进行分割，从而得到单个LED。The LED wafer level packaging method according to claim 1 or 2, wherein the transparent substrate is transparent glass, ceramic, sapphire or silicon carbide having a plurality of recesses larger in size than the LED wafer, the conductive The layer is plated on transparent glass, ceramic, sapphire or silicon carbide; after the LED chip is packaged, the transparent glass, ceramic, sapphire or silicon carbide is divided to obtain a single LED.
  4. 如权利要求3所述的LED晶片级封装方法，其特征在于，所述具有正、负极导电体的LED晶片由金球焊接于LED晶片的正、负电极形成；所述LED晶片经金球热压于凹穴内，所述金球固定于相应导电层并形成电连接。The LED chip level packaging method according to claim 3, wherein the LED chip having positive and negative conductors is formed by gold balls soldered to the positive and negative electrodes of the LED wafer; Pressed into the pockets, the gold balls are fixed to the respective conductive layers and form an electrical connection.
  5. 　　如权利要求4所述的LED晶片级封装方法，其特征在于，所述LED晶片为水平结构或垂直结构正装晶片。The LED wafer level packaging method according to claim 4, wherein the LED wafer is a horizontal structure or a vertical structure wafer.
  6. 如权利要求5所述的LED晶片级封装方法，其特征在于，预先对所述透明基材的上表面及其凹穴的底面中部进行粗化处理。The LED wafer level packaging method according to claim 5, wherein the upper surface of the transparent substrate and the middle portion of the bottom surface of the recess are roughened in advance.
PCT/CN2014/071502 2014-01-26 2014-01-26 Led wafer-level encapsulation method WO2015109574A1 (en)

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