WO2015101973A1 - Dispositif à semi-conducteurs - Google Patents

Dispositif à semi-conducteurs Download PDF

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Publication number
WO2015101973A1
WO2015101973A1 PCT/IL2013/051082 IL2013051082W WO2015101973A1 WO 2015101973 A1 WO2015101973 A1 WO 2015101973A1 IL 2013051082 W IL2013051082 W IL 2013051082W WO 2015101973 A1 WO2015101973 A1 WO 2015101973A1
Authority
WO
WIPO (PCT)
Prior art keywords
semiconductor device
busbar
fingers
busbars
current
Prior art date
Application number
PCT/IL2013/051082
Other languages
English (en)
Inventor
Lev STESSIN
Original Assignee
Visic Technologies Ltd.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Visic Technologies Ltd. filed Critical Visic Technologies Ltd.
Priority to PCT/IL2013/051082 priority Critical patent/WO2015101973A1/fr
Publication of WO2015101973A1 publication Critical patent/WO2015101973A1/fr

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • H01L29/861—Diodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/417—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
    • H01L29/41725—Source or drain electrodes for field effect devices
    • H01L29/41758—Source or drain electrodes for field effect devices for lateral devices with structured layout for source or drain region, i.e. the source or drain region having cellular, interdigitated or ring structure or being curved or angular
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312—Gate electrodes for field effect devices
    • H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42372—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the conducting layer, e.g. the length, the sectional shape or the lay-out
    • H01L29/4238—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the conducting layer, e.g. the length, the sectional shape or the lay-out characterised by the surface lay-out

Definitions

  • Embodiments of the invention relate to the structure of semiconductor devices ("SDs").
  • Various SDs such as diodes and field effect transistors (“FETs”), may be operable to selectively be in an ON or OFF state.
  • the SD may comprise a first electrode and a second electrode that are conductively connectable through an intervening semiconductor component, which has a relatively low resistance when the SD is in the ON state and a relatively high resistance when the SD is in the OFF state. Accordingly, the SD is capable of passing an "ON current" through the first and second electrodes when in the ON state, but not when in the OFF state.
  • the SD is a diode that is forward biased
  • the diode is in the ON state and operable to pass the ON current between the first electrode (anode) and the second electrode (cathode) through the intervening and appropriately configured semiconductor component.
  • the SD is a FET with an appropriate voltage applied to a third electrode that serves as a gate electrode
  • the FET is operable to pass the ON current between the first electrode (source) and the second electrode (drain) through the intervening and appropriately configured semiconductor component.
  • the electrodes may be formed on one or more epitaxial layers ("layers") grown on the substrate. It will be appreciated that a structure that is formed or situated "on" the substrate may be formed on one of the epitaxial layers and not be in direct contact with the substrate itself.
  • semiconductor components through which the ON current passes may include a portion of the one or more epitaxial layers grown on the semiconductor substrate, with the layers being appropriately configured as needed.
  • semiconductor substrate or “substrate”, as used herein, may include the one or more epitaxial layers.
  • Increased current density may also cause electromigration in which a portion of the electrodes is dislodged as a result of momentum transfer to the electrode from conducting electrons, leading eventually to malfunction or failure of the electrodes.
  • uneven distribution of current through the SD may reduce the overall current that a SD can safely pass because the unevenness creates pockets of overly high current density.
  • An aspect of an embodiment of the invention is to provide a SD, for example a diode or a FET, having electrodes for passing an ON current, the electrodes being configured to mitigate unevenness in current density along the path of the ON current.
  • a SD hereinafter referred to as a "comb electrode SD”
  • first and second “comb electrodes” having first and second busbars, respectively, which decrease in cross section in opposite directions.
  • the first and second comb electrodes further comprise a plurality of first and second interleaving conductive fingers that extend from the first and second busbars, respectively.
  • the first and second comb electrodes may be conductively connected through their respective conductive fingers and intervening semiconductor components, with the interface between the first and second conducting fingers defining a perimeter available for current flow between the first and second conducting fingers.
  • the comb electrode SD is operable to pass an ON current between a terminal ("first terminal") of the first comb electrode and a terminal ("second terminal") of the second comb electrode.
  • the ON current may flow from the first terminal to the second terminal, or in the other direction from the second terminal to the first terminal.
  • the magnitude of the ON current through the busbars may change along the length of the respective busbars, as the current is transferred between the first and second conductive fingers.
  • the cross section of each busbar decreases as it extends away from its respective terminal.
  • the first busbar cross-section decreases relative to the direction of ON current flow while the cathode busbar cross-section increases relative to the direction of ON current flow.
  • the first and second busbars may be configured to mitigate changes in current density along length of the busbars despite changes in overall current.
  • the busbar cross section may be substantially proportional to the magnitude of ON current. In such a proportional configuration, changes in current density along length of the busbars may be substantially eliminated despite changes in overall current.
  • the current density may be substantially constant along the length of the busbars.
  • the cross section of the busbars may change linearly at a rate that is inversely proportional to each other.
  • the sides of the first and second busbar facing each other may be substantially parallel with each other.
  • the first and second busbars may be arranged with respect to each other in a tongue in groove configuration, in which one of the electrodes comprises two busbar arms that lie on both sides of, and "embrace", a single central busbar of the other electrode.
  • the first and second conductive fingers may be substantially parallel with each other.
  • the first and second conductive fingers may interleave in the intervening space between the first and second busbars.
  • the first and second conductive fingers may have substantially the same length.
  • the first and second comb electrodes including the respective terminals, busbars and conductive fingers do not overlap.
  • the first and second comb electrodes are formed on a same epitaxial layer of the semiconductor substrate.
  • the comb electrode SD may further include a third comb electrode comprising a plurality of third conductive fingers commonly connected to a third busbar that extends from a third terminal.
  • the third conductive fingers are arranged so that each third conductive finger is situated between one first conductive finger and one second conductive finger.
  • the comb electrode SD having the first and second comb electrodes may be a lateral diode ("comb diode”), with the first comb electrode being an anode and the second comb electrode being a cathode.
  • the comb electrode SD may by a lateral FET ("comb FET”), with the first comb electrode being a source, the second electrode being a drain that further includes a gate electrode, which may optionally be the third electrode.
  • FIG. 1 schematically shows, in an overhead view, anode and cathode electrodes of a comb diode, in accordance with an embodiment of the invention
  • FIG. 2 schematically shows, in an overhead view, source drain and gate electrodes of a comb FET, in accordance with an embodiment of the invention
  • Fig. 3 schematically shows, in an overhead view, the electrodes of an alternative comb diode, in accordance with an embodiment of the invention.
  • FIG. 4 schematically shows, in an overhead view, the electrodes of an alternative comb FET, in accordance with an embodiment of the invention.
  • a comb diode in accordance with an embodiment of the invention are schematically illustrated in Fig. 1 and discussed with reference to that figure.
  • the components of a comb FET in accordance with an embodiment of the invention are schematically illustrated in Fig. 2 and discussed with reference to that figure.
  • An alternative comb diode and an alternative comb FET are schematically illustrated in Figs. 3-4 and discussed with reference to those figures.
  • FIG. 1 showing a schematic view of an exemplary comb diode 100 having an anode 120 ("comb anode”) and cathode 130 (“comb cathode”) formed on a semiconductor substrate 110.
  • Substrate 110 may optionally comprise Si, SiC, GaAs, or GaN.
  • the substrate may optionally be a layered substrate such as a GaN on Si wafer substrate or a GaN on SiC substrate.
  • Comb anode 120 includes multiple conductive fingers 124 ("anode fingers”) extending from each of two sides of a central anode busbar 122 in a "fishbone" configuration.
  • Comb cathode 130 includes two cathode busbars 132 on each of the two sides of anode busbar 122 in a tongue-in-groove configuration. Multiple conductive fingers 134 ("cathode fingers") extend from each cathode busbar 132 and interleave with anode fingers 124.
  • Comb anode 120 further includes an anode terminal 121 connected to one end of anode busbar 122 and comb cathode 130 further includes a cathode terminal 131 connected to one end of cathode busbar 132.
  • Comb diode 100 is operable to pass an "ON current" between anode fingers 124 and cathode fingers 134 through a current path in the intervening semiconductor substrate when the comb diode is forward biased.
  • Comb anode 110 and comb cathode 120 do not overlap or make contact with each other.
  • anode fingers 124 and cathode fingers 134 may be on a same epitaxial layer on semiconductor substrate 110.
  • comb diode 100 as shown in Fig. 1 anode fingers 124 are schematically presented as having rounded ends while cathode fingers 134 are schematically presented as having cornered ends. This distinction is made to facilitate visually distinguishing the anode and cathode fingers, and is not intended to be limiting.
  • Comb anode 120 and comb cathode 130 may optionally comprise one or more of metals such as aluminum, gold, copper, nickel or titanium, or a combination thereof.
  • the combination may be in the form of alloys. Alternatively, the combination may be multiple layers of different metals, which may be elemental metals or alloys.
  • Various methods of applying patterned metal layers on semiconductor substrates are known in the art.
  • comb diode 100 when comb diode 100 is forward biased, ON current flows from anode terminal 121 to cathode terminal 131.
  • the ON current enters the comb diode from anode terminal 121, travels through anode busbar 122, enters anode fingers 124 and transfers to adjacent cathode fingers 144 through the intervening portion of semiconductor substrate 110, and continues through cathode busbars 132 to cathode terminal 131.
  • the interleaved arrangement of the anode fingers and cathode fingers creates a large total perimeter available for current flow between anode 120 and cathode 130.
  • the white block arrows of varying sizes shown in Fig. 1 schematically show the direction and magnitude of ON current through the different electrode busbars of comb diode 100, and the small filled arrows schematically show the direction and magnitude of ON current through the electrode fingers.
  • the different sizes of the white block arrows reflect the change in magnitude of the ON current as it travels through the busbars.
  • the ON current through anode busbar 122 decreases along its length starting from anode terminal 121, as more of the ON current is diverted from anode busbar 122 through the interleaved conductive fingers to the cathode.
  • the ON current through cathode busbar 132 increases along its length towards cathode terminal 131, as more ON current enters cathode busbar 132 from anode busbar 122 through the interleaved conductive fingers.
  • the ON current through each conductive finger 124, 134 may be of substantially the same magnitude.
  • the first and second busbars decrease in cross section in opposite directions.
  • distance from the anode terminal is inverse to the distance from the cathode terminal. That is, as ON current flows away from the anode terminal, it flows towards the cathode terminal.
  • the cross section of each busbar decreases as it extends away from its respective terminal.
  • the anode busbar cross-section decreases relative to the direction of ON current flow while the cathode busbar cross-section increases relative to the direction of ON current flow.
  • each busbar may be shaped to change its cross section along its length to have the cross section be substantially proportional to the magnitude of ON current.
  • Such proportional configuration serves to reduce changes in current density along length of the busbars despite the change in overall current. Reducing anode busbar cross-section in coordination with the reduction in ON current magnitude along its length serves to stabilize current density along the length of the anode busbar.
  • increasing the cross-section of the cathode busbar in coordination with the increase in ON current along its length serves to stabilize current density along the length of the cathode busbar.
  • the current density may be substantially constant along the length of the busbars.
  • the change in current at each point along the busbar may be dependent on the magnitude of current flow through the conductive fingers. Accordingly, in certain embodiments of the invention, the shape of each busbar may depend on the resistance of the conductive fingers and the distribution of said conductive fingers along the busbars.
  • the change in cross-section may be gradual.
  • the change in cross section may be in a stepwise manner, for example before, at, or after each conductive finger.
  • the change in cross-section is substantially linear.
  • the change in the cross-section of the first and second busbars along their respective lengths is accomplished by a change in the width of the busbar while the thickness of the busbars remains substantially constant.
  • a width- based change in busbar cross section is advantageous where the electrodes are formed as patterned thin metal layers of substantially uniform thickness on semiconductor substrate 110.
  • the width-based change in busbar cross section is advantageous where the ON current has a high frequency. Under high current frequencies, current flow tends to occur at or near the surface of the electrodes, and increasing electrode thickness is less effective in reducing current density compared to increasing electrode width.
  • Comb diode 100 having the anode and cathode busbars decrease in width may advantageously cover a smaller surface area and allow more diodes to be fabricated per wafer compared to a conventional lateral diode having busbars of constant width.
  • the total current along the busbars are highest toward the respective terminals, and the widths of the busbars of comb diode 100 are correspondingly widest where it is closest to its respective terminal.
  • Constant-width busbars of an otherwise similarly configured conventional diode require the same width as the widest portion of the decreasing-width busbars of comb diode 100 in order to have a comparable current capacity and maximum current density.
  • the decreasing-width busbars of comb diode 100 occupy a comparatively smaller surface area. Therefore, comb diode 100 as a whole may occupy a smaller surface area.
  • a conventional diode with constant-width busbars that occupies the same total surface area as comb diode 100 may require that the anode and cathode fingers be shortened in order to accommodate the larger surface area occupied by the constant-width busbars, thus resulting in the conventional diode having a higher ON current resistance due to a smaller total perimeter available for current flow between the anode and cathode.
  • each anode finger 124 is substantially parallel with each other and each cathode finger 134 is substantially parallel with each other.
  • the conductive fingers may be connected to their respective busbars at a substantially perpendicular angle.
  • anode fingers 124 are substantially parallel to cathode fingers 134.
  • the sides of anode busbar 122 and cathode busbars 132 facing each other may be substantially parallel with each other.
  • each conductive finger may be substantially identical in size and shape.
  • Each conductive finger may further be substantially identical in composition. Where each conductive finger is substantially identical in size, shape and composition, the resistance of each finger is typically also substantially identical.
  • the dimensions of the conductive fingers 124, 134 are substantially equal, the ON current through each conductive finger are substantially equal (as indicated by the identical small filled arrows), and conductive fingers 124, 134 extend from their respective busbars 122, 132 at regular intervals.
  • the current through anode busbar 122 decreases in a substantially linear manner along its length, in proportion to the distance from anode terminal 121.
  • the current through cathode busbar 132 decreases in a substantially linear manner along its length, in proportion to the distance from cathode terminal 131.
  • the anode busbar cross-section decreases substantially linearly relative to the direction of ON current flow while the cathode busbar cross-section increases substantially linearly relative to the direction of ON current flow.
  • Linearly changing the width of busbars 122, 132 along its length at a rate substantially equal to the change in the magnitude of the ON current serves to mitigate or substantially eliminate changes in current density along the length of the anode and cathode busbars.
  • the current density in the anode and cathode busbars are substantially evenly distributed and substantially constant along the length of the busbar.
  • anode busbar 122 is parallel with cathode busbar 132 and conductive fingers 124, 134 extend perpendicularly from their respective busbars. Further, all of conductive fingers 124, 134 are substantially parallel with each other. In such a configuration, in accordance with an embodiment of the invention, the combined widths of the anode and cathode busbars at each point along the respective lengths of the busbars remain substantially constant.
  • the ON current may flow in the opposite direction, with comb anode 120 serving as the cathode and comb cathode 130 serving as the anode, and with semiconductor substrate 110 appropriately configured.
  • Comb anode 120 and comb cathode 130 may also be advantageously incorporated in a lateral FET instead of a lateral diode.
  • An exemplary lateral FET incorporating a source that is substantially identical to comb anode 120 and a drain that is substantially identical to comb cathode 130 is described in further detail with respect to Fig. 2.
  • FIG. 2 showing a schematic view of an exemplary comb FET 200 having a source 220 ("comb source”) and drain 230 (“comb drain”) formed on a semiconductor substrate 210.
  • Comb source 220 is substantially identical in structure to comb anode 120, having multiple conductive fingers 224 ("source fingers") extending from each of two sides of a central source busbar 222 in a "fishbone” configuration.
  • Comb drain 230 is substantially identical in structure to comb cathode 130, having two drain busbars 232 on each of the two sides of source busbar 222 in a tongue in groove configuration, with conductive fingers 234 (“drain fingers”) extending from each of cathode busbars 232.
  • Comb FET 200 may further include a gate 240 (“comb gate”) that includes two gate busbars 242 on each of the two sides of source busbar 222.
  • Multiple conductive fingers 244 extend from each of gate busbars 242. Gate fingers 244 are arranged so that each gate finger 244 is situated between one source finger 224 and one drain finger 234.
  • gate finger 244 is separate from, and do not make contact with, source finger 224 and drain finger 234.
  • Gate finger 244 is optionally situated to be closer to source finger 224 than to drain finger 234.
  • gate finger 244 is situated on an insulating layer 212 of semiconductor substrate 210.
  • Gate finger 244 is optionally shaped as a "mushroom gate” (also referred to as a "tee gate”) that includes a protruding spine ("gate contact bar”) 245, which is narrower than the main body of the gate finger and runs along its longitudinal axis.
  • Gate finger 244 optionally makes contact with insulating layer 212 through gate contact bar 245.
  • Substrate 210 and insulating layer 212 are optionally configured to form trenches 214, and gate contact bar 245 is optionally situated within trench 214.
  • Comb FET 200 is capable of passing "ON current" between source fingers 224 and drain fingers 234 through a current path in the intervening semiconductor substrate when an appropriate voltage is applied to the gate fingers.
  • the base portion of source finger 224 proximal to source busbar 222 overlaps with gate busbar 242.
  • the base portion of source finger 224 including at least the portion that overlaps with the gate busbar, may comprise an air bridge 226 that provides a gap between the gate busbar and the base portion of the source fingers so that the two electrodes overlap without making contact.
  • the base portion of source finger 224 may be higher or lower in relation to gate busbar 242 (not shown).
  • air bridge 226 is thinner than the rest of source finger 224 in order to provide the gap between the source finger and the gate busbar (not shown), and may also be wider than the rest of the source finger in order to mitigate the reduction in source finger cross-section and thus stabilize the current density at the air bridge.
  • the overlapping but non- contacting portions of the source finger base portions and the gate busbar may be separated by an insulating structure (not shown).
  • Comb diode 100 has reflection symmetry, with the axis of symmetry being equivalent to the longitudinal axis of anode busbar 120.
  • An aspect of an embodiment of the invention may also provide a non-symmetrical comb diode.
  • An exemplary non-symmetrical comb diode is shown in Fig. 3, which schematically illustrates an alternative comb diode 170 that comprises substantially half of comb diode 100 on one side of its axis of symmetry.
  • Comb FET 200 also has reflection symmetry, with the axis of symmetry being equivalent to the longitudinal axis of source busbar 220.
  • An aspect of an embodiment of the invention may also provide a non-symmetrical comb FET.
  • An exemplary non-symmetrical comb FET is show in Fig. 4, which schematically illustrates an alternative comb FET 270 that comprises substantially half of comb FET 200 on one side of its axis of symmetry.
  • each of the verbs, "comprise” “include” and “have”, and conjugates thereof, are used to indicate that the object or objects of the verb are not necessarily a complete listing of components, elements or parts of the subject or subjects of the verb.

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Junction Field-Effect Transistors (AREA)

Abstract

L'invention concerne, selon un mode de réalisation, un dispositif à semiconducteurs comprenant: une première et une seconde électrode comportant une première et une seconde barre omnibus respectives dont la section transversale décroît dans des directions opposées; et une pluralité de premiers et de seconds doigts conducteurs entrelacés qui s'étendent de la première et de la seconde barre omnibus, respectivement.
PCT/IL2013/051082 2013-12-30 2013-12-30 Dispositif à semi-conducteurs WO2015101973A1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
PCT/IL2013/051082 WO2015101973A1 (fr) 2013-12-30 2013-12-30 Dispositif à semi-conducteurs

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/IL2013/051082 WO2015101973A1 (fr) 2013-12-30 2013-12-30 Dispositif à semi-conducteurs

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WO2015101973A1 true WO2015101973A1 (fr) 2015-07-09

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108428737A (zh) * 2016-10-17 2018-08-21 李湛明 具有叉指型电极的半导体器件
JP2021093556A (ja) * 2021-03-16 2021-06-17 ローム株式会社 Ｒｃ−ｉｇｂｔ半導体装置
CN114141868A (zh) * 2022-02-07 2022-03-04 深圳市时代速信科技有限公司 一种半导体器件及其制备方法

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0725445A1 (fr) * 1995-02-06 1996-08-07 Nec Corporation Transistor à effet de champ en forme de peigne
US20070108617A1 (en) * 2005-09-30 2007-05-17 Infineon Technologies Ag Semiconductor component comprising interconnected cell strips
US7417257B2 (en) * 2003-12-05 2008-08-26 International Rectifier Corporation III-nitride device with improved layout geometry
EP2477228A1 (fr) * 2009-09-07 2012-07-18 Dynax Semiconductor, Inc. Dispositif à semi-conducteur et procédé de fabrication associé

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0725445A1 (fr) * 1995-02-06 1996-08-07 Nec Corporation Transistor à effet de champ en forme de peigne
US7417257B2 (en) * 2003-12-05 2008-08-26 International Rectifier Corporation III-nitride device with improved layout geometry
US20070108617A1 (en) * 2005-09-30 2007-05-17 Infineon Technologies Ag Semiconductor component comprising interconnected cell strips
EP2477228A1 (fr) * 2009-09-07 2012-07-18 Dynax Semiconductor, Inc. Dispositif à semi-conducteur et procédé de fabrication associé

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108428737A (zh) * 2016-10-17 2018-08-21 李湛明 具有叉指型电极的半导体器件
CN108428737B (zh) * 2016-10-17 2022-06-21 苏州量芯微半导体有限公司 具有叉指型电极的半导体器件
JP2021093556A (ja) * 2021-03-16 2021-06-17 ローム株式会社 Ｒｃ−ｉｇｂｔ半導体装置
JP7227999B2 (ja) 2021-03-16 2023-02-22 ローム株式会社 Ｒｃ－ｉｇｂｔ半導体装置
CN114141868A (zh) * 2022-02-07 2022-03-04 深圳市时代速信科技有限公司 一种半导体器件及其制备方法
CN114141868B (zh) * 2022-02-07 2022-04-12 深圳市时代速信科技有限公司 一种半导体器件及其制备方法

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