WO2015090046A1 - 数字均流方法和电源模块 - Google Patents

数字均流方法和电源模块 Download PDF

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Publication number
WO2015090046A1
WO2015090046A1 PCT/CN2014/081837 CN2014081837W WO2015090046A1 WO 2015090046 A1 WO2015090046 A1 WO 2015090046A1 CN 2014081837 W CN2014081837 W CN 2014081837W WO 2015090046 A1 WO2015090046 A1 WO 2015090046A1
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Prior art keywords
power module
current
frequency
output current
module
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PCT/CN2014/081837
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English (en)
French (fr)
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樊晓东
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华为技术有限公司
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Priority to US14/586,109 priority Critical patent/US9621146B2/en
Publication of WO2015090046A1 publication Critical patent/WO2015090046A1/zh

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    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05FSYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10Regulating voltage or current
    • G05F1/46Regulating voltage or current wherein the variable actually regulated by the final control device is dc

Definitions

  • the present invention relates to circuit technology, and in particular, to a digital current sharing method and a power module. Background technique
  • each power module also has the function of plugging and unplugging for easy disassembly, repair and maintenance.
  • the internal resistance of each power module is slightly different, and the output voltage is not likely to be exactly the same. Therefore, the voltage sources of the regulated output cannot be directly connected in parallel, or even if they are connected in parallel, the output power of each module is different. It is possible that some power modules will work at an overload, and the heat loss will be severe, and the life will be reduced. However, some power modules work at light loads, and even do not enter a good working state, which is also detrimental to the service life of the power module.
  • Analog current sharing is a method of transmitting current information with analog signals to complete the output current sharing control of each power module.
  • the method of analog current sharing has the following problems: 1) The reference ground belongs to different rectifier modules, and the difference of ground potential directly affects the accuracy of current sharing; 2) the length of the current sharing line is long, and it is susceptible to electromagnetic environment close to strong interference. Interference; 3) The analog device is greatly affected by temperature and also affects the accuracy of current sharing.
  • the digital current sharing is transmitted by the 0 and 1 signals, which is less affected by the ground potential and has a strong ability to resist electromagnetic interference.
  • By modifying the software it is easy to achieve current sharing between different power modules without changing the hardware, so the compatibility is also ideal.
  • digital current sharing technology requires custom chips, which makes digital current sharing technology very limited in cost and versatility. Summary of the invention
  • the invention provides a digital current sharing method and a power supply module, so as to realize digital current sharing without requiring a customized chip, reduce the cost of digital current sharing, and improve the versatility of digital current sharing.
  • a first aspect of the present invention provides a digital current sharing method, including: Obtaining a current value from a counter preset value loading module in each of the same cycles, wherein the current value is a magnitude value of an output current of a power module in which the counter preset value loading module is located, and is used to represent a pulse on the power module Frequency modulation of a modulation frequency of the PFM generator; the homogenous period is a coherent period of the power module and a PFM generator on the power module in parallel with the power module;
  • the output current of the power module is adjusted according to the current magnitude of the power module with the largest output current.
  • the continuous variable frequency pulse is transmitted to the open collector gate of the triode connected to the PFM generator according to the homogenous signal
  • the digital current sharing bus connected to the power module includes:
  • the continuous variable frequency pulse is transmitted to the power module by the open collector gate of the triode connected to the PFM generator. Stream bus.
  • the method further includes:
  • the PFM generator is reset at the time of receiving the homogenous signal, starts a new synchronic period, and re-sets from the counter
  • the load module acquires the current value.
  • the output current of the power module is larger, the continuous frequency conversion The higher the frequency of the pulse.
  • the adjusting an output current of the power module according to a current size of a power module with a current maximum output current includes:
  • a second aspect of the present invention provides a power supply module, including: a pulse frequency modulation PFM generator, a counter preset value loading module, a cycle counter, a microcontroller, and an inverter; the inverter is connected to the PFM generator ;
  • the PFM generator is configured to acquire a current value from the counter preset value loading module in each of the same cycles, where the current value is a magnitude value of an output current of the power module, and is used to indicate that the PFM occurs
  • the modulation frequency of the device is a synchronization period of the power module and the PFM generator on the power module connected in parallel with the power module; and generating a continuous frequency conversion pulse according to the current value, and receiving the a homogenous signal transmitted by the inverter, the homogenous signal being information of a peer update time acquired by the inverter from a digital current sharing bus connected to the power module; and according to the homologous signal,
  • the continuous variable frequency pulse is transmitted to the digital current sharing bus through a collector open gate of a triode connected to the PFM generator;
  • the cycle counter is configured to count the frequency of the continuous variable frequency pulse on the digital current sharing bus, and the obtained frequency count value is used to represent the current output current of the power module and the power module connected in parallel with the power module The current size of the largest power module;
  • the microcontroller is configured to adjust an output current of the power module according to a current size of a power module with a current output current obtained by the cycle counter.
  • the PFM generator is specifically configured to: when the frequency of the continuous variable frequency pulse is greater than or equal to a frequency of the homogenous signal, The continuous variable frequency pulse is transmitted to the digital current sharing bus connected to the power module through the collector open gate of the triode connected by the PFM generator.
  • the PFM generator is further configured to: when the frequency of the continuous variable frequency pulse is less than When the frequency of the homologous signal is received, it is reset at the time of receiving the homologous signal, a new synchronic period is started, and the current value is re-acquired from the counter preset value loading module.
  • the PFM occurs The higher the frequency of the continuous variable frequency pulses generated by the device.
  • the microcontroller is specifically configured to maximize a current output current
  • the current magnitude of the power module is compared with the output current of the power module.
  • the output current of the power module is relatively large, the output voltage of the power module is decreased to reduce the power module.
  • a current value is obtained from a counter preset value loading module in each of the same cycles, a continuous variable frequency pulse is generated according to the current value, and a peer transmitted by the inverter connected to the PFM generator is received.
  • the continuous variable frequency pulse is transmitted to the digital current sharing bus through the collector open gate of the triode connected by the PFM generator; again, the frequency of the continuous variable frequency pulse on the digital current sharing bus Counting, the obtained frequency count value is used to indicate the current level of the power module and the power module with the largest current output current in the power module connected in parallel with the power module; finally, the power module is adjusted according to the current size of the power module with the largest output current.
  • the output current can be used to realize the current sharing control of each parallel power supply module through the digital current sharing bus, and the carrier of the digital current sharing bus exchange information is a pulse frequency.
  • digital current sharing can be realized without the need for a custom chip, thereby reducing the cost of digital current sharing and improving the versatility of digital current sharing.
  • FIG. 2 is a block diagram showing an implementation of another embodiment of a digital current sharing method according to the present invention.
  • FIG. 3 is a timing diagram of obtaining an update timing of an inverter from a digital current sharing bus according to the present invention
  • FIG. 4 is a schematic structural diagram of an embodiment of a power module according to the present invention.
  • FIG. 1 is a flowchart of an embodiment of a digital current sharing method according to the present invention. As shown in FIG. 1, the digital current sharing method may include:
  • Step 101 Acquire a current value from a counter preset loading module in each peer cycle.
  • the current value is a magnitude value of an output current of a power module of the counter preset value loading module, and is used to indicate a modulation frequency of a pulse frequency modulation (PFM) generator on the power module;
  • PFM pulse frequency modulation
  • Step 102 Generate a continuous variable frequency pulse according to the current value, and receive a homogenous signal transmitted by an inverter connected to the PFM generator.
  • the above-mentioned peer signal is information of the peer update time obtained by the inverter from the digital current sharing bus connected to the power module.
  • Step 103 According to the homologous signal, the continuous variable frequency pulse is transmitted to the digital current sharing bus through an open collector (OC) gate of a triode connected by the PFM generator.
  • OC open collector
  • Step 104 Count the frequency of the continuous variable frequency pulse on the digital current sharing bus, and obtain the frequency count value for indicating the current of the power module that has the largest current output current among the power module and the power module connected in parallel with the power module. size.
  • Step 105 Adjust an output current of the power module according to a current size of a power module with a current maximum output current.
  • the step 103 may be: if the frequency of the continuous variable frequency pulse is greater than or equal to the frequency of the homogenous signal, the continuous variable frequency pulse is transmitted to the power module by the OC gate of the triode connected by the PFM generator.
  • the digital current sharing bus may be: if the frequency of the continuous variable frequency pulse is greater than or equal to the frequency of the homogenous signal, the continuous variable frequency pulse is transmitted to the power module by the OC gate of the triode connected by the PFM generator.
  • the digital current sharing bus may be: if the frequency of the continuous variable frequency pulse is greater than or equal to the frequency of the homogenous signal, the continuous variable frequency pulse is transmitted to the power module by the OC gate of the triode connected by the PFM generator.
  • the PFM generator is reset at the time of receiving the above-mentioned homologous signal, starts a new synchronizing period, and reloads the module from the counter preset value. Obtain the above current value.
  • the step 105 may be: comparing the current magnitude of the power module with the current output current to the output current of the power module, and when the output current of the power module is relatively large, reducing the power module.
  • the output voltage is used to reduce the output current of the power module; when the output current of the power module is relatively small, the output voltage of the power module is increased to increase the output current of the power module.
  • the above embodiment can realize the current sharing control of each parallel power supply module through the digital current sharing bus, and the carrier of the digital current sharing bus exchange information is a pulse frequency. This enables digital current sharing without the need for a custom chip, which reduces the cost of digital current sharing and improves the versatility of digital current sharing.
  • each parallel power supply module exchanges information through a digital current sharing bus
  • the carrier of the digital current sharing bus exchange information is a pulse frequency.
  • each power module is connected in parallel through the digital current sharing bus.
  • the information exchanged by each power module on the digital current sharing bus is generated by the counter preset load module, PFM generator, and cycle counter in each power module.
  • the microcontroller on the power module converts the output current of the power module into a current value, and transmits the current value to the counter preset loading module;
  • the PFM generator acquires the current value from the counter preset loading module in each of the same cycles, the value reflects the modulation frequency of the PFM generator; then, the PFM generator generates a continuous variable frequency pulse according to the current value, and receives the above
  • the homologous signal transmitted by the inverter connected to the PFM generator is the information of the same update time obtained by the inverter from the digital current sharing bus connected to the power module. Then, the PFM generator is based on the above-mentioned homologous signal, Passing the continuous variable frequency pulse through the open collector (OC) gate of the triode connected by the PFM generator to the digital current sharing bus;
  • the cycle counter counts the frequency on the digital current sharing bus, and the obtained frequency count value is used to indicate the current magnitude of the power module with the largest current output current in the parallel power supply module; finally, the microcontroller obtains the current current of the cycle counter
  • the current magnitude of the power module with the largest output current is compared with the output current of the power module, and the output voltage of the power module is adjusted. When the output current of the power module is relatively large, the output voltage of the power module is reduced. To reduce the output current of the power module; when the output current of the power module is relatively small, increase the output voltage of the power module to increase the output current of the power module. In this way, the current sharing of the parallel modules is achieved.
  • the homogenous signal transmitted by the inverter is not only the counter preloading signal of the counter preset loading module to the PFM generator, but also the reset signal of the PFM generator.
  • the trigger source of the reset signal of the PFM generator on each power module comes from the same digital current sharing bus, so the PFM generator on each power module can be reset by the same.
  • the result is that the PFM generator with a low output frequency is subjected to a PFM generator with a high output frequency.
  • the larger the output current of the power module in which the PFM generator is located the higher the output frequency of the PFM generator.
  • FIG. 3 is a timing diagram of the inverter updating time from the digital current sharing bus of the present invention.
  • the inverter detects the falling edge of the digital current sharing bus, and corresponds to the falling edge of the digital current sharing bus. The moment is the same as the update time. Then, the inverter transmits the information of the same time of the same time as the homologous signal to the PFM generator and the counter preset value loading module, thereby triggering the count value of the PFM generator to be cleared, and resetting the preset value from the counter.
  • the loading module obtains a current value indicating the magnitude of the current of the power module to achieve the same level of each parallel power module.
  • the power module A and the power module B are two power modules connected in parallel.
  • the PFM generator on each power module connected in parallel Since the trigger source of the reset signal of the PFM generator on each power module connected in parallel is from the same digital current sharing bus, the PFM generator on each power module can be reset by the same. The result of this is that the PFM generator with a low output frequency will be the same as the PFM generator with a high output frequency. Moreover, in the present invention, the larger the output current of the power module in which the PFM generator is located, the higher the output frequency of the PFM generator.
  • the output current of the power module A is small, and the PFM of the power module A
  • the output frequency of the generator is lower, and the output current of the power module B is large, and the output frequency of the PFM generator of the power module B is higher, so the PFM generator of the power module A is the same as the PFM generator of the power module B.
  • the synchronization update time obtained by the inverters of the power module A and the power module B from the digital current sharing bus is the time corresponding to the falling edge of the output frequency of the power module B.
  • the PFM generator generates a continuous variable frequency pulse according to the above current value, and transmits the generated continuous variable frequency pulse to the digital current sharing bus through the OC gate of the triode connected to the PFM generator, due to the line and function of the OC gate,
  • the frequency reflected on the digital current sharing bus is always the current information of the power module with the largest current output current in the parallel power supply module.
  • the output of the PFM generator is output through the collector of the triode, when the PFM generator fails, the output is high impedance, leaving the digital current sharing bus, and the digital current sharing bus is not affected by hot swapping.
  • the aforementioned program can be stored in a computer readable storage medium.
  • the program when executed, performs the steps including the above-described method embodiments; and the foregoing storage medium includes: a medium that can store program codes, such as a ROM, a RAM, a magnetic disk, or an optical disk.
  • the digital current sharing device may include: a PFM generator 41, a counter preset value loading module 42, a cycle counter 43, a microcontroller 44, and Inverter 45; the above inverter 45 is connected to the PFM generator 41;
  • the PFM generator 41 is configured to acquire a current value from the counter preset value loading module 42 in each of the same cycles, wherein the current value is a magnitude value of the output current of the power module, and is used to represent the PFM generator 41.
  • the modulation frequency is the same period of the PFM generator on the power module and the power module connected in parallel with the power module; and generating a continuous conversion pulse according to the current value, and receiving the same transmission by the inverter 45 a chirp signal, wherein the synchronizing signal is information of a peer update time acquired by the inverter 45 from the digital current sharing bus connected to the power module; and the continuous variable frequency pulse is passed through the PFM generator 41 according to the homologous signal.
  • the OC gate of the connected transistor is transferred to the above digital current sharing bus;
  • the cycle counter 43 is configured to count the frequency of the continuous variable frequency pulse on the digital current sharing bus, and the obtained frequency count value is used to indicate the power module that has the largest current output current among the power module and the power module connected in parallel with the power module.
  • Current size is configured to count the frequency of the continuous variable frequency pulse on the digital current sharing bus, and the obtained frequency count value is used to indicate the power module that has the largest current output current among the power module and the power module connected in parallel with the power module.
  • the microcontroller 44 is configured to adjust the output current of the power module according to the current magnitude of the power module with the current output current obtained by the cycle counter 43.
  • the PFM generator 41 is specifically configured to: when the frequency of the continuous variable frequency pulse is greater than or equal to the frequency of the homogenous signal, transmit the OC gate of the triode connected by the continuous variable frequency pulse through the PFM generator 41 to the power source.
  • the PFM generator 41 is further configured to: when the frequency of the continuous variable frequency pulse is less than the frequency of the above-mentioned homogenous signal, reset at the time of receiving the above-mentioned homologous signal, start a new simultaneous period, and re-pre-receive from the counter
  • the set value loading module 42 obtains the above current value.
  • the microcontroller 44 is specifically configured to compare the current magnitude of the power module with the largest current output current with the output current of the power module, and reduce the output current of the power module when the output current is relatively large.
  • the output voltage of the power module is used to reduce the output current of the power module; when the output current of the power module is relatively small, the output voltage of the power module is increased to increase the output current of the power module.
  • the power module can realize current sharing control of each parallel power supply module through a digital current sharing bus, and the carrier of the digital current sharing bus exchange information is a pulse frequency. In this way, digital current sharing can be realized without the need for a custom chip, thereby reducing the cost of digital current sharing and improving the versatility of digital current sharing.

Abstract

一种数字均流方法和电源模块,该数字均流方法包括:在每个同步周期从计数器预设值装载模块获取电流数值;根据电流数值生成连续变频脉冲,并接收PFM发生器连接的反相器传递的同步信号;根据该同步信号,将连续变频脉冲通过PFM发生器连接的三极管的OC门传递到数字均流总线;对数字均流总线上的连续变频脉冲的频率进行计数,获得的频率计数值用于表示上述电源模块以及与上述电源模块并联的电源模块中当前输出电流最大的电源模块的电流大小;根据当前输出电流最大的电源模块的电流大小调整上述电源模块的输出电流。可以在不需要定制芯片的前提下实现数字均流,从而可以降低数字均流的成本,提高数字均流的通用性。

Description

数字均流方法和电源模块
技术领域
本发明涉及电路技术, 尤其涉及一种数字均流方法和电源模块。 背景技术
在很多大电流输出的场合, 为了提高系统的可靠性, 比较常用的一个 方法就是采用热备份, 即多个电源模块并联使用。 每个电源模块还具备在 线插拔的功能, 以便于拆卸和维修、 维护。 但是, 每个电源模块的内阻是 略有不同的, 而输出电压也不可能做到完全一致。 因此稳压输出的电压源 是不可以直接并联的,或者是即便并联了,每个模块的输出功率各不相同。 有可能会出现有的电源模块在超负荷工作, 损耗发热都比较厉害, 寿命会 降低。 而有的电源模块工作于轻载, 甚至都没有进入较好的工作状态, 也 对电源模块的使用寿命不利。
这时候就需要一种手段, 让各模块输出功率基本相同。 这种将负载平 均分配到各个电源模块的手段, 称之为均流。 均流又可以区分为模拟均流 和数字均流。 模拟均流就是用模拟信号传递电流信息, 完成各个电源模块 输出均流控制的一种方法。 但模拟均流的方法存在如下问题: 1 ) 参考地 分属不同的整流模块, 地电位的差异直接影响均流的精度; 2 ) 均流线连 接线长, 在靠近强干扰的电磁环境容易受到干扰; 3 ) 模拟器件受温度影 响较大, 同时也会影响均流的精度。
数字均流因为传递的是 0、 1 信号, 受地电位的影响小, 同时抗电磁 干扰的能力也很强。 通过修改软件可以方便地实现不同电源模块间的均 流, 而不需要改动硬件, 因此兼容性也很理想。 但数字均流技术需要定制 芯片, 这就使得数字均流技术在成本和通用性上有很大的局限。 发明内容
本发明提供一种数字均流方法和电源模块, 以在不需要定制芯片的前 提下实现数字均流, 降低数字均流的成本, 提高数字均流的通用性。
本发明第一方面提供一种数字均流方法, 包括: 在每个同歩周期从计数器预设值装载模块获取电流数值, 所述电流数 值为所述计数器预设值装载模块所在电源模块的输出电流的大小数值, 并 用于表示所述电源模块上的脉冲频率调制 PFM发生器的调制频率; 所述 同歩周期为所述电源模块以及与所述电源模块并联的电源模块上的 PFM 发生器的同歩周期;
根据所述电流数值生成连续变频脉冲, 并接收所述 PFM发生器连接 的反相器传递的同歩信号, 所述同歩信号是所述反相器从所述电源模块连 接的数字均流总线上获取的同歩更新时刻的信息;
根据所述同歩信号, 将所述连续变频脉冲通过所述 PFM发生器连接 的三极管的集电极开路门传递到所述数字均流总线;
对所述数字均流总线上的连续变频脉冲的频率进行计数, 获得的频率 计数值用于表示所述电源模块以及与所述电源模块并联的电源模块中当 前输出电流最大的电源模块的电流大小;
根据当前输出电流最大的电源模块的电流大小调整所述电源模块的 输出电流。
结合第一方面, 在第一方面的第一种可能的实现方式中, 所述根据所 述同歩信号, 将所述连续变频脉冲通过所述 PFM发生器连接的三极管的 集电极开路门传递到所述电源模块连接的数字均流总线包括:
如果所述连续变频脉冲的频率大于或等于所述同歩信号的频率, 则将 所述连续变频脉冲通过所述 PFM发生器连接的三极管的集电极开路门传 递到所述电源模块连接的数字均流总线。
结合第一方面的第一种可能的实现方式, 在第一方面的第二种可能的 实现方式中, 所述方法还包括:
如果所述连续变频脉冲的频率小于所述同歩信号的频率,则所述 PFM 发生器在接收到所述同歩信号的时刻复位, 开始新的同歩周期, 重新从所 述计数器预设值装载模块获取所述电流数值。
结合第一方面, 或者第一方面的第一种或第二种可能的实现方式, 在 第一方面的第三种可能的实现方式中, 所述电源模块的输出电流越大, 所 述连续变频脉冲的频率越高。
结合第一方面, 或者第一方面的第一种或第二种可能的实现方式, 在 第一方面的第四种可能的实现方式中, 所述根据当前输出电流最大的电源 模块的电流大小调整所述电源模块的输出电流包括:
将当前输出电流最大的电源模块的电流大小与所述电源模块的输出 电流大小进行比较, 当所述电源模块的输出电流相对较大时, 则减小所述 电源模块的输出电压, 以减小所述电源模块的输出电流; 当所述电源模块 的输出电流相对较小时, 则增大所述电源模块的输出电压, 以提高所述电 源模块的输出电流。
本发明第二方面提供一种电源模块, 包括: 脉冲频率调制 PFM发生 器、 计数器预设值装载模块、 周期计数器、 微控制器和反相器; 所述反相 器与所述 PFM发生器连接;
所述 PFM发生器, 用于在每个同歩周期从所述计数器预设值装载模 块获取电流数值, 所述电流数值为所述电源模块的输出电流的大小数值, 并用于表示所述 PFM发生器的调制频率; 所述同歩周期为所述电源模块 以及与所述电源模块并联的电源模块上的 PFM发生器的同歩周期; 以及 根据所述电流数值生成连续变频脉冲, 并接收所述反相器传递的同歩信 号, 所述同歩信号是所述反相器从所述电源模块连接的数字均流总线上获 取的同歩更新时刻的信息; 以及根据所述同歩信号, 将所述连续变频脉冲 通过所述 PFM发生器连接的三极管的集电极开路门传递到所述数字均流 总线;
所述周期计数器, 用于对所述数字均流总线上的连续变频脉冲的频率 进行计数, 获得的频率计数值用于表示所述电源模块以及与所述电源模块 并联的电源模块中当前输出电流最大的电源模块的电流大小;
所述微控制器, 用于根据所述周期计数器获得的当前输出电流最大的 电源模块的电流大小调整所述电源模块的输出电流。
结合第二方面, 在第二方面的第一种可能的实现方式中, 所述 PFM 发生器, 具体用于当所述连续变频脉冲的频率大于或等于所述同歩信号的 频率时, 将所述连续变频脉冲通过所述 PFM发生器连接的三极管的集电 极开路门传递到所述电源模块连接的数字均流总线。
结合第二方面的第一种可能的实现方式, 在第二方面的第二种可能的 实现方式中, 所述 PFM发生器, 还用于当所述连续变频脉冲的频率小于 所述同歩信号的频率时, 在接收到所述同歩信号的时刻复位, 开始新的同 歩周期, 重新从所述计数器预设值装载模块获取所述电流数值。
结合第二方面, 或者第二方面的第一种或第二种可能的实现方式, 在 第二方面的第三种可能的实现方式中, 所述电源模块的输出电流越大, 所 述 PFM发生器生成的连续变频脉冲的频率越高。
结合第二方面, 或者第二方面的第一种或第二种可能的实现方式, 在 第二方面的第四种可能的实现方式中, 所述微控制器, 具体用于将当前输 出电流最大的电源模块的电流大小与所述电源模块的输出电流大小进行 比较, 当所述电源模块的输出电流相对较大时, 则减小所述电源模块的输 出电压, 以减小所述电源模块的输出电流; 当所述电源模块的输出电流相 对较小时, 则增大所述电源模块的输出电压, 以提高所述电源模块的输出 电流。
通过本发明提供的技术方案, 首先, 在每个同歩周期从计数器预设值 装载模块获取电流数值, 根据上述电流数值生成连续变频脉冲, 并接收 PFM发生器连接的反相器传递的同歩信号; 其次, 根据该同歩信号, 将上 述连续变频脉冲通过 PFM发生器连接的三极管的集电极开路门传递到上 述数字均流总线; 再次, 对上述数字均流总线上的连续变频脉冲的频率进 行计数, 获得的频率计数值用于表示电源模块以及与该电源模块并联的电 源模块中当前输出电流最大的电源模块的电流大小; 最后, 根据当前输出 电流最大的电源模块的电流大小调整电源模块的输出电流, 从而可以实现 各并联电源模块通过数字均流总线进行均流控制, 并且上述数字均流总线 交换信息的载体是脉冲频率。 这样就可以在不需要定制芯片的前提下实现 数字均流, 从而可以降低数字均流的成本, 提高数字均流的通用性。 附图说明 为了更清楚地说明本发明实施例或现有技术中的技术方案, 下面将对 实施例或现有技术描述中所需要使用的附图作一简单地介绍, 显而易见 地, 下面描述中的附图是本发明的一些实施例, 对于本领域普通技术人员 来讲, 在不付出创造性劳动性的前提下, 还可以根据这些附图获得其他的 附图。 图 1为本发明数字均流方法一个实施例的流程图;
图 2为本发明数字均流方法另一个实施例的实现框图;
图 3为本发明反相器从数字均流总线上获取同歩更新时刻的时序图; 图 4为本发明电源模块一个实施例的结构示意图。 具体实施方式 为使本发明实施例的目的、 技术方案和优点更加清楚, 下面将结合本 发明实施例中的附图, 对本发明实施例中的技术方案进行清楚、 完整地描 述, 显然,所描述的实施例是本发明一部分实施例, 而不是全部的实施例。 基于本发明中的实施例, 本领域普通技术人员在没有作出创造性劳动前提 下所获得的所有其他实施例, 都属于本发明保护的范围。
图 1为本发明数字均流方法一个实施例的流程图, 如图 1所示, 该数 字均流方法可以包括:
歩骤 101, 在每个同歩周期从计数器预设值装载模块获取电流数值。 其中, 上述电流数值为上述计数器预设值装载模块所在电源模块的输 出电流的大小数值, 并用于表示上述电源模块上的脉冲频率调制 (Pulse Frequency Modulation; 以下简称: PFM ) 发生器的调制频率; 上述同歩周 期为上述电源模块以及与上述电源模块并联的电源模块上的 PFM发生器 的同歩周期。
歩骤 102, 根据上述电流数值生成连续变频脉冲, 并接收上述 PFM发 生器连接的反相器传递的同歩信号。
其中, 上述同歩信号是反相器从电源模块连接的数字均流总线上获取 的同歩更新时刻的信息。
歩骤 103, 根据上述同歩信号, 将上述连续变频脉冲通过上述 PFM发 生器连接的三极管的集电极开路 (OC ) 门传递到上述数字均流总线。
歩骤 104, 对上述数字均流总线上的连续变频脉冲的频率进行计数, 获得的频率计数值用于表示上述电源模块以及与上述电源模块并联的电 源模块中当前输出电流最大的电源模块的电流大小。
歩骤 105, 根据当前输出电流最大的电源模块的电流大小调整上述电 源模块的输出电流。 本实施例中, 歩骤 103可以为: 如果上述连续变频脉冲的频率大于或 等于同歩信号的频率, 则将上述连续变频脉冲通过上述 PFM发生器连接 的三极管的 OC门传递到上述电源模块连接的数字均流总线。
进一歩地, 如果上述连续变频脉冲的频率小于上述同歩信号的频率, 则 PFM发生器在接收到上述同歩信号的时刻复位, 开始新的同歩周期, 重新从上述计数器预设值装载模块获取上述电流数值。
本实施例中, 上述电源模块的输出电流越大, 上述连续变频脉冲的频 率越高。
本实施例中, 歩骤 105可以为: 将当前输出电流最大的电源模块的电 流大小与电源模块的输出电流大小进行比较, 当该电源模块的输出电流相 对较大时, 则减小上述电源模块的输出电压, 以减小上述电源模块的输出 电流; 当电源模块的输出电流相对较小时, 则增大上述电源模块的输出电 压, 以提高上述电源模块的输出电流。
上述实施例可以实现各并联电源模块通过数字均流总线进行均流控 制, 并且上述数字均流总线交换信息的载体是脉冲频率。 这样就可以在不 需要定制芯片的前提下实现数字均流, 从而可以降低数字均流的成本, 提 高数字均流的通用性。
图 2为本发明数字均流方法另一个实施例的实现框图, 本发明中, 各 并联电源模块的均流控制是通过数字均流总线交换信息, 上述数字均流总 线交换信息的载体是脉冲频率。 本实施例中, 各电源模块通过上述数字均 流总线实现并联。
如图 2所示, 每个电源模块在数字均流总线上交换的信息是由各电源 模块中的计数器预设值装载模块、 PFM发生器和周期计数器产生的。
其中, 电源模块上的微控制器将上述电源模块的输出电流的大小转化 为电流数值, 并将该电流数值传递给上述计数器预设值装载模块;
PFM发生器在每个同歩周期从上述计数器预设值装载模块获取上述 电流数值, 上述数值反映了 PFM发生器的调制频率; 然后, PFM发生器 根据上述电流数值生成连续变频脉冲, 并接收上述 PFM发生器连接的反 相器传递的同歩信号, 上述同歩信号是反相器从电源模块连接的数字均流 总线上获取的同歩更新时刻的信息。然后, PFM发生器根据上述同歩信号, 将上述连续变频脉冲通过上述 PFM发生器连接的三极管的集电极开路 ( OC ) 门传递到上述数字均流总线;
上述周期计数器对数字均流总线上的频率进行计数, 获得的频率计数 值用于表示并联的电源模块中当前输出电流最大的电源模块的电流大小; 最后,微控制器将上述周期计数器获得的当前输出电流最大的电源模块 的电流大小与上述电源模块的输出电流大小进行比较, 调节上述电源模块的 输出电压, 当上述电源模块的输出电流相对较大时, 则减小上述电源模块的 输出电压, 以减小上述电源模块的输出电流; 当上述电源模块的输出电流相 对较小时, 则增大上述电源模块的输出电压, 以提高上述电源模块的输出电 流。 通过这种方式实现各并联模块的均流。
其中,上述反相器传递的同歩信号既为计数器预设值装载模块对 PFM 发生器的同歩装载信号, 也是 PFM发生器的复位信号。
本发明中, 各电源模块上的 PFM发生器的复位信号的触发源来自于 同一个数字均流母线, 因此各电源模块上的 PFM发生器可以被同歩复位。 这样的结果是输出频率低的 PFM发生器会被输出频率高的 PFM发生器同 本发明中, PFM发生器所在电源模块的输出电流越大, 则上述 PFM 发生器的输出频率越高。
图 3为本发明反相器从数字均流总线上获取同歩更新时刻的时序图, 如图 3所示, 反相器检测数字均流总线的下降沿, 将数字均流总线的下降 沿对应的时刻作为同歩更新时刻。 然后反相器将该同歩更新时刻的信息作 为同歩信号传递给上述 PFM发生器和上述计数器预设值装载模块, 从而 触发 PFM发生器的计数值清零, 并重新从上述计数器预设值装载模块获 取表示电源模块的电流大小的电流数值, 以实现各并联电源模块的同歩。 图 3中, 电源模块 A和电源模块 B为并联的两个电源模块。 由于并联的 各电源模块上的 PFM发生器的复位信号的触发源来自于同一个数字均流 母线, 因此各电源模块上的 PFM发生器可以被同歩复位。 这样的结果是 输出频率低的 PFM发生器会被输出频率高的 PFM发生器同歩。 并且, 本 发明中, PFM发生器所在电源模块的输出电流越大, 则 PFM发生器的输 出频率越高。如图 3所示, 电源模块 A的输出电流小, 电源模块 A的 PFM 发生器的输出频率就较低, 而电源模块 B的输出电流大, 电源模块 B的 PFM发生器的输出频率就较高, 因此电源模块 A的 PFM发生器会被电源 模块 B的 PFM发生器同歩。 这样, 电源模块 A和电源模块 B的反相器从 数字均流总线上获取的同歩更新时刻均为电源模块 B的输出频率的下降 沿所对应的时刻。
接下来, PFM发生器根据上述电流数值产生连续变频脉冲, 并将所产 生的连续变频脉冲通过该 PFM发生器连接的三极管的 OC门传递到数字 均流总线, 由于 OC门的线与功能, 因此数字均流总线上反映的频率始终 是并联的电源模块中当前输出电流最大的电源模块的电流信息。
另外, 由于 PFM发生器的输出通过三极管的集电极输出, 当 PFM发 生器故障时, 输出为高阻, 脱离数字均流总线, 热插拔时也不会对数字均 流总线构成影响。
本领域普通技术人员可以理解: 实现上述各方法实施例的全部或部分 歩骤可以通过程序指令相关的硬件来完成。 前述的程序可以存储于一计算 机可读取存储介质中。 该程序在执行时, 执行包括上述各方法实施例的歩 骤; 而前述的存储介质包括: ROM、 RAM, 磁碟或者光盘等各种可以存 储程序代码的介质。
图 4为本发明电源模块一个实施例的结构示意图, 如图 4所示, 该数 字均流装置可以包括: PFM发生器 41、 计数器预设值装载模块 42、 周期 计数器 43、 微控制器 44和反相器 45 ; 上述反相器 45与 PFM发生器 41 连接;
其中, PFM发生器 41, 用于在每个同歩周期从计数器预设值装载模 块 42获取电流数值, 上述电流数值为上述电源模块的输出电流的大小数 值, 并用于表示上述 PFM发生器 41的调制频率; 上述同歩周期为上述电 源模块以及与上述电源模块并联的电源模块上的 PFM发生器的同歩周期; 以及根据上述电流数值生成连续变频脉冲, 并接收上述反相器 45传递的 同歩信号, 上述同歩信号是上述反相器 45从上述电源模块连接的数字均 流总线上获取的同歩更新时刻的信息; 以及根据上述同歩信号, 将上述连 续变频脉冲通过 PFM发生器 41连接的三极管的 OC门传递到上述数字均 流总线; 周期计数器 43,用于对上述数字均流总线上的连续变频脉冲的频率进 行计数, 获得的频率计数值用于表示上述电源模块以及与上述电源模块并 联的电源模块中当前输出电流最大的电源模块的电流大小;
微控制器 44, 用于根据周期计数器 43获得的当前输出电流最大的电 源模块的电流大小调整上述电源模块的输出电流。
本实施例中, PFM发生器 41, 具体用于当上述连续变频脉冲的频率 大于或等于同歩信号的频率时, 将上述连续变频脉冲通过 PFM发生器 41 连接的三极管的 OC门传递到上述电源模块连接的数字均流总线。
进一歩地, PFM发生器 41, 还用于当上述连续变频脉冲的频率小于 上述同歩信号的频率时, 在接收到上述同歩信号的时刻复位, 开始新的同 歩周期, 重新从计数器预设值装载模块 42获取上述电流数值。
本实施例中, 上述电源模块的输出电流越大, PFM发生器 41生成的 连续变频脉冲的频率越高。
本实施例中, 微控制器 44, 具体用于将当前输出电流最大的电源模块 的电流大小与上述电源模块的输出电流大小进行比较, 当上述电源模块的 输出电流相对较大时, 则减小上述电源模块的输出电压, 以减小上述电源 模块的输出电流; 当上述电源模块的输出电流相对较小时, 则增大上述电 源模块的输出电压, 以提高上述电源模块的输出电流。
上述电源模块, 可以实现各并联电源模块通过数字均流总线进行均流 控制, 并且上述数字均流总线交换信息的载体是脉冲频率。 这样就可以在 不需要定制芯片的前提下实现数字均流, 从而可以降低数字均流的成本, 提高数字均流的通用性。
最后应说明的是: 以上各实施例仅用以说明本发明的技术方案, 而非 对其限制; 尽管参照前述各实施例对本发明进行了详细的说明, 本领域的 普通技术人员应当理解: 其依然可以对前述各实施例所记载的技术方案进 行修改, 或者对其中部分或者全部技术特征进行等同替换; 而这些修改或 者替换, 并不使相应技术方案的本质脱离本发明各实施例技术方案的范 围。

Claims

权 利 要 求 书
1、 一种数字均流方法, 其特征在于, 包括:
在每个同歩周期从计数器预设值装载模块获取电流数值, 所述电流数 值为所述计数器预设值装载模块所在电源模块的输出电流的大小数值, 并 用于表示所述电源模块上的脉冲频率调制 PFM发生器的调制频率; 所述 同歩周期为所述电源模块以及与所述电源模块并联的电源模块上的 PFM 发生器的同歩周期;
根据所述电流数值生成连续变频脉冲, 并接收所述 PFM发生器连接 的反相器传递的同歩信号, 所述同歩信号是所述反相器从所述电源模块连 接的数字均流总线上获取的同歩更新时刻的信息;
根据所述同歩信号, 将所述连续变频脉冲通过所述 PFM发生器连接 的三极管的集电极开路门传递到所述数字均流总线;
对所述数字均流总线上的连续变频脉冲的频率进行计数, 获得的频率 计数值用于表示所述电源模块以及与所述电源模块并联的电源模块中当 前输出电流最大的电源模块的电流大小;
根据当前输出电流最大的电源模块的电流大小调整所述电源模块的 输出电流。
2、 根据权利要求 1所述的方法, 其特征在于, 所述根据所述同歩信 号, 将所述连续变频脉冲通过所述 PFM发生器连接的三极管的集电极开 路门传递到所述电源模块连接的数字均流总线包括:
如果所述连续变频脉冲的频率大于或等于所述同歩信号的频率, 则将 所述连续变频脉冲通过所述 PFM发生器连接的三极管的集电极开路门传 递到所述电源模块连接的数字均流总线。
3、 根据权利要求 2所述的方法, 其特征在于, 还包括:
如果所述连续变频脉冲的频率小于所述同歩信号的频率,则所述 PFM 发生器在接收到所述同歩信号的时刻复位, 开始新的同歩周期, 重新从所 述计数器预设值装载模块获取所述电流数值。
4、 根据权利要求 1-3任意一项所述的方法, 其特征在于, 所述电源模 块的输出电流越大, 所述连续变频脉冲的频率越高。
5、 根据权利要求 1-3任意一项所述的方法, 其特征在于, 所述根据当 前输出电流最大的电源模块的电流大小调整所述电源模块的输出电流包 括:
将当前输出电流最大的电源模块的电流大小与所述电源模块的输出 电流大小进行比较, 当所述电源模块的输出电流相对较大时, 则减小所述 电源模块的输出电压, 以减小所述电源模块的输出电流; 当所述电源模块 的输出电流相对较小时, 则增大所述电源模块的输出电压, 以提高所述电 源模块的输出电流。
6、 一种电源模块, 其特征在于, 包括: 脉冲频率调制 PFM发生器、 计数器预设值装载模块、 周期计数器、 微控制器和反相器; 所述反相器与 所述 PFM发生器连接;
所述 PFM发生器, 用于在每个同歩周期从所述计数器预设值装载模 块获取电流数值, 所述电流数值为所述电源模块的输出电流的大小数值, 并用于表示所述 PFM发生器的调制频率; 所述同歩周期为所述电源模块 以及与所述电源模块并联的电源模块上的 PFM发生器的同歩周期; 以及 根据所述电流数值生成连续变频脉冲, 并接收所述反相器传递的同歩信 号, 所述同歩信号是所述反相器从所述电源模块连接的数字均流总线上获 取的同歩更新时刻的信息; 以及根据所述同歩信号, 将所述连续变频脉冲 通过所述 PFM发生器连接的三极管的集电极开路门传递到所述数字均流 总线;
所述周期计数器, 用于对所述数字均流总线上的连续变频脉冲的频率 进行计数, 获得的频率计数值用于表示所述电源模块以及与所述电源模块 并联的电源模块中当前输出电流最大的电源模块的电流大小;
所述微控制器, 用于根据所述周期计数器获得的当前输出电流最大的 电源模块的电流大小调整所述电源模块的输出电流。
7、 根据权利要求 6所述的电源模块, 其特征在于,
所述 PFM发生器, 具体用于当所述连续变频脉冲的频率大于或等于 所述同歩信号的频率时, 将所述连续变频脉冲通过所述 PFM发生器连接 的三极管的集电极开路门传递到所述电源模块连接的数字均流总线。
8、 根据权利要求 7所述的电源模块, 其特征在于,
所述 PFM发生器, 还用于当所述连续变频脉冲的频率小于所述同歩 信号的频率时, 在接收到所述同歩信号的时刻复位, 开始新的同歩周期, 重新从所述计数器预设值装载模块获取所述电流数值。
9、 根据权利要求 6-8任意一项所述的电源模块, 其特征在于, 所述电 源模块的输出电流越大, 所述 PFM发生器生成的连续变频脉冲的频率越 高。
10、 根据权利要求 6-8任意一项所述的电源模块, 其特征在于, 所述微控制器, 具体用于将当前输出电流最大的电源模块的电流大小 与所述电源模块的输出电流大小进行比较, 当所述电源模块的输出电流相 对较大时, 则减小所述电源模块的输出电压, 以减小所述电源模块的输出 电流; 当所述电源模块的输出电流相对较小时, 则增大所述电源模块的输 出电压, 以提高所述电源模块的输出电流。
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