WO2015070599A1 - 一种基于柔性基板的三维封装结构及工艺方法 - Google Patents

一种基于柔性基板的三维封装结构及工艺方法 Download PDF

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Publication number
WO2015070599A1
WO2015070599A1 PCT/CN2014/079777 CN2014079777W WO2015070599A1 WO 2015070599 A1 WO2015070599 A1 WO 2015070599A1 CN 2014079777 W CN2014079777 W CN 2014079777W WO 2015070599 A1 WO2015070599 A1 WO 2015070599A1
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Prior art keywords
flexible substrate
substrate
chip
chips
dimensional
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PCT/CN2014/079777
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English (en)
French (fr)
Inventor
郭学平
陆原
Original Assignee
中国科学院微电子研究所
华进半导体封装先导技术研发中心有限公司
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Application filed by 中国科学院微电子研究所, 华进半导体封装先导技术研发中心有限公司 filed Critical 中国科学院微电子研究所
Priority to US15/036,090 priority Critical patent/US9997493B2/en
Publication of WO2015070599A1 publication Critical patent/WO2015070599A1/zh

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    • HELECTRICITY
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    • H01L25/04Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/065Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L25/0652Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00 the devices being arranged next and on each other, i.e. mixed assemblies
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Definitions

  • the present invention mainly relates to a three-dimensional package structure based on a flexible substrate and a method for fabricating the same.
  • the conventional three-dimensional package uses a stacking technology, which directly stacks a plurality of chips or substrates by bonding to realize a metal interconnection structure in a three-dimensional direction, thereby realizing a system or a certain
  • the integration of functions on the three-dimensional structure greatly reduces the interconnection distance and improves the transmission speed.
  • this method is usually complicated and has many difficulties, which greatly affects the yield and reliability of the product.
  • such structures usually use via holes to achieve interlayer interconnection, which is complicated in process and difficult to implement. Summary of the invention
  • the present invention proposes a three-dimensional package structure based on a flexible substrate and a method of fabricating the same according to the present invention.
  • a three-dimensional package structure based on a flexible substrate comprising:
  • a flexible flexible substrate can be bent; [0008] soldering a plurality of chips on the bendable continuous flexible substrate;
  • a contact that electrically connects to an external substrate is implemented.
  • a method for fabricating a three-dimensional package structure based on a flexible substrate comprising the following steps:
  • FIG. 1 is a flow chart of a method of fabricating a three-dimensional package structure in accordance with an embodiment of the present invention
  • FIG. 2 is a plan view and a cross-sectional view of a continuous flexible substrate after completion of chip mounting; [0018] FIG.
  • FIG. 3 is a plan view and a cross-sectional view of the continuous flexible substrate after the underfill is completed; [0019] FIG.
  • FIG. 5 is a cross-sectional view of the package after molding is completed
  • FIG. 6 is a cross-sectional view of the package after ball implantation
  • FIG. 7 to FIG. 11 are schematic diagrams showing processes of each step in another folding method
  • FIG. 12 is a package substrate shape scheme when a plurality of chips are used. detailed description
  • a method of fabricating a three-dimensional package structure based on a flexible substrate is provided.
  • a pair of methods of forming the structure will be specifically described by way of an embodiment of the present invention with reference to Figs. 2 through 7.
  • the manufacturing method provided by the present invention comprises the following steps:
  • step S101 a bendable continuous flexible substrate 104 is provided, and surface wiring technology is employed on the bendable continuous flexible substrate 104 to achieve interlayer electrical connection.
  • the shape of the substrate is determined according to factors such as chip size, shape, number, etc. of the package to be packaged, and a larger chip is usually soldered to the center of the substrate to facilitate the steps of bending, molding, and the like in the subsequent process.
  • the area of the chip 101 is larger than the sum of the areas of the chip 102 and the chip 103, the package is completed in a two-layer laminate in consideration of the overall stability of the package.
  • the chip 101 is attached to the middle of the flexible substrate 104, the chip 102 and the chip 103 are bonded to both ends, and the chip 101 and the chip 102 are symmetrical with respect to the chip 101.
  • a suitable length should be reserved between the chip 101 and the chip 102 and the chip 103 in accordance with the length of space required for folding.
  • step S102 the chip 101, the chip 102 and the chip 103 are soldered to the bendable continuous flexible substrate 104 by the BGA ball 105, and the chip may be a single chip or a laminated chip. And can also be an adapter board containing TSV or a TSV integrated 3D chip.
  • the above chip can realize electrical connection between the chip and the substrate through a packaging process. This electrical connection can be achieved by means of chip flip-chip soldering, or by wire bonding.
  • the structure after the placement is completed is shown in Figure 2.
  • step S103 the gap between the above-mentioned respective chips and the bendable continuous flexible substrate 104 is filled with the underfill 106, and the soldered chip is reinforced, which can effectively increase the reliability of the chip.
  • the underfill 106 is typically a single liquid high temperature cured epoxy or other similar colloid. As shown in Figure 3, when applying glue, a gel is applied to the side of the chip. Due to the capillary phenomenon, the colloid will follow the chip. The gap between the substrate and the substrate gradually fills the gap. After the filling is completed, the underfill 106 should completely wrap the chip on the side, and the amount of glue is controlled to make the overflow layer reach two-thirds of the height of the chip.
  • step S104 the substrate is bent to realize a three-dimensional package structure. Specifically, the two ends of the substrate soldering chip 102 and the chip 103 are folded toward the center of the substrate, so that the chip 102 and the chip 103 are respectively bonded in parallel with the chip 101, as shown in FIG. 4, and the parallel glue of the adhesive tape 108 is used. The bonding surface is bonded to form a three-dimensional packaging structure.
  • Step S105 is a molding process, as shown in FIG. 5, that is, using potting glue 109 pairs in the step
  • the three-dimensional structure formed in S 103 is internally filled to improve insulation between internal components and lines, and to enhance the integrity of the package structure.
  • the potting compound 109 may be an epoxy potting compound, a high thermal conductivity potting compound, a silicone potting compound, a polyurethane potting compound, a flexible resin or a hot-melt potting asphalt paraffin.
  • the present invention solves the problem of overflow of the potting compound 109 by gradually reducing the width of the flexible substrate after stacking. For example, as shown in the cross-sectional views on the right side of Figures 5, 9 and 10, the width of the substrate underneath is the largest, and the width of the substrate superimposed thereon is sequentially decreased. At this time, when filling the potting compound 109, due to the surface tension, it will be on the substrate.
  • the side surface forms an inclined surface, similar to the shape of the pyramid without a top, which is advantageous for preventing the overflow of the potting compound 109.
  • the potting compound is completely filled into the flexible substrate package in the present invention by capillary action in the formed structure by a method similar to the underfill, which can be avoided during the filling process. Contamination of other structures in the flexible substrate, other process steps are better performed, and the package structure of the flexible substrate described above is achieved by the fabrication process.
  • solder balls may be a plurality of solder balls containing lead or lead-free, and may also include other types of electrical connections that can be taken out of the package, such as pads in the form of QFN in the package.
  • the shape and area of the bendable continuous flexible substrate can be flexibly changed for different chip shapes, sizes, and numbers.
  • the present invention provides an embodiment 2 to illustrate this feature.
  • a method of forming the structure will be specifically described with reference to FIGS. 7 to 11.
  • the specific process flow is substantially the same as that of the first embodiment, as shown in FIG. 1 , the difference is that the shape of the substrate can be flexibly changed when the shape of the continuous flexible substrate can be bent according to the number and shape of the packaged chips. , length and bending method, specific:
  • a bendable continuous flexible substrate 204 is provided, and surface wiring techniques are employed on the bendable continuous flexible substrate 204 to achieve interlayer electrical connections.
  • the area of the three chips is not much different. Considering the stability of the package as a whole, the three-layer stacking method should be used in the bending, that is, the three chips are sequentially stacked. Therefore, the chip 201 having a larger area is still attached to the middle of the flexible substrate 204 to be used, and the chips 201 and 203 are respectively located at both ends of the substrate. Since the left and right ends are bent one after another, the post-bent chip requires more length in space. Therefore, the distance between the chip 203 and the chip 201 should be slightly larger than that of the chip 202, as shown in FIG.
  • the desired packaged chip is soldered to the above-mentioned bendable continuous flexible substrate 204 by a BGA ball 205, specifically a chip 201, a chip 202 and a chip 203.
  • the chip to be packaged may be a single chip or a stacked chip, and may also be an interposer including a TSV or a TSV integrated 3D chip.
  • the above chip can realize electrical connection between the chip and the substrate through a packaging process. This electrical connection can be achieved by means of chip flip-chip soldering, or by wire bonding.
  • the structure after the placement is completed is shown in Figure 8.
  • the gap between the above-mentioned respective chips and the bendable continuous flexible substrate 204 is filled with the underfill 206 to reinforce the soldered chip, which can effectively increase the reliability of the chip.
  • the underfill 206 is typically a single liquid high temperature cured epoxy or other similar gel. As shown in Fig. 9, when the glue is applied, a colloid is applied to the side of the chip, and due to the capillary phenomenon, the colloid flows along the gap between the chip and the substrate, and gradually fills the gap. After the filling is completed, the underfill 206 should completely wrap the chip on the side to control the amount of glue, so that the overflow layer reaches two-thirds of the height of the chip.
  • the substrate is then bent to achieve a three-dimensional package structure. Specifically, according to the shape of the substrate determined above, one end of the solder chip 202 is first folded toward the center of the substrate, the chip 202 is bonded in parallel with the chip 201, and the parallel bonding surface is bonded by the adhesive 208; One end of the solder chip 203 is folded toward the center of the substrate, and the chip 203 is bonded in parallel with the outer side of the one end substrate of the bonding chip 202, and the parallel bonding surface is bonded by the adhesive 208 to form a three-dimensional package structure. [0044] Next, for the molding process, as shown in FIG.
  • the three-dimensional structure formed in step S103 is internally filled using the potting compound 209, the insulation between the internal components and the lines is improved, and the package structure is strengthened. Integrity.
  • the potting compound 209 may be an epoxy potting compound, a high thermal conductive potting compound, a silicone potting compound, a polyurethane potting compound, a flexible resin or a hot-melt potting asphalt wax.
  • the potting compound is completely filled into the flexible substrate package in the present invention by capillary action in the formed structure by a method similar to the underfill, which can be avoided during the filling process. Contamination of other structures in the flexible substrate, other process steps are better performed, and the package structure of the flexible substrate described above is achieved by the fabrication process.
  • solder balls may be a plurality of solder balls containing lead or lead-free, and may also include other types of electrical connections that can be taken out of the package, such as pads in the form of QFN in the package.
  • the shape of the bendable continuous flexible substrate can be designed according to actual conditions. For example, for a flexible substrate three-dimensional package of five chips, the shape shown in FIG. 12 can be used to complete Package.
  • the flexible substrate has a center and one or more strip-shaped extension substrates extending outward from the center, and the flexible substrate center and the ends of the strip-shaped extension substrates are soldered with chips.
  • the width of the center of the flexible substrate is wider, and the width of the strip-shaped extending substrate ends is sequentially decreased according to the stacking order of the strip-shaped extending substrate, so that the cross-section of the stacked three-dimensional packaging structure forms a topless pyramid shape and gradually decreases the width.
  • the structure is conducive to the filling of the potting glue, avoiding the overflow of the potting glue and other parts.
  • the chip on the extension substrate coincides with the chip at the center of the flexible substrate.
  • Such an extension substrate is radial with respect to the center and can satisfy the three-dimensional packaging requirements of a plurality of chips.
  • the flexible flexible substrate is used as a package substrate, and the flexible substrate has the following advantages: due to the advantages of the manufacturing process of the flexible substrate, it can be in the flexible substrate. Making narrow pitch thin lines can better meet the high density of the current package High integration requirements;
  • the biggest advantage of a flexible substrate relative to a rigid substrate is its flexibility, which allows the substrate to be bent, thereby miniaturizing its package, and the process in the flexible substrate is basically compatible with the general packaging process.
  • the flexible substrate is superior to the rigid substrate in thermal management in the package, enabling high-performance chip packaging.

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Abstract

一种基于柔性基板的三维封装结构及其制作方法,该方法包括:提供一种可弯折连续柔性基板(104),基板(104)形状由芯片的大小,数量,形状确定,并在基板(104)表面布线以实现层间电连接;将被封装芯片(101、102、103)焊接到可弯折连续柔性基板(104)上;采用底填胶(106)对芯片(101、102、103)与基板(104)间的缝隙进行填充;将基板(104)向中心弯折,使周边的各芯片(102、103)分别于与位于中心的芯片(101)平行重合,并用粘合胶(108)对两层平行芯片(101、102、103)进行粘合。采用柔性基板作为封装衬底,可以更好的满足现在封装中高密度高集成的要求,实现封装的小型化、兼容性和高性能的芯片封装。

Description

一种基于柔性基板的三维封装结构及工艺方法
[0001]本申请要求了 2013年 11月 12曰提交的、申请号为 201310560310.4、 发明名称为 "一种基于柔性基板的三维封装结构及工艺方法" 的中国专利申 请的优先权, 其全部内容通过引用结合在本申请中。
技术领域
[0002]本发明专利主要涉及一种基于柔性基板的三维封装结构及其针对本 发明专利的制作方法。 技术背景
[0003]随着人们对电子产品的要求向小型化、多功能、环保型等方向的发展, 未来电子系统将需要满足如下几个方面日益提出的要求: 体积小、 重量轻、 高频和高速运行、 低功耗、 灵敏、 多功能以及低成本。 而三维封装正是满足 这几个方面要求的一个极具吸引力的途径, 其具有减小体积和增加衬底材料 利用率的优点。
[0004]但是传统的三维封装多釆用堆叠技术, 该结构直接将多个棵芯片或者 衬底通过键合的方式堆叠起来, 实现在三维方向上的金属互联结构, 从而实 现一个系统或者某个功能在三维结构上的集成, 大大减小了互联距离, 提高 了传输速度。 但此方法通常较复杂, 存在很多困难, 对产品的成品率和可靠 性造成极大的影响。 而且此类结构通常釆用通孔实现层间互连, 工艺复杂, 实现难度大。 发明内容
[0005]针对上述问题, 本发明提出了一种基于柔性基板的三维封装结构及其 针对本发明专利的制作方法。
[0006]一种基于柔性基板的三维封装结构, 该结构包括:
[0007]可弯折连续柔性基板; [0008]焊接在上述可弯折连续柔性基板上多个芯片;
[0009]填充弯折连续基板内部的灌封胶;
[0010] 实现与外部基板电连接的触点。
[0011]一种基于柔性基板的三维封装结构的制作方法, 该方法包以下步骤:
[0012]提供一种可弯折连续柔性基板;
[0013]将被封装的多个芯片焊接到可弯折连续柔性基板上;
[0014】将柔性基板弯折, 使焊接在连续柔性基板上的芯片重合, 并用粘合胶 对重合的芯片进行粘合;
[0015]釆用灌封胶对柔性基板封装内部进行填充。 附图说明
[0016]通过阅读参照以下附图所作的对非限制性实施例所做的详细描述, 本 发明的其他特征, 目的和优点将会变得更加明显。
[0017] 图 1为根据本发明的实施例的三维封装结构制造方法的流程图;
[0018] 图 2为完成芯片贴装后的连续柔性基板俯视图和剖面图;
[0019] 图 3为完成底部填充后的连续柔性基板俯视图和剖面图;
[0020] 图 4为弯折后的连续柔性基板俯视图和剖面图;
[0021] 图 5为完成模塑后的封装剖面图;
[0022] 图 6为植球后的封装剖面图;
[0023] 图 7至图 11分别为另一种折叠方法下的各步骤工艺的示意图;
[0024] 图 12为多个芯片时的一种封装基板形状方案。 具体实施方式
[0025]下面详细描述本发明的实施例。
[0026]所述实施例的示例在附图中示出,其中自始至终相同或类似的标号 表示相同或类似的元件或具有相同或类似功能的元件。 下面通过参考附 图描述的实施例是示例性的, 仅用于解释本发明, 而不能解释为对本发 明的限制。 下文的公开提供了许多不同的实施例或例子用来实现本发明 的不同结构。 为了简化本发明的公开, 下文中对特定例子的部件和设置 进行描述。 当然, 它们仅仅为示例, 并且目的不在于限制本发明。 此外, 本发明可以在不同例子中重复参考数字和 /或字母。 这种重复是为了简化 和清楚的目的, 其本身不指示所讨论各种实施例和 /或设置之间的关系。 此外, 本发明提供了的各种特定的工艺和材料的例子, 但是本领域普通 技术人员可以意识到其他工艺的可应用于性和 /或其他材料的使用。
[0027]根据本发明的一个方面, 提供了一种基于柔性基板的三维封装结构 的制作方法。 下面, 将结合图 2至图 7通过本发明的一个实施例一对形成该 结构的方法进行具体描述。 如图 1所示, 本发明所提供的制造方法包括以下 步骤:
[0028】在步骤 S101中, 提供可弯折连续柔性基板 104, 并在所述可弯折连 续柔性基板 104上釆用表面布线技术以实现层间电连接。根据所需封装的芯 片大小, 形状, 数量等因素确定基板的形状, 通常将较大的芯片焊接在基板 中央, 以便于后续工艺中弯折, 模塑等步骤的实现。 在本实施例中, 由于芯 片 101面积大于芯片 102和芯片 103的面积之和,考虑到封装的整体稳固性, 釆用双层层叠方式完成封装。 因此, 考虑柔性基板 104的形状时, 设计在柔 性基板 104中部贴合芯片 101, 两端贴合芯片 102和芯片 103,并且芯片 101 和芯片 102关于芯片 101对称。 同时, 应根据折叠所需的空间长度, 在芯片 101和芯片 102以及芯片 103之间预留出合适的长度。
[0029】在步骤 S 102中, 通过 BGA球 105将芯片 101, 芯片 102和芯片 103 焊接到上述可弯折连续柔性基板 104上, 所述芯片可以为单个的芯片, 也可 以为叠层的芯片, 并且也可以为包含有 TSV的转接板或 TSV集成的 3D芯 片。
[0030]上述芯片可以通过封装工艺实现芯片与基板之间的电连接。该电连接 可以通过芯片倒装的焊球方式进行互连实现,也可以通过引线键合的压焊方 式实现。 完成贴装后的结构如图 2所示。
[0031]在步骤 S103中, 使用底填胶 106对上述各芯片与可弯折连续柔性基 板 104之间的缝隙进行填充, 对焊接的芯片进行加固, 可以有效增加芯片可 靠性。 所述底填胶 106—般为单液高温固化环氧树脂或其他类似胶体。 如图 3所示, 涂胶时, 在芯片一侧施加胶体, 由于毛细管现象, 胶体会沿着芯片 与基板之间的缝隙流动, 逐渐填满缝隙。 完成填充后, 底填胶 106应在侧面 完全包裹住芯片, 控制胶量, 使外溢胶层达到芯片高度的三分之二为最佳。
[0032】在步骤 S104中, 对基板进行弯折, 实现三维封装结构。 具体的, 将 基板焊接芯片 102和芯片 103的两端向基板中心折叠,使芯片 102和芯片 103 分别与芯片 101平行贴合, 如图 4所示, 并釆用粘合胶 108对芯片的平行贴 合面进行粘合, 初步形成三维封装结构。
[0033】步骤 S105为模塑过程, 如图 5所示, 即使用灌封胶 109对在步骤
S 103中形成的三维结构进行内部填充,提高内部元件、线路之间的绝缘, 强化该封装结构的整体性。 所述灌封胶 109可以是环氧灌封胶、 高导热 灌封胶、 有机硅灌封胶、 聚氨酯灌封胶、 柔性树脂或者热溶灌封胶沥青 石蜡等。
[0034】在填充灌封胶 109的过程中,发明人发现如果上下叠加的柔性基板 宽度相同则容易导致灌封胶 109外溢, 污染其他连接结构。 因此, 本发 明釆用叠加后逐步缩小柔性基板的宽度解决灌封胶 109外溢的问题。 例 如, 图 5、 9和 10右侧的截面图所示, 底下的基板宽度最大, 上面叠加 的基板宽度依次减小, 这时填充灌封胶 109时, 由于表面张力的作用, 会在基板的侧面形成一个倾斜面, 类似无顶的金字塔形状, 有利于防止 灌封胶 109的外溢。
[0035】具体的, 在本制作工艺方法中,通过类似于底填料的方法在形成的结 构中通过毛细作用将灌封胶完全填充到本发明中的柔性基板封装中,在填充 过程中可以避免对柔性基板中其他的结构产生污染, 更好进行其他的工艺步 骤, 并且通过该制作工艺实现了上面所描述的柔性基板的封装结构。
[0036】最后, 对填充灌封胶 109之后的三维封装结构进行植球焊接, 以 实现本封装与外部基板之间的电连接, 如图 6所示。 所述焊球可以为多 种包含有有铅或无铅的焊球, 同样也可以包含有其他的可以实现封装外 引出的其他的电连接形式, 例如封装中 QFN形式的焊盘等。
[0037】在本发明中, 针对不同的芯片形状、 大小、 和数量, 可弯折连续 柔性基板的形状和面积可相应灵活发生改变。 对此, 本发明提供了一个 实施例二来说明这一特征。 [0038]下面, 将结合图 7至图 11对形成该结构的方法进行具体描述。 在实 施例二中, 具体工艺流程与实施例一基本相同, 如图 1所示, 区别在于, 根 据所封装芯片的数量和形状不同,在设计可弯折连续柔性基板的形状时灵活 改变基板形状、 长度以及弯折方法, 具体的:
[0039】首先, 提供可弯折连续柔性基板 204, 并在所述可弯折连续柔性基板 204上釆用表面布线技术以实现层间电连接。本例中三块芯片面积相差不大, 考虑到封装整体的稳定性, 在弯折时应釆用三层叠方式, 即三块芯片顺序层 叠。 因此, 仍在所釆用的柔性基板 204中部贴合面积较大的芯片 201, 芯片 201和 203分别位于基板两端。 由于左右两端先后弯折, 后弯折的芯片在空 间上需要更多的长度,因此,芯片 203距离芯片 201的距离应略大于芯片 202, 如图 8所示。
[0040]其次, 通过 BGA球 205将所需被封装芯片焊接到上述可弯折连续柔 性基板 204上, 具体为芯片 201, 芯片 202和芯片 203。 所述待封装芯片可 以为单个的芯片, 也可以为叠层的芯片, 并且也可以为包含有 TSV的转接 板或 TSV集成的 3D芯片。
[0041]上述芯片可以通过封装工艺实现芯片与基板之间的电连接。该电连接 可以通过芯片倒装的焊球方式进行互连实现,也可以通过引线键合的压焊方 式实现。 完成贴装后的结构如图 8所示。
[0042]再其次,使用底填胶 206对上述各芯片与可弯折连续柔性基板 204之 间的缝隙进行填充, 对焊接的芯片进行加固, 可以有效增加芯片可靠性。 所 述底填胶 206—般为单液高温固化环氧树脂或其他类似胶体。 如图 9所示, 涂胶时, 在芯片一侧施加胶体, 由于毛细管现象, 胶体会沿着芯片与基板之 间的缝隙流动, 逐渐填满缝隙。 完成填充后, 底填胶 206应在侧面完全包裹 住芯片, 控制胶量, 使外溢胶层达到芯片高度的三分之二为最佳。
[0043】然后对基板进行弯折, 实现三维封装结构。 具体的, 根据上述确定的 基板形状,先将焊接芯片 202的一端向基板中心折叠,使芯片 202与芯片 201 平行贴合,并釆用粘合胶 208对其平行贴合面进行粘合;然后将焊接芯片 203 的一端向基板中心折叠,使芯片 203与贴合芯片 202的一端基板外侧平行贴 合, 并釆用粘合胶 208对其平行贴合面进行粘合, 初步形成三维封装结构。 [0044】接下来为模塑过程,如图 10所示,即使用灌封胶 209对在步骤 S103 中形成的三维结构进行内部填充, 提高内部元件、 线路之间的绝缘, 强 化该封装结构的整体性。 所述灌封胶 209可以是环氧灌封胶、 高导热灌 封胶、 有机硅灌封胶、 聚氨酯灌封胶、 柔性树脂或者热溶灌封胶沥青石 蜡等。
[0045】具体的, 在本制作工艺方法中,通过类似于底填料的方法在形成的结 构中通过毛细作用将灌封胶完全填充到本发明中的柔性基板封装中,在填充 过程中可以避免对柔性基板中其他的结构产生污染, 更好进行其他的工艺步 骤, 并且通过该制作工艺实现了上面所描述的柔性基板的封装结构。
[0046】最后, 对填充灌封胶 209之后的三维封装结构进行植球焊接, 以 实现本封装与外部基板之间的电连接, 如图 11所示。 所述焊球可以为多 种包含有有铅或无铅的焊球, 同样也可以包含有其他的可以实现封装外 引出的其他的电连接形式, 例如封装中 QFN形式的焊盘等。
[0047】类似的, 对于多个待封装芯片, 可以根据实际情况设计可弯折连续 柔性基板的形状, 例如, 对于 5块芯片的柔性基板三维封装, 可釆用图 12所示的形状来完成封装。
[0048]上文以三块或四块芯片的三维封装为例进行描述,实际上也可以容 易地实现两块或者四块以上芯片的三维封装。
[0049]例如,所述柔性基板具有一个中心和由该中心向外延伸的一个或多个 条形延伸基板, 所述柔性基板中心和各条形延伸基板末端都焊接有芯片。 所 述柔性基板中心的宽度较宽,各条形延伸基板末端根据其与柔性基板中心的 叠加次序, 其宽度依次减小, 使得叠加后的三维封装结构的截面形成无顶金 字塔状逐渐减小宽度的结构, 有利于灌封胶的填充, 避免灌封胶溢出污染其 他部分。 各条形延伸基板向中心弯折后, 所述延伸基板上的芯片与柔性基板 中心的芯片相重合。 这样的延伸基板相对于所述中心呈辐射状, 可以满足多 个芯片的三维封装要求。
[0050]与现有技术相比,本发明最大的特点在于釆用可弯折连续柔性基板 作为封装衬底, 该柔性基板具有以下优点: 由于柔性基板的制作工艺的优 势, 可以在柔性基板中制作窄节距细线条, 可以更好的满足现在封装中高密 度高集成的要求; 柔性基板相对刚性基板最大的优势在于其柔性, 可以进行 基板的弯折, 从而实现其封装的小型化, 而且对于柔性基板中的工艺方法基 本上与一般的封装工艺相兼容; 另外柔性基板对于封装中的热管理性能更加 优越于刚性基板, 能够实现高性能的芯片封装。
[0051] 虽然关于示例实施例及其优点已经详细说明,应当理解在不脱离本 发明的精神和所附权利要求限定的保护范围的情况下, 可以对这些实施 例进行各种变化、 替换和修改。 对于其他例子, 本领域的普通技术人员 应当容易理解在保持本发明保护范围内的同时, 工艺步骤的次序可以变 化。
[0052] 此外, 本发明的应用范围不局限于说明书中描述的特定实施例 的工艺、 机构、 制造、 物质组成、 手段、 方法及步骤。 从本发明的公开 内容, 作为本领域的普通技术人员将容易地理解, 对于目前已存在或者 以后即将开发出的工艺、 机构、 制造、 物质组成、 手段、 方法或步骤, 其中它们执行与本发明描述的对应实施例大体相同的功能或者获得大体 相同的结果, 依照本发明可以对它们进行应用。 因此, 本发明所附权利 要求旨在将这些工艺、 机构、 制造、 物质组成、 手段、 方法或步骤包含 在其保护范围内。

Claims

权 利 要 求
1. 一种基于柔性基板的三维封装结构, 该结构包括:
可弯折连续柔性基板(104);
焊接在上述可弯折连续柔性基板上多个芯片 (101、 102、 103); 填充弯 折连续基板内部的灌封胶( 109 );
实现与外部基板电连接的触点(110)。
2. 根据权利要求 1所述的三维封装结构,其特征在于,所述可弯折连续 柔性基板 ( 104)表面布线以实现所述多个芯片之间的电连接。
3. 根据权利要求 1或 2所述的三维封装结构,其特征在于,根据待封装 芯片的形状、 大小和数量确定柔性基板(104) 的形状和长度, 以及芯片在 柔性基板 (104)上的位置。
4. 根据权利要求 1至 4中的任何一项所述的三维封装结构,其特征在于, 通过弯折、 折叠所述柔性基板(104) 实现多层的三维封装结构。
5. 根据权利要求 1所述的三维封装结构,其特征在于,所述芯片包括单 一芯片、 叠层的芯片、 包含有 TSV的转接板或 TSV集成的 3D芯片。
6. 根据权利要求 1所述的三维封装结构,所述柔性基板具有一个中心和 由该中心向外延伸的一个或多个条形延伸基板, 所述柔性基板中心和各条形 延伸基板末端都焊接有芯片。
7. 根据权利要求 6所述的三维封装结构, 弯折所述柔性基板后,所述延 伸基板上的芯片与柔性基板中心的芯片相重合。
8. 根据权利要求 1至 6中的任何一项所述的三维封装结构,其中所述可 弯折连续柔性基板弯折后重叠的基板的宽度依次递减。
9. 一种基于柔性基板的三维封装结构的制作方法, 该方法包以下步骤:
(a)提供一种可弯折连续柔性基板(104);
(b)将被封装的多个芯片焊接到可弯折连续柔性基板 (104)上;
(c)将柔性基板 (104) 弯折, 使焊接在 aa连续柔性基板 (104)上的 芯片重合, 并用粘合(108)胶对重合的芯片进行粘合; 以及
(d)釆用灌封胶(109)对柔性基板封装(107) 内部进行填充。
10. 根据权利要求 9所述的三维封装方法, 其特征在于, 所述可弯折连 续柔性基板 (104)表面布线以实现所述多个芯片之间的电连接。
11. 根据权利要求 9所述的三维封装方法, 其特征在于, 根据待封装芯 片的形状、 大小和数量确定柔性基板( 104) 的形状和长度, 以及芯片在柔 性基板 (104)上的位置。
12. 根据权利要求 9所述的三维封装方法, 其特征在于, 所述步骤 b) 包括釆用底填胶对芯片与基板 (104) 间的缝隙进行填充。
13. 根据权利要求 9或 12所述的三维封装方法,其特征在于,所述步骤 b)或步骤 d)通过毛细作用将灌封胶(109)或者底填胶完全填充到柔性基 板封装(107) 中。
14. 根据权利要求 9所述的三维封装方法, 所述柔性基板具有一个中心 和由该中心向外延伸的一个或多个条形延伸基板, 所述柔性基板中心和各条 形延伸基板末端都焊接有芯片。
15. 根据权利要求 9所述的三维封装方法, 弯折所述柔性基板后, 所述 延伸基板上的芯片与柔性基板中心的芯片相重合。
16. 根据权利要求 9至 15中的任何一项所述的三维封装方法,其中所述 可弯折连续柔性基板弯折后重叠的基板的宽度依次递减。
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