WO2015037478A1 - Supporting glass substrate and conveyance element using same - Google Patents

Supporting glass substrate and conveyance element using same Download PDF

Info

Publication number
WO2015037478A1
WO2015037478A1 PCT/JP2014/073085 JP2014073085W WO2015037478A1 WO 2015037478 A1 WO2015037478 A1 WO 2015037478A1 JP 2014073085 W JP2014073085 W JP 2014073085W WO 2015037478 A1 WO2015037478 A1 WO 2015037478A1
Authority
WO
WIPO (PCT)
Prior art keywords
glass substrate
substrate
supporting glass
supporting
less
Prior art date
Application number
PCT/JP2014/073085
Other languages
French (fr)
Japanese (ja)
Inventor
三和 晋吉
光 池田
Original Assignee
日本電気硝子株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日本電気硝子株式会社 filed Critical 日本電気硝子株式会社
Priority to KR1020157032898A priority Critical patent/KR102200850B1/en
Priority to CN201480031817.3A priority patent/CN105307993A/en
Publication of WO2015037478A1 publication Critical patent/WO2015037478A1/en

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/687Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
    • H01L21/68714Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
    • H01L21/68757Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support characterised by a coating or a hardness or a material
    • CCHEMISTRY; METALLURGY
    • C03GLASS; MINERAL OR SLAG WOOL
    • C03CCHEMICAL COMPOSITION OF GLASSES, GLAZES OR VITREOUS ENAMELS; SURFACE TREATMENT OF GLASS; SURFACE TREATMENT OF FIBRES OR FILAMENTS MADE FROM GLASS, MINERALS OR SLAGS; JOINING GLASS TO GLASS OR OTHER MATERIALS
    • C03C3/00Glass compositions
    • C03C3/04Glass compositions containing silica
    • C03C3/076Glass compositions containing silica with 40% to 90% silica, by weight
    • C03C3/089Glass compositions containing silica with 40% to 90% silica, by weight containing boron
    • C03C3/091Glass compositions containing silica with 40% to 90% silica, by weight containing boron containing aluminium
    • C03C3/093Glass compositions containing silica with 40% to 90% silica, by weight containing boron containing aluminium containing zinc or zirconium
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/18High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L24/19Manufacturing methods of high density interconnect preforms
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93Batch processes
    • H01L24/95Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/96Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being encapsulated in a common layer, e.g. neo-wafer or pseudo-wafer, said common layer being separable into individual assemblies after connecting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/568Temporary substrate used as encapsulation process aid
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/12105Bump connectors formed on an encapsulation of the semiconductor or solid-state body, e.g. bumps on chip-scale packages
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/35Mechanical effects
    • H01L2924/351Thermal stress
    • H01L2924/3511Warping

Definitions

  • the present invention relates to a supporting glass substrate and a transport body using the same, and specifically to a supporting glass substrate used for supporting a processed substrate in a manufacturing process of a semiconductor package (semiconductor device) and a transport body using the same.
  • Portable electronic devices such as mobile phones, notebook personal computers, and PDAs (Personal Data Assistance) are required to be smaller and lighter.
  • the mounting space of semiconductor chips used in these electronic devices is also strictly limited, and high-density mounting of semiconductor chips has become a problem. Therefore, in recent years, high-density mounting of semiconductor packages has been achieved by three-dimensional mounting technology, that is, by stacking semiconductor chips and interconnecting the semiconductor chips.
  • a conventional wafer level package is manufactured by forming bumps in a wafer state and then separating them by dicing.
  • the semiconductor chip is likely to be chipped.
  • the fan-out type WLP can increase the number of pins, and can prevent chipping of the semiconductor chip by protecting the end portion of the semiconductor chip.
  • the fan-out type WLP includes a step of forming a processed substrate by molding a plurality of semiconductor chips with a resin sealing material and then wiring to one surface of the processed substrate, a step of forming a solder bump, and the like.
  • the sealing material may be deformed and the processed substrate may change in dimensions.
  • the dimension of the processed substrate changes, it becomes difficult to perform wiring with high density on one surface of the processed substrate, and it becomes difficult to accurately form solder bumps.
  • the present invention has been made in view of the above circumstances, and its technical problem is to create a support substrate that hardly causes a dimensional change of a processed substrate and a carrier using the same, thereby high-density mounting of a semiconductor package. To contribute.
  • the present inventors have found that the above technical problem can be solved by adopting a glass substrate as a support substrate and strictly regulating the thermal expansion coefficient of the glass substrate.
  • This is proposed as the present invention. That is, the supporting glass substrate of the present invention is characterized in that the average linear thermal expansion coefficient in the temperature range of 20 to 200 ° C. is 50 ⁇ 10 ⁇ 7 / ° C. or more and 66 ⁇ 10 ⁇ 7 / ° C. or less.
  • the “average linear thermal expansion coefficient in the temperature range of 20 to 200 ° C.” can be measured with a dilatometer.
  • the glass substrate is easy to smooth the surface and has high rigidity. Therefore, when a glass substrate is used as the support substrate, the processed substrate can be supported firmly and accurately. In addition, the glass substrate easily transmits light such as ultraviolet light. Therefore, when a glass substrate is used as the support substrate, the processed substrate and the support glass substrate can be easily fixed by providing an adhesive layer or the like. Further, by providing a release layer or the like, the processed substrate and the supporting glass substrate can be easily separated.
  • the average linear thermal expansion coefficient in the temperature range of 20 to 200 ° C. is regulated to 50 ⁇ 10 ⁇ 7 / ° C. or more and 66 ⁇ 10 ⁇ 7 / ° C. or less.
  • the linear thermal expansion coefficients of the processed substrate and the supporting glass substrate are easily matched.
  • the linear thermal expansion coefficients of the two match, it becomes easy to suppress dimensional changes (particularly warp deformation) of the processed substrate during processing.
  • wiring on one surface of the processed substrate can be performed with high density, and solder bumps can be accurately formed.
  • the supporting glass substrate of the present invention is characterized in that an average linear thermal expansion coefficient in a temperature range of 30 to 380 ° C. is 50 ⁇ 10 ⁇ 7 / ° C. or more and 70 ⁇ 10 ⁇ 7 / ° C. or less.
  • the “average linear thermal expansion coefficient in the temperature range of 30 to 380 ° C.” can be measured with a dilatometer.
  • the supporting glass substrate of the present invention is preferably used for supporting a processed substrate in a semiconductor package manufacturing process.
  • the support glass substrate of the present invention preferably has an ultraviolet transmittance of 40% or more at a wavelength of 300 nm in the thickness direction.
  • the “ultraviolet transmittance at a wavelength of 300 nm in the plate thickness direction” can be evaluated by measuring the spectral transmittance at a wavelength of 300 nm using, for example, a double beam type spectrophotometer.
  • the supporting glass substrate of the present invention preferably has a Young's modulus of 65 GPa or more.
  • Young's modulus refers to a value measured by a bending resonance method. 1 GPa corresponds to approximately 101.9 kgf / mm 2 .
  • the supporting glass substrate of the present invention has a glass composition of 50% to 80% by weight of SiO 2 , 1 to 20% Al 2 O 3, 3 to 20% B 2 O 3 , and 0 to 10% MgO.
  • CaO 0 to 10%, SrO 0 to 7%, BaO 0 to 7%, ZnO 0 to 7%, Na 2 O 5 to 15%, K 2 O 0 to 10% are preferably contained.
  • the supporting glass substrate of the present invention has, as a glass composition, SiO 2 55 to 70%, Al 2 O 3 3 to 15%, B 2 O 3 5 to 20%, MgO 0 to 5% by mass.
  • CaO 0 to 10%, SrO 0 to 5%, BaO 0 to 5%, ZnO 0 to 5%, Na 2 O 5 to 15%, K 2 O 0 to 10% are preferably contained.
  • the supporting glass substrate of the present invention preferably has a thickness of less than 2.0 mm, a wafer shape having a diameter of 100 to 500 mm or a substantially disc shape, and a thickness deviation of 30 ⁇ m or less. .
  • the transport body of the present invention is a transport body including at least a processed substrate and a supporting glass substrate for supporting the processed substrate, wherein the supporting glass substrate is the above-described supporting glass substrate.
  • the manufacturing method of the semiconductor package of this invention WHEREIN: The process of obtaining a conveyance body provided with at least a process board
  • the “process for transporting the transport body” and the “process for processing the processed substrate” do not need to be performed separately and may be performed simultaneously. Specifically, processing may be performed on the processed substrate of the transport body during transport, or when the transport body is being transported, or when transport of the transport body is started. The processing may be performed on the processed substrate of the transport body at the previous stop or at the stop after the transport of the transport body is finished.
  • the processing process includes a process of wiring on one surface of the processed substrate.
  • the processing includes a process of forming solder bumps on one surface of the processed substrate.
  • the semiconductor package of the present invention is manufactured by the above-described method for manufacturing a semiconductor package.
  • the electronic device of this invention is an electronic device provided with a semiconductor package, and a semiconductor package is said semiconductor package.
  • the average linear thermal expansion coefficient in the temperature range of 20 to 200 ° C. is 50 ⁇ 10 ⁇ 7 / ° C. or more and 66 ⁇ 10 ⁇ 7 / ° C. or less, preferably 53 ⁇ 10 ⁇ 7. / ° C. or more and 65 ⁇ 10 ⁇ 7 / ° C. or less, particularly preferably 55 ⁇ 10 ⁇ 7 / ° C. or more and 63 ⁇ 10 ⁇ 7 / ° C. or less.
  • the average linear thermal expansion coefficient in the temperature range of 20 to 200 ° C. is outside the above range, it becomes difficult to match the linear thermal expansion coefficients of the processed substrate and the supporting glass substrate. If the linear thermal expansion coefficients of the two become mismatched, a dimensional change (particularly warp deformation) of the processed substrate is likely to occur during processing.
  • the average linear thermal expansion coefficient in the temperature range of 30 to 380 ° C. is 50 ⁇ 10 ⁇ 7 / ° C. or more and 70 ⁇ 10 ⁇ 7 / ° C. or less, preferably 55 ⁇ 10 ⁇ 7 / ° C. or more and 65 ⁇ 10 -7 / ° C or less.
  • the linear thermal expansion coefficients of the processed substrate and the supporting glass substrate are difficult to match. If the linear thermal expansion coefficients of the two become mismatched, a dimensional change (particularly warp deformation) of the processed substrate is likely to occur during processing.
  • the ultraviolet transmittance at a wavelength of 300 nm with respect to the thickness direction is preferably 40% or more, 50% or more, 60% or more, or 70. % Or more, particularly preferably 80% or more. If the ultraviolet transmittance is too low, it becomes difficult to bond the processed substrate and the supporting substrate by the adhesive layer due to the irradiation of ultraviolet light, and it becomes difficult to separate the supporting substrate from the processed substrate by the release layer.
  • the supporting glass substrate of the present invention has a glass composition of 50 to 80% by mass, SiO 2 50 to 80%, Al 2 O 3 1 to 20%, B 2 O 3 3 to 20%, MgO 0 to 10%, CaO 0 to It preferably contains 10%, SrO 0-7%, BaO 0-7%, ZnO 0-7%, Na 2 O 5-15%, K 2 O 0-10%.
  • the reason for limiting the content of each component as described above will be described below.
  • % display represents the mass% unless there is particular notice.
  • SiO 2 is a main component that forms a glass skeleton.
  • the content of SiO 2 is preferably 50 to 80%, 55 to 75% or 55 to 70%, particularly preferably 55 to 65%.
  • the Young's modulus, acid resistance tends to decrease.
  • the content of SiO 2 is too large, the higher the viscosity at high temperature in addition to the meltability tends to decrease, devitrification crystals cristobalite becomes easy to precipitate, the liquid phase temperature tends to rise become.
  • Al 2 O 3 is a component that enhances the Young's modulus and a component that suppresses phase separation and devitrification.
  • the content of Al 2 O 3 is preferably 1 to 20%, 3 to 18%, 4 to 16%, 5 to 13.5% or 6 to 12%, particularly preferably 7 to 10%.
  • the content of Al 2 O 3 is too small, easily Young's modulus is lowered and also the glass phase separation, easily devitrified.
  • the content of Al 2 O 3 is too large, the higher the viscosity at high temperature meltability, moldability tends to decrease.
  • B 2 O 3 is a component that enhances meltability and devitrification resistance, and is a component that improves the ease of scratching and increases strength.
  • the content of B 2 O 3 is preferably 3 to 20%, 5 to 20% or 7 to 18%, particularly preferably 10 to 15%.
  • meltability, devitrification resistance is liable to lower, also resistance tends to decrease with respect to hydrofluoric acid chemical.
  • Young's modulus, acid resistance tends to decrease.
  • MgO is a component that lowers the viscosity at high temperature and increases the meltability, and among alkaline earth metal oxides, it is a component that significantly increases the Young's modulus.
  • the content of MgO is preferably 0 to 10%, 0 to 8%, 0 to 6% or 0 to 5%, particularly preferably 0 to 1%. When there is too much content of MgO, devitrification resistance will fall easily.
  • CaO is a component that lowers the high temperature viscosity and remarkably increases the meltability. Further, among the alkaline earth metal oxides, since the introduced raw material is relatively inexpensive, it is a component that lowers the raw material cost.
  • the content of CaO is preferably 0 to 10%, 0.5 to 8% or 1 to 6%, particularly preferably 2 to 5%. When there is too much content of CaO, it will become easy to devitrify glass. In addition, when there is too little content of CaO, it will become difficult to receive the said effect.
  • SrO is a component that suppresses phase separation and is a component that improves devitrification resistance.
  • the content of SrO is preferably 0 to 7%, 0 to 5% or 0 to 3%, particularly preferably 0 to less than 1%. When there is too much content of SrO, it will become easy to devitrify glass.
  • BaO is a component that increases devitrification resistance.
  • the content of BaO is preferably 0-7%, 0-5%, 0-3% or 0-1%. When there is too much content of BaO, it will become easy to devitrify glass.
  • ZnO is a component that lowers the high temperature viscosity and remarkably increases the meltability.
  • the content of ZnO is preferably 0 to 7% or 0.1 to 5%, particularly preferably 0.5 to 3%. When there is too little content of ZnO, it will become difficult to receive the said effect. In addition, when there is too much content of ZnO, it will become easy to devitrify glass.
  • Na 2 O is an important component for optimizing the coefficient of thermal expansion, and is a component that contributes to the initial melting of the glass raw material while lowering the high-temperature viscosity to significantly increase the meltability.
  • the content of Na 2 O is preferably 5 to 15% or 6 to 13.5%, particularly preferably 7 to 13%. If the content of Na 2 O is too small, the meltability tends to be lowered, and the thermal expansion coefficient may be unduly lowered. On the other hand, when the content of Na 2 O is too large, there is a concern that the thermal expansion coefficient becomes unduly high.
  • the mass ratio (Al 2 O 3 + Na 2 O) / SiO 2 is preferably 0.2 to 0.4, 0.23 to 0.35, or 0.25 to 0.00 from the viewpoint of optimizing the thermal expansion coefficient. 3, particularly preferably 0.26 to 0.29.
  • K 2 O is a component for adjusting the thermal expansion coefficient, and is a component that contributes to the initial melting of the glass raw material while lowering the high-temperature viscosity to increase the meltability.
  • the content of K 2 O is preferably 0 to 15%, 0 to 10% or 0 to 5%, particularly preferably 0 to 1%. When the content of K 2 O is too large, there is a concern that the thermal expansion coefficient becomes unduly high.
  • the content of other components other than the above components is preferably 10% or less, and particularly preferably 5% or less in total, from the viewpoint of accurately enjoying the effects of the present invention.
  • Fe 2 O 3 is a component that can be introduced as an impurity component or a fining agent component.
  • the content of Fe 2 O 3 is preferably 0.05% or less or 0.03% or less, particularly preferably 0.02% or less.
  • “Fe 2 O 3 ” referred to in the present invention includes divalent iron oxide and trivalent iron oxide, and the divalent iron oxide is handled in terms of Fe 2 O 3 . Similarly, other oxides are handled based on the indicated oxide.
  • the content of As 2 O 3 is preferably 1% or less or 0.5% or less, particularly preferably 0.1% or less, and it is desirable that it is not substantially contained.
  • “substantially does not contain As 2 O 3 ” refers to the case where the content of As 2 O 3 in the glass composition is less than 0.05%.
  • the content of Sb 2 O 3 is preferably 1% or less or 0.5% or less, particularly preferably 0.1% or less, and it is desirable that the Sb 2 O 3 content is not substantially contained.
  • “substantially does not contain Sb 2 O 3 ” refers to a case where the content of Sb 2 O 3 in the glass composition is less than 0.05%.
  • SnO 2 is a component having a good clarification action in a high temperature region and a component that lowers the high temperature viscosity.
  • the content of SnO 2 is preferably 0 to 1%, 0.001 to 1% or 0.01 to 0.9%, particularly preferably 0.05 to 0.7%.
  • the content of SnO 2 is too large, the devitrification crystal SnO 2 is likely to precipitate. Incidentally, when the content of SnO 2 is too small, it becomes difficult to enjoy the above-mentioned effects.
  • metal powders such as F, Cl, SO 3 , C, Al, Si, etc. may be introduced up to about 3% each as a fining agent.
  • CeO 2 or the like can be introduced up to about 3%, but it is necessary to pay attention to a decrease in ultraviolet transmittance.
  • Cl is a component that promotes melting of glass. If Cl is introduced into the glass composition, the melting temperature can be lowered and the clarification action can be promoted. As a result, the melting cost can be lowered and the glass production kiln can be easily extended. However, when there is too much Cl content, there is a possibility of corroding the metal parts around the glass manufacturing kiln. Therefore, the Cl content is preferably 3% or less, 1% or less, or 0.5% or less, and particularly preferably 0.1% or less.
  • P 2 O 5 is a component that can suppress the precipitation of devitrified crystals.
  • the content of P 2 O 5 is preferably 0 to 2.5%, 0 to 1.5% or 0 to 0.5%, particularly preferably 0 to 0.3%.
  • TiO 2 is a component that lowers the high-temperature viscosity and increases the meltability, and also suppresses solarization. However, when a large amount of TiO 2 is introduced, the glass is colored and the transmittance tends to decrease. Therefore, the content of TiO 2 is preferably 0 to 5%, 0 to 3% or 0 to 1%, particularly preferably 0 to 0.02%.
  • ZrO 2 is a component that improves chemical resistance and Young's modulus.
  • the content of ZrO 2 is preferably 0 to 5%, 0 to 3% or 0 to 1%, particularly preferably 0 to 0.5%.
  • Y 2 O 3 , Nb 2 O 5 , and La 2 O 3 have a function of increasing the strain point, Young's modulus, and the like. However, if the content of these components is more than 5% or 1%, the raw material cost and the product cost may increase.
  • the supporting glass substrate of the present invention preferably has the following characteristics.
  • the Young's modulus is preferably 65 GPa or more, 67 GPa or more, 68 GPa or more, 69 GPa or more, or 70 GPa or more, and particularly preferably 71 GPa or more. If the Young's modulus is too low, it becomes difficult to maintain the rigidity of the conveyance body, and the processed substrate is likely to be deformed, warped, or damaged.
  • the liquidus temperature is preferably less than 1150 ° C, 1120 ° C or less, 1100 ° C or less, 1080 ° C or less, 1050 ° C or less, 1010 ° C or less, 980 ° C or less, 960 ° C or less, or 950 ° C or less, particularly preferably 940 ° C or less. is there.
  • the glass substrate can be easily formed by the downdraw method, particularly the overflow downdraw method, so that it is easy to produce a glass substrate having a small plate thickness, and the plate thickness deviation can be reduced without polishing the surface. As a result, the manufacturing cost of the glass substrate can be reduced.
  • the “liquid phase temperature” is obtained by passing the standard sieve 30 mesh (500 ⁇ m) and putting the glass powder remaining on the 50 mesh (300 ⁇ m) in a platinum boat, and holding it in a temperature gradient furnace for 24 hours. It can be calculated by measuring the temperature at which precipitation occurs.
  • the viscosity at the liquidus temperature is preferably 10,000 dPa ⁇ s or more, 30000 dPa ⁇ s or more, 60000 dPa ⁇ s or more, 100000 dPa ⁇ s or more, 150,000 dPa ⁇ s or more, 200000 dPa ⁇ s or more, 250,000 dPa ⁇ s or more, 300000 dPa ⁇ s or more, or 350,000 dPa ⁇ s.
  • ⁇ S or more particularly preferably 400,000 dPa ⁇ s or more.
  • the glass substrate can be easily formed by the downdraw method, particularly the overflow downdraw method, so that it is easy to produce a glass substrate having a small plate thickness, and the plate thickness deviation can be reduced without polishing the surface.
  • the manufacturing cost of the glass substrate can be reduced.
  • the “viscosity at the liquidus temperature” can be measured by a platinum ball pulling method. The viscosity at the liquidus temperature is an index of moldability. The higher the viscosity at the liquidus temperature, the better the moldability.
  • the temperature at 10 2.5 dPa ⁇ s is preferably 1580 ° C. or lower, 1550 ° C. or lower, 1520 ° C. or lower, 1500 ° C. or lower, or 1480 ° C. or lower, particularly preferably 1300 to 1470 ° C.
  • “temperature at 10 2.5 dPa ⁇ s” can be measured by a platinum ball pulling method. The temperature at 10 2.5 dPa ⁇ s corresponds to the melting temperature, and the lower the temperature, the better the melting property.
  • the support glass substrate of the present invention is preferably formed by a downdraw method, particularly an overflow downdraw method.
  • molten glass overflows from both sides of a heat-resistant bowl-shaped structure, and the overflowed molten glass joins at the lower top end of the bowl-shaped structure and is formed downward to produce a glass substrate. It is a method to do.
  • the surface to be the surface of the glass substrate is not in contact with the bowl-shaped refractory, and is formed in a free surface state. For this reason, it becomes easy to produce a glass substrate having a small plate thickness, and the plate thickness deviation can be reduced without polishing the surface. As a result, the manufacturing cost of the glass substrate can be reduced.
  • the structure and material of a bowl-shaped structure will not be specifically limited if a desired dimension and surface accuracy are realizable.
  • the method of applying a force when performing downward stretch molding is not particularly limited. For example, a method may be adopted in which a heat-resistant roll having a sufficiently large width is rotated and stretched in contact with glass, or a plurality of pairs of heat-resistant rolls are contacted only near the end face of the glass. It is also possible to adopt a method of stretching by stretching.
  • the glass substrate forming method in addition to the overflow downdraw method, for example, a slot down method, a redraw method, a float method, or the like can be adopted.
  • the glass substrate of the present invention preferably has a substantially disk shape or wafer shape, and the diameter is preferably 100 mm or more and 500 mm or less, particularly 150 mm or more and 450 mm or less. In this way, it becomes easy to apply to the manufacturing process of a semiconductor package. You may process into other shapes, for example, shapes, such as a rectangle, as needed.
  • the plate thickness is preferably less than 2.0 mm, 1.5 mm or less, 1.2 mm or less, 1.1 mm or less, or 1.0 mm or less, particularly preferably 0.9 mm or less.
  • the plate thickness is preferably 0.1 mm or more, 0.2 mm or more, 0.3 mm or more, 0.4 mm or more, 0.5 mm or more, or 0.6 mm or more, and particularly preferably more than 0.7 mm.
  • the thickness deviation is preferably 30 ⁇ m or less, 20 ⁇ m or less, 10 ⁇ m or less, 5 ⁇ m or less, 4 ⁇ m or less, 3 ⁇ m or less, 2 ⁇ m or less, or 1 ⁇ m or less, particularly preferably 0.1 to less than 1 ⁇ m.
  • the arithmetic average roughness Ra is preferably 100 nm or less, 50 nm or less, 20 nm or less, 10 nm or less, 5 nm or less, 2 nm or less, or 1 nm or less, particularly preferably 0.5 nm or less. The higher the surface accuracy, the easier it is to improve the processing accuracy.
  • the “arithmetic average roughness Ra” can be measured by a stylus type surface roughness meter or an atomic force microscope (AFM).
  • the support glass substrate of the present invention is preferably formed by polishing the surface after being formed by the overflow downdraw method. If it does in this way, it will become easy to regulate board thickness deviation to 2 micrometers or less or 1 micrometer or less, especially less than 1 micrometer.
  • the support glass substrate of the present invention is preferably not chemically strengthened from the viewpoint of production efficiency, and preferably chemically strengthened from the viewpoint of mechanical strength. That is, it is preferable not to have a compressive stress layer on the surface from the viewpoint of production efficiency, and it is preferable to have a compressive stress layer on the surface from the viewpoint of mechanical strength.
  • the carrier of the present invention is a carrier comprising at least a processed substrate and a supporting glass substrate for supporting the processed substrate, wherein the supporting glass substrate is the supporting glass substrate described above.
  • the technical characteristics (preferable structure and effect) of the carrier of the present invention overlap with the technical characteristics of the support glass substrate of the present invention. Therefore, in the present specification, detailed description of the overlapping portions is omitted.
  • the carrier of the present invention preferably has an adhesive layer between the processed substrate and the supporting glass substrate.
  • the adhesive layer is preferably a resin, for example, a thermosetting resin, a photocurable resin (particularly an ultraviolet curable resin), or the like.
  • a resin for example, a thermosetting resin, a photocurable resin (particularly an ultraviolet curable resin), or the like.
  • medical solution used in the manufacturing process of a semiconductor package, or the gas and plasma used in the case of dry etching is preferable.
  • what has the heat resistance which can endure the heat processing in the manufacturing process of a semiconductor package is preferable. Thereby, it becomes difficult to melt
  • the carrier of the present invention preferably further has a release layer between the processed substrate and the supporting glass substrate, more specifically between the processed substrate and the adhesive layer. If it does in this way, it will become easy to peel a processed substrate from a support glass substrate, after performing predetermined processing processing to a processed substrate. Peeling of the processed substrate is preferably performed with irradiation light such as laser light from the viewpoint of productivity.
  • the peeling layer is made of a material that causes “in-layer peeling” or “interfacial peeling” by irradiation light such as laser light. That is, when light of a certain intensity is irradiated, the bonding force between atoms or molecules in an atom or molecule disappears or decreases, and ablation or the like is caused to cause peeling.
  • the component contained in the release layer is released as a gas due to irradiation of irradiation light, the separation layer is released, and when the release layer absorbs light and becomes a gas, and its vapor is released, resulting in separation There is.
  • the supporting glass substrate is preferably larger than the processed substrate.
  • the method for manufacturing a semiconductor package of the present invention includes a step of obtaining a transport body including at least a processing substrate and a supporting glass substrate for supporting the processing substrate, a step of transporting the transport body, and a processing process on the processing substrate.
  • a supporting glass substrate is the above-described supporting glass substrate.
  • the processing is preferably performed by wiring on one surface of the processed substrate or forming solder bumps on one surface of the processed substrate.
  • the processing since the processed substrate is difficult to change in dimensions during these processes, these steps can be appropriately performed.
  • one surface of a processed substrate (usually the surface opposite to the supporting glass substrate) is mechanically polished, and one surface of the processed substrate (usually a supporting glass substrate) Either a process of dry-etching the surface on the opposite side or a process of wet-etching one surface of the processed substrate (usually the surface opposite to the supporting glass substrate) may be used.
  • the processed substrate is unlikely to warp and the rigidity of the carrier can be maintained high. As a result, the above processing can be performed appropriately.
  • the semiconductor package of the present invention is manufactured by the above-described semiconductor package manufacturing method.
  • the technical characteristics (preferable configuration and effect) of the semiconductor package of the present invention overlap with the technical characteristics of the manufacturing method of the supporting glass substrate, the carrier, and the semiconductor package of the present invention. Therefore, in the present specification, detailed description of the overlapping portions is omitted.
  • An electronic device of the present invention is an electronic device including a semiconductor package, and the semiconductor package is the semiconductor package described above.
  • the technical characteristics (preferable structure and effect) of the electronic device of the present invention overlap with the technical characteristics of the supporting glass substrate, the carrier, the semiconductor package manufacturing method, and the semiconductor package of the present invention. Therefore, in the present specification, detailed description of the overlapping portions is omitted.
  • FIG. 1 is a conceptual perspective view showing an example of the carrier 1 of the present invention.
  • the carrier 1 includes a supporting glass substrate 10 and a processed substrate (semiconductor substrate) 11.
  • the supporting glass substrate 10 is attached to the processed substrate 11 in order to prevent a dimensional change of the processed substrate 11.
  • a release layer 12 and an adhesive layer 13 are disposed between the support glass substrate 10 and the processed substrate 11.
  • the peeling layer 12 is in contact with the supporting glass substrate 10, and the adhesive layer 13 is in contact with the processed substrate 11.
  • the carrier 1 is laminated in the order of a supporting glass substrate 10, a release layer 12, an adhesive layer 13, and a processed substrate 11.
  • the shape of the support glass substrate 10 is determined according to the processed substrate 11, in FIG. 1, the shapes of the support glass substrate 10 and the processed substrate 11 are both substantially disk shapes.
  • the release layer 12 is made of silicon oxide, silicate compound, silicon nitride, aluminum nitride, titanium nitride, or the like.
  • the release layer 12 is formed by plasma CVD, spin coating by a sol-gel method, or the like.
  • the adhesive layer 13 is made of a resin, and is applied and formed by, for example, various printing methods, inkjet methods, spin coating methods, roll coating methods, and the like.
  • the adhesive layer 13 is removed by dissolution with a solvent or the like after the supporting glass substrate 10 is peeled from the processed substrate 11 by the peeling layer 12.
  • FIG. 2 a to 2g are conceptual cross-sectional views showing manufacturing processes of a fan-out type WLP.
  • FIG. 2 a shows a state in which an adhesive layer 21 is formed on one surface of the support member 20. A peeling layer may be formed between the support member 20 and the adhesive layer 21 as necessary.
  • FIG. 2 b a plurality of semiconductor chips 22 are stuck on the adhesive layer 21. At that time, the surface on the active side of the semiconductor chip 22 is brought into contact with the adhesive layer 21.
  • FIG. 2 c the semiconductor chip 22 is molded with a resin sealing material 23.
  • the sealing material 23 is made of a material having little dimensional change after compression molding and little dimensional change when forming a wiring. Subsequently, as shown in FIGS.
  • the processed substrate 24 on which the semiconductor chip 22 is molded is separated from the support member 20, and then bonded and fixed to the support glass substrate 26 through the adhesive layer 25.
  • the surface of the processed substrate 24 opposite to the surface on which the semiconductor chip 22 is embedded is disposed on the supporting glass substrate 26 side.
  • the transport body 27 can be obtained.
  • the wiring 28 is formed on the surface of the processed substrate 24 on the side where the semiconductor chip 22 is embedded, and then on the exposed portion side of the wiring 28. A plurality of solder bumps 29 are formed.
  • the processed substrate 24 is cut for each semiconductor chip 22 and used for the subsequent packaging process.
  • Table 1 shows examples of the present invention (sample Nos. 1 to 7).
  • a glass batch in which glass raw materials were prepared so as to have the glass composition in the table was placed in a platinum crucible and melted at 1550 ° C. for 4 hours.
  • the mixture was stirred and homogenized using a platinum stirrer.
  • the molten glass was poured out on a carbon plate, formed into a plate shape, and then gradually cooled from a temperature about 20 ° C. higher than the annealing point to room temperature at 3 ° C./min.
  • the temperature at 0 dPa ⁇ s, the liquidus temperature TL, the viscosity ⁇ at the liquidus temperature TL, the Young's modulus E, and the ultraviolet transmittance T at a wavelength of 300 nm with respect to the plate thickness direction were evaluated.
  • Average linear thermal expansion coefficient alpha 30 ⁇ 380 in the temperature range of average linear thermal expansion coefficient ⁇ 20 ⁇ 200, 30 ⁇ 380 °C in the temperature range of 20 ⁇ 200 ° C. is a value measured by a dilatometer.
  • the density ⁇ is a value measured by the well-known Archimedes method.
  • strain point Ps, the annealing point Ta, and the softening point Ts are values measured based on the method of ASTM C336.
  • the temperature at a high temperature viscosity of 10 4.0 dPa ⁇ s, 10 3.0 dPa ⁇ s, and 10 2.5 dPa ⁇ s is a value measured by a platinum ball pulling method.
  • the liquid phase temperature TL is the temperature at which crystals pass after passing through a standard sieve 30 mesh (500 ⁇ m), putting the glass powder remaining on 50 mesh (300 ⁇ m) into a platinum boat and holding it in a temperature gradient furnace for 24 hours. It is the value measured by microscopic observation.
  • the viscosity ⁇ at the liquidus temperature is a value obtained by measuring the viscosity of the glass at the liquidus temperature TL by the platinum ball pulling method.
  • the Young's modulus E refers to a value measured by the resonance method.
  • the ultraviolet transmittance T at a wavelength of 300 nm is a value obtained by measuring the spectral transmittance at a wavelength of 300 nm in the plate thickness direction using a double beam type spectrophotometer.
  • a plate having a thickness of 0.7 mm and both surfaces polished to an optically polished surface (mirror surface) was used as a measurement sample.
  • the arithmetic surface roughness Ra of this evaluation sample was measured by AFM, it was 0.5 to 1.0 nm in a measurement region of 10 ⁇ m ⁇ 10 ⁇ m.
  • sample No. 1 to 7 have an average linear thermal expansion coefficient ⁇ 30 to 200 in the temperature range of 20 to 200 ° C. of 56 ⁇ 10 ⁇ 7 / ° C. to 65 ⁇ 10 ⁇ 7 / ° C., and an average in the temperature range of 30 to 380 ° C.
  • the linear thermal expansion coefficient ⁇ 30 to 380 was 58 ⁇ 10 ⁇ 7 / ° C. to 68 ⁇ 10 ⁇ 7 / ° C.
  • Sample No. In Nos. 1 to 7 the Young's modulus E was 70 GPa or more, and the ultraviolet transmittance T at a wavelength of 300 nm in the thickness direction was 55% or more. Therefore, sample no. Nos. 1 to 7 are considered to be suitable as supporting glass substrates used for supporting the processed substrate in the manufacturing process of the semiconductor manufacturing apparatus.
  • sample Nos. Listed in Table 1 were used. After preparing the glass raw material so as to have a glass composition of 1 to 7, the glass raw material is supplied to a glass melting furnace and melted at 1500 to 1600 ° C., and then the molten glass is supplied to an overflow downdraw molding apparatus, and the sheet thickness is 0 Each was molded to 7 mm. About the obtained glass substrate, both surfaces were machine-polished and the plate

Abstract

 A supporting glass substrate for supporting a substrate to be processed, the supporting glass substrate not readily causing dimensional variation in the substrate to be processed, the supporting glass substrate characterized by having an average linear thermal expansion coefficient of 50×10-7/˚C to 66×10-7/˚C in a temperature range of 20 to 200°C.

Description

支持ガラス基板及びこれを用いた搬送体Support glass substrate and carrier using the same
 本発明は、支持ガラス基板及びこれを用いた搬送体に関し、具体的には、半導体パッケージ(半導体装置)の製造工程で加工基板の支持に用いる支持ガラス基板及びこれを用いた搬送体に関する。 The present invention relates to a supporting glass substrate and a transport body using the same, and specifically to a supporting glass substrate used for supporting a processed substrate in a manufacturing process of a semiconductor package (semiconductor device) and a transport body using the same.
 携帯電話、ノート型パーソナルコンピュータ、PDA(Personal Data Assistance)等の携帯型電子機器には、小型化及び軽量化が要求されている。これに伴い、これらの電子機器に用いられる半導体チップの実装スペースも厳しく制限されており、半導体チップの高密度な実装が課題になっている。そこで、近年では、三次元実装技術、すなわち半導体チップ同士を積層し、各半導体チップ間を配線接続することにより、半導体パッケージの高密度実装を図っている。 Portable electronic devices such as mobile phones, notebook personal computers, and PDAs (Personal Data Assistance) are required to be smaller and lighter. Along with this, the mounting space of semiconductor chips used in these electronic devices is also strictly limited, and high-density mounting of semiconductor chips has become a problem. Therefore, in recent years, high-density mounting of semiconductor packages has been achieved by three-dimensional mounting technology, that is, by stacking semiconductor chips and interconnecting the semiconductor chips.
 また、従来のウェハレベルパッケージ(WLP)は、バンプをウェハの状態で形成した後、ダイシングで個片化することにより作製されている。しかし、従来のWLPは、ピン数を増加させ難いことに加えて、半導体チップの裏面が露出した状態で実装されるため、半導体チップの欠け等が発生し易いという問題があった。 In addition, a conventional wafer level package (WLP) is manufactured by forming bumps in a wafer state and then separating them by dicing. However, in the conventional WLP, in addition to the difficulty of increasing the number of pins, since the back surface of the semiconductor chip is mounted, the semiconductor chip is likely to be chipped.
 そこで、新たなWLPとして、fan out型のWLPが提案されている。fan out型のWLPは、ピン数を増加させることが可能であり、また半導体チップの端部を保護することにより、半導体チップの欠け等を防止することができる。 Therefore, a fan out type WLP has been proposed as a new WLP. The fan-out type WLP can increase the number of pins, and can prevent chipping of the semiconductor chip by protecting the end portion of the semiconductor chip.
 fan out型のWLPでは、複数の半導体チップを樹脂の封止材でモールドして、加工基板を形成した後に、加工基板の一方の表面に配線する工程、半田バンプを形成する工程等を有する。 The fan-out type WLP includes a step of forming a processed substrate by molding a plurality of semiconductor chips with a resin sealing material and then wiring to one surface of the processed substrate, a step of forming a solder bump, and the like.
 これらの工程は、約200℃の熱処理を伴うため、封止材が変形して、加工基板が寸法変化する虞がある。加工基板が寸法変化すると、加工基板の一方の表面に対して、高密度に配線することが困難になり、また半田バンプを正確に形成することも困難になる。 Since these processes involve a heat treatment at about 200 ° C., the sealing material may be deformed and the processed substrate may change in dimensions. When the dimension of the processed substrate changes, it becomes difficult to perform wiring with high density on one surface of the processed substrate, and it becomes difficult to accurately form solder bumps.
 加工基板の寸法変化を抑制するために、加工基板を支持するための支持基板を用いることが有効である。しかし、支持基板を用いた場合であっても、加工基板の寸法変化が生じる場合があった。 In order to suppress the dimensional change of the processed substrate, it is effective to use a support substrate for supporting the processed substrate. However, even when a support substrate is used, there is a case where a dimensional change of the processed substrate occurs.
 本発明は、上記事情に鑑みなされたものであり、その技術的課題は、加工基板の寸法変化を生じさせ難い支持基板及びこれを用いた搬送体を創案することにより、半導体パッケージの高密度実装に寄与することである。 The present invention has been made in view of the above circumstances, and its technical problem is to create a support substrate that hardly causes a dimensional change of a processed substrate and a carrier using the same, thereby high-density mounting of a semiconductor package. To contribute.
 本発明者等は、種々の実験を繰り返した結果、支持基板としてガラス基板を採択すると共に、このガラス基板の熱膨張係数を厳密に規制することにより、上記技術的課題を解決し得ることを見出し、本発明として、提案するものである。すなわち、本発明の支持ガラス基板は、20~200℃の温度範囲における平均線熱膨張係数が50×10-7/℃以上で且つ66×10-7/℃以下であることを特徴とする。ここで、「20~200℃の温度範囲における平均線熱膨張係数」は、ディラトメーターで測定可能である。 As a result of repeating various experiments, the present inventors have found that the above technical problem can be solved by adopting a glass substrate as a support substrate and strictly regulating the thermal expansion coefficient of the glass substrate. This is proposed as the present invention. That is, the supporting glass substrate of the present invention is characterized in that the average linear thermal expansion coefficient in the temperature range of 20 to 200 ° C. is 50 × 10 −7 / ° C. or more and 66 × 10 −7 / ° C. or less. Here, the “average linear thermal expansion coefficient in the temperature range of 20 to 200 ° C.” can be measured with a dilatometer.
 ガラス基板は、表面を平滑化し易く、且つ高い剛性を有する。よって、支持基板としてガラス基板を用いると、加工基板を強固、且つ正確に支持することが可能になる。またガラス基板は、紫外光等の光を透過し易い。よって、支持基板としてガラス基板を用いると、接着層等を設けることにより加工基板と支持ガラス基板を容易に固定することができる。また剥離層等を設けることにより加工基板と支持ガラス基板を容易に分離することもできる。 The glass substrate is easy to smooth the surface and has high rigidity. Therefore, when a glass substrate is used as the support substrate, the processed substrate can be supported firmly and accurately. In addition, the glass substrate easily transmits light such as ultraviolet light. Therefore, when a glass substrate is used as the support substrate, the processed substrate and the support glass substrate can be easily fixed by providing an adhesive layer or the like. Further, by providing a release layer or the like, the processed substrate and the supporting glass substrate can be easily separated.
 また、本発明の支持ガラス基板では、20~200℃の温度範囲における平均線熱膨張係数が50×10-7/℃以上で且つ66×10-7/℃以下に規制されている。このようにすれば、加工基板内で半導体チップの割合が少なく、封止材の割合が多い場合に、加工基板と支持ガラス基板の線熱膨張係数が整合し易くなる。そして、両者の線熱膨張係数が整合すると、加工処理時に加工基板の寸法変化(特に、反り変形)を抑制し易くなる。結果として、加工基板の一方の表面に対して、高密度に配線することが可能になり、また半田バンプを正確に形成することも可能になる。 Further, in the supporting glass substrate of the present invention, the average linear thermal expansion coefficient in the temperature range of 20 to 200 ° C. is regulated to 50 × 10 −7 / ° C. or more and 66 × 10 −7 / ° C. or less. In this way, when the ratio of the semiconductor chip is small and the ratio of the sealing material is large in the processed substrate, the linear thermal expansion coefficients of the processed substrate and the supporting glass substrate are easily matched. When the linear thermal expansion coefficients of the two match, it becomes easy to suppress dimensional changes (particularly warp deformation) of the processed substrate during processing. As a result, wiring on one surface of the processed substrate can be performed with high density, and solder bumps can be accurately formed.
 第二に、本発明の支持ガラス基板は、30~380℃の温度範囲における平均線熱膨張係数が50×10-7/℃以上で且つ70×10-7/℃以下であることを特徴とする。ここで、「30~380℃の温度範囲における平均線熱膨張係数」は、ディラトメーターで測定可能である。 Second, the supporting glass substrate of the present invention is characterized in that an average linear thermal expansion coefficient in a temperature range of 30 to 380 ° C. is 50 × 10 −7 / ° C. or more and 70 × 10 −7 / ° C. or less. To do. Here, the “average linear thermal expansion coefficient in the temperature range of 30 to 380 ° C.” can be measured with a dilatometer.
 第三に、本発明の支持ガラス基板は、半導体パッケージの製造工程で加工基板の支持に用いることが好ましい。 Third, the supporting glass substrate of the present invention is preferably used for supporting a processed substrate in a semiconductor package manufacturing process.
 第四に、本発明の支持ガラス基板は、板厚方向に対する波長300nmにおける紫外線透過率が40%以上であることが好ましい。ここで、「板厚方向に対する波長300nmにおける紫外線透過率」は、例えば、ダブルビーム型分光光度計を用いて、波長300nmの分光透過率を測定することで評価可能である。 Fourth, the support glass substrate of the present invention preferably has an ultraviolet transmittance of 40% or more at a wavelength of 300 nm in the thickness direction. Here, the “ultraviolet transmittance at a wavelength of 300 nm in the plate thickness direction” can be evaluated by measuring the spectral transmittance at a wavelength of 300 nm using, for example, a double beam type spectrophotometer.
 第五に、本発明の支持ガラス基板は、ヤング率が65GPa以上であることが好ましい。ここで、「ヤング率」は、曲げ共振法により測定した値を指す。なお、1GPaは、約101.9Kgf/mmに相当する。 Fifth, the supporting glass substrate of the present invention preferably has a Young's modulus of 65 GPa or more. Here, “Young's modulus” refers to a value measured by a bending resonance method. 1 GPa corresponds to approximately 101.9 kgf / mm 2 .
 第六に、本発明の支持ガラス基板は、ガラス組成として、質量%で、SiO 50~80%、Al 1~20%、B 3~20%、MgO 0~10%、CaO 0~10%、SrO 0~7%、BaO 0~7%、ZnO 0~7%、NaO 5~15%、KO 0~10%を含有することが好ましい。 Sixth, the supporting glass substrate of the present invention has a glass composition of 50% to 80% by weight of SiO 2 , 1 to 20% Al 2 O 3, 3 to 20% B 2 O 3 , and 0 to 10% MgO. CaO 0 to 10%, SrO 0 to 7%, BaO 0 to 7%, ZnO 0 to 7%, Na 2 O 5 to 15%, K 2 O 0 to 10% are preferably contained.
 第七に、本発明の支持ガラス基板は、ガラス組成として、質量%で、SiO 55~70%、Al 3~15%、B 5~20%、MgO 0~5%、CaO 0~10%、SrO 0~5%、BaO 0~5%、ZnO 0~5%、NaO 5~15%、KO 0~10%を含有することが好ましい。 Seventh, the supporting glass substrate of the present invention has, as a glass composition, SiO 2 55 to 70%, Al 2 O 3 3 to 15%, B 2 O 3 5 to 20%, MgO 0 to 5% by mass. CaO 0 to 10%, SrO 0 to 5%, BaO 0 to 5%, ZnO 0 to 5%, Na 2 O 5 to 15%, K 2 O 0 to 10% are preferably contained.
 第八に、本発明の支持ガラス基板は、板厚が2.0mm未満であり、直径が100~500mmのウェハ形状又は略円板形状であり、且つ板厚偏差が30μm以下であることが好ましい。 Eighth, the supporting glass substrate of the present invention preferably has a thickness of less than 2.0 mm, a wafer shape having a diameter of 100 to 500 mm or a substantially disc shape, and a thickness deviation of 30 μm or less. .
 第九に、本発明の搬送体は、少なくとも加工基板と加工基板を支持するための支持ガラス基板とを備える搬送体であって、支持ガラス基板が上記の支持ガラス基板であることを特徴とする。 Ninth, the transport body of the present invention is a transport body including at least a processed substrate and a supporting glass substrate for supporting the processed substrate, wherein the supporting glass substrate is the above-described supporting glass substrate. .
 第十に、本発明の半導体パッケージの製造方法は、少なくとも加工基板と加工基板を支持するための支持ガラス基板とを備える搬送体を得る工程と、搬送体を搬送する工程と、加工基板に対して、加工処理を行う工程と、を有すると共に、支持ガラス基板が上記の支持ガラス基板であることを特徴とする。なお、「搬送体を搬送する工程」と「加工基板に対して、加工処理を行う工程」とは、別途に行う必要はなく、同時であってもよい。具体的には、搬送している最中に搬送体の加工基板に対して、加工処理を行ってもよく、或いは、搬送体を搬送している途中の停止時または搬送体の搬送を開始する前の停止時もしくは搬送体の搬送を終了した後の停止時に、搬送体の加工基板に対して、加工処理を行ってもよい。 10thly, the manufacturing method of the semiconductor package of this invention WHEREIN: The process of obtaining a conveyance body provided with at least a process board | substrate and the support glass substrate for supporting a process board | substrate, the process of conveying a conveyance body, And a step of performing processing, and the support glass substrate is the support glass substrate described above. The “process for transporting the transport body” and the “process for processing the processed substrate” do not need to be performed separately and may be performed simultaneously. Specifically, processing may be performed on the processed substrate of the transport body during transport, or when the transport body is being transported, or when transport of the transport body is started. The processing may be performed on the processed substrate of the transport body at the previous stop or at the stop after the transport of the transport body is finished.
 第十一に、本発明の半導体パッケージの製造方法は、加工処理が、加工基板の一方の表面に配線する処理を含むことが好ましい。 Eleventhly, in the method of manufacturing a semiconductor package of the present invention, it is preferable that the processing process includes a process of wiring on one surface of the processed substrate.
 第十二に、本発明の半導体パッケージの製造方法は、加工処理が、加工基板の一方の表面に半田バンプを形成する処理を含むことが好ましい。 Twelfth, in the semiconductor package manufacturing method of the present invention, it is preferable that the processing includes a process of forming solder bumps on one surface of the processed substrate.
 第十三に、本発明の半導体パッケージは、上記の半導体パッケージの製造方法により作製されたことを特徴とする。 Thirteenth, the semiconductor package of the present invention is manufactured by the above-described method for manufacturing a semiconductor package.
 第十四に、本発明の電子機器は、半導体パッケージを備える電子機器であって、半導体パッケージが、上記の半導体パッケージであることを特徴とする。 14thly, the electronic device of this invention is an electronic device provided with a semiconductor package, and a semiconductor package is said semiconductor package.
本発明の搬送体の一例を示す概念斜視図である。It is a conceptual perspective view which shows an example of the conveyance body of this invention. fan out型のWLPの製造工程を示す概念断面図である。It is a conceptual sectional view showing a manufacturing process of a fan out type WLP. fan out型のWLPの製造工程を示す概念断面図である。It is a conceptual sectional view showing a manufacturing process of a fan out type WLP. fan out型のWLPの製造工程を示す概念断面図である。It is a conceptual sectional view showing a manufacturing process of a fan out type WLP. fan out型のWLPの製造工程を示す概念断面図である。It is a conceptual sectional view showing a manufacturing process of a fan out type WLP. fan out型のWLPの製造工程を示す概念断面図である。It is a conceptual sectional view showing a manufacturing process of a fan out type WLP. fan out型のWLPの製造工程を示す概念断面図である。It is a conceptual sectional view showing a manufacturing process of a fan out type WLP. fan out型のWLPの製造工程を示す概念断面図である。It is a conceptual sectional view showing a manufacturing process of a fan out type WLP.
 本発明の支持ガラス基板において、20~200℃の温度範囲における平均線熱膨張係数は50×10-7/℃以上で且つ66×10-7/℃以下であり、好ましくは53×10-7/℃以上で且つ65×10-7/℃以下、特に好ましくは55×10-7/℃以上で且つ63×10-7/℃以下である。20~200℃の温度範囲における平均線熱膨張係数が上記範囲外になると、加工基板と支持ガラス基板の線熱膨張係数が整合し難くなる。そして、両者の線熱膨張係数が不整合になると、加工処理時に加工基板の寸法変化(特に、反り変形)が生じ易くなる。 In the supporting glass substrate of the present invention, the average linear thermal expansion coefficient in the temperature range of 20 to 200 ° C. is 50 × 10 −7 / ° C. or more and 66 × 10 −7 / ° C. or less, preferably 53 × 10 −7. / ° C. or more and 65 × 10 −7 / ° C. or less, particularly preferably 55 × 10 −7 / ° C. or more and 63 × 10 −7 / ° C. or less. When the average linear thermal expansion coefficient in the temperature range of 20 to 200 ° C. is outside the above range, it becomes difficult to match the linear thermal expansion coefficients of the processed substrate and the supporting glass substrate. If the linear thermal expansion coefficients of the two become mismatched, a dimensional change (particularly warp deformation) of the processed substrate is likely to occur during processing.
 30~380℃の温度範囲における平均線熱膨張係数は50×10-7/℃以上で且つ70×10-7/℃以下であり、好ましくは55×10-7/℃以上で且つ65×10-7/℃以下である。30~380℃の温度範囲における平均線熱膨張係数が上記範囲外になると、加工基板と支持ガラス基板の線熱膨張係数が整合し難くなる。そして、両者の線熱膨張係数が不整合になると、加工処理時に加工基板の寸法変化(特に、反り変形)が生じ易くなる。 The average linear thermal expansion coefficient in the temperature range of 30 to 380 ° C. is 50 × 10 −7 / ° C. or more and 70 × 10 −7 / ° C. or less, preferably 55 × 10 −7 / ° C. or more and 65 × 10 -7 / ° C or less. When the average linear thermal expansion coefficient in the temperature range of 30 to 380 ° C. is outside the above range, the linear thermal expansion coefficients of the processed substrate and the supporting glass substrate are difficult to match. If the linear thermal expansion coefficients of the two become mismatched, a dimensional change (particularly warp deformation) of the processed substrate is likely to occur during processing.
 本発明の支持ガラス基板において、板厚方向に対する波長300nmにおける紫外線透過率(換言すると、波長300nmにおける板厚方向の紫外線透過率)は、好ましくは40%以上、50%以上、60%以上または70%以上、特に好ましくは80%以上である。紫外線透過率が低過ぎると、紫外光の照射により、接着層により加工基板と支持基板を接着し難くなることに加えて、剥離層により加工基板から支持基板を剥離し難くなる。 In the supporting glass substrate of the present invention, the ultraviolet transmittance at a wavelength of 300 nm with respect to the thickness direction (in other words, the ultraviolet transmittance at the wavelength of 300 nm in the thickness direction) is preferably 40% or more, 50% or more, 60% or more, or 70. % Or more, particularly preferably 80% or more. If the ultraviolet transmittance is too low, it becomes difficult to bond the processed substrate and the supporting substrate by the adhesive layer due to the irradiation of ultraviolet light, and it becomes difficult to separate the supporting substrate from the processed substrate by the release layer.
 本発明の支持ガラス基板は、ガラス組成として、質量%で、SiO 50~80%、Al 1~20%、B 3~20%、MgO 0~10%、CaO 0~10%、SrO 0~7%、BaO 0~7%、ZnO 0~7%、NaO 5~15%、KO 0~10%を含有することが好ましい。上記のように各成分の含有量を限定した理由を以下に示す。なお、各成分の含有量の説明において、%表示は、特に断りがある場合を除き、質量%を表す。 The supporting glass substrate of the present invention has a glass composition of 50 to 80% by mass, SiO 2 50 to 80%, Al 2 O 3 1 to 20%, B 2 O 3 3 to 20%, MgO 0 to 10%, CaO 0 to It preferably contains 10%, SrO 0-7%, BaO 0-7%, ZnO 0-7%, Na 2 O 5-15%, K 2 O 0-10%. The reason for limiting the content of each component as described above will be described below. In addition, in description of content of each component,% display represents the mass% unless there is particular notice.
 SiOは、ガラスの骨格を形成する主成分である。SiOの含有量は、好ましくは50~80%、55~75%または55~70%、特に好ましくは55~65%である。SiOの含有量が少な過ぎると、ヤング率、耐酸性が低下し易くなる。一方、SiOの含有量が多過ぎると、高温粘度が高くなり、溶融性が低下し易くなることに加えて、クリストバライト等の失透結晶が析出し易くなって、液相温度が上昇し易くなる。 SiO 2 is a main component that forms a glass skeleton. The content of SiO 2 is preferably 50 to 80%, 55 to 75% or 55 to 70%, particularly preferably 55 to 65%. When the content of SiO 2 is too small, the Young's modulus, acid resistance tends to decrease. On the other hand, if the content of SiO 2 is too large, the higher the viscosity at high temperature in addition to the meltability tends to decrease, devitrification crystals cristobalite becomes easy to precipitate, the liquid phase temperature tends to rise Become.
 Alは、ヤング率を高める成分であると共に、分相、失透を抑制する成分である。Alの含有量は、好ましくは1~20%、3~18%、4~16%、5~13.5%または6~12%、特に好ましくは7~10%である。Alの含有量が少な過ぎると、ヤング率が低下し易くなり、またガラスが分相、失透し易くなる。一方、Alの含有量が多過ぎると、高温粘度が高くなり、溶融性、成形性が低下し易くなる。 Al 2 O 3 is a component that enhances the Young's modulus and a component that suppresses phase separation and devitrification. The content of Al 2 O 3 is preferably 1 to 20%, 3 to 18%, 4 to 16%, 5 to 13.5% or 6 to 12%, particularly preferably 7 to 10%. When the content of Al 2 O 3 is too small, easily Young's modulus is lowered and also the glass phase separation, easily devitrified. On the other hand, when the content of Al 2 O 3 is too large, the higher the viscosity at high temperature meltability, moldability tends to decrease.
 Bは、溶融性、耐失透性を高める成分であり、また傷の付き易さを改善して、強度を高める成分である。Bの含有量は、好ましくは3~20%、5~20%または7~18%、特に好ましくは10~15%である。Bの含有量が少な過ぎると、溶融性、耐失透性が低下し易くなり、またフッ酸系の薬液に対する耐性が低下し易くなる。一方、Bの含有量が多過ぎると、ヤング率、耐酸性が低下し易くなる。 B 2 O 3 is a component that enhances meltability and devitrification resistance, and is a component that improves the ease of scratching and increases strength. The content of B 2 O 3 is preferably 3 to 20%, 5 to 20% or 7 to 18%, particularly preferably 10 to 15%. When the content of B 2 O 3 is too small, meltability, devitrification resistance is liable to lower, also resistance tends to decrease with respect to hydrofluoric acid chemical. On the other hand, when the content of B 2 O 3 is too large, the Young's modulus, acid resistance tends to decrease.
 MgOは、高温粘性を下げて、溶融性を高める成分であり、アルカリ土類金属酸化物の中では、ヤング率を顕著に高める成分である。MgOの含有量は、好ましくは0~10%、0~8%、0~6%または0~5%、特に好ましくは0~1%である。MgOの含有量が多過ぎると、耐失透性が低下し易くなる。 MgO is a component that lowers the viscosity at high temperature and increases the meltability, and among alkaline earth metal oxides, it is a component that significantly increases the Young's modulus. The content of MgO is preferably 0 to 10%, 0 to 8%, 0 to 6% or 0 to 5%, particularly preferably 0 to 1%. When there is too much content of MgO, devitrification resistance will fall easily.
 CaOは、高温粘性を下げて、溶融性を顕著に高める成分である。またアルカリ土類金属酸化物の中では、導入原料が比較的安価であるため、原料コストを低廉化する成分である。CaOの含有量は、好ましくは0~10%、0.5~8%または1~6%、特に好ましくは2~5%である。CaOの含有量が多過ぎると、ガラスが失透し易くなる。なお、CaOの含有量が少な過ぎると、上記効果を享受し難くなる。 CaO is a component that lowers the high temperature viscosity and remarkably increases the meltability. Further, among the alkaline earth metal oxides, since the introduced raw material is relatively inexpensive, it is a component that lowers the raw material cost. The content of CaO is preferably 0 to 10%, 0.5 to 8% or 1 to 6%, particularly preferably 2 to 5%. When there is too much content of CaO, it will become easy to devitrify glass. In addition, when there is too little content of CaO, it will become difficult to receive the said effect.
 SrOは、分相を抑制する成分であり、また耐失透性を高める成分である。SrOの含有量は、好ましくは0~7%、0~5%または0~3%、特に好ましくは0~1%未満である。SrOの含有量が多過ぎると、ガラスが失透し易くなる。 SrO is a component that suppresses phase separation and is a component that improves devitrification resistance. The content of SrO is preferably 0 to 7%, 0 to 5% or 0 to 3%, particularly preferably 0 to less than 1%. When there is too much content of SrO, it will become easy to devitrify glass.
 BaOは、耐失透性を高める成分である。BaOの含有量は、好ましくは0~7%、0~5%、0~3%または0~1%未満である。BaOの含有量が多過ぎると、ガラスが失透し易くなる。 BaO is a component that increases devitrification resistance. The content of BaO is preferably 0-7%, 0-5%, 0-3% or 0-1%. When there is too much content of BaO, it will become easy to devitrify glass.
 ZnOは、高温粘性を下げて、溶融性を顕著に高める成分である。ZnOの含有量は、好ましくは0~7%または0.1~5%、特に好ましくは0.5~3%である。ZnOの含有量が少な過ぎると、上記効果を享受し難くなる。なお、ZnOの含有量が多過ぎると、ガラスが失透し易くなる。 ZnO is a component that lowers the high temperature viscosity and remarkably increases the meltability. The content of ZnO is preferably 0 to 7% or 0.1 to 5%, particularly preferably 0.5 to 3%. When there is too little content of ZnO, it will become difficult to receive the said effect. In addition, when there is too much content of ZnO, it will become easy to devitrify glass.
 NaOは、熱膨張係数を適正化するために重要な成分であり、また高温粘性を下げて、溶融性を顕著に高めると共に、ガラス原料の初期の溶融に寄与する成分である。NaOの含有量は、好ましくは5~15%または6~13.5%、特に好ましくは7~13%である。NaOの含有量が少な過ぎると、溶融性が低下し易くなることに加えて、熱膨張係数が不当に低くなる虞がある。一方、NaOの含有量が多過ぎると、熱膨張係数が不当に高くなる虞がある。 Na 2 O is an important component for optimizing the coefficient of thermal expansion, and is a component that contributes to the initial melting of the glass raw material while lowering the high-temperature viscosity to significantly increase the meltability. The content of Na 2 O is preferably 5 to 15% or 6 to 13.5%, particularly preferably 7 to 13%. If the content of Na 2 O is too small, the meltability tends to be lowered, and the thermal expansion coefficient may be unduly lowered. On the other hand, when the content of Na 2 O is too large, there is a concern that the thermal expansion coefficient becomes unduly high.
 質量比(Al+NaO)/SiOは、熱膨張係数を適正化する観点から、好ましくは0.2~0.4、0.23~0.35または0.25~0.3、特に好ましくは0.26~0.29である。 The mass ratio (Al 2 O 3 + Na 2 O) / SiO 2 is preferably 0.2 to 0.4, 0.23 to 0.35, or 0.25 to 0.00 from the viewpoint of optimizing the thermal expansion coefficient. 3, particularly preferably 0.26 to 0.29.
 KOは、熱膨張係数を調整するための成分であり、また高温粘性を下げて、溶融性を高めると共に、ガラス原料の初期の溶融に寄与する成分である。KOの含有量は、好ましくは0~15%、0~10%または0~5%、特に好ましくは0~1%である。KOの含有量が多過ぎると、熱膨張係数が不当に高くなる虞がある。 K 2 O is a component for adjusting the thermal expansion coefficient, and is a component that contributes to the initial melting of the glass raw material while lowering the high-temperature viscosity to increase the meltability. The content of K 2 O is preferably 0 to 15%, 0 to 10% or 0 to 5%, particularly preferably 0 to 1%. When the content of K 2 O is too large, there is a concern that the thermal expansion coefficient becomes unduly high.
 上記成分以外にも、任意成分として、他の成分を導入してもよい。なお、上記成分以外の他の成分の含有量は、本発明の効果を的確に享受する観点から、合量で10%以下、特に5%以下が好ましい。 In addition to the above components, other components may be introduced as optional components. In addition, the content of other components other than the above components is preferably 10% or less, and particularly preferably 5% or less in total, from the viewpoint of accurately enjoying the effects of the present invention.
 Feは、不純物成分、或いは清澄剤成分として導入し得る成分である。しかし、Feの含有量が多過ぎると、紫外線透過率が低下する虞がある。すなわち、Feの含有量が多過ぎると、樹脂層、剥離層を介して、加工基板と支持ガラス基板の接着と脱着を適正に行うことが困難になる。よって、Feの含有量は、好ましくは0.05%以下または0.03%以下、特に好ましくは0.02%以下である。なお、本発明でいう「Fe」は、2価の酸化鉄と3価の酸化鉄を含み、2価の酸化鉄は、Feに換算して、取り扱うものとする。他の酸化物についても、同様にして、表記の酸化物を基準にして取り扱うものとする。 Fe 2 O 3 is a component that can be introduced as an impurity component or a fining agent component. However, if the content of Fe 2 O 3 is too large, there is a possibility that the ultraviolet transmission is reduced. That is, when the content of Fe 2 O 3 is too large, the resin layer, via the peeling layer, it is difficult to properly perform desorption processed substrate and the adhesive of the supporting glass substrate. Therefore, the content of Fe 2 O 3 is preferably 0.05% or less or 0.03% or less, particularly preferably 0.02% or less. Note that “Fe 2 O 3 ” referred to in the present invention includes divalent iron oxide and trivalent iron oxide, and the divalent iron oxide is handled in terms of Fe 2 O 3 . Similarly, other oxides are handled based on the indicated oxide.
 清澄剤として、As、Sbが有効に作用するが、環境的観点で言えば、これら成分を極力低減することが好ましい。Asの含有量は、好ましくは1%以下または0.5%以下、特に好ましくは0.1%以下であり、実質的に含有させないことが望ましい。ここで、「実質的にAsを含有しない」とは、ガラス組成中のAsの含有量が0.05%未満の場合を指す。また、Sbの含有量は、好ましくは1%以下または0.5%以下、特に好ましくは0.1%以下であり、実質的に含有させないことが望ましい。ここで、「実質的にSbを含有しない」とは、ガラス組成中のSbの含有量が0.05%未満の場合を指す。 As 2 O 3 and Sb 2 O 3 act effectively as fining agents, but from an environmental point of view, it is preferable to reduce these components as much as possible. The content of As 2 O 3 is preferably 1% or less or 0.5% or less, particularly preferably 0.1% or less, and it is desirable that it is not substantially contained. Here, “substantially does not contain As 2 O 3 ” refers to the case where the content of As 2 O 3 in the glass composition is less than 0.05%. Further, the content of Sb 2 O 3 is preferably 1% or less or 0.5% or less, particularly preferably 0.1% or less, and it is desirable that the Sb 2 O 3 content is not substantially contained. Here, “substantially does not contain Sb 2 O 3 ” refers to a case where the content of Sb 2 O 3 in the glass composition is less than 0.05%.
 SnOは、高温域で良好な清澄作用を有する成分であり、また高温粘性を低下させる成分である。SnOの含有量は、好ましくは0~1%、0.001~1%または0.01~0.9%、特に好ましくは0.05~0.7%である。SnOの含有量が多過ぎると、SnOの失透結晶が析出し易くなる。なお、SnOの含有量が少な過ぎると、上記効果を享受し難くなる。 SnO 2 is a component having a good clarification action in a high temperature region and a component that lowers the high temperature viscosity. The content of SnO 2 is preferably 0 to 1%, 0.001 to 1% or 0.01 to 0.9%, particularly preferably 0.05 to 0.7%. When the content of SnO 2 is too large, the devitrification crystal SnO 2 is likely to precipitate. Incidentally, when the content of SnO 2 is too small, it becomes difficult to enjoy the above-mentioned effects.
 更に、ガラス特性が損なわれない限り、清澄剤として、F、Cl、SO、C、或いはAl、Si等の金属粉末を各々3%程度まで導入してもよい。また、CeO等も3%程度まで導入し得るが、紫外線透過率の低下に留意する必要がある。 Furthermore, as long as the glass properties are not impaired, metal powders such as F, Cl, SO 3 , C, Al, Si, etc. may be introduced up to about 3% each as a fining agent. Further, CeO 2 or the like can be introduced up to about 3%, but it is necessary to pay attention to a decrease in ultraviolet transmittance.
 Clは、ガラスの溶融を促進する成分である。ガラス組成中にClを導入すれば、溶融温度の低温化、清澄作用の促進を図ることができ、結果として、溶融コストの低廉化、ガラス製造窯の長寿命化を達成し易くなる。しかし、Clの含有量が多過ぎると、ガラス製造窯周囲の金属部品を腐食させる虞がある。よって、Clの含有量は、好ましくは3%以下、1%以下または0.5%以下、特に好ましくは0.1%以下である。 Cl is a component that promotes melting of glass. If Cl is introduced into the glass composition, the melting temperature can be lowered and the clarification action can be promoted. As a result, the melting cost can be lowered and the glass production kiln can be easily extended. However, when there is too much Cl content, there is a possibility of corroding the metal parts around the glass manufacturing kiln. Therefore, the Cl content is preferably 3% or less, 1% or less, or 0.5% or less, and particularly preferably 0.1% or less.
 Pは、失透結晶の析出を抑制し得る成分である。但し、Pを多量に導入すると、ガラスが分相し易くなる。よって、Pの含有量は、好ましくは0~2.5%、0~1.5%または0~0.5%、特に好ましくは0~0.3%である。 P 2 O 5 is a component that can suppress the precipitation of devitrified crystals. However, when a large amount of P 2 O 5 is introduced, the glass is likely to undergo phase separation. Therefore, the content of P 2 O 5 is preferably 0 to 2.5%, 0 to 1.5% or 0 to 0.5%, particularly preferably 0 to 0.3%.
 TiOは、高温粘性を下げて、溶融性を高める成分であると共に、ソラリゼーションを抑制する成分である。しかし、TiOを多量に導入すると、ガラスが着色し、透過率が低下し易くなる。よって、TiOの含有量は、好ましくは0~5%、0~3%または0~1%、特に好ましくは0~0.02%である。 TiO 2 is a component that lowers the high-temperature viscosity and increases the meltability, and also suppresses solarization. However, when a large amount of TiO 2 is introduced, the glass is colored and the transmittance tends to decrease. Therefore, the content of TiO 2 is preferably 0 to 5%, 0 to 3% or 0 to 1%, particularly preferably 0 to 0.02%.
 ZrOは、耐薬品性、ヤング率を改善する成分である。しかし、ZrOを多量に導入すると、ガラスが失透し易くなり、また導入原料が難熔解性であるため、未熔解の結晶性異物が製品基板に混入する虞がある。よって、ZrOの含有量は、好ましくは0~5%、0~3%または0~1%、特に好ましくは0~0.5%である。 ZrO 2 is a component that improves chemical resistance and Young's modulus. However, when a large amount of ZrO 2 is introduced, the glass tends to be devitrified, and since the introduced raw material is hardly meltable, unmelted crystalline foreign matter may be mixed into the product substrate. Therefore, the content of ZrO 2 is preferably 0 to 5%, 0 to 3% or 0 to 1%, particularly preferably 0 to 0.5%.
 Y、Nb、Laには、歪点、ヤング率等を高める働きがある。しかし、これらの成分の含有量が各々5%または1%より多いと、原料コスト、製品コストが高騰する虞がある。 Y 2 O 3 , Nb 2 O 5 , and La 2 O 3 have a function of increasing the strain point, Young's modulus, and the like. However, if the content of these components is more than 5% or 1%, the raw material cost and the product cost may increase.
 本発明の支持ガラス基板は、以下の特性を有することが好ましい。 The supporting glass substrate of the present invention preferably has the following characteristics.
 本発明の支持ガラス基板において、ヤング率は、好ましくは65GPa以上、67GPa以上、68GPa以上、69GPa以上または70GPa以上、特に好ましくは71GPa以上である。ヤング率が低過ぎると、搬送体の剛性を維持し難くなり、加工基板の変形、反り、破損が発生し易くなる。 In the supporting glass substrate of the present invention, the Young's modulus is preferably 65 GPa or more, 67 GPa or more, 68 GPa or more, 69 GPa or more, or 70 GPa or more, and particularly preferably 71 GPa or more. If the Young's modulus is too low, it becomes difficult to maintain the rigidity of the conveyance body, and the processed substrate is likely to be deformed, warped, or damaged.
 液相温度は、好ましくは1150℃未満、1120℃以下、1100℃以下、1080℃以下、1050℃以下、1010℃以下、980℃以下、960℃以下または950℃以下、特に好ましくは940℃以下である。このようにすれば、ダウンドロー法、特にオーバーフローダウンドロー法でガラス基板を成形し易くなるため、板厚が小さいガラス基板を作製し易くなると共に、表面を研磨しなくても、板厚偏差を低減することができ、結果として、ガラス基板の製造コストを低廉化することもできる。更に、ガラス基板の製造工程時に、失透結晶が発生して、ガラス基板の生産性が低下する事態を防止し易くなる。ここで、「液相温度」は、標準篩30メッシュ(500μm)を通過し、50メッシュ(300μm)に残るガラス粉末を白金ボートに入れた後、温度勾配炉中に24時間保持して、結晶が析出する温度を測定することにより算出可能である。 The liquidus temperature is preferably less than 1150 ° C, 1120 ° C or less, 1100 ° C or less, 1080 ° C or less, 1050 ° C or less, 1010 ° C or less, 980 ° C or less, 960 ° C or less, or 950 ° C or less, particularly preferably 940 ° C or less. is there. In this way, the glass substrate can be easily formed by the downdraw method, particularly the overflow downdraw method, so that it is easy to produce a glass substrate having a small plate thickness, and the plate thickness deviation can be reduced without polishing the surface. As a result, the manufacturing cost of the glass substrate can be reduced. Furthermore, it becomes easy to prevent a situation where devitrification crystals are generated during the glass substrate manufacturing process and the productivity of the glass substrate is lowered. Here, the “liquid phase temperature” is obtained by passing the standard sieve 30 mesh (500 μm) and putting the glass powder remaining on the 50 mesh (300 μm) in a platinum boat, and holding it in a temperature gradient furnace for 24 hours. It can be calculated by measuring the temperature at which precipitation occurs.
 液相温度における粘度は、好ましくは10000dPa・s以上、30000dPa・s以上、60000dPa・s以上、100000dPa・s以上、150000dPa・s以上、200000dPa・s以上、250000dPa・s以上、300000dPa・s以上または350000dPa・s以上、特に好ましくは400000dPa・s以上である。このようにすれば、ダウンドロー法、特にオーバーフローダウンドロー法でガラス基板を成形し易くなるため、板厚が小さいガラス基板を作製し易くなると共に、表面を研磨しなくても、板厚偏差を低減することができ、結果として、ガラス基板の製造コストを低廉化することができる。更に、ガラス基板の製造工程時に、失透結晶が発生して、ガラス基板の生産性が低下する事態を防止し易くなる。ここで、「液相温度における粘度」は、白金球引き上げ法で測定可能である。なお、液相温度における粘度は、成形性の指標であり、液相温度における粘度が高い程、成形性が向上する。 The viscosity at the liquidus temperature is preferably 10,000 dPa · s or more, 30000 dPa · s or more, 60000 dPa · s or more, 100000 dPa · s or more, 150,000 dPa · s or more, 200000 dPa · s or more, 250,000 dPa · s or more, 300000 dPa · s or more, or 350,000 dPa · s. · S or more, particularly preferably 400,000 dPa · s or more. In this way, the glass substrate can be easily formed by the downdraw method, particularly the overflow downdraw method, so that it is easy to produce a glass substrate having a small plate thickness, and the plate thickness deviation can be reduced without polishing the surface. As a result, the manufacturing cost of the glass substrate can be reduced. Furthermore, it becomes easy to prevent a situation where devitrification crystals are generated during the glass substrate manufacturing process and the productivity of the glass substrate is lowered. Here, the “viscosity at the liquidus temperature” can be measured by a platinum ball pulling method. The viscosity at the liquidus temperature is an index of moldability. The higher the viscosity at the liquidus temperature, the better the moldability.
 102.5dPa・sにおける温度は、好ましくは1580℃以下、1550℃以下、1520℃以下、1500℃以下または1480℃以下、特に好ましくは1300~1470℃である。102.5dPa・sにおける温度が高くなると、溶融性が低下して、ガラス基板の製造コストが高騰する。ここで、「102.5dPa・sにおける温度」は、白金球引き上げ法で測定可能である。なお、102.5dPa・sにおける温度は、溶融温度に相当し、この温度が低い程、溶融性が向上する。 The temperature at 10 2.5 dPa · s is preferably 1580 ° C. or lower, 1550 ° C. or lower, 1520 ° C. or lower, 1500 ° C. or lower, or 1480 ° C. or lower, particularly preferably 1300 to 1470 ° C. When the temperature at 10 2.5 dPa · s increases, the meltability decreases and the manufacturing cost of the glass substrate increases. Here, “temperature at 10 2.5 dPa · s” can be measured by a platinum ball pulling method. The temperature at 10 2.5 dPa · s corresponds to the melting temperature, and the lower the temperature, the better the melting property.
 本発明の支持ガラス基板は、ダウンドロー法、特にオーバーフローダウンドロー法で成形されてなることが好ましい。オーバーフローダウンドロー法は、耐熱性の樋状構造物の両側から溶融ガラスを溢れさせて、溢れた溶融ガラスを樋状構造物の下頂端で合流させながら、下方に延伸成形してガラス基板を製造する方法である。オーバーフローダウンドロー法では、ガラス基板の表面となるべき面は樋状耐火物に接触せず、自由表面の状態で成形される。このため、板厚が小さいガラス基板を作製し易くなると共に、表面を研磨しなくても、板厚偏差を低減することができ、結果として、ガラス基板の製造コストを低廉化することができる。なお、樋状構造物の構造や材質は、所望の寸法や表面精度を実現できるものであれば、特に限定されない。また、下方への延伸成形を行う際に、力を印加する方法も特に限定されない。例えば、充分に大きい幅を有する耐熱性ロールをガラスに接触させた状態で回転させて延伸する方法を採用してもよいし、複数の対になった耐熱性ロールをガラスの端面近傍のみに接触させて延伸する方法を採用してもよい。 The support glass substrate of the present invention is preferably formed by a downdraw method, particularly an overflow downdraw method. In the overflow down draw method, molten glass overflows from both sides of a heat-resistant bowl-shaped structure, and the overflowed molten glass joins at the lower top end of the bowl-shaped structure and is formed downward to produce a glass substrate. It is a method to do. In the overflow down draw method, the surface to be the surface of the glass substrate is not in contact with the bowl-shaped refractory, and is formed in a free surface state. For this reason, it becomes easy to produce a glass substrate having a small plate thickness, and the plate thickness deviation can be reduced without polishing the surface. As a result, the manufacturing cost of the glass substrate can be reduced. In addition, the structure and material of a bowl-shaped structure will not be specifically limited if a desired dimension and surface accuracy are realizable. In addition, the method of applying a force when performing downward stretch molding is not particularly limited. For example, a method may be adopted in which a heat-resistant roll having a sufficiently large width is rotated and stretched in contact with glass, or a plurality of pairs of heat-resistant rolls are contacted only near the end face of the glass. It is also possible to adopt a method of stretching by stretching.
 ガラス基板の成形方法として、オーバーフローダウンドロー法以外にも、例えば、スロットダウン法、リドロー法、フロート法等を採択することもできる。 As the glass substrate forming method, in addition to the overflow downdraw method, for example, a slot down method, a redraw method, a float method, or the like can be adopted.
 本発明のガラス基板は、略円板状又はウェハ状が好ましく、その直径は100mm以上で且つ500mm以下、特に150mm以上で且つ450mm以下が好ましい。このようにすれば、半導体パッケージの製造工程に適用し易くなる。必要に応じて、それ以外の形状、例えば矩形等の形状に加工してもよい。 The glass substrate of the present invention preferably has a substantially disk shape or wafer shape, and the diameter is preferably 100 mm or more and 500 mm or less, particularly 150 mm or more and 450 mm or less. In this way, it becomes easy to apply to the manufacturing process of a semiconductor package. You may process into other shapes, for example, shapes, such as a rectangle, as needed.
 本発明の支持ガラス基板において、板厚は、好ましくは2.0mm未満、1.5mm以下、1.2mm以下、1.1mm以下または1.0mm以下、特に好ましくは0.9mm以下である。板厚が薄くなる程、搬送体の質量が軽くなるため、ハンドリング性が向上する。一方、板厚が薄過ぎると、支持ガラス基板自体の強度が低下して、支持基板としての機能を果たし難くなる。よって、板厚は、好ましくは0.1mm以上、0.2mm以上、0.3mm以上、0.4mm以上、0.5mm以上または0.6mm以上、特に好ましくは0.7mm超である。 In the supporting glass substrate of the present invention, the plate thickness is preferably less than 2.0 mm, 1.5 mm or less, 1.2 mm or less, 1.1 mm or less, or 1.0 mm or less, particularly preferably 0.9 mm or less. As the plate thickness is reduced, the mass of the transport body is reduced, so that handling properties are improved. On the other hand, if the plate thickness is too thin, the strength of the support glass substrate itself is lowered, and it becomes difficult to perform the function as the support substrate. Therefore, the plate thickness is preferably 0.1 mm or more, 0.2 mm or more, 0.3 mm or more, 0.4 mm or more, 0.5 mm or more, or 0.6 mm or more, and particularly preferably more than 0.7 mm.
 本発明の支持ガラス基板において、板厚偏差は、好ましくは30μm以下、20μm以下、10μm以下、5μm以下、4μm以下、3μm以下、2μm以下または1μm以下、特に好ましくは0.1~1μm未満である。また算術平均粗さRaは、好ましくは100nm以下、50nm以下、20nm以下、10nm以下、5nm以下、2nm以下または1nm以下、特に好ましくは0.5nm以下である。表面精度が高い程、加工処理の精度を高め易くなる。特に配線精度を高めることができるため、高密度の配線が可能になる。また支持ガラス基板の強度が向上して、支持ガラス基板及び搬送体が破損し難くなる。更に支持ガラス基板の再利用回数を増やすことができる。なお、「算術平均粗さRa」は、触針式表面粗さ計又は原子間力顕微鏡(AFM)により測定可能である。 In the supporting glass substrate of the present invention, the thickness deviation is preferably 30 μm or less, 20 μm or less, 10 μm or less, 5 μm or less, 4 μm or less, 3 μm or less, 2 μm or less, or 1 μm or less, particularly preferably 0.1 to less than 1 μm. . The arithmetic average roughness Ra is preferably 100 nm or less, 50 nm or less, 20 nm or less, 10 nm or less, 5 nm or less, 2 nm or less, or 1 nm or less, particularly preferably 0.5 nm or less. The higher the surface accuracy, the easier it is to improve the processing accuracy. In particular, since the wiring accuracy can be increased, high-density wiring is possible. Further, the strength of the support glass substrate is improved, and the support glass substrate and the transport body are hardly damaged. Furthermore, the number of reuses of the supporting glass substrate can be increased. The “arithmetic average roughness Ra” can be measured by a stylus type surface roughness meter or an atomic force microscope (AFM).
 本発明の支持ガラス基板は、オーバーフローダウンドロー法で成形した後に、表面を研磨されてなることが好ましい。このようにすれば、板厚偏差を2μm以下または1μm以下、特に1μm未満に規制し易くなる。 The support glass substrate of the present invention is preferably formed by polishing the surface after being formed by the overflow downdraw method. If it does in this way, it will become easy to regulate board thickness deviation to 2 micrometers or less or 1 micrometer or less, especially less than 1 micrometer.
 本発明の支持ガラス基板は、製造効率の観点から、化学強化処理がなされていないことが好ましく、機械的強度の観点から、化学強化処理がなされていることが好ましい。つまり製造効率の観点から、表面に圧縮応力層を有しないことが好ましく、機械的強度の観点から、表面に圧縮応力層を有することが好ましい。 The support glass substrate of the present invention is preferably not chemically strengthened from the viewpoint of production efficiency, and preferably chemically strengthened from the viewpoint of mechanical strength. That is, it is preferable not to have a compressive stress layer on the surface from the viewpoint of production efficiency, and it is preferable to have a compressive stress layer on the surface from the viewpoint of mechanical strength.
 本発明の搬送体は、少なくとも加工基板と加工基板を支持するための支持ガラス基板とを備える搬送体であって、支持ガラス基板が上記の支持ガラス基板であることを特徴とする。ここで、本発明の搬送体の技術的特徴(好適な構成、効果)は、本発明の支持ガラス基板の技術的特徴と重複する。よって、本明細書では、その重複部分について、詳細な記載を省略する。 The carrier of the present invention is a carrier comprising at least a processed substrate and a supporting glass substrate for supporting the processed substrate, wherein the supporting glass substrate is the supporting glass substrate described above. Here, the technical characteristics (preferable structure and effect) of the carrier of the present invention overlap with the technical characteristics of the support glass substrate of the present invention. Therefore, in the present specification, detailed description of the overlapping portions is omitted.
 本発明の搬送体は、加工基板と支持ガラス基板の間に、接着層を有することが好ましい。接着層は、樹脂であることが好ましく、例えば、熱硬化性樹脂、光硬化性樹脂(特に紫外線硬化樹脂)等が好ましい。また半導体パッケージの製造工程で使用される種々の薬液、或いはドライエッチングの際に使用されるガスやプラズマに対して、耐性を有するものが好ましい。また半導体パッケージの製造工程における熱処理に耐える耐熱性を有するものが好ましい。これにより、半導体パッケージの製造工程で接着層が融解し難くなり、加工処理の精度を高めることができる。 The carrier of the present invention preferably has an adhesive layer between the processed substrate and the supporting glass substrate. The adhesive layer is preferably a resin, for example, a thermosetting resin, a photocurable resin (particularly an ultraviolet curable resin), or the like. Moreover, what has tolerance with respect to the various chemical | medical solution used in the manufacturing process of a semiconductor package, or the gas and plasma used in the case of dry etching is preferable. Moreover, what has the heat resistance which can endure the heat processing in the manufacturing process of a semiconductor package is preferable. Thereby, it becomes difficult to melt | dissolve an adhesive layer in the manufacturing process of a semiconductor package, and the precision of a process can be improved.
 本発明の搬送体は、更に加工基板と支持ガラス基板の間に、より具体的には加工基板と接着層の間に、剥離層を有することが好ましい。このようにすれば、加工基板に対して、所定の加工処理を行った後に、加工基板を支持ガラス基板から剥離し易くなる。加工基板の剥離は、生産性の観点から、レーザー光等の照射光により行うことが好ましい。 The carrier of the present invention preferably further has a release layer between the processed substrate and the supporting glass substrate, more specifically between the processed substrate and the adhesive layer. If it does in this way, it will become easy to peel a processed substrate from a support glass substrate, after performing predetermined processing processing to a processed substrate. Peeling of the processed substrate is preferably performed with irradiation light such as laser light from the viewpoint of productivity.
 剥離層は、レーザー光等の照射光により「層内剥離」又は「界面剥離」が生じる材料で構成される。つまり一定の強度の光を照射すると、原子又は分子における原子間又は分子間の結合力が消失又は減少して、アブレーション(ablation)等を生じ、剥離を生じさせる材料で構成される。なお、照射光の照射により、剥離層に含まれる成分が気体となって放出されて分離に至る場合と、剥離層が光を吸収して気体になり、その蒸気が放出されて分離に至る場合とがある。 The peeling layer is made of a material that causes “in-layer peeling” or “interfacial peeling” by irradiation light such as laser light. That is, when light of a certain intensity is irradiated, the bonding force between atoms or molecules in an atom or molecule disappears or decreases, and ablation or the like is caused to cause peeling. In addition, when the component contained in the release layer is released as a gas due to irradiation of irradiation light, the separation layer is released, and when the release layer absorbs light and becomes a gas, and its vapor is released, resulting in separation There is.
 本発明の搬送体において、支持ガラス基板は、加工基板よりも大きいことが好ましい。これにより、加工基板と支持ガラス基板を支持する際に、両者の中心位置が僅かに離間した場合でも、支持ガラス基板から加工基板の縁部が食み出し難くなる。 In the carrier of the present invention, the supporting glass substrate is preferably larger than the processed substrate. Thereby, when supporting a process substrate and a support glass substrate, even if the center position of both is slightly separated, the edge part of a process substrate becomes difficult to protrude from a support glass substrate.
 本発明の半導体パッケージの製造方法は、少なくとも加工基板と加工基板を支持するための支持ガラス基板とを備える搬送体を得る工程と、搬送体を搬送する工程と、加工基板に対して、加工処理を行う工程と、を有すると共に、支持ガラス基板が上記の支持ガラス基板であることを特徴とする。ここで、本発明の半導体パッケージの製造方法の技術的特徴(好適な構成、効果)は、本発明の支持ガラス基板及び搬送体の技術的特徴と重複する。よって、本明細書では、その重複部分について、詳細な記載を省略する。 The method for manufacturing a semiconductor package of the present invention includes a step of obtaining a transport body including at least a processing substrate and a supporting glass substrate for supporting the processing substrate, a step of transporting the transport body, and a processing process on the processing substrate. And a supporting glass substrate is the above-described supporting glass substrate. Here, the technical characteristics (preferable structure and effect) of the manufacturing method of the semiconductor package of the present invention overlap with the technical characteristics of the supporting glass substrate and the carrier of the present invention. Therefore, in the present specification, detailed description of the overlapping portions is omitted.
 本発明の半導体パッケージの製造方法において、加工処理は、加工基板の一方の表面に配線する処理、或いは加工基板の一方の表面に半田バンプを形成する処理が好ましい。本発明の半導体パッケージの製造方法では、これらの処理時に加工基板が寸法変化し難いため、これらの工程を適正に行うことができる。 In the method for manufacturing a semiconductor package of the present invention, the processing is preferably performed by wiring on one surface of the processed substrate or forming solder bumps on one surface of the processed substrate. In the method for manufacturing a semiconductor package of the present invention, since the processed substrate is difficult to change in dimensions during these processes, these steps can be appropriately performed.
 加工処理として、上記以外にも、加工基板の一方の表面(通常、支持ガラス基板とは反対側の表面)を機械的に研磨する処理、加工基板の一方の表面(通常、支持ガラス基板とは反対側の表面)をドライエッチングする処理、加工基板の一方の表面(通常、支持ガラス基板とは反対側の表面)をウェットエッチングする処理の何れかであってもよい。なお、本発明の半導体パッケージの製造方法では、加工基板に反りが発生し難いと共に、搬送体の剛性を高く維持することができる。結果として、上記加工処理を適正に行うことができる。 In addition to the above, as a processing treatment, one surface of a processed substrate (usually the surface opposite to the supporting glass substrate) is mechanically polished, and one surface of the processed substrate (usually a supporting glass substrate) Either a process of dry-etching the surface on the opposite side or a process of wet-etching one surface of the processed substrate (usually the surface opposite to the supporting glass substrate) may be used. In the semiconductor package manufacturing method of the present invention, the processed substrate is unlikely to warp and the rigidity of the carrier can be maintained high. As a result, the above processing can be performed appropriately.
 本発明の半導体パッケージは、上記の半導体パッケージの製造方法により作製されたことを特徴とする。ここで、本発明の半導体パッケージの技術的特徴(好適な構成、効果)は、本発明の支持ガラス基板、搬送体及び半導体パッケージの製造方法の技術的特徴と重複する。よって、本明細書では、その重複部分について、詳細な記載を省略する。 The semiconductor package of the present invention is manufactured by the above-described semiconductor package manufacturing method. Here, the technical characteristics (preferable configuration and effect) of the semiconductor package of the present invention overlap with the technical characteristics of the manufacturing method of the supporting glass substrate, the carrier, and the semiconductor package of the present invention. Therefore, in the present specification, detailed description of the overlapping portions is omitted.
 本発明の電子機器は、半導体パッケージを備える電子機器であって、半導体パッケージが、上記の半導体パッケージであることを特徴とする。ここで、本発明の電子機器の技術的特徴(好適な構成、効果)は、本発明の支持ガラス基板、搬送体、半導体パッケージの製造方法、半導体パッケージの技術的特徴と重複する。よって、本明細書では、その重複部分について、詳細な記載を省略する。 An electronic device of the present invention is an electronic device including a semiconductor package, and the semiconductor package is the semiconductor package described above. Here, the technical characteristics (preferable structure and effect) of the electronic device of the present invention overlap with the technical characteristics of the supporting glass substrate, the carrier, the semiconductor package manufacturing method, and the semiconductor package of the present invention. Therefore, in the present specification, detailed description of the overlapping portions is omitted.
 図面を参酌しながら、本発明を更に説明する。 The present invention will be further described with reference to the drawings.
 図1は、本発明の搬送体1の一例を示す概念斜視図である。図1では、搬送体1は、支持ガラス基板10と加工基板(半導体基板)11とを備えている。支持ガラス基板10は、加工基板11の寸法変化を防止するために、加工基板11に貼着されている。支持ガラス基板10と加工基板11との間には、剥離層12と接着層13が配置されている。剥離層12は、支持ガラス基板10と接触しており、接着層13は、加工基板11と接触している。 FIG. 1 is a conceptual perspective view showing an example of the carrier 1 of the present invention. In FIG. 1, the carrier 1 includes a supporting glass substrate 10 and a processed substrate (semiconductor substrate) 11. The supporting glass substrate 10 is attached to the processed substrate 11 in order to prevent a dimensional change of the processed substrate 11. A release layer 12 and an adhesive layer 13 are disposed between the support glass substrate 10 and the processed substrate 11. The peeling layer 12 is in contact with the supporting glass substrate 10, and the adhesive layer 13 is in contact with the processed substrate 11.
 図1から把握できるように、搬送体1は、支持ガラス基板10、剥離層12、接着層13、加工基板11の順に積層配置されている。支持ガラス基板10の形状は、加工基板11に応じて決定されるが、図1では、支持ガラス基板10及び加工基板11の形状は、何れも略円板形状である。剥離層12は、非晶質シリコン(a-Si)以外にも、酸化ケイ素、ケイ酸化合物、窒化ケイ素、窒化アルミ、窒化チタン等が用いられる。剥離層12は、プラズマCVD、ゾル-ゲル法によるスピンコート等により形成される。接着層13は、樹脂で構成されており、例えば、各種印刷法、インクジェット法、スピンコート法、ロールコート法等により塗布形成される。接着層13は、剥離層12により加工基板11から支持ガラス基板10が剥離された後、溶剤等により溶解除去される。 As can be understood from FIG. 1, the carrier 1 is laminated in the order of a supporting glass substrate 10, a release layer 12, an adhesive layer 13, and a processed substrate 11. Although the shape of the support glass substrate 10 is determined according to the processed substrate 11, in FIG. 1, the shapes of the support glass substrate 10 and the processed substrate 11 are both substantially disk shapes. In addition to amorphous silicon (a-Si), the release layer 12 is made of silicon oxide, silicate compound, silicon nitride, aluminum nitride, titanium nitride, or the like. The release layer 12 is formed by plasma CVD, spin coating by a sol-gel method, or the like. The adhesive layer 13 is made of a resin, and is applied and formed by, for example, various printing methods, inkjet methods, spin coating methods, roll coating methods, and the like. The adhesive layer 13 is removed by dissolution with a solvent or the like after the supporting glass substrate 10 is peeled from the processed substrate 11 by the peeling layer 12.
 図2a~図2gは、fan out型のWLPの製造工程を示す概念断面図である。図2aは、支持部材20の一方の表面上に接着層21を形成した状態を示している。必要に応じて、支持部材20と接着層21の間に剥離層を形成してもよい。次に、図2bに示すように、接着層21の上に複数の半導体チップ22を貼付する。その際、半導体チップ22のアクティブ側の面を接着層21に接触させる。次に、図2cに示すように、半導体チップ22を樹脂の封止材23でモールドする。封止材23は、圧縮成形後の寸法変化、配線を成形する際の寸法変化が少ない材料が使用される。続いて、図2d及び図2eに示すように、支持部材20から半導体チップ22がモールドされた加工基板24を分離した後、接着層25を介して、支持ガラス基板26と接着固定させる。その際、加工基板24の表面の内、半導体チップ22が埋め込まれた側の表面とは反対側の表面が、支持ガラス基板26側に配置される。このようにして、搬送体27を得ることができる。なお、必要に応じて、接着層25と支持ガラス基板26の間に剥離層を形成してもよい。更に、得られた搬送体27を搬送した後に、図2fに示すように、加工基板24の半導体チップ22が埋め込まれた側の表面に配線28を形成し、その後、配線28の露出部側に複数の半田バンプ29を形成する。最後に、支持ガラス基板26から加工基板24を分離した後に、図2gに示すように、加工基板24を半導体チップ22毎に切断し、後のパッケージング工程に供する。 2a to 2g are conceptual cross-sectional views showing manufacturing processes of a fan-out type WLP. FIG. 2 a shows a state in which an adhesive layer 21 is formed on one surface of the support member 20. A peeling layer may be formed between the support member 20 and the adhesive layer 21 as necessary. Next, as shown in FIG. 2 b, a plurality of semiconductor chips 22 are stuck on the adhesive layer 21. At that time, the surface on the active side of the semiconductor chip 22 is brought into contact with the adhesive layer 21. Next, as shown in FIG. 2 c, the semiconductor chip 22 is molded with a resin sealing material 23. The sealing material 23 is made of a material having little dimensional change after compression molding and little dimensional change when forming a wiring. Subsequently, as shown in FIGS. 2 d and 2 e, the processed substrate 24 on which the semiconductor chip 22 is molded is separated from the support member 20, and then bonded and fixed to the support glass substrate 26 through the adhesive layer 25. At that time, the surface of the processed substrate 24 opposite to the surface on which the semiconductor chip 22 is embedded is disposed on the supporting glass substrate 26 side. In this way, the transport body 27 can be obtained. In addition, you may form a peeling layer between the contact bonding layer 25 and the support glass substrate 26 as needed. Further, after the obtained transport body 27 is transported, as shown in FIG. 2f, the wiring 28 is formed on the surface of the processed substrate 24 on the side where the semiconductor chip 22 is embedded, and then on the exposed portion side of the wiring 28. A plurality of solder bumps 29 are formed. Finally, after separating the processed substrate 24 from the supporting glass substrate 26, as shown in FIG. 2g, the processed substrate 24 is cut for each semiconductor chip 22 and used for the subsequent packaging process.
 以下、本発明を実施例に基づいて説明する。なお、以下の実施例は単なる例示である。本発明は、以下の実施例に何ら限定されない。 Hereinafter, the present invention will be described based on examples. The following examples are merely illustrative. The present invention is not limited to the following examples.
 表1は、本発明の実施例(試料No.1~7)を示している。 Table 1 shows examples of the present invention (sample Nos. 1 to 7).
Figure JPOXMLDOC01-appb-T000001
Figure JPOXMLDOC01-appb-T000001
 まず表中のガラス組成になるように、ガラス原料を調合したガラスバッチを白金坩堝に入れ、1550℃で4時間溶融した。ガラスバッチの溶解に際しては、白金スターラーを用いて攪拌し、均質化を行った。次いで、溶融ガラスをカーボン板上に流し出し、板状に成形した後、徐冷点より20℃程度高い温度から、3℃/分で常温まで徐冷した。得られた各試料について、20~200℃の温度範囲における平均線熱膨張係数α20~200、30~380℃の温度範囲における平均線熱膨張係数α30~380、密度ρ、歪点Ps、徐冷点Ta、軟化点Ts、高温粘度104.0dPa・sにおける温度、高温粘度103.0dPa・sにおける温度、高温粘度102.5dPa・sにおける温度、高温粘度102.0dPa・sにおける温度、液相温度TL、及び液相温度TLにおける粘度η、ヤング率E、板厚方向に対する波長300nmにおける紫外線透過率Tを評価した。 First, a glass batch in which glass raw materials were prepared so as to have the glass composition in the table was placed in a platinum crucible and melted at 1550 ° C. for 4 hours. In melting the glass batch, the mixture was stirred and homogenized using a platinum stirrer. Next, the molten glass was poured out on a carbon plate, formed into a plate shape, and then gradually cooled from a temperature about 20 ° C. higher than the annealing point to room temperature at 3 ° C./min. For each sample obtained, the average linear thermal expansion coefficient alpha 30 ~ 380 in the temperature range of average linear thermal expansion coefficient α 20 ~ 200, 30 ~ 380 ℃ in the temperature range of 20 ~ 200 ° C., the density [rho, strain point Ps, annealing point Ta, the softening point Ts, the hot viscosity of 10 4.0 temperature in dPa · s, the temperature at the high temperature viscosity of 10 3.0 dPa · s, the temperature at the high temperature viscosity of 10 2.5 dPa · s, the high temperature viscosity of 10 2. The temperature at 0 dPa · s, the liquidus temperature TL, the viscosity η at the liquidus temperature TL, the Young's modulus E, and the ultraviolet transmittance T at a wavelength of 300 nm with respect to the plate thickness direction were evaluated.
 20~200℃の温度範囲における平均線熱膨張係数α20~200、30~380℃の温度範囲における平均線熱膨張係数α30~380は、ディラトメーターで測定した値である。 Average linear thermal expansion coefficient alpha 30 ~ 380 in the temperature range of average linear thermal expansion coefficient α 20 ~ 200, 30 ~ 380 ℃ in the temperature range of 20 ~ 200 ° C. is a value measured by a dilatometer.
 密度ρは、周知のアルキメデス法によって測定した値である。 The density ρ is a value measured by the well-known Archimedes method.
 歪点Ps、徐冷点Ta、軟化点Tsは、ASTM C336の方法に基づいて測定した値である。 The strain point Ps, the annealing point Ta, and the softening point Ts are values measured based on the method of ASTM C336.
 高温粘度104.0dPa・s、103.0dPa・s、102.5dPa・sにおける温度は、白金球引き上げ法で測定した値である。 The temperature at a high temperature viscosity of 10 4.0 dPa · s, 10 3.0 dPa · s, and 10 2.5 dPa · s is a value measured by a platinum ball pulling method.
 液相温度TLは、標準篩30メッシュ(500μm)を通過し、50メッシュ(300μm)に残るガラス粉末を白金ボートに入れて、温度勾配炉中に24時間保持した後、結晶が析出する温度を顕微鏡観察にて測定した値である。液相温度における粘度ηは、液相温度TLにおけるガラスの粘度を白金球引き上げ法で測定した値である。 The liquid phase temperature TL is the temperature at which crystals pass after passing through a standard sieve 30 mesh (500 μm), putting the glass powder remaining on 50 mesh (300 μm) into a platinum boat and holding it in a temperature gradient furnace for 24 hours. It is the value measured by microscopic observation. The viscosity η at the liquidus temperature is a value obtained by measuring the viscosity of the glass at the liquidus temperature TL by the platinum ball pulling method.
 ヤング率Eは、共振法により測定した値を指す。 The Young's modulus E refers to a value measured by the resonance method.
 波長300nmにおける紫外線透過率Tは、ダブルビーム型分光光度計を用いて、板厚方向に対する波長300nmの分光透過率を測定した値である。測定試料として、板厚が0.7mmで且つ両面を光学研磨面(鏡面)に研磨したものを使用した。なお、AFMにより、この評価試料の算術表面粗さRaを測定したところ、測定領域10μm×10μmで0.5~1.0nmであった。 The ultraviolet transmittance T at a wavelength of 300 nm is a value obtained by measuring the spectral transmittance at a wavelength of 300 nm in the plate thickness direction using a double beam type spectrophotometer. As a measurement sample, a plate having a thickness of 0.7 mm and both surfaces polished to an optically polished surface (mirror surface) was used. When the arithmetic surface roughness Ra of this evaluation sample was measured by AFM, it was 0.5 to 1.0 nm in a measurement region of 10 μm × 10 μm.
 表1から明らかなように、試料No.1~7は、20~200℃の温度範囲における平均線熱膨張係数α30~200が56×10-7/℃~65×10-7/℃であり、30~380℃の温度範囲における平均線熱膨張係数α30~380が58×10-7/℃~68×10-7/℃であった。また、試料No.1~7は、ヤング率Eが70GPa以上であり、板厚方向に対する波長300nmにおける紫外線透過率Tが55%以上であった。よって、試料No.1~7は、半導体製造装置の製造工程で加工基板の支持に用いる支持ガラス基板として好適であると考えられる。 As is clear from Table 1, sample No. 1 to 7 have an average linear thermal expansion coefficient α 30 to 200 in the temperature range of 20 to 200 ° C. of 56 × 10 −7 / ° C. to 65 × 10 −7 / ° C., and an average in the temperature range of 30 to 380 ° C. The linear thermal expansion coefficient α 30 to 380 was 58 × 10 −7 / ° C. to 68 × 10 −7 / ° C. Sample No. In Nos. 1 to 7, the Young's modulus E was 70 GPa or more, and the ultraviolet transmittance T at a wavelength of 300 nm in the thickness direction was 55% or more. Therefore, sample no. Nos. 1 to 7 are considered to be suitable as supporting glass substrates used for supporting the processed substrate in the manufacturing process of the semiconductor manufacturing apparatus.
 まず、表1に記載の試料No.1~7のガラス組成になるように、ガラス原料を調合した後、ガラス溶融炉に供給して1500~1600℃で溶融し、次いで溶融ガラスをオーバーフローダウンドロー成形装置に供給し、板厚が0.7mmになるようにそれぞれ成形した。得られたガラス基板について、両表面を機械研磨して、板厚偏差を1μm未満に低減した。 First, sample Nos. Listed in Table 1 were used. After preparing the glass raw material so as to have a glass composition of 1 to 7, the glass raw material is supplied to a glass melting furnace and melted at 1500 to 1600 ° C., and then the molten glass is supplied to an overflow downdraw molding apparatus, and the sheet thickness is 0 Each was molded to 7 mm. About the obtained glass substrate, both surfaces were machine-polished and the plate | board thickness deviation was reduced to less than 1 micrometer.
1、27 搬送体
10、26 支持ガラス基板
11、24 加工基板
12 剥離層
13、21、25 接着層
20 支持部材
22 半導体チップ
23 封止材
28 配線
29 半田バンプ
 
1, 27 Transport body 10, 26 Support glass substrate 11, 24 Processing substrate 12 Peeling layer 13, 21, 25 Adhesive layer 20 Support member 22 Semiconductor chip 23 Sealing material 28 Wiring 29 Solder bump

Claims (14)

  1.  20~200℃の温度範囲における平均線熱膨張係数が50×10-7/℃以上で且つ66×10-7/℃以下であることを特徴とする支持ガラス基板。 A supporting glass substrate having an average linear thermal expansion coefficient of 50 × 10 −7 / ° C. or more and 66 × 10 −7 / ° C. or less in a temperature range of 20 to 200 ° C.
  2.  30~380℃の温度範囲における平均線熱膨張係数が50×10-7/℃以上で且つ70×10-7/℃以下であることを特徴とする支持ガラス基板。 A supporting glass substrate having an average linear thermal expansion coefficient of 50 × 10 −7 / ° C. or more and 70 × 10 −7 / ° C. or less in a temperature range of 30 to 380 ° C.
  3.  半導体パッケージの製造工程で加工基板の支持に用いることを特徴とする請求項1又は2に記載の支持ガラス基板。 The supporting glass substrate according to claim 1, wherein the supporting glass substrate is used for supporting a processed substrate in a manufacturing process of a semiconductor package.
  4.  板厚方向に対する波長300nmにおける紫外線透過率が40%以上であることを特徴とする請求項1~3の何れかに記載の支持ガラス基板。 The supporting glass substrate according to any one of claims 1 to 3, which has an ultraviolet transmittance of 40% or more at a wavelength of 300 nm in the plate thickness direction.
  5.  ヤング率が65GPa以上であることを特徴とする請求項1~4の何れかに記載の支持ガラス基板。 5. The supporting glass substrate according to claim 1, wherein Young's modulus is 65 GPa or more.
  6.  ガラス組成として、質量%で、SiO 50~80%、Al 1~20%、B 3~20%、MgO 0~10%、CaO 0~10%、SrO 0~7%、BaO 0~7%、ZnO 0~7%、NaO 5~15%、KO 0~10%を含有することを特徴とする請求項1~5の何れかに記載の支持ガラス基板。 As a glass composition, SiO 2 50-80%, Al 2 O 3 1-20%, B 2 O 3 3-20%, MgO 0-10%, CaO 0-10%, SrO 0-7% by mass%. The supporting glass substrate according to any one of claims 1 to 5, comprising: BaO 0 to 7%, ZnO 0 to 7%, Na 2 O 5 to 15%, K 2 O 0 to 10%. .
  7.  ガラス組成として、質量%で、SiO 55~70%、Al 3~15%、B 5~20%、MgO 0~5%、CaO 0~10%、SrO 0~5%、BaO 0~5%、ZnO 0~5%、NaO 5~15%、KO 0~10%を含有することを特徴とする請求項6に記載の支持ガラス基板。 Glass composition is SiO 2 55-70%, Al 2 O 3 3-15%, B 2 O 3 5-20%, MgO 0-5%, CaO 0-10%, SrO 0-5% by mass%. The supporting glass substrate according to claim 6, further comprising BaO 0 to 5%, ZnO 0 to 5%, Na 2 O 5 to 15%, K 2 O 0 to 10%.
  8.  板厚が2.0mm未満であり、直径が100~500mmのウェハ形状又は略円板形状であり、且つ板厚偏差が30μm以下であることを特徴とする請求項1~7の何れかに記載の支持ガラス基板。 The plate thickness is less than 2.0 mm, the wafer has a diameter of 100 to 500 mm or a substantially disk shape, and the thickness deviation is 30 μm or less. Supporting glass substrate.
  9.  少なくとも加工基板と加工基板を支持するための支持ガラス基板とを備える搬送体であって、支持ガラス基板が請求項1~8の何れかに記載の支持ガラス基板であることを特徴とする搬送体。 A carrier comprising at least a processed substrate and a supporting glass substrate for supporting the processed substrate, wherein the supporting glass substrate is the supporting glass substrate according to any one of claims 1 to 8. .
  10.  少なくとも加工基板と加工基板を支持するための支持ガラス基板とを備える搬送体を得る工程と、
     搬送体を搬送する工程と、
     加工基板に対して、加工処理を行う工程と、を有すると共に、
     支持ガラス基板が請求項1~8の何れかに記載の支持ガラス基板であることを特徴とする半導体パッケージの製造方法。
    Obtaining a carrier comprising at least a processed substrate and a supporting glass substrate for supporting the processed substrate;
    A step of conveying the carrier;
    A process of performing processing on the processed substrate,
    A method for producing a semiconductor package, wherein the supporting glass substrate is the supporting glass substrate according to any one of claims 1 to 8.
  11.  加工処理が、加工基板の一方の表面に配線する処理を含むことを特徴とする請求項10に記載の半導体パッケージの製造方法。 The method for manufacturing a semiconductor package according to claim 10, wherein the processing includes processing for wiring on one surface of the processing substrate.
  12.  加工処理が、加工基板の一方の表面に半田バンプを形成する処理を含むことを特徴とする請求項10又は11に記載の半導体パッケージの製造方法。 12. The method of manufacturing a semiconductor package according to claim 10, wherein the processing includes a process of forming a solder bump on one surface of the processed substrate.
  13.  請求項10~12の何れかに記載の半導体パッケージの製造方法により作製されたことを特徴とする半導体パッケージ。 A semiconductor package manufactured by the method for manufacturing a semiconductor package according to any one of claims 10 to 12.
  14.  半導体パッケージを備える電子機器であって、
     半導体パッケージが、請求項13に記載の半導体パッケージであることを特徴とする電子機器。
     
    An electronic device including a semiconductor package,
    An electronic device, wherein the semiconductor package is the semiconductor package according to claim 13.
PCT/JP2014/073085 2013-09-12 2014-09-02 Supporting glass substrate and conveyance element using same WO2015037478A1 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
KR1020157032898A KR102200850B1 (en) 2013-09-12 2014-09-02 Supporting glass substrate and conveyance element using same
CN201480031817.3A CN105307993A (en) 2013-09-12 2014-09-02 Supporting glass substrate and conveyance element using same

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2013-189065 2013-09-12
JP2013189065 2013-09-12

Publications (1)

Publication Number Publication Date
WO2015037478A1 true WO2015037478A1 (en) 2015-03-19

Family

ID=52665587

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2014/073085 WO2015037478A1 (en) 2013-09-12 2014-09-02 Supporting glass substrate and conveyance element using same

Country Status (5)

Country Link
JP (1) JP6593669B2 (en)
KR (1) KR102200850B1 (en)
CN (2) CN105307993A (en)
TW (1) TWI644881B (en)
WO (1) WO2015037478A1 (en)

Cited By (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2015156075A1 (en) * 2014-04-07 2015-10-15 日本電気硝子株式会社 Supporting glass substrate and laminate using same
WO2016035674A1 (en) * 2014-09-03 2016-03-10 日本電気硝子株式会社 Supporting glass substrate and laminate using same
WO2016111152A1 (en) * 2015-01-05 2016-07-14 日本電気硝子株式会社 Supporting glass substrate and manufacturing method therefor
WO2016111158A1 (en) * 2015-01-05 2016-07-14 日本電気硝子株式会社 Glass plate and manufacturing method therefor
WO2016143583A1 (en) * 2015-03-10 2016-09-15 日本電気硝子株式会社 Semiconductor supporting glass substrate and laminated substrate using same
WO2016190303A1 (en) * 2015-05-28 2016-12-01 旭硝子株式会社 Glass substrate and laminated substrate
WO2017018275A1 (en) * 2015-07-24 2017-02-02 旭硝子株式会社 Glass substrate, laminated substrate, laminated substrate manufacturing method, laminate, package, and glass substrate manufacturing method
WO2017057446A1 (en) * 2015-10-02 2017-04-06 旭硝子株式会社 Glass substrate, laminated substrate, and laminate
WO2017104514A1 (en) * 2015-12-16 2017-06-22 日本電気硝子株式会社 Crystallized glass support substrate and laminate body using same
WO2017104513A1 (en) * 2015-12-17 2017-06-22 日本電気硝子株式会社 Method of manufacturing a glass support plate
TWI631688B (en) * 2015-06-16 2018-08-01 勤友光電股份有限公司 Wafer structure for laser de-bonding process
KR20180098556A (en) 2015-12-28 2018-09-04 에이지씨 가부시키가이샤 Glass substrate, laminated substrate, laminate, and method of manufacturing semiconductor package

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6119567B2 (en) * 2013-11-11 2017-04-26 旭硝子株式会社 Method for manufacturing glass laminate and method for manufacturing electronic device
KR20190054068A (en) 2016-09-16 2019-05-21 에이지씨 가부시키가이샤 Glass substrate and laminated substrate
DE102018209589B4 (en) * 2017-06-22 2023-05-04 Schott Ag Composite of a component, in particular an electronic component, and a glass or glass-ceramic material and method for its production

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0230640A (en) * 1988-07-19 1990-02-01 Nippon Electric Glass Co Ltd Core glass for fiber plate
JPH03237036A (en) * 1989-08-24 1991-10-22 Nippon Electric Glass Co Ltd Thin plate type borosilicate glass for alumina package
JP2006137631A (en) * 2004-11-11 2006-06-01 Nippon Electric Glass Co Ltd Glass substrate and its manufacturing method
JP2011136895A (en) * 2009-12-04 2011-07-14 Nippon Electric Glass Co Ltd Laminated glass
JP2012015216A (en) * 2010-06-29 2012-01-19 Fujitsu Ltd Semiconductor device manufacturing method

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5378158B2 (en) * 2003-02-19 2013-12-25 日本電気硝子株式会社 Cover glass for semiconductor packages
JP5348598B2 (en) * 2005-05-10 2013-11-20 日本電気硝子株式会社 Glass substrate for semiconductor device and chip scale package using the same
JP2007311492A (en) * 2006-05-17 2007-11-29 Shinko Electric Ind Co Ltd Method for manufacturing semiconductor device
US20080191334A1 (en) * 2007-02-12 2008-08-14 Visera Technologies Company Limited Glass dam structures for imaging devices chip scale package
JP2009016771A (en) * 2007-06-08 2009-01-22 Hoya Candeo Optronics株式会社 Wafer supporting glass
JP5334411B2 (en) * 2007-12-30 2013-11-06 株式会社フジクラ Bonded substrate and method for manufacturing semiconductor device using bonded substrate
JP5091696B2 (en) * 2008-01-26 2012-12-05 株式会社フジクラ Manufacturing method of semiconductor package
JP5496692B2 (en) * 2010-01-22 2014-05-21 三洋電機株式会社 Manufacturing method of semiconductor module
JP2012105216A (en) * 2010-11-12 2012-05-31 Sony Corp Display control circuit and projector device

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0230640A (en) * 1988-07-19 1990-02-01 Nippon Electric Glass Co Ltd Core glass for fiber plate
JPH03237036A (en) * 1989-08-24 1991-10-22 Nippon Electric Glass Co Ltd Thin plate type borosilicate glass for alumina package
JP2006137631A (en) * 2004-11-11 2006-06-01 Nippon Electric Glass Co Ltd Glass substrate and its manufacturing method
JP2011136895A (en) * 2009-12-04 2011-07-14 Nippon Electric Glass Co Ltd Laminated glass
JP2012015216A (en) * 2010-06-29 2012-01-19 Fujitsu Ltd Semiconductor device manufacturing method

Cited By (40)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2015156075A1 (en) * 2014-04-07 2015-10-15 日本電気硝子株式会社 Supporting glass substrate and laminate using same
WO2016035674A1 (en) * 2014-09-03 2016-03-10 日本電気硝子株式会社 Supporting glass substrate and laminate using same
WO2016111152A1 (en) * 2015-01-05 2016-07-14 日本電気硝子株式会社 Supporting glass substrate and manufacturing method therefor
WO2016111158A1 (en) * 2015-01-05 2016-07-14 日本電気硝子株式会社 Glass plate and manufacturing method therefor
US10737965B2 (en) 2015-01-05 2020-08-11 Nippon Electric Glass Co., Ltd. Method of manufacturing glass sheet
JPWO2016143583A1 (en) * 2015-03-10 2018-02-22 日本電気硝子株式会社 Support glass substrate for semiconductor and laminated substrate using the same
WO2016143583A1 (en) * 2015-03-10 2016-09-15 日本電気硝子株式会社 Semiconductor supporting glass substrate and laminated substrate using same
KR20180013914A (en) 2015-05-28 2018-02-07 아사히 가라스 가부시키가이샤 Glass substrate and laminated substrate
US11715673B2 (en) 2015-05-28 2023-08-01 AGC Inc. Glass substrate and laminated substrate
KR20230044547A (en) 2015-05-28 2023-04-04 에이지씨 가부시키가이샤 Glass substrate and laminated substrate
US10515864B2 (en) 2015-05-28 2019-12-24 AGC Inc. Glass substrate and laminated substrate
KR102651767B1 (en) 2015-05-28 2024-03-28 에이지씨 가부시키가이샤 Glass substrate and laminated substrate
JPWO2016190303A1 (en) * 2015-05-28 2018-03-15 旭硝子株式会社 Glass substrate and laminated substrate
WO2016190303A1 (en) * 2015-05-28 2016-12-01 旭硝子株式会社 Glass substrate and laminated substrate
US11114356B2 (en) 2015-05-28 2021-09-07 AGC Inc. Glass substrate and laminated substrate
KR102515348B1 (en) 2015-05-28 2023-03-30 에이지씨 가부시키가이샤 Glass Substrates and Laminated Substrates
TWI631688B (en) * 2015-06-16 2018-08-01 勤友光電股份有限公司 Wafer structure for laser de-bonding process
WO2017018275A1 (en) * 2015-07-24 2017-02-02 旭硝子株式会社 Glass substrate, laminated substrate, laminated substrate manufacturing method, laminate, package, and glass substrate manufacturing method
US11133215B2 (en) 2015-07-24 2021-09-28 AGC Inc. Glass substrate, laminated substrate, laminated substrate manufacturing method, laminate, package, and glass substrate manufacturing method
JPWO2017018275A1 (en) * 2015-07-24 2018-06-21 旭硝子株式会社 GLASS SUBSTRATE, LAMINATED SUBSTRATE, METHOD FOR PRODUCING LAMINATED SUBSTRATE, LAMINATE, PACKAGING BODY, AND METHOD FOR PRODUCING GLASS SUBSTRATE
CN113307471A (en) * 2015-07-24 2021-08-27 Agc株式会社 Glass substrate, package, and method for manufacturing glass substrate
CN107848878B (en) * 2015-07-24 2021-06-29 Agc株式会社 Glass substrate, laminated substrate, method for producing laminated substrate, laminate, package, and method for producing glass substrate
CN107848878A (en) * 2015-07-24 2018-03-27 旭硝子株式会社 Glass substrate, multilayer board, the manufacture method of multilayer board, layered product, the manufacture method of bundling body and glass substrate
US11180407B2 (en) 2015-10-02 2021-11-23 AGC Inc. Glass substrate, laminated substrate, and laminate
JPWO2017057446A1 (en) * 2015-10-02 2018-07-19 旭硝子株式会社 Glass substrate, laminated substrate, and laminated body
WO2017057446A1 (en) * 2015-10-02 2017-04-06 旭硝子株式会社 Glass substrate, laminated substrate, and laminate
US11753330B2 (en) 2015-10-02 2023-09-12 AGC Inc. Glass substrate, laminated substrate, and laminate
CN108290774A (en) * 2015-12-16 2018-07-17 日本电气硝子株式会社 It supports sintered glass ceramics substrate and has used its laminated body
KR20180095512A (en) * 2015-12-16 2018-08-27 니폰 덴키 가라스 가부시키가이샤 Supported Crystallization Glass Substrate and Laminate Using It
WO2017104514A1 (en) * 2015-12-16 2017-06-22 日本電気硝子株式会社 Crystallized glass support substrate and laminate body using same
JPWO2017104514A1 (en) * 2015-12-16 2018-10-04 日本電気硝子株式会社 Support crystallized glass substrate and laminate using the same
KR102584795B1 (en) 2015-12-16 2023-10-05 니폰 덴키 가라스 가부시키가이샤 Supported crystallized glass substrate and laminate using the same
KR20180095513A (en) * 2015-12-17 2018-08-27 니폰 덴키 가라스 가부시키가이샤 Manufacturing method of support glass substrate
JP2022025147A (en) * 2015-12-17 2022-02-09 日本電気硝子株式会社 Method of manufacturing glass support plate
JPWO2017104513A1 (en) * 2015-12-17 2018-10-04 日本電気硝子株式会社 Manufacturing method of supporting glass substrate
WO2017104513A1 (en) * 2015-12-17 2017-06-22 日本電気硝子株式会社 Method of manufacturing a glass support plate
JP7268718B2 (en) 2015-12-17 2023-05-08 日本電気硝子株式会社 Manufacturing method of supporting glass substrate
KR102588111B1 (en) 2015-12-17 2023-10-12 니폰 덴키 가라스 가부시키가이샤 Manufacturing method of supporting glass substrate
KR20180098556A (en) 2015-12-28 2018-09-04 에이지씨 가부시키가이샤 Glass substrate, laminated substrate, laminate, and method of manufacturing semiconductor package
US10882778B2 (en) 2015-12-28 2021-01-05 AGC Inc. Glass substrate, laminated substrate, laminate, and method for producing semiconductor package

Also Published As

Publication number Publication date
TWI644881B (en) 2018-12-21
JP6593669B2 (en) 2019-10-23
JP2015078113A (en) 2015-04-23
KR20160055104A (en) 2016-05-17
TW201522269A (en) 2015-06-16
CN105307993A (en) 2016-02-03
CN112159100A (en) 2021-01-01
KR102200850B1 (en) 2021-01-11

Similar Documents

Publication Publication Date Title
JP6593669B2 (en) Support glass substrate and carrier using the same
JP6892000B2 (en) Support glass substrate and laminate using this
WO2015156075A1 (en) Supporting glass substrate and laminate using same
JP7268718B2 (en) Manufacturing method of supporting glass substrate
JP6611079B2 (en) Glass plate
WO2016111152A1 (en) Supporting glass substrate and manufacturing method therefor
KR102509782B1 (en) Support glass substrate and laminate using same
JP2016117641A (en) Support glass substrate and laminate comprising the same
JP6593676B2 (en) Laminated body and semiconductor package manufacturing method
JP6443668B2 (en) Support glass substrate and laminate using the same
JP2016169141A (en) Support glass substrate and laminate using the same
WO2016111158A1 (en) Glass plate and manufacturing method therefor
JP6955320B2 (en) Manufacturing method of laminate and semiconductor package
TW201837975A (en) Crystallized glass support substrate and laminate using same
JP2018095514A (en) Glass support substrate and laminate using same
WO2018110163A1 (en) Glass support substrate and laminate using same
TW201910285A (en) Supporting glass substrate and laminated substrate using the same
JP2018095544A (en) Glass support substrate and laminate using same
WO2023026770A1 (en) Support glass substrate, multi-layer body, method for producing multi-layer body, and method for producing semiconductor package
WO2016098499A1 (en) Support glass substrate and laminate using same
JP2022161964A (en) Method for manufacturing support glass substrate

Legal Events

Date Code Title Description
WWE Wipo information: entry into national phase

Ref document number: 201480031817.3

Country of ref document: CN

121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 14844819

Country of ref document: EP

Kind code of ref document: A1

ENP Entry into the national phase

Ref document number: 20157032898

Country of ref document: KR

Kind code of ref document: A

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 14844819

Country of ref document: EP

Kind code of ref document: A1