JPWO2016143583A1 - Support glass substrate for semiconductor and laminated substrate using the same - Google Patents

Abstract

The technical problem of the present invention is to contribute to high-density mounting of a semiconductor package by creating a supporting glass substrate that is difficult to break down in the manufacturing process of the semiconductor package. The supporting glass substrate for a semiconductor of the present invention has a first surface that is a side on which a semiconductor substrate is laminated and a second surface that is a surface opposite to the first surface. At least one of the two surfaces has a roughened region having a surface roughness Ra of 0.3 nm or more and a surface roughness Rmax of 100 nm or less.

Description

  The present invention relates to a support glass substrate for a semiconductor and a laminated substrate using the same, and more specifically to a support glass substrate for a semiconductor used for supporting a semiconductor substrate in a manufacturing process of a semiconductor package and a laminate substrate using the same.

  Mobile electronic devices such as mobile phones, notebook personal computers, and PDAs (Personal Data Assistance) are required to be smaller and lighter. Along with this, the mounting space of semiconductor chips used in these electronic devices is also strictly limited, and high-density mounting of semiconductor chips has become a problem. Therefore, in recent years, high-density mounting of semiconductor packages has been achieved by three-dimensional mounting technology, that is, by stacking semiconductor chips and interconnecting the semiconductor chips.

  As the three-dimensional mounting technology advances, the semiconductor substrate is patterned with an accuracy of several tens of nanometers, and even when a dimensional change of only several tens of nanometers occurs, it causes a decrease in yield. In order to suppress the dimensional change of the semiconductor substrate, it is effective to use a supporting glass substrate for supporting the semiconductor substrate, and it is particularly effective to use a flat supporting glass substrate.

  However, when a flat supporting glass substrate is used, problems due to static electricity are likely to occur in the manufacturing process of the semiconductor package. That is, in the manufacturing process of the semiconductor package, contact peeling between the supporting glass substrate and the surface plate is repeated. If this contact peeling is repeated, the amount of charge in the supporting glass substrate increases and the possibility of causing dielectric breakdown increases. In addition, when the difference in thermal expansion coefficient between the support glass substrate and the surface plate is large, the support glass substrate is charged by friction between the support glass substrate and the surface plate in the thermal process, and there is a risk of causing dielectric breakdown. If the support glass substrate breaks down, the semiconductor substrate is contaminated, resulting in high costs.

  The present invention has been made in view of the above circumstances, and its technical problem is to contribute to high-density mounting of semiconductor packages by creating a supporting glass substrate that is difficult to break down in the manufacturing process of semiconductor packages. is there.

  As a result of repeating various experiments, the present inventor has found that the above technical problem can be solved by forming a specific roughened region on the surface of the glass substrate, and proposes as the present invention. is there. That is, the support glass substrate for a semiconductor of the present invention has a first surface that is a side on which a semiconductor substrate is laminated and a second surface that is a surface opposite to the first surface, and the first surface. And at least one of the second surfaces has a roughened region having a surface roughness Ra of 0.3 nm or more and a surface roughness Rmax of 100 nm or less. Here, “surface roughness Ra” and “surface roughness Rmax” are values measured in an area of 5 μm square using a scanning probe microscope (for example, Dimension Icon manufactured by Bruker). For example, when a roughened region is formed on the entire surface of the second surface of the glass substrate, with respect to nine locations in the central portion and peripheral portion of the glass substrate (the portion about 50 mm inside from the end surface of the glass substrate), It is an average value when the surface roughness Ra and Rmax are respectively measured in an area of 5 μm square.

  The supporting glass substrate for semiconductor of the present invention has a roughened region having a surface roughness Ra of 0.3 nm or more on at least one surface. Thereby, the contact area of a support glass substrate and a surface plate becomes small, and the charge amount in a support glass substrate can be reduced. On the other hand, if the surface roughness Rmax of the roughened region is too large, microcracks are generated in the supporting glass substrate, and the strength of the supporting glass substrate is likely to be reduced. Therefore, the support glass substrate for semiconductor of the present invention regulates the surface roughness Rmax of the roughened region to 100 nm or less.

  Secondly, in the support glass substrate for a semiconductor of the present invention, it is preferable that the roughened region is formed on the second surface.

  Thirdly, in the supporting glass substrate for a semiconductor of the present invention, it is preferable that the roughened region is formed in an area ratio of 5% or more of the second surface.

  Fourthly, it is preferable that the roughening area | region is formed in both the 1st surface and the 2nd surface in the support glass substrate for semiconductors of this invention. In this way, the amount of charge in the support glass substrate can be reduced not only when the support glass substrate and the surface plate are brought into contact but also when the semiconductor substrate is peeled off.

  Fifth, the support glass substrate for a semiconductor of the present invention preferably has an arc-shaped polishing flaw in the roughened region. If it does in this way, it will become easy to reduce not only the charge amount in a support glass substrate but the whole board thickness deviation of a support glass substrate.

  Sixth, the support glass substrate for a semiconductor of the present invention preferably has a total thickness deviation of 3.0 μm or less. If it does in this way, it will become easy to raise the precision of processing. In particular, since the wiring accuracy can be increased, high-density wiring is possible. Further, the strength of the supporting glass substrate is improved, and the supporting glass substrate and the laminated substrate are hardly damaged. Furthermore, the number of reuses of the supporting glass substrate can be increased. Here, the “total plate thickness deviation” is a difference between the maximum plate thickness and the minimum plate thickness of the entire support glass substrate, and can be measured by, for example, Bow / Warp measuring apparatus SBW-331ML / d manufactured by Kobelco Kaken.

  Seventh, the support glass substrate for a semiconductor of the present invention preferably has a thickness of less than 2.0 mm and a warp amount of 60 μm or less. Here, the “warp amount” refers to the sum of the absolute value of the maximum distance between the highest point and the least square focal plane in the entire supporting glass substrate and the absolute value of the lowest point and the least square focal plane. For example, it can be measured by a Bow / Warp measuring device SBW-331ML / d manufactured by Kobelco Research Institute.

  Eighth, the laminated substrate of the present invention is a laminated substrate comprising at least a semiconductor substrate and a supporting glass substrate for semiconductor for supporting the semiconductor substrate, and the supporting glass substrate for semiconductor is the above-described supporting glass substrate for semiconductor. Preferably there is.

Ninthly, in the laminated substrate of the present invention, the average thermal expansion coefficient at 20 to 260 ° C. of the supporting glass substrate for semiconductor is 50 × 10 ⁻⁷ / ° C. or more, and the semiconductor substrate is molded with at least a sealing material. It is preferable to provide a semiconductor chip. Here, the “average coefficient of thermal expansion at 20 to 260 ° C.” can be measured with a dilatometer.

  A fan-out type WLP has been proposed as a new WLP. The fan-out type WLP can increase the number of pins, and can prevent chipping of the semiconductor chip by protecting the end portion of the semiconductor chip. In the fan-out type WLP, a plurality of semiconductor chips are molded with a resin sealing material to form a semiconductor substrate, and then a step of wiring on one surface of the semiconductor substrate, a step of forming solder bumps, and the like are included. Since these processes involve a heat treatment of about 200 to 300 ° C., the sealing material may be deformed and the semiconductor substrate may change in dimensions. When the size of the semiconductor substrate changes, it becomes difficult to wire with high density on one surface of the semiconductor substrate, and it becomes difficult to accurately form solder bumps.

  As described above, it is effective to use a supporting glass substrate in order to suppress the dimensional change of the semiconductor substrate, but even when the supporting glass substrate is used, the ratio of semiconductor chips in the semiconductor substrate is large. When the ratio of the sealing material is small, warp deformation of the semiconductor substrate may occur. Therefore, when the average thermal expansion coefficient of the supporting glass substrate is defined as described above, warpage deformation of the semiconductor substrate can be suppressed even when the ratio of the semiconductor chip is large and the ratio of the sealing material is small in the semiconductor substrate. .

Tenth, in the laminated substrate of the present invention, it is preferable that the supporting glass substrate for semiconductor is non-alkali glass and the semiconductor substrate includes a silicon wafer. Here, the “alkali-free glass” refers to a glass having an alkali component (Li ₂ O, K ₂ O, Na ₂ O) content of 0.5% by mass or less in the glass composition.

It is a conceptual perspective view which shows an example of the laminated substrate of this invention. It is a conceptual sectional view showing a manufacturing process of a fan out type WLP. It is a conceptual sectional view showing a manufacturing process of a fan out type WLP. It is a conceptual sectional view showing a manufacturing process of a fan out type WLP. It is a conceptual sectional view showing a manufacturing process of a fan out type WLP. It is a conceptual sectional view showing a manufacturing process of a fan out type WLP. It is a conceptual sectional view showing a manufacturing process of a fan out type WLP. It is a conceptual sectional view showing a manufacturing process of a fan out type WLP. It is a conceptual sectional view showing the process of thinning a semiconductor substrate using a supporting glass substrate for semiconductors as a back grind substrate. It is a conceptual sectional view showing the process of thinning a semiconductor substrate using a supporting glass substrate for semiconductors as a back grind substrate. It is a conceptual sectional view showing the process of thinning a semiconductor substrate using a supporting glass substrate for semiconductors as a back grind substrate. It is a conceptual sectional view showing the process of thinning a semiconductor substrate using a supporting glass substrate for semiconductors as a back grind substrate. It is a conceptual sectional view showing the process of thinning a semiconductor substrate using a supporting glass substrate for semiconductors as a back grind substrate. It is explanatory drawing which shows the apparatus used for a measurement of electric strength, and is explanatory drawing which shows the state which mounted the glass substrate. It is explanatory drawing which shows the apparatus used for a measurement of electric strength, and is explanatory drawing which shows the state which made the glass substrate and the table contact | adhere.

  The supporting glass substrate for a semiconductor of the present invention has a roughened region on at least one surface, and the surface roughness Ra of the roughened region is 0.3 nm or more, preferably 0.5 nm or more, more preferably Is 0.8 nm or more, particularly preferably 1.0 to 8.0 nm. If the surface roughness Ra is too small, it is difficult to reduce the charge amount in the support glass substrate. On the other hand, when the surface roughness Ra is too large, the treatment time for the roughening treatment becomes long, and the production cost of the supporting glass substrate tends to increase.

  The surface roughness Rmax of the roughened region is 100 nm or less, preferably 80 nm or less, more preferably 50 nm or less, and particularly preferably 30 nm or less. If the surface roughness Rmax is too large, microcracks are generated in the supporting glass substrate, and the strength of the supporting glass substrate is likely to be reduced.

  The support glass substrate for semiconductor of the present invention preferably has a roughened region formed by a chemical solution. That is, it is preferable that the roughened region is formed by chemical treatment. In this way, a smooth roughened region can be formed. As a result, even when the roughened region is formed, it is easy to maintain the strength of the supporting glass substrate. As the chemical solution, an acidic aqueous solution is preferable from the viewpoint of roughening efficiency, and as the acid, for example, hydrofluoric acid, buffered hydrofluoric acid (BHF), hydrochloric acid, nitric acid, and sulfuric acid are preferable.

  As the roughening treatment, it is preferable to perform a chemical treatment after polishing the surface of the supporting glass substrate. That is, after increasing the surface roughness of the surface of the supporting glass substrate by polishing treatment, it is preferable to reduce microcracks existing in the polishing surface by chemical treatment. If it does in this way, processing time of roughening processing can be shortened, maintaining intensity. In this case, in addition to the acidic aqueous solution, an alkaline aqueous solution can be used as the chemical solution, and for example, a potassium hydroxide aqueous solution and a sodium hydroxide aqueous solution can be used.

  Various methods can be used as a method for treating a chemical solution. Among them, from the viewpoint of safety and production efficiency, a method of applying a chemical solution to a glass surface using a roller impregnated with a chemical solution, A method of immersing a glass substrate in a chemical solution after partially protecting with a resist film is preferable.

Moreover, it is also preferable that the roughening area | region is formed with the reactive gas in the support glass substrate for semiconductors of this invention. That is, it is also preferable that the roughened region is formed by the reactive gas. In this way, it is possible to safely perform the roughening treatment by controlling the flow of the reactive gas without scattering the chemical solution. Various gases can be used as the reactive gas. Among them, a gas containing F such as CF ₄ or SF ₆ or a gas containing Cl such as SiCl ₄ is used as a source to react by an atmospheric pressure plasma process. It is preferable to generate a property gas. Furthermore, in the atmospheric pressure plasma process, it is preferable to spray an inert carrier gas such as He or Ar on the glass surface in addition to the reactive gas.

  The support glass substrate for semiconductor of the present invention preferably has a roughened region formed by polishing treatment. That is, it is also preferable that the roughened region is formed by polishing treatment. In particular, it is preferable to form a roughened region on both the first surface and the second surface by arc-shaped polishing scratches. In this way, it is possible to safely perform the roughening process while reducing the overall plate thickness deviation.

  In the supporting glass substrate for semiconductor of the present invention, it is preferable that the roughened region is formed on the second surface. If it does in this way, even if contact peeling with a support glass substrate and a surface plate is repeated, the charge amount in a support glass substrate can be reduced. Note that when the roughened region is formed on the first surface, it becomes easy to reduce the charge amount in the supporting glass substrate when the semiconductor substrate is peeled off, but the roughened region is not formed on the first surface. Also good. When the roughened region is not formed on the first surface, the semiconductor substrate can be stably supported.

  In the supporting glass substrate for a semiconductor of the present invention, the roughened region is formed in an area ratio of 5% or more, 10% or more, 30% or more, 50% or more, 80% or more, particularly on the entire surface. It is preferable. If it does in this way, when making it contact with a surface plate, it will become easy to reduce the charge amount in a support glass substrate.

  It is also preferred that the roughened region is formed in an area ratio of 5% or more, 10% or more, 30% or more, 50% or more, particularly 80% or more of the first surface. If it does in this way, when peeling a semiconductor substrate, it will become easy to reduce the charge amount in a support glass substrate.

  The average coefficient of thermal expansion in the temperature range of 30 to 260 ° C. is preferably increased when the ratio of the semiconductor chip is small in the semiconductor substrate and the ratio of the sealing material is large, and conversely, the semiconductor chip is increased in the semiconductor substrate. When the ratio is large and the ratio of the sealing material is small, it is preferable to reduce the ratio.

When it is desired to regulate the average thermal expansion coefficient in the temperature range of 30 to 260 ° C. to 0 × 10 ⁻⁷ / ° C. or more and less than 50 × 10 ⁻⁷ / ° C., the supporting glass substrate has a glass composition in mass%, SiO 2 ₂ 55-75%, Al ₂ O ₃ 15-30%, Li ₂ O 0.1-6%, Na ₂ O + K ₂ O 0-8%, MgO + CaO + SrO + BaO 0-10%, or SiO _{2 55~75%, Al 2 O 3 10~30} %, Li 2 O + Na 2 O + K 2 O 0~0.3%, preferably contains a 5~20% MgO + CaO + SrO + BaO. When it is desired to regulate the average thermal expansion coefficient in the temperature range of 30 to 260 ° C. to 50 × 10 ⁻⁷ / ° C. or more and less than 70 × 10 ⁻⁷ / ° C., the supporting glass substrate has a glass composition of mass%, SiO 2 _{2 55~75%, Al 2 O 3} 3~15%, B 2 O 3 5~20%, 0~5% MgO, CaO 0~10%, SrO 0~5%, BaO 0~5%, ZnO 0 _{~5%, Na 2 O 5~15%} , preferably contains _{K 2 O 0~10%, SiO 2} 64~71%, Al 2 O 3 5~10%, B 2 O 3 8~15% MgO 0 to 5%, CaO 0 to 6%, SrO 0 to 3%, BaO 0 to 3%, ZnO 0 to 3%, Na ₂ O 5 to 15%, K ₂ O 0 to 5% Is more preferable. When it is desired to regulate the average thermal expansion coefficient in the temperature range of 30 to 260 ° C. to 70 × 10 ⁻⁷ / ° C. or more and 85 × 10 ⁻⁷ / ° C. or less, the supporting glass substrate has a glass composition in mass%, SiO 2 ₂ 60-75%, Al ₂ O ₃ 5-15%, B ₂ O ₃ 5-20%, MgO 0-5%, CaO 0-10%, SrO 0-5%, BaO 0-5%, ZnO 0 _{~5%, Na 2 O 7~16%} , preferably contains _{K 2 O 0~8%, SiO 2} 60~68%, Al 2 O 3 5~15%, B 2 O 3 5~20% MgO 0 to 5%, CaO 0 to 10%, SrO 0 to 3%, BaO 0 to 3%, ZnO 0 to 3%, Na ₂ O 8 to 16%, K ₂ O 0 to 3% Is preferred. When it is desired to regulate the average thermal expansion coefficient in the temperature range of 30 to 260 ° C. to more than 85 × 10 ⁻⁷ / ° C. and not more than 120 × 10 ⁻⁷ / ° C., the supporting glass substrate has a glass composition in mass%, SiO 2 _{2 55~70%, Al 2 O 3} 3~13%, B 2 O 3 2~8%, 0~5% MgO, CaO 0~10%, SrO 0~5%, BaO 0~5%, ZnO 0 _{~5%, Na 2 O 10~21%} , preferably contains K 2 O 0~5%. When it is desired to regulate the average thermal expansion coefficient in the temperature range of 30 to 260 ° C. to more than 120 × 10 ⁻⁷ / ° C. and not more than 165 × 10 ⁻⁷ / ° C., the supporting glass substrate has a glass composition of mass%, SiO 2 _{2 53~65%, Al 2 O 3} 3~13%, B 2 O 3 0~5%, MgO 0.1~6%, CaO 0~10%, SrO 0~5%, BaO 0~5%, _{0~5% ZnO, Na 2 O +} K 2 O 20~40%, Na 2 O 12~21%, preferably contains K 2 O 7~21%. If it does in this way, while it becomes easy to regulate a thermal expansion coefficient to a desired range and devitrification resistance improves, it will become easy to shape a supporting glass substrate with a small total board thickness deviation. “Na ₂ O + K ₂ O” refers to the total amount of Na ₂ O and K ₂ O. “MgO + CaO + SrO + BaO” refers to the total amount of MgO, CaO, SrO and BaO.

  In the supporting glass substrate for a semiconductor of the present invention, the content of the alkali component in the glass composition is preferably 15% by mass or less, 10% by mass or less, 5% by mass or less, and particularly less than 0.5% by mass. As the content of the alkali component in the glass composition is smaller, static electricity is less likely to be released into the atmosphere, and the amount of charge in the support glass substrate is likely to increase, so the effect of the present invention is relatively increased. In addition, when the content of the alkali component in the glass composition is small, it is preferable to combine a static elimination treatment with an ionizer in addition to the roughening treatment from the viewpoint of reducing the charge amount.

The higher the thermal expansion coefficient of the supporting glass substrate, the larger the difference in thermal expansion coefficient between the supporting glass substrate and the surface plate, and the friction between the supporting glass substrate and the surface plate tends to increase due to the thermal process. Thereby, since the charge amount in the supporting glass substrate is likely to increase, the effect of the present invention becomes relatively large. In addition, when the thermal expansion coefficient of the supporting glass substrate is high (for example, when the average thermal expansion coefficient at 20 to 260 ° C. of the supporting glass substrate is 50 × 10 ⁻⁷ / ° C. or more), from the viewpoint of reducing the charge amount, the above In addition to the roughening treatment, it is preferable to combine a static elimination treatment with an ionizer.

  In the supporting glass substrate for a semiconductor of the present invention, the total thickness deviation is preferably 3.0 μm or less, less than 2.0 μm, 1.5 μm or less, 1.0 μm or less, particularly 0.1 to 1.0 μm or less. The smaller the overall plate thickness deviation, the easier it is to improve the accuracy of the processing. In particular, since the wiring accuracy can be increased, high-density wiring is possible. Further, the strength of the supporting glass substrate is improved, and the supporting glass substrate and the laminated substrate are hardly damaged. Furthermore, the number of reuses of the supporting glass substrate can be increased.

  The support glass substrate for a semiconductor of the present invention may have a surface polished to reduce the overall thickness deviation to less than 2.0 μm, 1.5 μm or less, 1.0 μm or less, particularly less than 1.0 μm. preferable. Various methods can be adopted as the polishing method, but the glass substrate is polished while sandwiching both surfaces of the glass substrate with a pair of polishing pads and rotating the glass substrate and the pair of polishing pads together. Thus, a method of giving arc-shaped polishing scratches on both surfaces of the glass substrate is preferable. Furthermore, it is preferable that the pair of polishing pads have different outer diameters, and polishing is performed so that a part of the glass substrate protrudes from the polishing pad intermittently during polishing, and arc-shaped polishing is performed on both surfaces of the glass substrate. It is preferable to give a flaw. This makes it easy to reduce the overall plate thickness deviation and to reduce the amount of warpage. In the polishing treatment, the polishing depth is not particularly limited, but the polishing depth is preferably 50 μm or less, 30 μm or less, 0.01 to 20 μm, particularly 0.1 to 10 μm. As the polishing depth is smaller, the productivity of the glass substrate is improved.

  The supporting glass substrate for semiconductor of the present invention may be rectangular, but is preferably in the form of a wafer (substantially perfect circle), and the diameter is preferably 100 mm or more and 500 mm or less, particularly 150 mm or more and 450 mm or less. In this way, it becomes easy to apply to the manufacturing process of a semiconductor package. In this case, the roundness of the supporting glass substrate (excluding the notch portion) is preferably 1 mm or less, 0.1 mm or less, 0.05 mm or less, particularly 0.03 mm or less. The smaller the roundness, the easier it is to apply to the semiconductor package manufacturing process. In addition, the definition of roundness is a value obtained by subtracting the minimum value from the maximum value of the outer shape of the support glass substrate.

  In the supporting glass substrate for a semiconductor of the present invention, the plate thickness is preferably less than 2.0 mm, 1.5 mm or less, 1.2 mm or less, 1.1 mm or less, 1.0 mm or less, particularly 0.9 mm or less. As the plate thickness decreases, the mass of the laminated substrate becomes lighter, so that the handling property is improved. On the other hand, if the plate thickness is too thin, the strength of the support glass substrate itself is lowered, and it becomes difficult to perform the function as the support substrate. Therefore, the plate thickness is preferably 0.1 mm or more, 0.2 mm or more, 0.3 mm or more, 0.4 mm or more, 0.5 mm or more, 0.6 mm or more, particularly more than 0.7 mm.

  The amount of warp is preferably 60 μm or less, 55 μm or less, 50 μm or less, 1 to 45 μm, particularly 5 to 40 μm. The smaller the warp amount, the easier it is to improve the accuracy of the processing. In particular, since the wiring accuracy can be increased, high-density wiring is possible.

  It is preferable that the support glass substrate for semiconductors of this invention has a notch part (positioning part) in a part of outer periphery of a support glass substrate. If it does in this way, positioning members, such as a positioning pin, will contact a notch part of a support glass substrate, and it will become easy to fix a position of a support glass substrate. As a result, alignment of the semiconductor substrate and the supporting glass substrate is facilitated. In addition, if a notch part is formed also in a semiconductor substrate and a positioning member is contact | abutted, alignment with a semiconductor substrate and a support glass substrate will become still easier.

  The notch is preferably chamfered. That is, it is preferable that a chamfered portion is formed in the notch portion. Furthermore, it is preferable that the surface of the notch portion is etched with a chemical solution to remove microscopic scratches. Thereby, it becomes easy to prevent the support glass substrate from being damaged from the notch portion. Suitable chemical solutions are as described above.

  In the supporting glass substrate for semiconductor of the present invention, it is preferable that the end face (except for the notch portion) is chamfered. That is, it is preferable that a chamfered portion is formed on the end surface. Furthermore, it is preferable that the surface of the end face is etched with an acid to remove microscopic scratches. Thereby, it becomes easy to prevent the support glass substrate from being damaged from the end face. Suitable chemical solutions are as described above.

  The support glass substrate for semiconductor of the present invention is preferably not subjected to chemical strengthening treatment from the viewpoint of reducing the amount of warpage. That is, from the viewpoint of reducing the amount of warpage, it is preferable not to have a compressive stress layer on the surface.

  The supporting glass substrate for a semiconductor of the present invention is preferably formed by a down draw method, particularly an overflow down draw method. In the overflow down draw method, molten glass overflows from both sides of a heat-resistant bowl-shaped structure, and the overflowed molten glass joins at the lower top end of the bowl-shaped structure and is formed downward to produce a glass substrate. It is a method to do. In the overflow down draw method, the surface to be the surface of the glass substrate is not in contact with the bowl-shaped refractory, and is formed in a free surface state. For this reason, it becomes easy to produce a glass substrate with a small plate thickness, and the total plate thickness deviation can be reduced to less than 2.0 μm, particularly less than 1.0 μm, by a small amount of polishing or without polishing. As a result, the manufacturing cost of the glass substrate can be reduced. In addition, the structure and material of a bowl-shaped structure will not be specifically limited if a desired dimension and surface accuracy are realizable. In addition, the method of applying a force when performing downward stretch molding is not particularly limited. For example, a method of rotating and stretching a heat-resistant roll having a sufficiently large width in contact with the glass may be employed, or a plurality of pairs of heat-resistant rolls may be provided only in the vicinity of the end surface of the strip glass. You may employ | adopt the method of making it contact and extending | stretching.

  As a glass substrate forming method, in addition to the overflow downdraw method, for example, a slot downdraw method, a redraw method, a float method or the like can be adopted.

  The support glass substrate for a semiconductor of the present invention is preferably formed by polishing the entire surface of the first surface and the second surface after being molded by the overflow downdraw method. If it does in this way, it will become easy to regulate the whole board thickness deviation to less than 2.0 micrometers, 1.5 micrometers or less, 1.0 micrometers or less, especially less than 0.1-1.0 micrometers.

  The laminated substrate of the present invention is a laminated substrate comprising at least a semiconductor substrate and a semiconductor supporting glass substrate for supporting the semiconductor substrate, wherein the semiconductor supporting glass substrate is the above-mentioned semiconductor supporting glass substrate. And Here, the technical characteristics (preferable structure and effect) of the laminated substrate of the present invention overlap with the technical characteristics of the semiconductor supporting glass substrate of the present invention. Therefore, in the present specification, detailed description of the overlapping portions is omitted.

The laminated substrate of the present invention includes a semiconductor chip in which the average thermal expansion coefficient at 20 to 260 ° C. of the supporting glass substrate for semiconductor is 50 × 10 ⁻⁷ / ° C. or more, and the semiconductor substrate is molded with at least a sealing material. It is preferable. If it does in this way, it will become easy to match | combine the thermal expansion coefficient of a support glass substrate and a semiconductor substrate, and it becomes suitable for the manufacturing process of a fan out type | mold WLP.

  In the laminated substrate of the present invention, it is also preferable that the supporting glass substrate for semiconductor is alkali-free glass, and the semiconductor substrate includes a silicon wafer. If it does in this way, it becomes easy to match | combine the thermal expansion coefficient of a support glass substrate and a semiconductor substrate, and it becomes suitable for the process of using a support glass substrate for a back grind substrate and thinning a semiconductor substrate.

  The laminated substrate of the present invention preferably has an adhesive layer between the semiconductor substrate and the supporting glass substrate. The adhesive layer is preferably a resin, for example, a thermosetting resin, a photocurable resin (particularly an ultraviolet curable resin), or the like. Moreover, what has the heat resistance which can endure the heat processing in the manufacturing process of a semiconductor package is preferable. Thereby, it becomes difficult to melt | dissolve an adhesive layer in the manufacturing process of a semiconductor package, and the precision of a process can be improved.

  The laminated substrate of the present invention further has a peeling layer between the semiconductor substrate and the supporting glass substrate, more specifically, between the semiconductor substrate and the adhesive layer, or between the supporting glass substrate and the adhesive layer. It is preferable to have a layer. If it does in this way, it will become easy to peel a semiconductor substrate from a support glass substrate, after performing predetermined processing processing to a semiconductor substrate. The semiconductor substrate is preferably peeled off by irradiation light such as laser light from the viewpoint of productivity.

  The peeling layer is made of a material that causes “in-layer peeling” or “interfacial peeling” by irradiation light such as laser light. That is, when light of a certain intensity is irradiated, the bonding force between atoms or molecules in an atom or molecule disappears or decreases, and ablation or the like is caused to cause peeling. In addition, when the component contained in the release layer is released as a gas due to irradiation of irradiation light, the separation layer is released, and when the release layer absorbs light and becomes a gas, and its vapor is released, resulting in separation There is.

  In the laminated substrate of the present invention, the supporting glass substrate is preferably larger than the semiconductor substrate. Thereby, when supporting a semiconductor substrate and a support glass substrate, even when the center position of both is slightly separated, the edge part of a semiconductor substrate becomes difficult to protrude from a support glass substrate.

  The present invention will be further described with reference to the drawings.

  FIG. 1 is a conceptual perspective view showing an example of a laminated substrate 1 of the present invention. In FIG. 1, the laminated substrate 1 includes a semiconductor supporting glass substrate 10 and a semiconductor substrate 11. The semiconductor supporting glass substrate 10 is adhered to the semiconductor substrate 11 in order to prevent the dimensional change of the semiconductor substrate 11. A release layer 12 and an adhesive layer 13 are disposed between the semiconductor support glass substrate 10 and the semiconductor substrate 11. The release layer 12 is in contact with the support glass substrate for semiconductor 10, and the adhesive layer 13 is in contact with the semiconductor substrate 11.

  As can be seen from FIG. 1, the laminated substrate 1 is laminated in the order of a supporting glass substrate for semiconductor 10, a release layer 12, an adhesive layer 13, and a semiconductor substrate 11. The shape of the support glass substrate for semiconductor 10 is determined according to the semiconductor substrate 11, but in FIG. 1, the shapes of the support glass substrate for semiconductor 10 and the semiconductor substrate 11 are both substantially disk shapes. In addition to amorphous silicon (a-Si), the release layer 12 is made of silicon oxide, a silicate compound, silicon nitride, aluminum nitride, titanium nitride, or the like. The release layer 12 is formed by plasma CVD, spin coating using a sol-gel method, or the like. The adhesive layer 13 is made of a resin, and is applied and formed by, for example, various printing methods, inkjet methods, spin coating methods, roll coating methods, and the like. After the semiconductor supporting glass substrate 10 is peeled from the semiconductor substrate 11 by the release layer 12, the adhesive layer 13 is dissolved and removed with a solvent or the like.

FIG. 2 is a conceptual cross-sectional view showing a manufacturing process of a fan-out type WLP. FIG. 2A shows a state in which the adhesive layer 21 is formed on one surface of the support member 20. A peeling layer may be formed between the support member 20 and the adhesive layer 21 as necessary. Next, as shown in FIG. 2B, a plurality of semiconductor chips 22 are pasted on the adhesive layer 21. At that time, the surface on the active side of the semiconductor chip 22 is brought into contact with the adhesive layer 21. Next, as shown in FIG. 2C, the semiconductor chip 22 is molded with a resin sealing material 23. The sealing material 23 is made of a material having little dimensional change after compression molding and little dimensional change when forming a wiring. Subsequently, as shown in FIGS. 2D and 2E, the semiconductor substrate 24 on which the semiconductor chip 22 is molded is separated from the support member 20, and then bonded and fixed to the semiconductor support glass substrate 26 through the adhesive layer 25. At that time, the surface of the semiconductor substrate 24 opposite to the surface on which the semiconductor chip 22 is embedded is arranged on the semiconductor supporting glass substrate 26 side. Here, a roughened region is formed by an atmospheric pressure plasma process (source CF ₄ , carrier gas Ar) on the surface opposite to the surface in contact with the adhesive layer 25 of the support glass substrate 26 for semiconductor. Yes. In this way, the laminated substrate 27 can be obtained. In addition, you may form a peeling layer between the contact bonding layer 25 and the support glass substrate 26 for semiconductors as needed. Further, after transporting the obtained laminated substrate 27, as shown in FIG. 2F, after forming the wiring 28 on the surface of the semiconductor substrate 24 where the semiconductor chip 22 is embedded, a plurality of solder bumps 29 are formed. . Finally, after separating the semiconductor substrate 24 from the semiconductor support glass substrate 26, the semiconductor substrate 24 is cut into semiconductor chips 22 for use in a subsequent packaging process (FIG. 2G).

  FIG. 3 is a conceptual cross-sectional view showing a process of thinning the semiconductor substrate using the support glass substrate for semiconductor as a back grind substrate. FIG. 3A shows the laminated substrate 30. The laminated substrate 30 is laminated in the order of a support glass substrate 31 for a semiconductor, a release layer 32, an adhesive layer 33, and a semiconductor substrate (silicon wafer) 34. A roughened region is formed on the surface opposite to the surface in contact with the adhesive layer 34 of the support glass substrate 31 for semiconductor by chemical treatment using an acid aqueous solution. A plurality of semiconductor chips 35 are formed on the surface of the semiconductor substrate 34 on the side in contact with the adhesive layer 33 by a photolithography method or the like. FIG. 3B shows a process of thinning the semiconductor substrate 34 with the polishing apparatus 36. By this step, the semiconductor substrate 34 is mechanically polished to be thinned to, for example, several tens of μm. FIG. 3C shows a step of irradiating the release layer 32 with ultraviolet light 37 through the support glass substrate 31 for semiconductor. Through this step, the semiconductor supporting glass substrate 31 can be separated as shown in FIG. 3D. The separated support glass substrate 31 for semiconductor is reused as necessary. FIG. 3E shows a step of removing the adhesive layer 33 from the semiconductor substrate 34. Through this step, the thinned semiconductor substrate 34 can be collected.

  Hereinafter, the present invention will be described based on examples. The following examples are merely illustrative. The present invention is not limited to the following examples.

  Table 1 shows Examples (Sample Nos. 1 to 4) and Comparative Examples (Sample Nos. 5 and 6) of the present invention.

<Sample No. Preparation of 1>
First, a glass batch in which glass raw materials were prepared so as to have the glass composition in the table was put in a platinum crucible, and then melted, clarified, and homogenized at 1500 to 1600 ° C. for 24 hours. In melting the glass batch, the mixture was stirred and homogenized using a platinum stirrer. Next, the molten glass was poured onto a carbon plate and formed into a plate shape, and then slowly cooled at a temperature near the annealing point for 30 minutes.

  Subsequently, the obtained glass substrate was cut into a thickness of 300 mm × 300 mm × 0.8 mm, and both surfaces thereof were polished by a polishing apparatus. Specifically, both surfaces of the glass substrate are sandwiched between a pair of polishing pads having different outer diameters, and both the surfaces of the glass substrate are polished while rotating the glass substrate and the pair of polishing pads together. Arc-shaped polishing scratches were given to the surface. During the polishing process, control was sometimes performed so that a part of the glass substrate protruded from the polishing pad. The polishing pad was made of urethane, the average particle size of the polishing slurry used in the polishing treatment was 2.5 μm, and the polishing rate was 15 m / min. About each obtained glass substrate after a grinding | polishing process, the whole board thickness deviation and curvature amount were measured by Bow / Warp measuring apparatus SBW-331ML / d by Kobelco Kaken. As a result, the overall plate thickness deviation was 0.65 μm and the warpage amount was 35 μm.

  Furthermore, after masking in a lattice pattern with a polyimide tape on the polished glass substrate, the surface of the glass substrate was treated with a chemical solution by immersing in an aqueous 10 mass% HCl solution at 50 ° C. for 1 hour. Next, the glass substrate after chemical treatment was washed with water, the polyimide tape was peeled off, washed again with water and dried.

<Sample No. Preparation of 2>
First, a glass batch in which glass raw materials were prepared so as to have the glass composition in the table was put in a platinum crucible, and then melted, clarified, and homogenized at 1500 to 1600 ° C. for 24 hours. In melting the glass batch, the mixture was stirred and homogenized using a platinum stirrer. Next, the molten glass was poured onto a carbon plate and formed into a plate shape, and then slowly cooled at a temperature near the annealing point for 30 minutes.

  Subsequently, the obtained glass substrate was cut into a thickness of φ300 mm × 0.8 mm, and then both surfaces thereof were mirror-polished. Next, it was immersed in a 5 mass% potassium hydroxide aqueous solution at 50 ° C. for 1 hour, and both surfaces of the glass substrate were treated with a chemical solution. Next, after the chemical treatment, the glass substrate was washed with water and dried.

<Sample No. Preparation of 3>
First, after putting the glass batch which prepared the glass raw material into a continuous melting furnace so that it might become the glass composition in a table | surface, it melted, clarified, and homogenized at 1500-1600 degreeC for 24 hours. Subsequently, it shape | molded on the glass substrate by the overflow downdraw method.

  Subsequently, the obtained glass substrate was cut into a thickness of φ300 mm × 0.7 mm, and both surfaces thereof were polished by a polishing apparatus. Specifically, both surfaces of the glass substrate are sandwiched between a pair of polishing pads having different outer diameters, and both the surfaces of the glass substrate are polished while rotating the glass substrate and the pair of polishing pads together. Arc-shaped polishing scratches were given to the surface. During the polishing process, control was sometimes performed so that a part of the glass substrate protruded from the polishing pad. The polishing pad was made of urethane, the average particle size of the polishing slurry used in the polishing treatment was 2.5 μm, and the polishing rate was 15 m / min. About each obtained glass substrate after a grinding | polishing process, the whole board thickness deviation and curvature amount were measured by Bow / Warp measuring apparatus SBW-331ML / d by Kobelco Kaken. As a result, the overall plate thickness deviation was 0.45 μm and the warpage amount was 25 μm.

<Sample No. Preparation of 4>
First, a glass batch in which glass raw materials were prepared so as to have the glass composition in the table was put in a platinum crucible, and then melted, clarified, and homogenized at 1500 to 1600 ° C. for 24 hours. In melting the glass batch, the mixture was stirred and homogenized using a platinum stirrer. Next, the molten glass was poured onto a carbon plate and formed into a plate shape, and then slowly cooled at a temperature near the annealing point for 30 minutes.

Subsequently, the obtained glass substrate was cut into a thickness of 300 mm × 400 mm × 1.0 mm, and then both surfaces thereof were mirror-polished. Further, after masking in a stripe shape with a polyimide tape on the glass substrate after mirror polishing, an atmospheric pressure plasma treatment using CF ₄ as a reactive gas and Ar as a carrier gas was performed. Next, after performing atmospheric pressure plasma treatment, the glass substrate was washed with water, the polyimide tape was peeled off, washed again with water, and dried.

<Sample No. Preparation of 5>
First, after putting the glass batch which prepared the glass raw material into a continuous melting furnace so that it might become the glass composition in a table | surface, it melted, clarified, and homogenized at 1500-1600 degreeC for 24 hours. Subsequently, it shape | molded on the glass substrate by the overflow downdraw method. Subsequently, the obtained glass substrate was cut into φ300 mm × 0.7 mm thickness.

<Sample No. Preparation of 6>
First, after putting the glass batch which prepared the glass raw material into a continuous melting furnace so that it might become the glass composition in a table | surface, it melted, clarified, and homogenized at 1500-1600 degreeC for 24 hours. Subsequently, it shape | molded on the glass substrate by the rollout method. Subsequently, the obtained glass substrate was cut into a thickness of φ300 mm × 0.7 mm, and both surfaces thereof were polished by a polishing apparatus.

About each obtained glass substrate, average thermal expansion coefficient (alpha) _30-380 in the temperature range of _{30-380 degreeC} , the area of the roughening area _| region, surface roughness Ra, surface roughness Rmax, the charge amount, and the microcrack were evaluated. . The results are shown in Table 1.

The average coefficient of thermal expansion α _{30 to 380} in the temperature range of 30 to 380 ° C. is a value measured with a dilatometer.

  The surface roughness Ra, Rmax was measured with a scanning probe microscope (Dimension Icon manufactured by Bruker) with an area of 5 μm square. Specifically, the surface roughness Ra, Rmax was measured at an area of 5 μm square at 9 locations of the in-plane central portion and the peripheral portion (the portion about 50 mm inward from the end surface of the glass substrate), and the average was obtained. It is a value. Sample No. About samples other than 5, surface roughness Ra and Rmax were measured about the roughening area | region.

  For the evaluation of the charge amount, an apparatus as shown in FIGS. 4A and 4B was used. This apparatus has the following configuration.

  The support base 41 of the glass substrate 40 includes a pad 42 made of Teflon (registered trademark) that supports the corners of the glass substrate 4. Further, the support base 41 is provided with a metal aluminum plate 43 that can be moved up and down. By moving the plate 43 up and down, the glass substrate 40 and the plate 43 are brought into contact with each other and peeled to charge the glass substrate 40. Can do. The plate 43 is grounded. Further, a hole (not shown) is formed in the plate 43, and this hole is connected to a diaphragm type vacuum pump (not shown). When the vacuum pump is driven, air is sucked from the holes of the plate 43, whereby the glass substrate 40 can be vacuum-adsorbed to the plate 43. Further, a surface potential meter 44 is installed at a position 10 mm above the glass substrate 40, whereby the amount of charge generated at the central portion of the glass substrate 40 can be continuously measured. In addition, an air gun 45 with an ionizer is installed above the glass substrate 40, whereby the charging of the glass substrate 40 can be gradually reduced. The size of the plate 43 of this apparatus is a circle of φ150 mm.

A method for measuring the charge amount using this apparatus will be described. The experiment is performed in an environment of 20 ° C. ± 1 ° C. and humidity 40% ± 1%. This amount of charge changes greatly under the influence of the atmosphere and humidity in the atmosphere, so it is particularly necessary to pay attention to humidity management.
(1) The glass substrate 40 is placed on the support base 41 with the surface having the roughened region facing down. In addition, when there is no roughening area | region on both surfaces, either surface may be a lower side.
(2) The glass substrate 40 is discharged to 10 V or less by the air gun 45 with an ionizer.
(3) The plate 43 is raised and brought into contact with the glass substrate 40 and is vacuum-adsorbed to bring the plate 43 and the glass substrate 40 into close contact with each other for 30 seconds.
(4) The glass substrate 40 is peeled by lowering the plate 43, and the amount of charge generated at the center of the glass substrate 40 is continuously measured with a surface potentiometer.
(5) Repeat (3) and (4), and continuously evaluate the charge amount five times.
(6) The maximum charge amount in each measurement is obtained, and these are integrated to obtain the charge amount.

  Microcracks are evaluated by observing the inside of a glass substrate as “◯” when there are few microcracks and “x” when there are many microcracks.

  As is clear from Table 1, sample No. In Nos. 1 to 4, since the surface roughness of the roughened region was appropriate, the evaluation of the charge amount and the microcrack was good. Therefore, sample no. 1-4 are considered to be suitably usable as a supporting glass substrate for a semiconductor. On the other hand, sample No. No. 5 had a large charge amount because the surface was too smooth. Sample No. Since the surface of 6 was too rough, the evaluation of microcracks was poor.

1, 27, 30 Multilayer substrate 10, 26, 31, 40 Semiconductor supporting glass substrate (glass substrate)
11, 24, 34 Semiconductor substrate 12, 32 Release layer 13, 21, 25, 33 Adhesive layer 20 Support member 22, 35 Semiconductor chip 23 Sealing material 28 Wiring 29 Solder bump 36 Polishing device 37 Ultraviolet light 41 Support base 42 Pad 43 Plate 44 Surface potential meter 45 Air gun

Claims (10)

  A first surface on which the semiconductor substrate is laminated and a second surface that is a surface opposite to the first surface, and at least one of the first surface and the second surface has a surface roughness A support glass substrate for a semiconductor having a roughened region having a thickness Ra of 0.3 nm or more and a surface roughness Rmax of 100 nm or less.   The support glass substrate for semiconductor according to claim 1, wherein the roughened region is formed on the second surface.   The support glass substrate for semiconductor according to claim 2, wherein the roughened region is formed in an area ratio of 5% or more of the second surface.   The support glass substrate for semiconductor according to any one of claims 1 to 3, wherein the roughened region is formed on both the first surface and the second surface.   The support glass substrate for semiconductor according to any one of claims 1 to 4, wherein an arc-shaped polishing flaw exists in the roughened region.   6. The support glass substrate for a semiconductor according to claim 1, wherein a total thickness deviation is 3.0 [mu] m or less.   The support glass substrate for a semiconductor according to any one of claims 1 to 6, wherein the thickness of the plate is less than 2.0 mm and the amount of warpage is 60 µm or less.   A laminated substrate comprising at least a semiconductor substrate and a semiconductor support glass substrate for supporting the semiconductor substrate, wherein the semiconductor support glass substrate is the semiconductor support glass substrate according to any one of claims 1 to 7. A laminated substrate characterized by the above. The average thermal expansion coefficient at 20 to 260 ° C of the supporting glass substrate for semiconductor is 50 × 10 ^-7 / ° C or more, and the semiconductor substrate includes a semiconductor chip molded with at least a sealing material. The laminated substrate according to 8.   The laminated substrate according to claim 8, wherein the supporting glass substrate for semiconductor is non-alkali glass, and the semiconductor substrate includes a silicon wafer.