TWI665170B - Support glass substrate for semiconductor and laminated substrate using same - Google Patents

Abstract

The technical problem of the present invention is to contribute to high-density mounting of a semiconductor package by creating a support glass substrate which is less prone to insulation breakdown during the manufacturing steps of the semiconductor package. The support glass substrate for a semiconductor of the present invention is characterized in that it has a first surface that is a side of a laminated semiconductor substrate and a second surface that is a surface opposite to the first surface, and at least one of the first surface and the second surface. One has a roughened region with a surface roughness Ra of 0.3 nm or more and a surface roughness Rmax of 100 nm or less.

Description

Support glass substrate for semiconductor and laminated substrate using same

The present invention relates to a supporting glass substrate for a semiconductor and a laminated substrate using the same. Specifically, the present invention relates to a supporting glass substrate for a semiconductor for supporting a semiconductor substrate in a manufacturing step of a semiconductor package, and a method for using the same. Laminated substrate.

Portable electronic devices such as mobile phones, notebook computers, and Personal Data Assistance (PDA) are required to be miniaturized and lightweight. Along with this, the mounting space for semiconductor wafers used in these electronic devices has also been severely restricted, and high-density mounting of semiconductor wafers has become an issue. Therefore, in recent years, high-density mounting of semiconductor packages has been pursued by three-dimensional mounting technology, that is, stacking semiconductor wafers with each other, and wiring connection between the semiconductor wafers.

With the advancement of three-dimensional mounting technology, the semiconductor substrate is patterned with tens of nanometers of accuracy, and even if a dimensional change of only a few tens of nanometers occurs, the yield may decrease. In order to suppress the dimensional change of the semiconductor substrate, it is effective to use a supporting glass substrate for supporting the semiconductor substrate, and it is particularly effective to use a flat supporting glass substrate.

However, if a flat supporting glass substrate is used, Problems caused by static electricity are easily generated in the manufacturing steps. That is, in the manufacturing steps of the semiconductor package, the contact peeling between the supporting glass substrate and the lithographic plate is repeatedly performed. When this contact peeling is repeated, the amount of charge in the supporting glass substrate increases, and the possibility of causing insulation breakdown becomes high. In addition, when the thermal expansion coefficient difference between the supporting glass substrate and the lithographic plate is large, there is a possibility that the supporting glass substrate is charged during the thermal process and the supporting glass substrate is charged, which may cause insulation damage. If the supporting glass substrate is damaged by insulation, the semiconductor substrate is contaminated, which causes a high cost.

The present invention has been made in view of the above-mentioned circumstances, and a technical problem thereof is to contribute to high-density mounting of a semiconductor package by creating a supporting glass substrate that is less likely to undergo insulation damage during a manufacturing step of the semiconductor package.

The present inventors conducted various experiments repeatedly, and as a result, found that the above-mentioned technical problem can be solved by forming a specific roughened region on the surface of the glass substrate, and the present invention has been made. That is, the support glass substrate for a semiconductor of the present invention is characterized in that it has a first surface that is a side of a laminated semiconductor substrate and a second surface that is a surface opposite to the first surface, and At least one has a roughened area with a surface roughness Ra of 0.3 nm or more and a surface roughness Rmax of 100 nm or less. Here, “surface roughness Ra” and “surface roughness Rmax” are values measured in a 5 μm square area using a scanning probe microscope (for example, Dimension Icon manufactured by Bruker). For example, when a roughened region is formed on the entire second surface of the glass substrate, the in-plane center portion and the peripheral edge portion of the glass substrate (about 50 from the end surface of the glass substrate) In the part inside 9 mm), the average values of the surface roughness Ra and the surface roughness Rmax were measured in an area of 5 μm square, respectively.

The supporting glass substrate for a semiconductor of the present invention has a roughened region having a surface roughness Ra of 0.3 nm or more on at least one surface. Thereby, the contact area between the supporting glass substrate and the lithographic plate is reduced, and the amount of charge in the supporting glass substrate can be reduced. On the other hand, if the surface roughness Rmax of the roughened region is too large, micro cracks occur in the supporting glass substrate, and the strength of the supporting glass substrate tends to decrease. Therefore, the supporting glass substrate for a semiconductor of the present invention limits the surface roughness Rmax of the roughened region to 100 nm or less.

Secondly, it is preferable that the roughened region of the supporting glass substrate for a semiconductor of the present invention is formed on the second surface.

Third, the supporting glass substrate for a semiconductor of the present invention is preferably such that the roughened region is formed on the second surface in an area ratio of 5% or more.

Fourth, it is preferable that the roughened region of the semiconductor support glass substrate of the present invention is formed on both the first surface and the second surface. Accordingly, not only when the supporting glass substrate is brought into contact with the lithography, but also when the semiconductor substrate is peeled off, the amount of charge in the supporting glass substrate can be reduced.

Fifth, it is preferred that the support glass substrate for a semiconductor of the present invention has arc-shaped grinding damage in the roughened area. As a result, not only the amount of charge in the supporting glass substrate is reduced, but also the variation in overall thickness of the supporting glass substrate is easily reduced.

Sixth, the supporting glass substrate for a semiconductor of the present invention preferably has a variation in overall plate thickness of 3.0 μm or less. This makes it easy to improve the accuracy of the processing. especially Since the wiring accuracy can be improved, high-density wiring can be realized. In addition, since the strength of the supporting glass substrate is increased, the supporting glass substrate and the laminated substrate are less likely to be damaged. Further, the number of reuses of the supporting glass substrate can be increased. Here, the "overall plate thickness deviation" is the difference between the maximum and minimum plate thicknesses that support the entire glass substrate, and can be measured, for example, with a Bow / Warp measuring device SBW-331ML / d manufactured by Kobelco Scientific .

Seventh, the supporting glass substrate for a semiconductor of the present invention preferably has a plate thickness of less than 2.0 mm and a warpage amount of 60 μm or less. Here, the "warpage amount" refers to the total of the absolute value of the maximum distance between the highest position and the least square focal surface of the entire supporting glass substrate, and the total value of the lowest position and the minimum square focal surface. A Bow / Warp measuring device SBW-331ML / d manufactured by Kobelco Scientific Corporation was used for the measurement.

Eighth, the multilayer substrate of the present invention preferably includes at least a semiconductor substrate and a semiconductor support glass substrate for supporting the semiconductor substrate, and the semiconductor support glass substrate is the aforementioned support glass substrate for semiconductors.

Ninth, the multilayer substrate of the present invention is preferably a supporting glass substrate for semiconductors having an average thermal expansion coefficient of 50 × 10 ^-7 / ° C or higher at 20 ° C to 260 ° C, and the semiconductor substrate includes at least a semiconductor wafer molded with a sealing material. . Here, the "average thermal expansion coefficient at 20 ° C to 260 ° C" can be measured with a dilatometer.

As a new wafer level packaging (Wafer Level Packaging, WLP), a fan out WLP is proposed. The fan-out type WLP can increase the number of pins. In addition, by protecting the end of the semiconductor wafer, it can prevent the shortage of semiconductor wafers. Trapped and so on. In the fan out type WLP, after forming a semiconductor substrate by molding a plurality of semiconductor wafers with a resin sealing material, the method includes a step of wiring on one surface of the semiconductor substrate, a step of forming a solder bump, and the like. Since these steps are accompanied by a heat treatment at about 200 ° C. to 300 ° C., the sealing material may be deformed and the semiconductor substrate may change in size. If the semiconductor substrate undergoes a dimensional change, it is difficult to perform high-density wiring on one surface of the semiconductor substrate, and it is also difficult to accurately form a solder bump.

As described above, in order to suppress the dimensional change of the semiconductor substrate, it is effective to use a supporting glass substrate. However, even when the supporting glass substrate is used, when the proportion of the semiconductor wafer in the semiconductor substrate is large and the proportion of the sealing material is small, There is also a case where warping deformation of the semiconductor substrate occurs. Therefore, if the average thermal expansion coefficient of the supporting glass substrate is specified as described above, even when the proportion of the semiconductor wafer in the semiconductor substrate is large and the proportion of the sealing material is small, the warpage deformation of the semiconductor substrate can be suppressed.

Tenth, the multilayer substrate of the present invention is preferably a support glass substrate for semiconductors which is an alkali-free glass, and the semiconductor substrate includes a silicon wafer. Here, the "alkali-free glass" refers to a glass having a content of an alkali component (Li ₂ O, K ₂ O, Na ₂ O) in a glass composition of 0.5% by mass or less.

1, 27, 30‧‧‧Multilayer substrate

10, 26, 31, 40‧‧‧ semiconductor support glass substrate (glass substrate)

11, 24, 34‧‧‧ semiconductor substrate

12, 32‧‧‧ peeling layer

13, 21, 25, 33‧‧‧continued

20‧‧‧ support member

22, 35‧‧‧Semiconductor wafer

23‧‧‧sealing material

28‧‧‧ Wiring

29‧‧‧solder bump

36‧‧‧Grinding device

37‧‧‧UV

41‧‧‧Support

42‧‧‧ pad

43‧‧‧board

44‧‧‧ surface potentiometer

45‧‧‧air gun

FIG. 1 is a conceptual perspective view showing an example of a multilayer substrate of the present invention.

FIG. 2A is a conceptual cross-sectional view showing a manufacturing process of a fan out WLP.

FIG. 2B is a conceptual cross-sectional view showing a manufacturing process of a fan out WLP.

FIG. 2C is a conceptual cross-sectional view showing a manufacturing process of a fan out WLP.

FIG. 2D is a conceptual cross-sectional view showing a manufacturing process of a fan out WLP.

FIG. 2E is a conceptual cross-sectional view showing a manufacturing process of a fan out WLP.

FIG. 2F is a conceptual cross-sectional view showing a manufacturing process of a fan out WLP.

2G is a conceptual cross-sectional view showing a manufacturing process of a fan out WLP.

FIG. 3A is a conceptual cross-sectional view showing a step of reducing the thickness of a semiconductor substrate by using a supporting glass substrate for a semiconductor for a back-polished substrate.

3B is a conceptual cross-sectional view showing a step of reducing the thickness of a semiconductor substrate by using a supporting glass substrate for a semiconductor for a back-polished substrate.

FIG. 3C is a conceptual cross-sectional view showing a step of reducing the thickness of a semiconductor substrate by using a supporting glass substrate for a semiconductor for back-polishing a substrate.

FIG. 3D is a conceptual cross-sectional view showing a step of reducing the thickness of a semiconductor substrate by using a supporting glass substrate for semiconductors for a back-polished substrate.

FIG. 3E is a conceptual cross-sectional view showing a step of reducing the thickness of a semiconductor substrate by using a supporting glass substrate for a semiconductor for a back-polished substrate.

FIG. 4A is an explanatory diagram illustrating a device used for measurement of a charge amount, and is an explanatory diagram illustrating a state where a glass substrate is placed.

FIG. 4B is an explanatory diagram illustrating a device used for measurement of a charge amount, and is an explanatory diagram illustrating a state in which a glass substrate and a stage are brought into close contact.

The support glass substrate for a semiconductor of the present invention has a rough surface on at least one surface. The surface roughness Ra of the roughened region is 0.3 nm or more, preferably 0.5 nm or more, more preferably 0.8 nm or more, and even more preferably 1.0 nm to 8.0 nm. If the surface roughness Ra is too small, it becomes difficult to reduce the amount of charge in the supporting glass substrate. On the other hand, if the surface roughness Ra is too large, the processing time of the roughening process becomes long, and the manufacturing cost of the supporting glass substrate tends to increase.

The surface roughness Rmax of the roughened region is 100 nm or less, preferably 80 nm or less, more preferably 50 nm or less, and even more preferably 30 nm or less. If the surface roughness Rmax is too large, micro cracks will occur in the supporting glass substrate, and the strength of the supporting glass substrate will tend to decrease.

It is preferable that the roughened region of the support glass substrate for a semiconductor of the present invention is formed by a chemical agent. That is, it is preferable to form a roughened region by chemical treatment. Thereby, a smooth roughened region can be formed. As a result, even when a roughened region is formed, it is easy to maintain the strength of the supporting glass substrate. From a viewpoint of roughening efficiency, an acidic aqueous solution is preferable as a chemical | medical agent. As an acid, for example, hydrofluoric acid, buffered hydrofluoric acid (BHF), hydrochloric acid, nitric acid, and sulfuric acid are preferable.

As the roughening treatment, it is preferred that the surface of the supporting glass substrate be subjected to a polishing treatment and then a chemical treatment. That is, it is preferable to increase the surface roughness of the surface of the supporting glass substrate by polishing, and then reduce the microcracks existing in the polished surface by chemical treatment. This can maintain the strength and shorten the processing time of the roughening process. In this case, in addition to an acidic aqueous solution, an alkaline aqueous solution may be used as a medicine. For example, an aqueous potassium hydroxide solution or an aqueous sodium hydroxide solution may be used.

Various methods can be used as a method of chemical treatment. Among them, from the viewpoints of safety and manufacturing efficiency, a method of applying a chemical to a glass surface using a roller impregnated with the chemical, and protecting the glass with a resist film are preferred. A method in which a glass substrate is immersed in a chemical after a part of the surface.

In addition, in the semiconductor support glass substrate of the present invention, it is also preferable that the roughened region is formed by a reactive gas. That is, it is also preferable to form a roughened region by a reactive gas. Thereby, the roughening process can be performed safely only by controlling the flow of the reactive gas without scattering the medicine. As the reactive gas, various gases can be used. Among them, a gas containing F such as CF ₄ or SF ₆ or a gas containing Cl such as SiCl _{4 is} preferably used as the gas source to generate the reactive gas through the atmospheric piezoelectric slurry process. . Furthermore, it is preferable that an inert carrier gas such as He or Ar is blown onto the glass surface in addition to the reactive gas in the atmospheric piezoelectric slurry manufacturing process.

The semiconductor support glass substrate of the present invention is also preferably such that the roughened region is formed by polishing. That is, it is also preferable to form a roughened region by polishing. It is particularly preferable to form a roughened region on both the first surface and the second surface by arc-shaped abrasive damage. As a result, variations in overall plate thickness can be reduced, and roughening can be performed safely.

It is preferable that the roughened region of the supporting glass substrate for a semiconductor of the present invention is formed on the second surface. This makes it possible to reduce the amount of charge in the supporting glass substrate even if the contacting and peeling of the supporting glass substrate and the lithographic plate is repeated. Furthermore, if a roughened region is formed on the first surface, it is easy to reduce the amount of charge in the supporting glass substrate when the semiconductor substrate is peeled off, but it is not necessary to form a roughened region on the first surface. Not in When a roughened region is formed on one surface, the semiconductor substrate can be stably supported.

In the supporting glass substrate for a semiconductor of the present invention, it is preferable that the roughened region is 5% or more, 10% or more, 30% or more, 50% or more, 80% or more, in terms of area ratio, on the second surface. The entire surface is formed. This makes it easy to reduce the amount of charge in the supporting glass substrate when brought into contact with the lithographic plate.

It is also preferable that the roughened region is formed on the first surface in an area ratio of 5% or more, 10% or more, 30% or more, 50% or more, and particularly preferably 80% or more. This makes it easy to reduce the amount of charge in the supporting glass substrate when the semiconductor substrate is peeled.

The average thermal expansion coefficient in the temperature range of 20 ° C to 260 ° C is preferably increased when the proportion of the semiconductor wafer in the semiconductor substrate is small and the proportion of the sealing material is high. On the contrary, it is preferably in the semiconductor substrate. When the proportion of the semiconductor wafer is large and the proportion of the sealing material is small, it is reduced.

When the average thermal expansion coefficient in a temperature range of 20 ° C to 260 ° C is to be limited to 0 × 10 ^-7 / ° C or more and less than 50 × 10 ^-7 / ° C, the supporting glass substrate is preferably mass%. Based on SiO ₂ 55% ~ 75%, Al ₂ O ₃ 15% ~ 30%, Li ₂ O 0.1% ~ 6%, Na ₂ O + K ₂ O 0% ~ 8%, MgO + CaO + SrO + BaO 0% ~ 10% or containing SiO ₂ 55% ~ 75%, Al ₂ O ₃ 10% ~ 30%, Li ₂ O + Na ₂ O + K ₂ O 0% ~ 0.3%, MgO + CaO + SrO + BaO 5 % ~ 20% as glass composition. When it is desired to limit the average thermal expansion coefficient in the temperature range of 20 ° C to 260 ° C to 50 × 10 ^-7 / ° C or more and less than 70 × 10 ^-7 / ° C, the supporting glass substrate is preferably in mass%. Based on SiO ₂ 55% ~ 75%, Al ₂ O ₃ 3% ~ 15%, B ₂ O ₃ 5% ~ 20%, MgO 0% ~ 5%, CaO 0% ~ 10%, SrO 0% ~ 5 %, BaO 0% ~ 5%, ZnO 0% ~ 5%, Na ₂ O 5% ~ 15%, K ₂ O 0% ~ 10% as the glass composition, more preferably containing SiO ₂ 64% ~ 71%, Al ₂ O ₃ 5% ~ 10%, B ₂ O ₃ 8% ~ 15%, MgO 0% ~ 5%, CaO 0% ~ 6%, SrO 0% ~ 3%, BaO 0% ~ 3%, ZnO 0% ~ 3%, Na ₂ O 5% ~ 15%, K ₂ O 0% ~ 5% as glass composition. When it is desired to limit the average thermal expansion coefficient in a temperature range of 20 ° C to 260 ° C to 70 × 10 ^-7 / ° C or more and 85 × 10 ^-7 / ° C or less, the supporting glass substrate is preferably mass%. It contains SiO ₂ 60% ~ 75%, Al ₂ O ₃ 5% ~ 15%, B ₂ O ₃ 5% ~ 20%, MgO 0% ~ 5%, CaO 0% ~ 10%, SrO 0% ~ 5% , BaO 0% ~ 5%, ZnO 0% ~ 5%, Na ₂ O 7% ~ 16%, K ₂ O 0% ~ 8% as glass composition, more preferably containing SiO ₂ 60 ~ 68%, Al ₂ O ₃ 5% ~ 15%, B ₂ O ₃ 5% ~ 20%, MgO 0% ~ 5%, CaO 0% ~ 10%, SrO 0% ~ 3%, BaO 0% ~ 3%, ZnO 0% ~ 3 %, Na ₂ O 8% ~ 16%, K ₂ O 0% ~ 3% as glass composition. When it is desired to limit the average thermal expansion coefficient in the temperature range of 20 ° C to 260 ° C to more than 85 × 10 ^-7 / ° C and 120 × 10 ^-7 / ° C or less, the supporting glass substrate is preferably in mass%. Based on SiO ₂ 55% ~ 70%, Al ₂ O ₃ 3% ~ 13%, B ₂ O ₃ 2% ~ 8%, MgO 0% ~ 5%, CaO 0% ~ 10%, SrO 0% ~ 5 %, BaO 0% to 5%, ZnO 0% to 5%, Na ₂ O 10% to 21%, and K ₂ O 0% to 5% were used as the glass composition. When it is desired to limit the average thermal expansion coefficient in a temperature range of 20 ° C to 260 ° C to more than 120 × 10 ^-7 / ° C and 165 × 10 ^-7 / ° C or less, the supporting glass substrate is preferably mass%. Based on SiO ₂ 53% ~ 65%, Al ₂ O ₃ 3% ~ 13%, B ₂ O ₃ 0% ~ 5%, MgO 0.1% ~ 6%, CaO 0% ~ 10%, SrO 0% ~ 5 %, BaO 0% ~ 5%, ZnO 0% ~ 5%, Na ₂ O + K ₂ O 20% ~ 40%, Na ₂ O 12% ~ 21%, K ₂ O 7% ~ 21% as glass composition. This makes it easy to limit the coefficient of thermal expansion to a desired range, and improves the devitrification resistance. Therefore, it is easy to form a supporting glass substrate with a small variation in overall plate thickness. In addition, "Na ₂ O + K ₂ O" means the total amount of Na ₂ O and K ₂ O. "MgO + CaO + SrO + BaO" means the total amount of MgO, CaO, SrO, and BaO.

In the supporting glass substrate for a semiconductor of the present invention, the content of the alkali component in the glass composition is preferably 15% by mass or less, 10% by mass or less, and 5% by mass or less, and more preferably less than 0.5% by mass. The smaller the content of the alkali component in the glass composition, the more difficult it is to release static electricity in the atmosphere, and the more easily the charged amount in the supporting glass substrate increases, the effect of the present invention is relatively large. In addition, when the content of the alkali component in the glass composition is small, from the viewpoint of reducing the amount of charge, in addition to the roughening treatment described above, it is preferable to combine a static elimination treatment by an ionizer.

The higher the thermal expansion coefficient of the supporting glass substrate, the greater the difference in thermal expansion coefficient between the supporting glass substrate and the lithographic plate, and the more easily the friction between the supporting glass substrate and the lithographic plate caused by the thermal process becomes larger. This makes it easy to increase the amount of charge in the supporting glass substrate, so the effect of the present invention is relatively large. In addition, when the thermal expansion coefficient of the supporting glass substrate is high (for example, when the average thermal expansion coefficient of the supporting glass substrate at 20 ° C to 260 ° C is 50 × 10 ^-7 / ° C or higher), the viewpoint of reducing the amount of charge is considered. In addition, in addition to the said roughening process, it is preferable to combine a static elimination process by a dissociator.

In the supporting glass substrate for a semiconductor of the present invention, the overall plate thickness deviation is preferably 3.0 μm or less, less than 2.0 μm, 1.5 μm or less, and 1.0 μm or less, and more preferably 0.1 μm to less than 1.0 μm. The smaller the overall plate thickness deviation, the easier it is to increase the Work accuracy. In particular, since wiring accuracy can be improved, high-density wiring can be realized. In addition, the strength of the supporting glass substrate is improved, and the supporting glass substrate and the laminated substrate are less likely to be damaged. Further, the number of reuses of the supporting glass substrate can be increased.

The support glass substrate for a semiconductor of the present invention is preferably formed by polishing the surface in order to reduce the variation in overall plate thickness to less than 2.0 μm, 1.5 μm or less, 1.0 μm or less, especially less than 1.0 μm. As a method of polishing treatment, various methods may be adopted. It is preferable to sandwich the two surfaces of the glass substrate with a pair of polishing pads, while rotating the glass substrate and the pair of polishing pads together, and polishing the glass substrate while facing the glass substrate. A method of applying arc-shaped abrasive damage to both surfaces of a glass substrate. Furthermore, it is preferable that the outer diameters of the pair of polishing pads are different, and it is preferable to perform a polishing treatment so that a part of the glass substrate is intermittently exposed from the polishing pad during polishing, and to give arc-shaped polishing to both surfaces of the glass substrate damage. This makes it easy to reduce the variation in overall plate thickness, and also makes it easy to reduce the amount of warpage. In the polishing process, the polishing depth is not particularly limited, and the polishing depth is preferably 50 μm or less, 30 μm or less, 0.01 μm to 20 μm, and particularly preferably 0.1 μm to 10 μm. The smaller the polishing depth, the higher the productivity of the glass substrate.

The supporting glass substrate for a semiconductor of the present invention may have a rectangular shape, preferably a wafer shape (substantially perfect circular shape), and its diameter is preferably 100 mm or more and 500 mm or less, and particularly preferably 150 mm or more and 450 mm or less. Thereby, it becomes easy to apply to the manufacturing steps of the semiconductor package. In this case, the roundness (excluding the notch portion) of the supporting glass substrate is preferably 1 mm or less, 0.1 mm or less, and 0.05 mm or less, and particularly preferably 0.03 mm or less. The smaller the roundness, the easier it is to apply to semiconductor packages. Manufacturing steps. The definition of roundness is a value obtained by subtracting the minimum value from the maximum value of the outer diameter of the supporting glass substrate.

In the supporting glass substrate for a semiconductor of the present invention, the plate thickness is preferably less than 2.0 mm, 1.5 mm or less, 1.2 mm or less, 1.1 mm or less, and 1.0 mm or less, and particularly preferably 0.9 mm or less. The thinner the plate thickness, the lighter the mass of the laminated substrate, and therefore, the operability is improved. On the other hand, when the plate thickness is too thin, the strength of the supporting glass substrate itself decreases, and it becomes difficult to perform the function as a supporting substrate. Therefore, the plate thickness is preferably 0.1 mm or more, 0.2 mm or more, 0.3 mm or more, 0.4 mm or more, 0.5 mm or more, and 0.6 mm or more, and more preferably more than 0.7 mm.

The amount of warpage is preferably 60 μm or less, 55 μm or less, 50 μm or less, 1 μm to 45 μm, and particularly preferably 5 μm to 40 μm. The smaller the amount of warpage, the easier it becomes to improve the accuracy of processing. In particular, since wiring accuracy can be improved, high-density wiring can be realized.

It is preferable that the support glass substrate for semiconductors of this invention has a notch part (positioning part) in a part of the outer periphery of a support glass substrate. Thereby, a positioning member such as a positioning pin is brought into contact with the cutout portion of the supporting glass substrate, and it becomes easy to fix the position of the supporting glass substrate. As a result, it becomes easy to align the semiconductor substrate with the supporting glass substrate. Furthermore, if a notch is also formed on the semiconductor substrate and the positioning member is brought into contact therewith, the alignment of the semiconductor substrate and the supporting glass substrate becomes easier.

It is preferable that the notched portion be chamfered. That is, it is preferable to form a chamfered part in a notch part. Furthermore, it is preferable that the surface of the notch portion be etched with a chemical agent to remove minute damage. Thereby, it becomes easy to prevent the supporting glass substrate from coming out of the notched portion. Damaged condition. Moreover, the preferred medicaments are as described above.

In the supporting glass substrate for a semiconductor of the present invention, it is preferable that the end face (except for the notch portion) be chamfered. That is, it is preferable to form a chamfered part on the end surface. Furthermore, it is preferable to remove the minute damage by etching the surface of the end surface with an acid. This makes it easy to prevent the support glass substrate from being damaged from the end surface. Moreover, the preferred medicaments are as described above.

From the viewpoint of reducing the amount of warpage, the supporting glass substrate for a semiconductor of the present invention is preferably not subjected to a chemical strengthening treatment. That is, from the viewpoint of reducing the amount of warpage, it is preferable that the surface does not have a compressive stress layer.

The supporting glass substrate for a semiconductor of the present invention is preferably formed by a down-draw method, particularly an overflow down-draw method. The overflow down-draw method is a method in which molten glass overflows from both sides of a heat-resistant groove-like structure, while the overflowing molten glass merges at the lower end of the groove-like structure, and is extended and formed below to manufacture a glass substrate. In the overflow down-draw method, the surface that should be the surface of the glass substrate does not contact the groove-like structure, and is formed in a free surface state. Therefore, it becomes easy to produce a glass substrate with a small plate thickness, and the overall plate thickness deviation can be reduced to less than 2.0 μm, especially less than 1.0 μm, with a small amount of polishing or without polishing treatment. As a result, the glass substrate can be reduced Manufacturing costs. In addition, the structure or material of the trench-like structure is not particularly limited as long as it can achieve the required size or surface accuracy. Moreover, the method of applying a force is also not specifically limited when performing extension molding downward. For example, a method may be adopted in which a heat-resistant roll having a sufficiently large width is rotated and extended while being in contact with glass, or a plurality of pairs of heat-resistant rolls may be brought into contact with only the vicinity of the end face of the glass ribbon. And the extended method.

As a method for forming the glass substrate, in addition to the overflow down-draw method, for example, a hole down-draw method, a retraction method, and a float method may be adopted.

After the support glass substrate for a semiconductor of the present invention is formed by an overflow down-draw method, the entire surface of the first surface and the second surface is preferably polished. This makes it easy to limit the variation in overall plate thickness to less than 2.0 μm, 1.5 μm or less, 1.0 μm or less, and particularly 0.1 μm to less than 1.0 μm.

The multilayer substrate of the present invention is characterized in that it includes at least a semiconductor substrate and a semiconductor support glass substrate for supporting the semiconductor substrate, and the semiconductor support glass substrate is the aforementioned support glass substrate for a semiconductor. Here, the technical features (preferred structure and effect) of the multilayer substrate of the present invention overlap with those of the supporting glass substrate for a semiconductor of the present invention. Therefore, detailed descriptions of the overlapping portions are omitted in this specification.

The multilayer substrate of the present invention is preferably a support glass substrate for semiconductors having an average thermal expansion coefficient of 50 × 10 ^-7 / ° C or higher at 20 ° C. to 260 ° C., and the semiconductor substrate includes at least a semiconductor wafer molded with a sealing material. As a result, the thermal expansion coefficients of the supporting glass substrate and the semiconductor substrate tend to be the same, and can be preferably applied to the manufacturing steps of a fan-out WLP.

The multilayer substrate of the present invention is also preferably such that the supporting glass substrate for semiconductor is alkali-free glass, and the semiconductor substrate includes a silicon wafer. As a result, the thermal expansion coefficients of the supporting glass substrate and the semiconductor substrate tend to be the same, which is preferable for the step of reducing the thickness of the semiconductor substrate by using the supporting glass substrate for the back surface polishing substrate.

The multilayer substrate of the present invention preferably has an adhesive layer between the semiconductor substrate and the supporting glass substrate. The adhesive layer is preferably a resin, and for example, a thermosetting resin, a photocurable resin (particularly, an ultraviolet curable resin), and the like are preferable. Moreover, it is preferable that it has heat resistance which can endure the heat processing in the manufacturing process of a semiconductor package. Thereby, the bonding layer is not easily melted in the manufacturing step of the semiconductor package, and the accuracy of processing can be improved.

The multilayer substrate of the present invention preferably further has a release layer between the semiconductor substrate and the support glass substrate, more specifically between the semiconductor substrate and the adhesive layer, or a release layer between the support glass substrate and the adhesive layer. This makes it easy to peel the semiconductor substrate from the support glass substrate after a predetermined processing is performed on the semiconductor substrate. From the viewpoint of productivity, peeling of the semiconductor substrate is preferably performed by irradiation with light such as laser light.

The release layer includes a material that causes "in-layer peeling" or "interface peeling" by irradiating light such as laser light. That is, it includes materials that, when a certain intensity of light is irradiated, the bonding force between atoms or molecules in an atom or a molecule disappears or decreases, and ablation or the like occurs and peeling occurs. Furthermore, the components contained in the peeling layer may be released as a gas to be separated by irradiation with the irradiation light, and the vapor may be released to be separated by absorbing the light and becoming a gas.

In the multilayer substrate of the present invention, the supporting glass substrate is preferably larger than the semiconductor substrate. Thereby, when the semiconductor substrate and the support glass substrate are supported, even when the center positions of the two are slightly separated, the edges of the semiconductor substrate are not easily exposed from the support glass substrate.

The present invention will be further described with reference to the drawings.

FIG. 1 is a conceptual perspective view showing an example of a multilayer substrate 1 according to the present invention. In FIG. 1, the multilayer substrate 1 includes a semiconductor support glass substrate 10 and a semiconductor substrate 11. The semiconductor support glass substrate 10 is adhered to the semiconductor substrate 11 in order to prevent the dimensional change of the semiconductor substrate 11. A release layer 12 and an adhesive layer 13 are disposed between the semiconductor support glass substrate 10 and the semiconductor substrate 11. The peeling layer 12 is in contact with the semiconductor support glass substrate 10, and the subsequent layer 13 is in contact with the semiconductor substrate 11.

As can be seen from FIG. 1, the laminated substrate 1 is a semiconductor supporting glass substrate 10, a peeling layer 12, an adhesive layer 13, and a semiconductor substrate 11 which are laminated in this order. The shape of the supporting glass substrate 10 for a semiconductor is determined based on the semiconductor substrate 11. In FIG. 1, the shapes of the supporting glass substrate 10 for a semiconductor and the semiconductor substrate 11 are both approximately circular plate shapes. In addition to the amorphous silicon (a-Si), the release layer 12 may be made of silicon oxide, a silicic acid compound, silicon nitride, aluminum nitride, titanium nitride, or the like. The release layer 12 is formed by plasma chemical vapor deposition (CVD), spin coating using a sol-gel method, or the like. The adhesive layer 13 includes a resin, and is formed by, for example, coating by various printing methods, inkjet methods, spin coating methods, roll coating methods, and the like. After the subsequent layer 13 is peeled from the semiconductor support glass substrate 10 from the semiconductor substrate 11 by the peeling layer 12, it is dissolved and removed by a solvent or the like.

FIG. 2 is a conceptual cross-sectional view showing a manufacturing process of a fan out WLP. FIG. 2A shows a state where the adhesive layer 21 is formed on one surface of the support member 20. If necessary, a release layer may be formed between the support member 20 and the adhesive layer 21. Then, as shown in FIG. 2B, a plurality of semiconductor wafers 22 are attached on the bonding layer 21. At this time, the active side surface of the semiconductor wafer 22 is brought into contact with the adhesive layer 21. Then, as shown in FIG. 2C, the semiconductor wafer 22 is molded with a resin sealing material 23. As the sealing material 23, a material having less dimensional change after compression molding and less dimensional change during wiring molding is used. Next, as shown in FIGS. 2D and 2E, the semiconductor wafer 22 is separated from the self-supporting member 20 and the molded semiconductor substrate 24 is then fixed to the semiconductor support glass substrate 26 via the adhesive layer 25. At this time, a surface on the opposite side of the surface of the semiconductor substrate 24 from the surface on the side where the semiconductor wafer 22 is buried is arranged on the semiconductor support glass substrate 26 side. Here, a roughened region is formed by an atmospheric piezoelectric slurry process (gas source CF ₄ , carrier gas Ar) on the surface of the support glass substrate 26 for semiconductors which is opposite to the surface contacting the bonding layer 25 side. Thereby, a laminated substrate 27 can be obtained. Moreover, if necessary, a peeling layer may be formed between the adhesive layer 25 and the support glass substrate 26 for semiconductors. Further, after the obtained laminated substrate 27 is transported, as shown in FIG. 2F, after wiring 28 is formed on the surface of the semiconductor substrate 24 on the side where the semiconductor wafer 22 is buried, a plurality of solder bumps 29 are formed. Finally, after the semiconductor substrate 24 is separated from the support glass substrate 26 for semiconductors, the semiconductor substrate 24 is cut according to the semiconductor wafer 22 and used for the subsequent packaging step (FIG. 2G).

FIG. 3 is a conceptual cross-sectional view showing a step of reducing the thickness of a semiconductor substrate by using a supporting glass substrate for a semiconductor for a back surface polishing substrate. FIG. 3A shows a multilayer substrate 30. The multilayer substrate 30 includes a semiconductor support glass substrate 31, a peeling layer 32, an adhesive layer 33, and a semiconductor substrate (silicon wafer) 34 in this order. The surface of the supporting glass substrate 31 for semiconductors which is opposite to the surface contacting the bonding layer 34 is a surface on the opposite side, and a roughened region is formed by a chemical treatment with an acid aqueous solution. For semiconductor substrate 34 A plurality of semiconductor wafers 35 are formed on the surface in contact with the adhesive layer 33 by a photolithography method or the like. FIG. 3B shows a step of reducing the thickness of the semiconductor substrate 34 by the polishing device 36. By this step, the semiconductor substrate 34 is mechanically polished and thinned to, for example, several tens of μm. FIG. 3C shows a step of irradiating the peeling layer 32 with ultraviolet light 37 through the support glass substrate 31 for a semiconductor. Through this step, as shown in FIG. 3D, the semiconductor support glass substrate 31 can be separated. The separated support glass substrate 31 for a semiconductor can be reused as needed. FIG. 3E shows a step of removing the bonding layer 33 from the semiconductor substrate 34. Through this step, the thinned semiconductor substrate 34 can be selected.

[Example]

Hereinafter, the present invention will be described based on examples. The following examples are merely examples. The present invention is not limited in any way by the following examples.

Table 1 shows Examples (Sample No. 1 to Sample No. 4) and Comparative Examples (Sample No. 5 and Sample No. 6) of the present invention.

<Preparation of Sample No. 1>

First, a glass batch prepared with glass raw materials was put into a platinum crucible so as to have a glass composition in the table, and then melted, clarified, and homogenized at 1500 ° C to 1600 ° C for 24 hours. When melting the glass batch, it was homogenized by stirring using a platinum stirrer. Next, the molten glass was allowed to flow out onto a carbon plate, and after it was formed into a plate shape, it was gradually cooled at a temperature near the slow cooling point for 30 minutes.

Then, the obtained glass substrate was cut and processed to a thickness of 300 mm × 300 mm × 0.8 mm, and then both surfaces thereof were polished by a polishing apparatus. Specifically, both surfaces of the glass substrate are sandwiched between a pair of polishing pads having different outer diameters, and The glass substrate is rotated together with a pair of polishing pads, and both surfaces facing the glass substrate are subjected to polishing treatment, and both surfaces of the glass substrate are subjected to arc-shaped polishing damage. During the polishing process, control is performed so that a part of the glass substrate is occasionally exposed from the polishing pad. The polishing pad was made of urethane, and the average particle diameter of the polishing slurry used in the polishing treatment was 2.5 μm, and the polishing rate was 15 m / minute. With respect to each of the obtained polished glass substrates, the overall plate thickness deviation and warpage were measured with a Bow / Warp measuring device SBW-331ML / d manufactured by Kobelco Scientific Corporation. As a result, the overall plate thickness deviation was 0.65 μm, and the warpage amounts were 35 μm, respectively.

Furthermore, the glass substrate after the polishing treatment was masked in a grid pattern with a polyimide tape, and then immersed in a 10 mass% HCl aqueous solution at 50 ° C. for 1 hour to perform a chemical treatment on the surface of the glass substrate. Then, the glass substrate after the chemical treatment was washed with water, the polyimide tape was peeled off, washed again with water, and dried.

<Preparation of Sample No. 2>

First, a glass batch prepared with glass raw materials was put into a platinum crucible so as to have a glass composition in the table, and then melted, clarified, and homogenized at 1500 ° C to 1600 ° C for 24 hours. When melting the glass batch, it was homogenized by stirring using a platinum stirrer. Next, the molten glass was allowed to flow out onto a carbon plate, and after it was formed into a plate shape, it was gradually cooled at a temperature near the slow cooling point for 30 minutes.

Then, the obtained glass substrate was cut and processed to have a thickness of Φ300 mm × 0.8 mm, and then both surfaces thereof were mirror-polished. Then, both surfaces of the glass substrate were chemically treated by being immersed in a 5 mass% potassium hydroxide aqueous solution at 50 ° C for 1 hour. Then, after the chemical treatment, the glass substrate was washed with water and dried.

<Preparation of Sample No. 3>

First, a glass batch prepared with glass raw materials was put into a continuous melting furnace so as to have a glass composition in the table, and then melted, clarified, and homogenized at 1500 ° C to 1600 ° C for 24 hours. Then, a glass substrate is formed by an overflow down-draw method.

Then, the obtained glass substrate was cut and processed into a thickness of Φ300 mm × 0.7 mm, and then both surfaces thereof were polished by a polishing apparatus. Specifically, the two surfaces of the glass substrate are sandwiched by a pair of polishing pads having different outer diameters, while the glass substrate and the pair of polishing pads are rotated together, and the two surfaces facing the glass substrate are polished, and the glass substrates are polished. Both surfaces impart arc-shaped abrasive damage. During the polishing process, control is performed so that a part of the glass substrate is occasionally exposed from the polishing pad. The polishing pad was made of urethane, and the average particle diameter of the polishing slurry used in the polishing treatment was 2.5 μm, and the polishing rate was 15 m / minute. With respect to each of the obtained polished glass substrates, the overall plate thickness deviation and warpage were measured with a Bow / Warp measuring device SBW-331ML / d manufactured by Kobelco Scientific Corporation. As a result, the overall plate thickness variation was 0.45 μm, and the warpage amounts were 25 μm, respectively.

<Preparation of Sample No. 4>

First, a glass batch prepared with glass raw materials was put into a platinum crucible so as to have a glass composition in the table, and then melted, clarified, and homogenized at 1500 ° C to 1600 ° C for 24 hours. When melting the glass batch, it was homogenized by stirring using a platinum stirrer. Next, the molten glass was allowed to flow out onto a carbon plate, and after it was formed into a plate shape, it was gradually cooled at a temperature near the slow cooling point for 30 minutes.

Then, the obtained glass substrate was cut and processed to a thickness of 300 mm × 400 mm × 1.0 mm, and then both surfaces thereof were mirror-polished. Furthermore, the mirror-polished glass substrate was masked in stripes by a polyimide tape, and then an atmospheric piezoelectric slurry treatment using CF ₄ as a reactive gas and Ar as a carrier gas was performed. Then, after the atmospheric piezoelectric slurry treatment, the glass substrate was washed with water, the polyimide tape was peeled off, washed with water again, and dried.

<Preparation of Sample No. 5>

First, a glass batch prepared with glass raw materials was put into a continuous melting furnace so as to have a glass composition in the table, and then melted, clarified, and homogenized at 1500 ° C to 1600 ° C for 24 hours. Then, a glass substrate is formed by an overflow down-draw method. Then, the obtained glass substrate was cut and processed to have a thickness of φ300 mm × 0.7 mm.

<Preparation of Sample No. 6>

First, a glass batch prepared with glass raw materials was put into a continuous melting furnace so as to have a glass composition in the table, and then melted, clarified, and homogenized at 1500 ° C to 1600 ° C for 24 hours. Then, it is formed into a glass substrate by a roll out method. Then, the obtained glass substrate was cut and processed into a thickness of Φ300 mm × 0.7 mm, and then both surfaces thereof were polished by a polishing apparatus.

For each of the obtained glass substrates, the average thermal expansion coefficient α _{20 to 260} in the temperature range of 20 ° C to 260 ° C, the area of the roughened region, the surface roughness Ra, the surface roughness Rmax, the amount of charge, and the microcrack were evaluated. . The results are shown in Table 1.

The average thermal expansion coefficient α _{20 to 260} in a temperature range of 20 ° C. to 260 ° C. is a value measured by a dilatometer.

The surface roughness Ra and the surface roughness Rmax were measured using a scanning probe microscope (Dimension Icon manufactured by Bruker Corporation) in an area of 5 μm square. Specifically, the surface roughness Ra and the surface roughness Rmax were measured at 9 locations in the central area and the peripheral edge portion of the glass substrate (a portion that is approximately 50 mm from the end surface of the glass substrate), within an area of 5 μm square. Those who express their average. For samples other than Sample No. 5, the surface roughness Ra and the surface roughness Rmax were measured for the roughened area.

For the evaluation of the charge amount, a device as shown in FIGS. 4A and 4B was used. This device has the following configuration.

The support stand 41 of the glass substrate 40 includes a pad 42 made of Teflon (registered trademark) that supports the four corners of the glass substrate 40. In addition, a support plate 41 is provided with a metal aluminum plate 43 that can be raised and lowered freely. By moving the plate 43 up and down, the glass substrate 40 and the plate 43 can be brought into contact with and separated from each other to charge the glass substrate 40. Furthermore, the board 43 is grounded. A hole (not shown) is formed in the plate 43 and the hole is connected to a vacuum pump (not shown) of a diaphragm type. When the vacuum pump is driven, air is sucked in from the hole of the plate 43, so that the glass substrate 40 can be vacuum-adsorbed to the plate 43. In addition, a surface potentiometer 44 is provided at a position 10 mm above the glass substrate 40, so that the amount of charge generated in the central portion of the glass substrate 40 can be continuously measured. In addition, an air gun 45 with a diffuser is provided above the glass substrate 40, so that the charging of the glass substrate 40 can be removed. The size of the plate 43 of the device is a circle of Φ150 mm.

A method for measuring the charge amount using this device will be described. The experiment was performed in an environment of 20 ° C ± 1 ° C and humidity of 40% ± 1%. Since this charge will be affected Due to the influence of humidity in the gaseous environment and the atmosphere, it is necessary to pay special attention to humidity management.

(1) The surface of the glass substrate 40 having the roughened region is placed on the support table 41 with the lower side thereof. In addition, when both surfaces do not have a roughened area, either surface may be a lower side.

(2) The glass substrate 40 is de-energized to 10 V or less by an air gun 45 with a dissipator.

(3) The plate 43 is lifted up, brought into contact, and vacuum-adsorbed on the glass substrate 40, and the plate 43 is brought into close contact with the glass substrate 40 for 30 seconds.

(4) The glass substrate 40 is peeled by lowering the plate 43, and the amount of charge generated in the central portion of the glass substrate 40 is continuously measured by a surface potentiometer.

(5) Repeat steps (3) and (4), and perform the evaluation of the charge amount 5 times in total.

(6) Find the maximum charge amount in each measurement, and accumulate these values as the charge amount.

The microcracking was observed inside the glass substrate, and those with few microcracks were evaluated as "○", and those with a large number of microcracks were evaluated as "X".

It is clear from Table 1 that the surface roughness of the roughened region of Sample No. 1 to Sample No. 4 is appropriate, and thus the evaluation of the charge amount and the microcracks is good. From this, it is considered that Sample No. 1 to Sample No. 4 can be preferably used as a supporting glass substrate for semiconductors. On the other hand, the surface of Sample No. 5 was too smooth, so the charge amount was large. In addition, since the surface of Sample No. 6 was too rough, the evaluation of microcracking was poor.

Claims (9)

A supporting glass substrate for a semiconductor, comprising: a first surface that is a side of a laminated semiconductor substrate; and a second surface that is a surface opposite to the first surface; and a surface of the first surface and the second surface. At least one of the roughened regions has a surface roughness Ra of 0.3 nm or more and a surface roughness Rmax of 100 nm or less. The roughened region is formed on both the first surface and the second surface. The supporting glass substrate for a semiconductor according to claim 1, wherein the roughened region is formed on the second surface. The support glass substrate for a semiconductor according to item 2 of the scope of patent application, wherein the roughened region is formed on an area ratio of 5% or more on the second surface. The support glass substrate for a semiconductor according to any one of claims 1 to 3, wherein there is an arc-like grinding damage in the roughened area. The supporting glass substrate for a semiconductor according to any one of claims 1 to 3, wherein a variation in overall plate thickness is 3.0 μm or less. The supporting glass substrate for a semiconductor according to any one of claims 1 to 3, wherein the plate thickness is less than 2.0 mm and the amount of warpage is 60 μm or less. A laminated substrate includes at least a semiconductor substrate and a supporting glass substrate for a semiconductor used to support the semiconductor substrate. The laminated substrate is characterized in that the aforementioned supporting glass substrate for a semiconductor is any one of items 1 to 6 of the scope of patent application. The support glass substrate for a semiconductor according to one item. The laminated substrate according to item 7 in the scope of the patent application, wherein the average thermal expansion coefficient of the support glass substrate for semiconductors at 20 ° C to 260 ° C is 50 × 10 ^-7 / ° C or more, and the semiconductor substrate is provided with at least a sealing material. Molded semiconductor wafer. The laminated substrate according to item 7 of the scope of the patent application, wherein the support glass substrate for semiconductor is an alkali-free glass, and the semiconductor substrate includes a silicon wafer.