WO2015027608A1 - 内嵌式触摸屏、其制备方法及显示装置 - Google Patents

内嵌式触摸屏、其制备方法及显示装置 Download PDF

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Publication number
WO2015027608A1
WO2015027608A1 PCT/CN2013/088761 CN2013088761W WO2015027608A1 WO 2015027608 A1 WO2015027608 A1 WO 2015027608A1 CN 2013088761 W CN2013088761 W CN 2013088761W WO 2015027608 A1 WO2015027608 A1 WO 2015027608A1
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WIPO (PCT)
Prior art keywords
array
substrate
electrode line
nanowire
electrode
Prior art date
Application number
PCT/CN2013/088761
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English (en)
French (fr)
Inventor
张文浩
王慧
梁恒镇
Original Assignee
合肥京东方光电科技有限公司
京东方科技集团股份有限公司
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Application filed by 合肥京东方光电科技有限公司, 京东方科技集团股份有限公司 filed Critical 合肥京东方光电科技有限公司
Priority to US14/369,280 priority Critical patent/US9715294B2/en
Publication of WO2015027608A1 publication Critical patent/WO2015027608A1/zh

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Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/0412Digitisers structurally integrated in a display
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/13338Input devices, e.g. touch panels
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/136286Wiring, e.g. gate line, drain line
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/0414Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means using force sensing means to determine a position
    • G06F3/04144Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means using force sensing means to determine a position using an array of force sensing means
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2203/00Indexing scheme relating to G06F3/00 - G06F3/048
    • G06F2203/041Indexing scheme relating to G06F3/041 - G06F3/045
    • G06F2203/04103Manufacturing, i.e. details related to manufacturing processes specially suited for touch sensitive devices

Definitions

  • the present invention relates to the field of display technologies, and in particular, to an in-cell touch panel, a method of fabricating the same, and a display device. Background technique
  • composition of the touch screen it can be divided into: an add on Mode Touch Panel, an On Cell Touch Panel, and an in-cell touch panel (In Cell Touch Panel, where the in-line touch screen touches the touch screen)
  • the control electrode is embedded in the inside of the liquid crystal display, which can reduce the overall thickness of the module, and P strives for the production cost of the touch screen.
  • the in-cell touch screen can be divided into a resistive touch screen and a capacitive touch screen according to the touch method.
  • the resistive touch screen has a simple structure, low cost and high sensitivity, but the resistive touch screen is subject to its physical limitations, such as low light transmittance, and a large detection area of a high number of lines causes a processor load, and its application characteristics Make it easy to age, thus affecting the service life.
  • the capacitive touch screen supports multi-touch function, has higher light transmittance, lower overall power consumption, high contact surface hardness and long service life, but the capacitive touch screen cannot support any object touch, and can only support Material touch for skin-like skins.
  • an object of the present invention is to provide an in-cell touch panel, a preparation method thereof, and a display device for realizing a touch screen with high touch sensitivity in the case of supporting touch of an arbitrary object.
  • an embodiment of the present invention provides an in-cell touch panel including an array.
  • the substrate, the opposite substrate, and the liquid crystal layer between the array substrate and the opposite substrate further include:
  • each of the piezoelectric sensitive components comprising: a nanowire array and a spacer; wherein the nanowire array The extending direction of each of the nanowires is perpendicular to the array substrate and the opposite substrate;
  • An electrode line electrically connected to the nanowire array in the piezoelectric sensitive component, wherein the nanowire array releases a charge when the nanowire array in the piezoelectric sensitive component is deformed by the spacer extrusion The electrical signal loaded onto the electrode line changes.
  • the extending direction of the nanowires in each nanowire array is perpendicular to the array substrate and the opposite substrate;
  • the increased nanowire array and the spacer between the array substrate and the opposite substrate constitute a piezoelectric sensitive component; thus, when any object presses the touch screen to slightly change the thickness of the cartridge between the array substrate and the opposite substrate, The nanowire array is slightly deformed by the spacer pressing, and the deformed nanowire array releases the electric charge to change the electrical signal on the electrode line connected thereto, and the touch point can be located by detecting the change of the electric signal.
  • the nanowire array and the electrode line are located on a side of the array substrate facing the liquid crystal layer, and the spacer is located on the opposite substrate One side of the liquid crystal layer; or, the nanowire array and the electrode line are located on a side of the opposite substrate facing the liquid crystal layer, and the spacer is located on the array substrate facing the liquid crystal layer One side
  • the spacer in the piezoelectric sensitive component abuts the nanowire array.
  • the side of the spacer opposite the nano-array has a tip structure; or the nano-line array is not susceptible to external interference, the spacer The object is coated on the outside of the nanowire array.
  • the nanowire array, the electrode line, and the spacer are located on a side of the array substrate facing the liquid crystal layer; or a rice ray array, the electrode wire, and the spacer are located on a side of the opposite substrate facing the liquid crystal layer;
  • a spacer in the piezoelectric sensitive component is coated on the outer side of the nanowire array.
  • the electrode line includes a first electrode line and a second electrode line that are intersected, and the nanowire array in each of the piezoelectric sensitive components is located in the first The intersection of the electrode line and the second electrode line is connected to the first electrode line and the second electrode line, respectively.
  • the first electrode line extends in the same direction as the gate line in the array substrate
  • the second electrode line extends in the same direction as the data line in the array substrate.
  • the electrode line when the electrode line is located on a side of the array substrate facing the liquid crystal layer, there are two gate lines between adjacent pixel units in the array substrate, and each adjacent two columns of pixel units As a pixel unit group, sharing a data line between the two columns of pixel units; the first electrode line is located at a gap between two gate lines between the pixel units of the adjacent row; The second electrode line is located at a gap between adjacent ones of the pixel unit groups.
  • the first electrode line is disposed in the same layer as the gate line; and/or,
  • the second electrode line is disposed in the same layer as the data line.
  • an orthographic projection of the electrode line on the opposite substrate or the array substrate is covered by a pattern of a black matrix; and the black matrix is disposed on the opposite substrate or the array substrate.
  • the embodiment of the invention further provides a display device, which comprises the above-mentioned embedded touch screen provided by the embodiment of the invention.
  • the embodiment of the present invention further provides a method for preparing an in-cell touch panel, including:
  • step 14 forming a nanowire array in the via formed in step 13) such that an extension direction of each nanowire in the nanowire array is perpendicular to the array substrate;
  • the embodiment of the present invention further provides a method for preparing an in-cell touch panel, including:
  • step 23 preparing a pattern comprising a black matrix on the opposite substrate processed by step 22), the pattern of the black matrix covering the pattern of the first electrode line and the second electrode line;
  • FIG. 1 is a schematic structural diagram of an in-cell touch panel according to an embodiment of the present invention.
  • FIG. 2 is a second schematic structural diagram of an in-cell touch panel according to an embodiment of the present invention.
  • FIG. 3 is a third schematic structural diagram of an in-cell touch panel according to an embodiment of the present invention.
  • FIG. 4 is a fourth schematic structural diagram of an in-cell touch panel according to an embodiment of the present invention.
  • FIG. 5 is a schematic structural diagram of an array substrate according to Example 1 of the present invention.
  • FIG. 6 is a second structural schematic view of an array substrate in the first embodiment of the present invention.
  • 7a to 7c are respectively schematic structural views of the steps of preparing the counter opposite in the second embodiment of the present invention. detailed description
  • each film layer in the drawings do not reflect the true ratio of the array substrate or the opposite substrate, and the purpose of the present invention is only to illustrate the contents of the present invention.
  • the in-cell touch panel provided by the embodiment of the present invention, as shown in FIG. 1 to FIG. 4, includes: an array, a counter substrate 1, and a liquid crystal layer 3 between the array substrate 1 and the opposite substrate 2,
  • the method includes: a plurality of piezoelectric sensing components 4 arranged in a matrix (dot matrix) between the array substrate 1 and the opposite substrate 2, each piezoelectric sensing component 4 comprising: a nanowire array 5 and a spacer 6;
  • the extending direction of each nanowire in the nanowire array 5 is perpendicular to the array substrate 1 and the opposite substrate 2; the positional relationship between the nanowire array 5 and the spacer 6 needs to be satisfied: when the touch screen is squeezed, the nanometer The wire array 5 is deformed by the pressing of the spacer 6;
  • the electrode line 7 electrically connected to the nanowire array 5 in the piezoelectric sensitive member 4; when the nanowire array 5 in the piezoelectric sensitive member 4 is deformed by the spacer 6 to be deformed, the nanowire array 5 is released The electric charge changes the electrical signal applied to the electrode line 7.
  • the nanowire array 5 can be prepared by a conventional process, for example, using alumina, electrodeposition by electrodeposition, or coordination chemistry; or using the latest three-dimensional printing technology to prepare the nanowire array 5, And assist in the annealing process.
  • the nanowire array 5 can also be prepared by using zinc oxide or by using other materials of similar nature, which is not limited herein.
  • a plurality of nanowire arrays 5 are added between the array substrate 1 and the opposite substrate 2, and the extension direction of the nanowires in each nanowire array 5 is perpendicular to the array substrate 1 and the pair.
  • the newly added nanowire array 5 and the spacer 6 between the array substrate 1 and the opposite substrate 2 constitute the piezoelectric sensitive member 4; thus, pressing the touch screen on any object to make the array substrate 1 and the opposite direction
  • the nanowire array 5 is pressed by the spacers 6 to be slightly deformed, and the deformed nanowire array is deformed. 5 will release the electric charge to change the electrical signal on the electrode line 7 connected thereto, and the position of the touch point can be located by detecting the change of the electric signal, thereby realizing high sensitivity touch.
  • each piezoelectric sensitive component 4 The spacer 6 and the nanowire array 5 may be disposed to be in abutting structure, and the sum of the heights of the spacer 6 and the nanowire array 5 is equal to the thickness of the box between the array substrate 1 and the opposite substrate 2, as shown in FIG. 1 and 2 is shown.
  • the nanowire array 5 and the electrode line 7 may be disposed on a side of the array substrate 1 facing the liquid crystal layer 3, and the spacer 6 is disposed on a side of the opposite substrate 2 facing the liquid crystal layer 3, such as 1; or, the nanowire array 5 and the electrode line 7 may be disposed on a side of the opposite substrate 2 facing the liquid crystal layer 3, and the spacer 6 is disposed on a side of the array substrate 1 facing the liquid crystal layer 3. , as shown in picture 2.
  • the side of the spacer 6 and the nano-array 5 may be arranged as a tip structure, as shown in FIGS. 1 and 2.
  • the nanowire array 5 is slightly deformed by the spacer 6 and is pressed when the arbitrary object presses the touch screen.
  • the contact area of the spacer 6 and the nanowire array 5 is smaller, the nanowire array 5 is more susceptible to deformation, and the charge released after the nanowire array 5 is deformed is more likely to affect the electrode line 7 electrically connected thereto.
  • the output of the electrical signal the easier it is to locate the touch point, the higher the sensitivity of the touch.
  • the spacers 6 in each piezoelectric sensitive component 4 may also be coated on the outer side of the nanowire array 5, as shown in FIGS. 3 and 4. Since the nanowire array 5 is covered by the spacer 6 and is not easily disturbed by the outside, the stability of the nanowire array 5 can be ensured, and the life of the nanowire array 5 can be prolonged.
  • the nanowire array 5, the electrode lines 7, and the spacers 6 may be disposed on a side of the array substrate 1 facing the liquid crystal layer 3, as shown in FIG. 3; or, the nanowire array 5, the electrode lines 7 and the spacer 6 may also be disposed on the side of the opposite substrate 2 facing the liquid crystal layer 3; or, the nanowire array 5 and the electrode line 7 are located on the side of the array substrate 1 facing the liquid crystal layer 3, and the spacer 6 is located in the pair Oriented to the side of the substrate 2 facing the liquid crystal layer 3; or, the nanowire array 5 and the electrode line 7 are located on the side of the opposite substrate 2 facing the liquid crystal layer 3, and the spacer 6 is located on the side of the array substrate 1 facing the liquid crystal layer 3, As shown in Figure 4.
  • the spacers 6 are generally disposed at the gaps between the pixel units, A black matrix is disposed at a gap between each pixel unit for shielding the gate line, the data line, the common electrode line, and the thin film transistor to prevent light leakage of the display device, thereby forming a piezoelectric sensitivity together with the spacer 6.
  • the nanowire array 5 of the component 4 is also disposed correspondingly at the gap between the pixel units. Therefore, the newly added nanowire arrays 5 are also blocked by the existing black matrix, and no additional black matrix is needed to block the Each of the nanowire arrays 5 does not affect the aperture ratio of the display device.
  • the nanowire array 5 may be deformed by the pressing of the spacer 6, so that the touch is started. Before the detection, it is necessary to remove the influence of the deformation on the electric signal on the electrode line 7, and avoid the misjudgment caused by the original deformation of the nanowire array 5.
  • the electrode line 7 electrically connected to the nanowire array 5 in the piezoelectric sensitive component 4 may include crossover in a specific implementation.
  • the first electrode line 8 and the second electrode line 9, and the distribution density of the piezoelectric sensitive member 4 can be adjusted according to the touch precision, and the first electrode lines 8 and the second are adjusted according to the distribution density of the piezoelectric sensitive member 4.
  • the nanowire array 5 in each piezoelectric sensitive component 4 may be disposed at an intersection of the first electrode line 8 and the second electrode line 9, and electrically connected to the first electrode line 8 and the second electrode line 9, respectively.
  • the nanowire array 5 may also be disposed at other positions under the condition that the nanowire array 5 is electrically connected to both the first electrode line 8 and the second electrode line 9. Moreover, the number of the nanowire arrays 5 can be appropriately set at each of the intersections, and the number of the nanowire arrays 5 can be appropriately reduced according to the precision of the touch, which is not limited herein.
  • the position of the electrode line 7 is related to the position of the nanowire array 5, and the electrode line 7 and the nanowire array 5 are generally disposed on the same side of the substrate (the array substrate 1 or the opposite substrate 2) )on.
  • the electrode line 7 may be disposed on the side of the array substrate 1 facing the liquid crystal layer 3, or may be disposed on the side of the opposite substrate 2 facing the liquid crystal layer 3, which is not limited herein.
  • Example 1 The electrode line 7 is located on the side of the array substrate 1 facing the liquid crystal layer 3.
  • the extending direction of the first electrode line 8 may be set to be the same as the extending direction of the gate line 10 in the array substrate 1, and the extending direction of the second electrode line 9 may be set to be the same as the data line in the array. 11 extends in the same direction.
  • the electrode line 7 is located on the side of the opposite side facing the liquid crystal layer 3, the extending directions of the first electrode line 8 and the second electrode line 9 can also be set in the same manner.
  • electrical signals are input to one ends of the first electrode line 8 and the second electrode line 9, respectively, and the output of the other end signal is detected.
  • the nanowire array 5 When any object presses the touch screen to slightly change the thickness of the cell between the array substrate 1 and the opposite substrate 2, the nanowire array 5 is slightly deformed by the spacer 6 and the deformed nanowire array 5 is released.
  • the electric charge increases the value of the voltage applied to the electrode line 7 connected thereto, and therefore, the position of the contact can be determined based on whether or not the electric signals on the first electrode line 8 and the second electrode line 9 which cross each other are changed.
  • the pixel structure in the array substrate of the touch screen may adopt a dual gate structure, such as As shown in FIG. 6, in the structure, two pixel lines 101 and 102 are arranged between pixel units of adjacent rows on the array substrate, and each adjacent two columns of pixel units are set as one pixel unit group, one pixel.
  • the cell group shares a data line 11 between the two columns of pixel cells.
  • the double gate structure described above saves a portion of the data line by increasing the number of gate lines by a factor of two.
  • the first electrode line 8 can be disposed at a gap between the two gate lines 101 and 102 between the pixel units of adjacent rows, and the second electrode line can be disposed at a gap between adjacent pixel unit groups.
  • the second electrode line 9 is disposed at a gap between adjacent pixel units that do not share the data line, as shown in FIG.
  • the above-mentioned wiring method utilizes the position of a part of the data lines saved by the double-gate structure to arrange the second electrode lines, which does not occupy the opening area excessively, can ensure the aperture ratio of the touch screen to the utmost extent, and can avoid the transmission on the second electrode line.
  • the signal interferes with the signal transmitted on the data line.
  • the first electrode line 8 may be disposed in the same layer as the gate line 10; and/or, the second electrode line 9 may be disposed in the same layer as the data line 11.
  • the embodiment of the invention further provides a method for preparing the above-mentioned in-cell touch panel, which specifically includes: Forming a pattern including the gate line 10 and the first electrode line 8 on the array substrate 1;
  • a pattern including the data line 11 and the second electrode line 9 is formed on the array substrate 1 processed by the step slOl;
  • a passivation insulating layer 12 is formed on the array substrate 1 processed in step s102, as shown in FIG. 1, and is formed at the intersection of the first electrode line 8 and the second electrode line 9 at the passivation insulating layer 12.
  • the nanowire array 5 is formed in the via formed in step sl03, such that the extension direction of each nanowire in the nanowire array 5 is perpendicular to the array substrate 1;
  • a pattern of the spacers 6 corresponding to the nanowire array 5 is formed on the opposite substrate 2.
  • Example 2 The electrode line 7 is located on the side of the counter substrate 2 facing the liquid crystal layer 3.
  • the electrode line 7 is on either substrate (array)
  • the orthographic projection on the substrate 1 or the opposite substrate 2) should be covered by a pattern of a black matrix which may be disposed on the opposite substrate 2 or on the array substrate 1, for example, when the black matrix 13 is disposed at When facing the substrate 2, the orthographic projection of the electrode lines 7 on the opposite substrate 2 should generally be covered by the pattern of the black matrix 13 provided on the opposite substrate 2, as shown in Fig. 7c.
  • the electrode line 7 may be disposed between the black matrix 13 and the opposite substrate 2, or may be disposed on a side of the black matrix 13 facing the liquid crystal layer 3, where Not limited.
  • the electrode line 7 may be prepared by using a transparent conductive oxide such as indium tin oxide (ITO) or an opaque metal, which is not limited herein.
  • ITO indium tin oxide
  • an opaque metal which is not limited herein.
  • the embodiment of the present invention further provides a method for fabricating the above-mentioned in-cell touch panel, which specifically includes: s201. Forming a pattern including the first electrode line 8 and the second electrode line 9 on the opposite substrate 2, as shown in FIG. 7a ;
  • Step s201 ⁇ s204 Preparing a pattern including the black matrix 13 on the opposite substrate 2 processed through the step s202, the pattern of the black matrix 13 covering the pattern of the first electrode line 8 and the second electrode line 9, as shown in FIG. 7c; s204.
  • a pattern of the spacers 6 corresponding to the nanowire array 5 is formed on the array substrate 1.
  • the touch screen formed by steps s201 ⁇ s204 is particularly suitable for advanced super-dimensional field switch (ADS) and in-plane switch (IPS) liquid crystal display, because the common electrode lines of the two types of liquid crystal display are located on the array substrate facing the liquid crystal layer.
  • ADS advanced super-dimensional field switch
  • IPS in-plane switch
  • the electrode line 7 can be prevented from causing signal interference to the common electrode line in the liquid crystal display, and at the same time, the piezoelectric sensitive part located on the side of the opposite substrate 2 facing the liquid crystal layer 3 is closer to the touch surface, thus ensuring The touch screen has better touch sensitivity.
  • an embodiment of the present invention further provides a display device, including the above-mentioned embedded touch screen provided by the embodiment of the present invention, which may be: a mobile phone, a tablet computer, a television, a display, a notebook computer, a digital device. Any product or component that has a display function, such as a photo frame or a navigator.
  • a display device including the above-mentioned embedded touch screen provided by the embodiment of the present invention, which may be: a mobile phone, a tablet computer, a television, a display, a notebook computer, a digital device. Any product or component that has a display function, such as a photo frame or a navigator.
  • the display device reference may be made to the above embodiment of the in-cell touch panel, and the repeated description is omitted.

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  • Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Nonlinear Science (AREA)
  • Theoretical Computer Science (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Human Computer Interaction (AREA)
  • Mathematical Physics (AREA)
  • Chemical & Material Sciences (AREA)
  • Optics & Photonics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Liquid Crystal (AREA)
  • Position Input By Displaying (AREA)

Abstract

本发明公开了一种内嵌式触摸屏、其制备方法及显示装置,由于在阵列基板和对向基板之间增加了多个纳米线阵列,各纳米线阵列中纳米线的延伸方向垂直于阵列基板和对向基板;新增的纳米线阵列与位于阵列基板和对向基板之间的隔垫物组成压电敏感部件;这样,在任意物体挤压触摸屏使阵列基板和对向基板之间的盒厚发生微小变化时,纳米线阵列就会受到隔垫物挤压而发生细微形变,变形的纳米线阵列会释放电荷使与之连接的电极线上的电信号发生变化,通过检测电信号的变化就可以定位触控点的位置,从而实现高灵敏度的触控。

Description

内嵌式触摸屏、 其制备方法及显示装置 技术领域
本发明涉及显示技术领域, 尤其涉及一种内嵌式触摸屏、 其制备方法及显 示装置。 背景技术
触摸屏按照组成结构可以分为:外挂式触摸屏( Add on Mode Touch Panel )、 覆盖表面式触摸屏 ( On Cell Touch Panel )、 以及内嵌式触摸屏 ( In Cell Touch Panel 其中, 内嵌式触摸屏将触摸屏的触控电极内嵌在液晶显示屏内部, 可 以减小模组整体的厚度, P争低触摸屏的制作成本。
内嵌式触摸屏按照触控方式可以分为电阻式触摸屏和电容式触摸屏等。其 中, 电阻式触摸屏结构简单, 成本低且灵敏度高, 但电阻式触摸屏较受制于其 物理局限性, 如透光率较低, 高线数的大侦测面积会造成处理器负担, 其应用 特性使之易老化, 从而影响使用寿命。 电容式触摸屏支持多点触控功能, 拥有 更高的透光率, 更低的整体功耗, 其接触面硬度高, 使用寿命较长, 但电容式 触摸屏无法支持任意物体触控, 只能支持类皮肤的材质触控。
因此, 如何结合电阻式触摸屏和电容式触摸屏的优点, 在支持任意物体触 控的情况下实现高触控灵敏度的触摸屏,是本领域技术人员需要解决的技术问 题。 发明内容
针对以上问题, 本发明的目的是提供一种内嵌式触摸屏、 其制备方法及显 示装置, 用以实现在支持任意物体触控的情况下高触控灵敏度的触摸屏。
为了实现上述目的, 本发明实施例提供了一种内嵌式触摸屏, 包括阵列 基板、 对向基板以及位于所述阵列基板和所述对向基板之间的液晶层, 还包 括:
位于所述阵列基板和所述对向基板之间的呈矩阵排列的多个压电敏感部 件, 每个所述压电敏感部件包括: 纳米线阵列和隔垫物; 其中, 所述纳米线 阵列中各纳米线的延伸方向垂直于所述阵列基板和所述对向基板; 和
与所述压电敏感部件中的纳米线阵列电性相连的电极线,在所述压电敏感 部件中的纳米线阵列受到隔垫物挤压发生形变时, 所述纳米线阵列释放出电 荷使加载到所述电极线上的电信号发生变化。
本发明实施例提供的上述内嵌式触摸屏, 由于在阵列基板和对向基板之间 增加了多个纳米线阵列,各纳米线阵列中纳米线的延伸方向垂直于阵列基板和 对向基板; 新增的纳米线阵列与位于阵列基板和对向基板之间的隔垫物组成压 电敏感部件; 这样, 在任意物体挤压触摸屏使阵列基板和对向基板之间的盒厚 发生微小变化时, 纳米线阵列就会受到隔垫物挤压而发生细微形变, 变形的纳 米线阵列会释放电荷使与之连接的电极线上的电信号发生变化,通过检测电信 号的变化就可以定位触控点的位置, 从而实现高灵敏度的触控。
具体地,在本发明实施例提供的上述触摸屏中, 所述纳米线阵列和所述电 极线位于所述阵列基板面向所述液晶层的一侧, 所述隔垫物位于所述对向基 板面向所述液晶层的一侧; 或, 所述纳米线阵列和所述电极线位于所述对向 基板面向所述液晶层的一侧, 所述隔垫物位于所述阵列基板面向所述液晶层 的一侧;
所述压电敏感部件中的隔垫物与纳米线阵列相抵。
较佳地, 为了方便隔垫物挤压纳米线阵列发生形变, 所述隔垫物与所述纳 米阵列相抵的一侧具有尖端结构; 或者为了使纳米线阵列不易受到外界干扰, 所述隔垫物包覆在所述纳米线阵列的外侧。
具体地,在本发明实施例提供的上述触摸屏中, 所述纳米线阵列、 所述电 极线以及所述隔垫物位于所述阵列基板面向所述液晶层的一侧; 或, 所述纳 米线阵列、 所述电极线以及所述隔垫物位于所述对向基板面向所述液晶层的 一侧;
所述压电敏感部件中的隔垫物包覆在所述纳米线阵列的外侧。
进一步地,在本发明实施例提供的上述触摸屏中, 所述电极线包括交叉而 置的第一电极线和第二电极线, 各所述压电敏感部件中的纳米线阵列位于所 述第一电极线和所述第二电极线的交叉节点处, 并分别与所述第一电极线和所 述第二电极线相连。
具体地, 所述第一电极线与所述阵列基板中的栅线延伸方向相同, 所述第 二电极线与所述阵列基板中的数据线延伸方向相同。
进一步地, 当所述电极线位于所述阵列基板面向液晶层的一侧时, 在所述 阵列基板中相邻行的像素单元之间具有两条栅线, 且每相邻的两列像素单元 作为一个像素单元组, 共用一条位于该两列像素单元之间的数据线; 所述第一 电极线位于所述相邻行的像素单元之间具有的两条栅线之间的间隙处; 并且 所述第二电极线位于相邻的所述像素单元组之间的间隙处。
较佳地, 为了简化制作工艺, P争低生产成本, 所述第一电极线与所述栅线 同层设置; 和 /或,
所述第二电极线与所述数据线同层设置。
具体地, 所述电极线在所述对向基板或所述阵列基板上的正投影被黑矩阵 的图案覆盖; 所述黑矩阵设置在所述对向基板或所述阵列基板上。
本发明实施例还提供了一种显示装置, 包括本发明实施例提供的上述内 嵌式触摸屏。
针对本发明实施例提供的上述内嵌式触摸屏,本发明实施例还提供了一种 内嵌式触摸屏的制备方法, 包括:
11 )在阵列基板上形成包括栅线和第一电极线的图形;
12 )在经过步骤 11 )处理的阵列基板上形成包括数据线和第二电极线的图 形; 13 )在经过步骤 12 )处理的阵列基板上形成钝化绝缘层, 并在所述钝化绝 缘层位于所述第一电极线和所述第二电极线的交叉节点处形成过孔;
14 )在步骤 13 )形成的所述过孔内形成纳米线阵列, 使得所述纳米线阵列 中各纳米线的延伸方向垂直于所述阵列基板; 以及
15 )在对向基板上形成与所述纳米线阵列相对应的隔垫物的图形。
针对本发明实施例提供的上述内嵌式触摸屏,本发明实施例还提供了一种 内嵌式触摸屏的制备方法, 包括:
21 )在对向基板上形成包括第一电极线和第二电极线的图形;
22 )在经过步骤 21 )处理的所述第一电极线和所述第二电极线的交叉节点 处制备纳米线阵列,使得所述纳米线阵列中各纳米线的延伸方向垂直于所述对 向 反;
23 )在经过步骤 22 )处理的对向基板上制备包括黑矩阵的图形, 所述黑矩 阵的图形覆盖所述第一电极线和所述第二电极线的图形; 以及
24 )在阵列基板上形成与所述纳米线阵列相对应的隔垫物的图形。 附图说明
图 1为本发明实施例提供的内嵌式触摸屏的结构示意图之一;
图 2为本发明实施例提供的内嵌式触摸屏的结构示意图之二;
图 3为本发明实施例提供的内嵌式触摸屏的结构示意图之三;
图 4为本发明实施例提供的内嵌式触摸屏的结构示意图之四;
图 5为本发明实例一中阵列基板的结构示意图之一;
图 6为本发明实例一中阵列基板的结构示意图之二;
图 7a-图 7c分别为本发明实例二中制备对向 反的各步骤的结构示意图。 具体实施方式
下面结合附图, 对本发明实施例提供的内嵌式触摸屏、其制备方法及显示 装置的具体实施方式进行详细地说明。
附图中各膜层的形状和厚度不反映阵列基板或对向基板的真实比例, 目 的只是示意说明本发明内容。
本发明实施例提供的内嵌式触摸屏, 如图 1至图 4所示, 包括: 阵列 ^反 1、 对向基板 2、 以及位于阵列基板 1和对向基板 2之间的液晶层 3, 还包括: 位于阵列基板 1和对向基板 2之间的呈矩阵(点阵)排列的多个压电敏感 部件 4, 每个压电敏感部件 4包括: 纳米线阵列 5和隔垫物 6; 其中, 纳米线 阵列 5中各纳米线的延伸方向垂直于阵列基板 1和对向基板 2; 所述纳米线阵 列 5和隔垫物 6之间的位置关系需满足: 在触摸屏受到挤压时, 纳米线阵列 5 会受到隔垫物 6的挤压而发生形变;
与压电敏感部件 4中的纳米线阵列 5电性相连的电极线 7; 在压电敏感部 件 4中的纳米线阵列 5受到隔垫物 6挤压而发生形变时, 纳米线阵列 5释放出 电荷使加载到电极线 7上的电信号发生变化。
在具体实施时, 纳米线阵列 5可以采用传统工艺制备, 例如,采用氧化铝, 以模板法进行电沉积, 或者采用配位化学等方式; 也可以采用最新的三维打印 技术制备纳米线阵列 5, 并辅助以退火工艺。 此外, 纳米线阵列 5还可以采用 氧化锌制备, 或者采用其它相似性质的材料制备, 在此不做限定。
本发明实施例提供的上述内嵌式触摸屏,在阵列基板 1和对向基板 2之间 增加了多个纳米线阵列 5, 各纳米线阵列 5中纳米线的延伸方向垂直于阵列基 板 1和对向基板 2; 新增的纳米线阵列 5与位于阵列基板 1和对向基板 2之间 的隔垫物 6组成压电敏感部件 4; 这样, 在任意物体挤压触摸屏使阵列基板 1 和对向基板 2之间的盒厚 (即阵列基板 1和对向基板 2之间的间距)发生微小 变化时, 纳米线阵列 5就会受到隔垫物 6挤压而发生细微形变, 变形的纳米线 阵列 5会释放电荷使与之连接的电极线 7上的电信号发生变化,通过检测电信 号的变化就可以定位触控点的位置, 从而实现高灵敏度的触控。
本发明实施例提供的上述触摸屏, 在具体实施时, 各压电敏感部件 4中的 隔垫物 6与纳米线阵列 5可以设置为相抵的结构, 且隔垫物 6和纳米线阵列 5 的高度之和等于阵列基板 1和对向基板 2之间的盒厚, 如图 1和图 2所示。
具体地, 在具体实施时, 纳米线阵列 5和电极线 7可以设置在阵列基板 1 面向液晶层 3的一侧, 隔垫物 6则设置在对向基板 2面向液晶层 3的一侧,如 图 1所示; 或者, 纳米线阵列 5和电极线 7也可以设置在对向基板 2面向所述 液晶层 3的一侧, 隔垫物 6则设置在阵列基板 1面向液晶层 3的一侧, 如图 2 所示。
较佳地, 为了进一步地提高触控的灵敏度, 可以将隔垫物 6与纳米阵列 5 相抵的一侧设置为尖端结构,如图 1和图 2所示。 在任意物体挤压触摸屏使得 阵列基板 1和对向基板 2之间的盒厚发生微小变化时, 纳米线阵列 5就会受到 隔垫物 6挤压发生细微形变, 当任意物体挤压触摸屏的外力一定时, 隔垫物 6 与纳米线阵列 5的接触面积越小, 纳米线阵列 5越容易发生的形变, 则纳米线 阵列 5发生形变后释放的电荷越容易影响与其电性相连的电极线 7上输出的电 信号, 这样就越容易定位触控点, 即实现触控的灵敏度越高。
本发明实施例提供的上述触摸屏, 在具体实施时, 各压电敏感部件 4中的 隔垫物 6还可以包覆在纳米线阵列 5的外侧, 如图 3和图 4所示。 由于纳米线 阵列 5被隔垫物 6包覆不易受到外界干扰, 可以保证纳米线阵列 5的稳定性, 又能延长其寿命。
具体地, 在具体实施时, 纳米线阵列 5、 电极线 7以及隔垫物 6可以设置 在阵列基板 1面向液晶层 3的一侧, 如图 3所示; 或者, 纳米线阵列 5、 电极 线 7以及隔垫物 6也可以设置在对向基板 2面向液晶层 3的一侧; 或者, 纳米 线阵列 5和电极线 7位于阵列基板 1面向液晶层 3的一侧, 隔垫物 6位于对向 基板 2面向液晶层 3的一侧; 或者, 纳米线阵列 5和电极线 7位于对向基板 2 面向液晶层 3的一侧, 隔垫物 6位于阵列基板 1面向液晶层 3的一侧, 如图 4 所示。
并且,在显示器件中,一般都将隔垫物 6设置在各像素单元之间的间隙处, 而各像素单元之间的间隙处都设置有黑矩阵, 用于遮挡栅线、 数据线、 公共电 极线和薄膜晶体管等, 以防止显示器件漏光, 这样, 与隔垫物 6共同组成压电 敏感部件 4的纳米线阵列 5也相应地设置在各像素单元之间的间隙处, 因此, 新增的各纳米线阵列 5也会被已有的黑矩阵所遮挡,无需再额外设置黑矩阵来 遮挡各纳米线阵列 5,故新增的各纳米线阵列 5并不会影响显示器件的开口率。
较佳地, 本发明实施例提供的上述触摸屏中, 由于阵列基板 1和对向基板 2对盒后, 纳米线阵列 5可能受到隔垫物 6的挤压已经发生形变, 因此, 在开 始触控检测之前, 需要去除这部分形变对电极线 7上的电信号的影响, 避免由 于纳米线阵列 5的原始形变而产生的误判。
进一步地, 在本发明实施例提供的上述触摸屏中, 如图 5所示, 与压电敏 感部件 4中的纳米线阵列 5电性相连的电极线 7, 在具体实施时, 可以包括交 叉而置的第一电极线 8和第二电极线 9, 并且, 可以根据触控精度调整压电敏 感部件 4的分布密度, 并根据压电敏感部件 4的分布密度调整各第一电极线 8 和第二电极线 9的分布密度。 并且, 各压电敏感部件 4中的纳米线阵列 5可以 设置在第一电极线 8和第二电极线 9的交叉节点处, 并分别与第一电极线 8和 第二电极线 9电性相连; 也可以在满足纳米线阵列 5与第一电极线 8和第二电 极线 9都电性相连的条件下, 将纳米线阵列 5设置在其它位置。 而且, 可以在 每个交叉节点处都设置纳米线阵列 5, 也可以根据触控的精度适当地减少纳米 线阵列 5的数量, 在此不做限定。
在本发明实施例提供的上述触摸屏中, 电极线 7的位置与纳米线阵列 5的 位置相关, 电极线 7与纳米线阵列 5—般设置在同一侧的基板 (阵列基板 1或 对向基板 2 )上。 在具体实施时, 电极线 7可以设置在阵列基板 1面向液晶层 3的一侧, 也可以设置在对向基板 2面向液晶层 3的一侧, 在此不做限定。
下面通过两个具体的实例对本发明实施例提供的上述触摸屏中电极线的 这两种分布方式进行详细的说明。 实例一: 电极线 7位于阵列基板 1面向液晶层 3的一侧。
如图 5所示, 可以将第一电极线 8的延伸方向设置为与阵列基板 1中栅线 10的延伸方向相同, 将第二电极线 9的延伸方向设置为与阵列 ^反 1中数据线 11的延伸方向相同。当然,在电极线 7位于对向_¾ ^反 2面向液晶层 3的一侧时, 也可按照相同方式设置第一电极线 8和第二电极线 9的延伸方向。 在触控检测 时, 分别向第一电极线 8和第二电极线 9的一端输入电信号, 检测另一端电信 号的输出。在任意物体挤压触摸屏使阵列基板 1和对向基板 2之间的盒厚发生 微小变化时, 纳米线阵列 5就会受到隔垫物 6挤压发生细微形变, 变形的纳米 线阵列 5会释放电荷使与之连接的电极线 7上加载的电压值增大, 因此, 根据 相互交叉的第一电极线 8和第二电极线 9上的电信号是否变化,就可以确定触 点的位置。
较佳地, 在本发明实施例提供的上述触摸屏中, 为了能够最大限度地提高 触摸屏的开口率, 在具体实施时, 触摸屏的阵列基板中的像素结构可以采用双 栅(Dual Gate )结构, 如图 6所示, 在该结构中, 阵列基板上的相邻行的像素 单元之间具有两条栅线 101和 102, 且将每相邻的两列像素单元设置为一个像 素单元组, 一个像素单元组共用一条位于该两列像素单元之间的数据线 11。
上述这种双栅结构通过增加一倍数量的栅线, 节省出一部分数据线的位 置。这样可以在相邻行的像素单元之间具有的两条栅线 101和 102之间的间隙 处设置第一电极线 8, 可以在相邻的像素单元组之间的间隙处设置第二电极线 9, 即不共用数据线的相邻的像素单元之间的间隙处设置第二电极线 9, 如图 6 所示。上述这种布线方式利用双栅结构节省出的一部分数据线的位置布置第二 电极线, 不会过多占用开口区域, 能够最大限度的保证触摸屏的开口率, 还能 避免第二电极线上传输的信号对数据线上传输的信号产生干扰。
进一步地, 为了简化制作工艺, P争低生产成本, 可以将第一电极线 8与栅 线 10同层设置; 和 /或, 可以将第二电极线 9与数据线 11同层设置。
本发明实施例还提供了一种上述内嵌式触摸屏的制备方法, 具体包括: slOl. 在阵列基板 1上形成包括栅线 10和第一电极线 8的图形;
sl02. 在经过步骤 slOl处理的阵列基板 1上形成包括数据线 11和第二电 极线 9的图形;
sl03. 在经过步骤 sl02处理的阵列基板 1上形成钝化绝缘层 12, 如图 1 所示, 并在钝化绝缘层 12位于第一电极线 8和第二电极线 9的交叉节点处形 成过孔;
sl04. 在步骤 sl03形成的过孔内形成纳米线阵列 5, 使得所述纳米线阵列 5中各纳米线的延伸方向垂直于所述阵列基板 1 ;
sl05. 在对向基板 2上形成与所述纳米线阵列 5相对应的隔垫物 6的图形。 实例二: 电极线 7位于对向基板 2面向液晶层 3的一侧。
为了不影响触摸屏的开口率和透过率, 不论电极线 7位于阵列基板 1面向 液晶层 3的一侧, 还是位于对向基板 2面向液晶层 3的一侧, 电极线 7在任一 基板 (阵列基板 1或对向基板 2 )上的正投影应被黑矩阵的图案所覆盖, 所述 黑矩阵可设置在对向基板 2上, 也可设置在阵列基板 1上, 例如当黑矩阵 13 设置在对向基板 2上时, 电极线 7在对向基板 2上的正投影一般应被对向基板 2上设置的黑矩阵 13的图案所覆盖, 如图 7c所示。 具体地, 当黑矩阵 13设置 在对向基板 2上时, 电极线 7可以设置在黑矩阵 13与对向基板 2之间, 也可 以设置在黑矩阵 13面向液晶层 3的一侧, 在此不做限定。
在具体实施时, 电极线 7可以采用透明导电氧化物如氧化铟锡 (ITO)制备, 也可以采用不透明的金属制备, 在此不做限定。
本发明实施例还提供了一种上述内嵌式触摸屏的制备方法, 具体包括: s201. 在对向基板 2上形成包括第一电极线 8和第二电极线 9的图形, 如 图 7a所示;
s202. 在步骤 s201形成的第一电极线 8和第二电极线 9的交叉节点处制备 纳米线阵列 5, 使得所述纳米线阵列 5中各纳米线的延伸方向垂直于所述对向 基板 2, 如图 7b所示;
s203. 在经过步骤 s202处理的对向基板 2上制备包括黑矩阵 13的图形, 该黑矩阵 13的图形覆盖第一电极线 8和第二电极线 9的图形, 如图 7c所示; s204. 在阵列基板 1上形成与所述纳米线阵列 5相对应的隔垫物 6的图形。 经步骤 s201~s204形成的触摸屏特别适用于高级超维场开关 (ADS)和平面 内开关 (IPS)类液晶显示屏,由于这两类液晶显示屏的公共电极线位于阵列基板 面向液晶层的一侧, 因此, 可以避免电极线 7对液晶显示屏中的公共电极线产 生信号干扰, 同时, 位于对向基板 2面向液晶层 3的一侧的压电敏感部件更接 近触控面, 这样可以保证触摸屏具有更好的触控灵敏度。
基于同一发明构思, 本发明实施例还提供了一种显示装置, 包括本发明 实施例提供的上述内嵌式触摸屏, 该显示装置可以为: 手机、 平板电脑、 电 视机、 显示器、 笔记本电脑、 数码相框、 导航仪等任何具有显示功能的产品 或部件。 该显示装置的实施可以参见上述内嵌式触摸屏的实施例, 重复之处 不再赘述。
显然, 本领域的技术人员可以对本发明进行各种改动和变型而不脱离本发 明的精神和范围。 这样, 倘若本发明的这些修改和变型属于本发明权利要求及 其等同技术的范围之内, 则本发明也意图包含这些改动和变型在内。

Claims

权 利 要 求 书
1、 一种内嵌式触摸屏, 包括阵列基板、 对向基板以及位于所述阵列基板 和所述对向基板之间的液晶层, 其特征在于, 还包括:
位于所述阵列基板和所述对向基板之间的呈矩阵排列的多个压电敏感部 件, 每个所述压电敏感部件包括: 纳米线阵列和隔垫物; 其中, 所述纳米线 阵列中各纳米线的延伸方向垂直于所述阵列基板和所述对向基板; 和
与所述压电敏感部件中的纳米线阵列电性相连的电极线,
在所述压电敏感部件中的纳米线阵列受到隔垫物挤压发生形变时, 所述 纳米线阵列释放出电荷使加载到所述电极线上的电信号发生变化。
2、 如权利要求 1所述的触摸屏, 其特征在于, 所述纳米线阵列和所述电 极线位于所述阵列基板面向所述液晶层的一侧, 所述隔垫物位于所述对向基 板面向所述液晶层的一侧; 或, 所述纳米线阵列和所述电极线位于所述对向 基板面向所述液晶层的一侧, 所述隔垫物位于所述阵列基板面向所述液晶层 的一侧;
所述压电敏感部件中的隔垫物与纳米线阵列相抵。
3、 如权利要求 2所述的触摸屏, 其特征在于, 所述隔垫物与所述纳米阵 列相抵的一侧具有尖端结构,或者所述隔垫物包覆在所述纳米线阵列的外侧。
4、 如权利要求 1所述的触摸屏, 其特征在于, 所述纳米线阵列、 所述电 极线以及所述隔垫物位于所述阵列基板面向所述液晶层的一侧; 或, 所述纳 米线阵列、 所述电极线以及所述隔垫物位于所述对向基板面向所述液晶层的 一侧;
所述压电敏感部件中的隔垫物包覆在所述纳米线阵列的外侧。
5、 如权利要求 2-4任一项所述的触摸屏, 其特征在于, 所述电极线包括 交叉而置的第一电极线和第二电极线, 各所述压电敏感部件中的纳米线阵列 位于所述第一电极线和所述第二电极线的交叉节点处, 并分别与所述第一电极 线和所述第二电极线相连。
6、 如权利要求 5所述的触摸屏, 其特征在于, 所述第一电极线与所述阵 列基板中的栅线延伸方向相同, 所述第二电极线与所述阵列基板中的数据线 延伸方向相同。
7、 如权利要求 6所述的触摸屏, 其特征在于, 当所述电极线位于所述阵 列基板面向液晶层的一侧时, 在所述阵列基板中相邻行的像素单元之间具有 两条栅线, 且每相邻的两列像素单元作为一个像素单元组, 共用一条位于该 两列像素单元之间的数据线; 所述第一电极线位于所述相邻行的像素单元之间 具有的两条栅线之间的间隙处; 并且所述第二电极线位于相邻的所述像素单 元组之间的间隙处。
8、 如权利要求 7所述的触摸屏, 其特征在于, 所述第一电极线与所述栅 线同层设置; 和 /或,
所述第二电极线与所述数据线同层设置。
9、 如权利要求 5所述的触摸屏, 其特征在于, 所述电极线在所述对向基 板或所述阵列基板上的正投影被黑矩阵的图案覆盖; 所述黑矩阵设置在所述对 向基板或所述阵列基板上。
10、 一种显示装置, 其特征在于, 包括如权利要求 1-9任一项所述的内嵌 式触摸屏。
11、 一种内嵌式触摸屏的制备方法, 其特征在于, 包括:
11 )在阵列基板上形成包括栅线和第一电极线的图形;
12 )在经过步骤 11 )处理的阵列基板上形成包括数据线和第二电极线的图 形;
13 )在经过步骤 12 )处理的阵列基板上形成钝化绝缘层, 并在所述钝化绝 缘层位于所述第一电极线和所述第二电极线的交叉节点处形成过孔;
14 )在步骤 13 )形成的所述过孔内形成纳米线阵列, 使得所述纳米线阵列 中各纳米线的延伸方向垂直于所述阵列基板; 以及
15 )在对向基板上形成与所述纳米线阵列相对应的隔垫物的图形。
12、 一种内嵌式触摸屏的制备方法, 其特征在于, 包括:
21 )在对向基板上形成包括第一电极线和第二电极线的图形;
22 )在经过步骤 21 )处理的所述第一电极线和所述第二电极线的交叉节点 处制备纳米线阵列,使得所述纳米线阵列中各纳米线的延伸方向垂直于所述对 向 反;
23 )在经过步骤 22 )处理的对向基板上制备包括黑矩阵的图形, 所述黑矩 阵的图形覆盖所述第一电极线和所述第二电极线的图形; 以及
24 )在阵列基板上形成与所述纳米线阵列相对应的隔垫物的图形。
PCT/CN2013/088761 2013-08-28 2013-12-06 内嵌式触摸屏、其制备方法及显示装置 WO2015027608A1 (zh)

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