WO2015010428A1 - 掩膜板及液晶面板 - Google Patents

掩膜板及液晶面板 Download PDF

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Publication number
WO2015010428A1
WO2015010428A1 PCT/CN2013/089738 CN2013089738W WO2015010428A1 WO 2015010428 A1 WO2015010428 A1 WO 2015010428A1 CN 2013089738 W CN2013089738 W CN 2013089738W WO 2015010428 A1 WO2015010428 A1 WO 2015010428A1
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Prior art keywords
hole
protrusions
mask plate
size
liquid crystal
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PCT/CN2013/089738
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English (en)
French (fr)
Inventor
史大为
郭建
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Beijing BOE Optoelectronics Technology Co Ltd
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Beijing BOE Optoelectronics Technology Co Ltd
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Publication of WO2015010428A1 publication Critical patent/WO2015010428A1/zh
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    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/136227Through-hole connection of the pixel electrode to the active element through an insulation layer
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F1/00Originals for photomechanical production of textured or patterned surfaces, e.g., masks, photo-masks, reticles; Mask blanks or pellicles therefor; Containers specially adapted therefor; Preparation thereof
    • G03F1/50Mask blanks not covered by G03F1/20 - G03F1/34; Preparation thereof
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/136231Active matrix addressed cells for reducing the number of lithographic steps
    • G02F1/136236Active matrix addressed cells for reducing the number of lithographic steps using a grey or half tone lithographic process

Definitions

  • Embodiments of the present invention relate to a mask and a liquid crystal panel. Background technique
  • via holes are used to connect the drain electrode and the pixel electrode.
  • the size of the via determines the size of the drain electrode, which determines the size of the thin film transistor (TFT, Thin Fi lm Trans i s tor).
  • Reducing the via size is advantageous for reducing the size of the thin film transistor, and reducing the size of the thin film transistor can increase the aperture ratio of the pixel, thereby increasing the display brightness and reducing the power consumption of the backlight. Therefore, reducing the size of vias is important for improving display performance and saving energy.
  • via fabrication processes involve: thin film deposition, photolithography (including exposure, development, etc.) and etching (including dry etching and wet etching).
  • lithography a mask having a smooth inner arc-shaped via is used for exposure. Since the goal of the design is that the via size is as small as possible, conventional device conditions limit the further reduction in via size. For example, in terms of lithography, it is limited by the resolution of the exposure machine. Therefore, the via size of the conventional topography is often not less than 4 ⁇ m, because if it is smaller than this size, the exposure machine cannot make the photolithography. The glue is fully exposed.
  • Embodiments of the present invention provide a mask and a liquid crystal panel that can have a via having a smaller size without requiring an improvement in hardware device conditions.
  • a mask comprising a plate body, wherein the plate body is provided There is a hole in which a plurality of protrusions are formed extending from the edge of the hole toward the inside of the hole.
  • rounded corners or chamfers are formed at the top corners of the protrusions.
  • the apertures are circular apertures, the locations of the projections being centrally symmetric with respect to the center of the aperture.
  • the protrusions have the same shape and size.
  • the number of the protrusions does not exceed twelve.
  • the holes are rectangular holes, and the protrusions are uniformly distributed on any two opposite sides of the rectangular hole, and the positions of the protrusions are symmetrically distributed in the center.
  • the protrusions have the same shape and size.
  • the length of the two opposite sides of the rectangle is smaller than the length of the other two opposite sides, and the protrusions are disposed on the shorter two opposite sides.
  • the projection length of the midline 1. 0-2. 0 ⁇ ⁇ ⁇
  • a liquid crystal panel including a via hole whose edge extends toward the inside of the hole is formed with a plurality of protrusions.
  • FIG. 1 is a schematic view of a mask having a circular hole in accordance with an embodiment of the present invention
  • FIG. 2 is a schematic view of a mask having rectangular holes in accordance with an embodiment of the present invention.
  • the mask provided by the embodiment of the present invention includes a plate body 1.
  • the plate body 1 is provided with a hole, and a plurality of protrusions 2 are formed from the edge of the hole toward the inside of the hole.
  • the through hole having the convex shape can be obtained, so that the mask is on the one hand
  • the edge size 4 of the upper hole can be adapted to conventional thin film deposition, photolithography and etching equipment, for example, the light of the exposure machine can be transmitted through the gap between the plurality of protrusions, thereby being suitable for the resolution of a conventional exposure machine. Rate level.
  • the top end of the protrusion 2 inside the hole of the mask can be approximately circularly formed, and the size of the circle corresponds to the effective size 5 of the via formed in the liquid crystal panel, and the size of the via is obviously smaller than
  • the edge of the aperture of the mask is of size 4.
  • the edge size 4 is roughly equivalent to the minimum size of the hole of the smooth inner circular arc in the conventional art, and the edge size 4 can be adapted to the resolution level of the conventional exposure machine during exposure and development, and the mask of the embodiment of the present invention can be ensured at Vias were prepared under conventional equipment conditions.
  • the circular size surrounded by the bump 2 can be used as the reference size of the formed via, and the via size is obviously smaller than that in the conventional technology.
  • the size, i.e., the effective size 5 of the via formed, is reduced.
  • rounded corners or chamfers 3 are formed at the top corners of the above-mentioned respective protrusions 2.
  • the rounded corners or chamfers 3 can make the shape of the protrusions 2 after exposure and development smoother, which is beneficial to the subsequent The deposition of the pixel electrode prevents the occurrence of cracking.
  • the apertures are circular and the projections 2 are symmetrically distributed centrally with respect to the center of the aperture. This facilitates the formation of a regular pattern, which facilitates the deposition of subsequent pixel electrodes.
  • each of the projections 2 in the above embodiment has substantially the same shape and size, which facilitates the processing of the projections 2, and facilitates the formation of an approximately circular contour at the tips of the projections 2.
  • the number of the bumps 2 in the above embodiment does not exceed twelve. Since the edge dimension 4 of the hole is a relative constant value, if the number of the protrusions 2 is excessive, the size of each of the protrusions 2 and the gap between the adjacent protrusions 2 may be too small, which is disadvantageous for the protrusions. The processing of 2, and the gap between adjacent protrusions 2 is too small, which may be disadvantageous for subsequent exposure development.
  • the holes are rectangular holes, and the projections 2 are evenly distributed on any two opposite sides of the rectangle. And for example, the protrusions 2 are symmetrically distributed in the center. This facilitates the formation of regular patterns, which facilitates the deposition of subsequent pixel electrodes.
  • each of the projections 2 has substantially the same shape and size, which facilitates the processing of the projections 2.
  • the protrusions 2 are arranged on the shorter two opposite sides.
  • the top end of the projection 2 is more likely to form an approximately circular contour with the other two longer opposite sides.
  • the midline length of the protrusion 2 can be set to any value between 1. 0-2. ⁇ ⁇ ⁇ , for example, 1. 5 ⁇ ⁇ . If the center line of the bump 2 is too short, the effect of reducing the size of the via hole is not significant.
  • the minimum limit size that the via can reach is 4 ⁇ , and in various embodiments of the present invention, the minimum size of the resulting via may be less than 4 ⁇ (the minimum size is to exclude the corresponding raised centerline The resulting length is, for example, between 2. 5-4 microns.
  • the above-mentioned length of the center line of the protrusion 2 is set such that the length of the center line of the protrusion cannot exceed 2 ⁇ ⁇ , because if the center line of the protrusion 2 is too long, the size of the via hole is reduced too much, and never It is advantageous to deposit the pixel electrode in the via hole.
  • the through hole having the convex shape on the edge can be obtained, and thus the hole on the mask is formed on the one hand.
  • the edge size can be adapted to conventional thin film deposition, photolithography and etching equipment, for example, it can be applied to the level of resolution of a conventional exposure machine, and on the other hand, the size of the via hole is reduced, thereby facilitating the improvement of the liquid crystal display panel.
  • the aperture ratio in turn, enhances the display performance of the liquid crystal panel itself while reducing energy consumption.
  • an embodiment of the present invention further provides a liquid crystal panel including a via hole, and an edge of the via hole extends toward the inside of the hole to form a plurality of protrusions.
  • the circular shape of the protrusion is small, so that the smaller size of the drain electrode can be connected with a smaller size, which is advantageous for the improvement of the aperture ratio.
  • the via can be made from the mask provided in any of the above embodiments. Therefore, the liquid crystal panel to which the via is applied will increase due to the increase of the aperture ratio. Strong display performance while reducing energy consumption.

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  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Mathematical Physics (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Optics & Photonics (AREA)
  • Liquid Crystal (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)

Abstract

一种用于半导体制造技术领域的掩膜板及液晶面板,该掩膜板包括板体(1),板体(1)上设有孔,从孔的边缘向孔内部延伸形成有多个凸起(2)。液晶面板包括过孔,该过孔由该掩膜板制得。该掩膜板适用于过孔的制备,为不需要改善硬件设备条件而使过孔具有较小的尺寸而设计

Description

掩膜板及液晶面板 技术领域
本发明的实施例涉及一种掩膜板及液晶面板。 背景技术
在液晶显示器中, 过孔被用来连接漏电极和像素电极。 过孔的大小决 定了漏电极的大小, 从而决定了薄膜晶体管 (TFT, Thin Fi lm Trans i s tor ) 的大小。
减小过孔尺寸有利于降低薄膜晶体管的大小, 而降低薄膜晶体管的大 小可以提高像素的开口率, 从而可以增加显示亮度和减少背光源的功耗。 因此, 减小过孔的尺寸对于提高显示器的性能和节约能源有着重要的意义。
在常规技术中, 过孔的制备工艺涉及: 薄膜沉积、 光刻 (包括曝光、 显影等) 和刻蚀 (包括干法刻蚀和湿法刻蚀) 等工艺。 对于光刻, 在曝光 时采用具有光滑内圓弧形状过孔的掩膜板。 由于设计的目标是过孔尺寸越 小越好, 但是常规的设备条件限制了过孔尺寸的进一步缩小。 例如, 从光 刻方面而言, 其受限于曝光机的分辨率, 因此, 常规形貌的过孔尺寸往往 不能少于 4 μ ηι, 因为如果小于该尺寸的话, 曝光机便无法使光刻胶充分曝 光。
因此, 为了制备出尺寸更小的过孔, 可以考虑改善硬件设备条件。 但 是对常规的薄膜沉积、 光刻及刻蚀设备进行改进会导致成本过大; 而且, 刻蚀之后形成的过孔尺寸往往大于曝光显影工艺中对应的过孔尺寸。 由于 薄膜沉积、 刻蚀等工艺水平依赖于常规的设备硬件参数, 工艺水平提升的 难度较大, 因此在常规的工艺水平下, 刻蚀之后的过孔尺寸与曝光显影后 的过孔尺寸的差值降低效果有限。
上述原因均导致过孔的缩小遇到了瓶颈。 发明内容
本发明的实施例提供一种掩膜板及液晶面板, 能够不需要改进硬件设 备条件而使过孔具有较小的尺寸。
根据本发明的一个方面, 提供一种掩膜板, 包括板体, 所述板体上设 有孔, 其中从所述孔的边缘向孔内部延伸形成有多个凸起。
根据一实施例, 所述凸起的顶角处形成有圓角或倒角。
在一些实施例中, 所述孔为圓形孔, 所述凸起的位置相对于所述孔的 中心呈中心对称分布。
根据一实施例, 所述凸起具有相同的形状和尺寸。
根据一实施例, 所述凸起的个数不超过 12个。
在另一些实施例中, 所述孔为矩形孔, 所述凸起均勾分布在所述矩形 孔的任意两个对边上, 并且所述凸起的位置呈中心对称分布。
根据一实施例, 所述凸起具有相同的形状和尺寸。
根据一实施例, 所述矩形的两个对边的长度小于另两个对边的长度, 并且所述凸起设置在较短的两个对边上。
根据一实施例, 所述凸起的中线长度为 1. 0-2. 0 μ ηιο
根据本发明的另一方面, 提供一种液晶面板, 包括过孔, 所述过孔的 边缘向孔内部延伸形成有多个凸起。 附图说明
以下将结合附图对本发明的实施例进行更详细的说明, 以使本领域普通 技术人员更加清楚地理解本发明, 其中:
图 1为根据本发明实施例的具有圓形孔的掩膜板示意图;
图 2为根据本发明实施例的具有矩形孔的掩膜板示意图。
附图标记:
1-板体, 2-凸起, 3-圓角或倒角, 4-孔的边缘尺寸, 5-孔的有效尺寸。 具体实施方式
为使本发明的实施例的目的、 技术方案和优点更加清楚, 下面将结合本 发明实施例的附图对本发明的实施例的技术方案进行清楚、 完整的描述。 显 然, 所描述的实施例仅是本发明的一部分示例性实施例, 而不是全部的实施 例。 基于所描述的本发明的示例性实施例, 本领域普通技术人员在无需创造 性劳动的前提下所获得的所有其它实施例都属于本发明的保护范围。
除非另作定义, 此处使用的技术术语或者科学术语应当为本发明所属领 域内具有一般技能的人士所理解的通常意义。 本发明专利申请说明书以及权 利要求书中使用的 "第一"、 "第二" 以及类似的词语并不表示任何顺序、 数 量或者重要性, 而只是用来区分不同的组成部分。 同样, "一个"、 "一"或者 "该"等类似词语也不表示数量限制, 而是表示存在至少一个。 "包括 "或者 "包含" 等类似的词语意指出现该词前面的元件或者物件涵盖出现在该词后 面列举的元件或者物件及其等同,而不排除其他元件或者物件。 "上"、 "下" 等仅用于表示相对位置关系, 当被描述对象的绝对位置改变后, 则该相对位 置关系也可能相应地改变。如图 1及图 2所示, 本发明实施例所提供的掩膜 板包括板体 1 , 板体 1上设有孔, 从该孔的边缘向孔内部延伸形成有多个凸 起 2。
对于本发明实施例所提供的掩膜板而言, 由于其上的孔的边缘向内部 延伸形成有多个凸起 2 , 因此可以制得具有凸起形状的过孔, 这样一方面掩 膜板上孔的边缘尺寸 4 可以与常规的薄膜沉积、 光刻及刻蚀设备相适应, 例如可以使曝光机的光线从多个凸起之间的缝隙中透过, 从而适用于常规 曝光机的分辨率水平。 另一方面掩膜板的孔内部的凸起 2 顶端可以环绕近 似形成圓形, 而该圓形的尺寸即对应于在液晶屏中形成的过孔的有效尺寸 5 , 该过孔的尺寸显然小于所述掩膜板的孔的边缘尺寸 4。 边缘尺寸 4大致 相当于常规技术中光滑内圓弧的孔的最小尺寸, 边缘尺寸 4 可以在曝光显 影的过程中适应常规曝光机的分辨率水平, 可以保证本发明实施例的掩膜 板可以在常规设备条件下制备出过孔。 而当过孔制备完成, 再经过沉积之 后连接漏电极时, 能够以凸起 2 围成的圓形的尺寸作为所形成的过孔的参 考尺寸, 该过孔的尺寸显然小于常规技术中过孔的尺寸, 即所形成的过孔 的有效尺寸 5减小了。
如图 1及图 2可见, 在上述各个凸起 2的顶角处形成圓角或倒角 3 , 圓 角或倒角 3可以使曝光显影之后的凸起 2的形貌更加平滑, 有利于后续像 素电极的沉积, 防止断裂的发生。
在图 1所示的实施例中, 所述孔为圓形, 凸起 2相对于所述孔的中心 呈中心对称分布。 这样有利于形成规则图形, 为后续像素电极的沉积带来 便利。
例如, 上述实施例中的各个凸起 2 具有大致相同的形状和尺寸, 这样 可以方便凸起 2的加工, 并且有利于凸起 2的顶端互相环绕形成近似圓形 的轮廓。 例如, 上述实施例中凸起 2的个数不超过 12个。 由于孔的边缘尺寸 4 为一相对的定值, 如果凸起 2的个数过多, 那么每个凸起 2的尺寸和相邻 凸起 2之间的空隙可能会过小, 不利于凸起 2的加工, 并且相邻凸起 2之 间的空隙过小, 可能不利于后续的曝光显影。
作为选择, 在图 2所示的实施例中, 所述孔为矩形孔, 凸起 2均匀分 布在所述矩形的任意两个对边上。 并且例如, 凸起 2 呈中心对称分布。 这 样有利于形成规则图形, 为后续像素电极的沉积带来便利。
例如, 在图 2所示的实施例中, 各个凸起 2具有大致相同的形状和尺 寸, 这样可以方便凸起 2的加工。
如图 2所示, 当所述矩形的两个对边的长度小于另两个对边的长度时, 优选将凸起 2设置在较短的两个对边上。 这样, 凸起 2的顶端更容易与另 两个较长的对边形成近似圓形的轮廓。
在图 1 和图 2 所示的实施例中, 均可以将凸起 2 的中线长度设置为 1. 0-2. Ο μ ηι之间的任一值, 例如为 1. 5 μ ηι。 如果凸起 2的中线过短, 那么 对于过孔尺寸的缩小效果不明显。 在常规技术中, 过孔可以达到的最小极 限尺寸为 4 μ ηι, 而在本发明各实施例中, 所得到的过孔的最小尺寸可以小 于 4 μ ηι (该最小尺寸是排除相应凸起中线长度之后得到的),例如,在 2. 5-4 微米之间。此外,上述对凸起 2的中线长度的设定使得凸起的中线长度不能 超过 2 μ ηι, 这是因为如果凸起 2的中线过长, 会使得过孔尺寸减小得过多, 从而不利于在过孔中进行像素电极的沉积。
本发明实施例所提供的掩膜板, 由于其上的孔的边缘向内部延伸形成 有多个凸起, 因此可以制得边缘具有凸起形状的过孔, 这样一方面掩膜板 上孔的边缘尺寸可以与常规的薄膜沉积、 光刻及刻蚀设备相适应, 例如可 以适用于常规曝光机的分辨率的水平, 另一方面制得的过孔尺寸减小, 从 而有利于提高液晶显示面板的开口率, 进而增强了液晶面板本身的显示性 能, 同时降低了能耗。
此外, 本发明实施例还提供一种液晶面板, 其包括过孔, 该过孔的边 缘向孔内部延伸形成有多个凸起。 相较于常规技术中的光滑内圓弧的过孔, 凸起所围成的圓形的尺寸较小, 从而能够以较小的尺寸去连接尺寸较小的 漏电极, 有利于开口率的提高。 该过孔可以由上述任一项实施例提供的掩 膜板制得。 因此应用了该过孔的液晶面板, 将会因为开口率的提高, 而增 强本身的显示性能, 同时降低能耗。
以上所述, 仅为本发明的具体实施方式, 但本发明的保护范围并不局 限于此, 任何熟悉本技术领域的技术人员在本发明揭露的技术范围内, 可 轻易想到变化或替换, 这些变型和改进都应涵盖在本发明的保护范围之内。

Claims

权利要求书
1、 一种掩膜板, 包括板体, 所述板体上设有孔, 其中从所述孔的边缘 向孔内部延伸形成有多个凸起。
2、 根据权利要求 1所述的掩膜板, 其中所述凸起的顶角处形成为圓角 或倒角。
3、 根据权利要求 1或 2所述的掩膜板, 其中所述孔为圓形孔, 所述凸 起的位置相对于所述孔的中心呈中心对称分布。
4、 根据权利要求 1-3任一项所述的掩膜板, 其中各个所述凸起具有相 同的形状和尺寸。
5、 根据权利要求 1-4任一项所述的掩膜板, 其中所述凸起的个数不超 过 12个。
6、 根据权利要求 1或 2所述的掩膜板, 其中所述孔为矩形孔, 所述凸 起均勾分布在所述矩形孔的任意两个对边上, 并且所述凸起的位置呈中心 对称分布。
7、 根据权利要求 6所述的掩膜板, 其中各个所述凸起具有相同的形状 和尺寸。
8、 根据权利要求 6所述的掩膜板, 其中所述矩形的两个对边的长度小 于另两个对边的长度, 所述凸起设置在较短的两个对边上。
9、 根据权利要求 1-8任一项所述的掩膜板, 其中所述凸起的中线长度 为 1.0-2.0 μ ιη。
10、 一种液晶面板, 包括过孔, 所述过孔的边缘向孔内部延伸形成有 多个凸起。
PCT/CN2013/089738 2013-07-26 2013-12-17 掩膜板及液晶面板 Ceased WO2015010428A1 (zh)

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CN104570588A (zh) * 2013-10-12 2015-04-29 北京京东方光电科技有限公司 一种掩模板
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CN105159025B (zh) * 2015-10-29 2019-07-23 重庆京东方光电科技有限公司 一种掩膜板
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