WO2014190890A1 - Substrat composite comportant une couche d'isolation et son procédé de fabrication - Google Patents

Substrat composite comportant une couche d'isolation et son procédé de fabrication Download PDF

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WO2014190890A1
WO2014190890A1 PCT/CN2014/078482 CN2014078482W WO2014190890A1 WO 2014190890 A1 WO2014190890 A1 WO 2014190890A1 CN 2014078482 W CN2014078482 W CN 2014078482W WO 2014190890 A1 WO2014190890 A1 WO 2014190890A1
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Prior art keywords
isolation layer
sub
layer
seed
substrate
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PCT/CN2014/078482
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English (en)
Chinese (zh)
Inventor
陈弘
贾海强
江洋
戴隆贵
王文新
马紫光
王禄
李卫
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中国科学院物理研究所
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Publication of WO2014190890A1 publication Critical patent/WO2014190890A1/fr

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78603—Thin film transistors, i.e. transistors with a channel being at least partly a thin film characterised by the insulating substrate or support
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78651—Silicon transistors
    • H01L29/78654—Monocrystalline silicon transistors
    • H01L29/78657—SOS transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78681—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising AIIIBV or AIIBVI or AIVBVI semiconductor materials, or Se or Te

Definitions

  • the present invention relates to a substrate for fabricating a semiconductor device, and more particularly to a composite substrate having an isolation layer and a method of fabricating the same. Background technique
  • a silicon material is usually used as a substrate, and various semiconductor devices are fabricated on a silicon substrate by doping, photolithography, deposition, etc., but the semiconductor device and silicon directly fabricated on a silicon substrate are used.
  • the substrate is electrically coupled, resulting in large leakage currents, high power dissipation, and large parasitic capacitance.
  • SOI Silicon On Insulator
  • a new semiconductor device substrate SOI (Silicon On Insulator)
  • SOI Silicon On Insulator
  • the S0I utilizes a silicon oxide insulating layer to block electrical coupling between the top-level semiconductor device and the underlying substrate.
  • the S0I-based integrated circuit has a series of advantages such as low leakage current, low power consumption, small parasitic capacitance, and fast response speed, and is a mainstream technology of a new generation of integrated circuit chips.
  • germanium on insulator GeOI
  • silicon nitride on insulator silicon nitride on insulator
  • GaN on insulator etc.
  • An insulating layer is used as an electrical isolation layer between the top semiconductor layer and the underlying substrate to electrically isolate the semiconductor device in the top semiconductor layer from the underlying substrate to reduce leakage current, power consumption, and parasitic capacitance .
  • certain optical devices such as LEDs, are also desirable to introduce an optical isolation layer into the substrate to reflect the light emitted by the LEDs, thereby preventing light loss due to substrate leakage.
  • Such a substrate having an electrical or optical isolation layer generally comprises a substrate, an isolation layer and a semiconductor layer, wherein the substrate is typically comprised of a bulk material for isolating the semiconductor layer from the substrate in electrical, optical, etc. properties.
  • the substrate having the isolation layer is generally formed by successively growing a plurality of layers, by sequentially forming an isolation layer and a semiconductor layer on the substrate.
  • the isolation layer is very thin and it is difficult to form a complete lattice structure, which is usually amorphous, so that the lattice quality of the subsequently grown semiconductor layer is difficult to ensure.
  • the invention provides a method for manufacturing a composite substrate having an isolation layer, comprising:
  • the method further comprises the step of: growing a semiconductor layer on the second sub-isolation layer by lateral growth using at least a portion of the seed region as a seed.
  • the seed layer is epitaxially grown from a substrate at a plurality of openings, and joined at a position intermediate the two openings to form a joint region, wherein the seed region is preferably The junction area is not included.
  • the present invention can also achieve the object of the present invention by using the seed layer in the joint region as a seed and then performing lateral extension. However, it is preferable to carry out lateral extension using a seed layer other than the joint region as a seed.
  • the first sub-isolation layer and the second sub-isolation layer are composed of an insulating dielectric material.
  • the first sub-isolation layer and the second sub-isolation layer are composed of a metal material.
  • the material of the substrate is sapphire, Si, SiC, GaAs, InP or Ge.
  • the materials of the first sub-isolation layer and the second sub-isolation layer are Si0 2 , Ti0 2 , A1 2 0 3 , Ti 3 0 5 , Zr0 2 , Ta 2 0 5 , SiN, A combination of one or more of A1N, molybdenum, nickel, ruthenium, platinum, titanium, tungsten, chromium.
  • the material of the semiconductor layer is GaN, AlGaN, InGaN, GaAs, InGaAs, InGaAlP, Si, Ge or GeSi.
  • the invention provides a composite substrate comprising:
  • a second sub-isolation layer covering the opening of the first sub-isolation layer and at least a portion of the first sub-isolation layer and having an opening that exposes at least a portion of the seed region.
  • a composite substrate according to the present invention further comprising a semiconductor layer covering the first sub-isolation layer and the second sub-isolation layer, the semiconductor layer being formed by lateral growth of at least a portion of the seed region.
  • the composite substrate manufacturing method provided by the present invention can ensure that the semiconductor layer of the top layer has a good crystal quality, thereby improving the performance of the semiconductor device fabricated in the semiconductor layer.
  • the method provided by the present invention can be used as an alternative preparation scheme for SOI substrates to adapt to current silicon process technology.
  • the method provided by the invention can be used as a preparation scheme of a generalized SOI substrate, and can be applied to GaAs epitaxy on silicon, GaN epitaxy on silicon, sapphire on silicon or GaN LED process technology with reflective layer on silicon.
  • the high-density dislocation defect region is avoided by the secondary lateral epitaxy, and the second lateral epitaxy is performed by using the region with the lower dislocation defect as the seed layer, and the high-performance heteroepitaxial material can be grown.
  • the isolation layer can be dissolved by a simple substrate stripping technique, so that the semiconductor layer is peeled off and used, and the remaining substrate after peeling can be reused.
  • the manufacturing cost of the device is greatly reduced, and the greening of the semiconductor process is realized.
  • FIG. 1 through 8 are schematic views of a process flow in accordance with an embodiment of the present invention. detailed description
  • the embodiment provides a method for manufacturing a composite substrate having an isolation layer.
  • the process flow is as shown in FIG. 1-8, and includes:
  • a 300 nm thick SiO 2 film is deposited as a first sub-isolation layer 2 on the surface of the sapphire substrate 1 by PECVD, and then formed in the first sub-isolation layer 2 by photolithography and etching processes. Opening 21, exposing the surface of the sapphire substrate 1, the plurality of openings 21 forming a grating pattern having a period of 4 micrometers and an opening 21 having a width of 1 micrometer;
  • a GaN thin film is prepared by using the MOCVD lateral epitaxial growth technique with the substrate 1 at the opening 21 as a seed layer 3, and the seed layer 3 is epitaxially grown from the substrate 1 at the plurality of openings 21. Grown and laterally extended, and joined at a position intermediate the two openings 21, forming a land 202, and finally completely covering the first sub-isolation layer 2;
  • a patterned mask 4 (formed by a process of exposure, development, etc.) is formed on the surface of the seed layer 3 composed of a laterally grown GaN film, and the mask 4 has a raster pattern.
  • the grating-like pattern has a period of 4 micrometers, and the grating-like stripe has a width of 1 micrometer.
  • the grating-like mask 4 covers only a portion of the seed layer 3 between the openings 21 and does not cover the joint region 202 of the seed layer 3;
  • the seed layer 3 is etched by using the mask 4 as an etch barrier, leaving the seed layer 3 blocked by the mask 4 as a seed region 31, wherein the first sub-isolation layer 2 is not
  • the GaN film blocked by the mask 4 is etched clean, and some of the seed layer 3 may remain in the opening 21 (as shown in FIG. 4), or there may be no residue of the seed layer 3, which does not affect the subsequent process and the resulting product.
  • the final performance, so the process margin is large;
  • a 300 nm thick SiO 2 film is deposited by PECVD as the second sub-isolation layer 201;
  • an opening is formed in the second sub-isolation layer 201 to expose the seed region 31;
  • the GaN material of the seed region 31 is used as a seed, and the secondary lateral epitaxial growth of GaN is performed until the GaN film on the second sub-isolation layer 201 is integrated, thereby having the structure shown in FIG.
  • a composite substrate of an isolation layer comprising a substrate 1, an isolation layer composed of a first sub-isolation layer 2 and a second sub-isolation layer 201, and a semiconductor layer 301 on the isolation layer, wherein the first sub-isolation layer on the substrate Having an opening therein, a region other than the opening of the first sub-isolation layer having a seed region, the second sub-isolation layer covering the opening of the first sub-isolation layer and at least a portion a sub-isolation layer having an opening exposing at least a portion of the seed region, the semiconductor layer covering the first sub-isolation layer and the second sub-isolation layer, the semiconductor layer being formed by lateral growth of the seed region.
  • the GaN film is initially formed in the opening 21 in the first sub-isolation layer 2, and the GaN film defect epitaxially grown at the opening due to the lattice mismatch of the bulk substrate 1 and the epitaxial GaN material More, with the progress of lateral epitaxial growth, the defects of GaN epitaxial film are gradually reduced, and the crystal quality of laterally grown GaN is gradually improved. Therefore, during lateral growth, the lattice structure of GaN gradually becomes complete, and the more away from opening 21 The less the far defects, the higher the crystal quality, but at the intermediate position of the two openings 21, the epitaxial layer lattice structure of the land 202 may be poor due to the influence of the material system and growth conditions.
  • the seed layer in the bonding region 202 is etched away, and only the lateral epitaxial film other than the bonding region 202, that is, the portion having a higher crystal quality, is used as a seed and then subjected to secondary epitaxy, thereby being capable of being in an amorphous isolation layer.
  • a GaN semiconductor layer 301 having a higher crystal quality is formed thereon. Therefore, in the composite substrate having the isolation layer prepared by the method provided by the embodiment, the semiconductor layer has high crystal quality and few defects, so that the performance of the semiconductor device fabricated in the semiconductor layer can be improved.
  • the embodiment provides a method for manufacturing a composite substrate having an isolation layer.
  • the process flow is as shown in FIG. 1-8, and includes:
  • a 300 nm thick SiO 2 film is formed on the surface of the silicon substrate 1 as the first sub-isolation layer 2 by PECVD or thermal oxidation, and then the first sub-isolation layer is formed by photolithography and etching processes.
  • a plurality of openings 21 are formed in the second surface to expose the surface of the silicon substrate 1, and the plurality of openings 21 form a grating-like pattern having a period of 4 micrometers and an opening 21 having a width of 1 micrometer;
  • a GaN thin film is prepared as a seed layer 3 by using the MOCVD lateral epitaxial growth technique with the substrate 1 at the opening 21 as a seed, and the seed layer 3 is epitaxially grown from the substrate 1 at the plurality of openings 21 and Lateral extension, and joined at a position intermediate the two openings 21, forming a land 202, and finally completely covering the first sub-isolation layer 2;
  • a patterned mask 4 (formed by a process of exposure, development, etc.) is formed on the surface of the seed layer 3 composed of a laterally grown GaN film, and the mask 4 has a raster pattern.
  • the grating-like pattern has a period of 4 micrometers, and the grating-like stripe has a width of 1 micrometer.
  • the film 4 covers only a portion of the seed layer 3 between the openings 21 and does not cover the land 202 of the seed layer 3;
  • the seed layer 3 is etched by using the mask 4 as an etch barrier, leaving a seed layer blocked by the mask 4 as a seed region 31, wherein the first sub-isolation layer 2 is not
  • the GaN film blocked by the mask 4 is etched clean, and some of the seed layer 3 may remain in the opening 21 (as shown in FIG. 4), or there may be no residue of the seed layer 3, which does not affect the subsequent process and the obtained product. Final performance, so the process margin is large;
  • a 300 nm thick SiO 2 film is deposited by PECVD as the second sub-isolation layer 201;
  • an opening is formed in the second sub-isolation layer 201 to expose the seed region 31;
  • the GaN material of the seed region 31 is used as a seed, and the secondary lateral epitaxial growth of GaN is performed until the GaN film on the second sub-isolation layer 201 is integrated, thereby having the structure shown in FIG.
  • a composite substrate of an isolation layer comprising a substrate 1, an isolation layer composed of the first sub-isolation layer 2 and the second sub-isolation layer 201, and a semiconductor layer 301 on the isolation layer.
  • the first sub-isolation layer on the substrate has an opening
  • the region other than the opening of the first sub-isolation layer has a seed region
  • the second sub-isolation layer covers the opening of the first sub-isolation layer and at least a portion of the first sub-isolation layer.
  • the GaN film is initially formed in the opening 21 in the first sub-isolation layer 2, and the GaN film defect epitaxially grown at the opening due to the lattice mismatch of the bulk substrate 1 and the epitaxial GaN material More, with the progress of lateral epitaxial growth, the defects of GaN epitaxial film are gradually reduced, and the crystal quality of laterally grown GaN is gradually improved. Therefore, during lateral growth, the lattice structure of GaN gradually becomes complete, and the more away from opening 21 The less the far defects, the higher the crystal quality, but at the intermediate position of the two openings 21, the epitaxial layer lattice structure of the land 202 may be poor due to the influence of the material system and growth conditions.
  • the seed layer in the bonding region 202 is etched away, and only the lateral epitaxial film other than the bonding region 202, that is, the portion having a higher crystal quality, is used as the seed layer for secondary epitaxy, thereby being able to be isolated in an amorphous state.
  • a GaN semiconductor layer 301 having a higher crystal quality is formed on the layer. Therefore, in the composite substrate having the isolation layer prepared by the method provided by the embodiment, the semiconductor layer has high crystal quality and few defects, so that the performance of the semiconductor device fabricated in the semiconductor layer can be improved.
  • the embodiment provides a method for manufacturing a composite substrate having an isolation layer.
  • the process flow is as shown in FIG. 1-8, and includes:
  • a 300 nm thick metal molybdenum thin film is formed on the surface of the sapphire substrate 1 by evaporation or sputtering as the first sub-isolation layer 2, and then in the first sub-isolation layer 2 by photolithography and etching processes.
  • a GaN thin film is prepared as a seed layer 3 by using the MOCVD lateral epitaxial growth technique with the substrate 1 at the opening 21 as a seed, and the seed layer 3 is epitaxially grown from the substrate 1 at the plurality of openings 21 and Lateral extension, and joined at a position intermediate the two openings 21, forming a land 202, and finally completely covering the first sub-isolation layer 2;
  • a patterned mask 4 (formed by a process of exposure, development, etc.) is formed on the surface of the seed layer 3 composed of a laterally grown GaN film, and the mask 4 has a raster pattern.
  • the grating-like pattern has a period of 4 micrometers, and the grating-like stripe has a width of 1 micrometer.
  • the grating-like mask 4 covers only a portion of the seed layer 3 between the openings 21 and does not cover the joint region 202 of the seed layer 3;
  • the seed layer 3 is etched by using the mask 4 as an etch barrier, leaving a seed layer blocked by the mask 4 as a seed region 31, wherein the first sub-isolation layer 2 is not
  • the GaN film blocked by the mask 4 is etched clean, and some of the seed layer 3 may remain in the opening 21 (as shown in FIG. 4), or there may be no residue of the seed layer 3, which does not affect the subsequent process and the obtained product. Final performance, so the process margin is large;
  • an opening is formed in the second sub-isolation layer 201 to expose the seed region 31;
  • a composite substrate of the isolation layer includes a substrate 1, an isolation layer composed of the first sub-isolation layer 2 and the second sub-isolation layer 201, and a GaN semiconductor layer 301 on the isolation layer.
  • the GaN film is initially formed in the opening 21 in the first sub-isolation layer 2, due to the lattice mismatch of the bulk substrate 1 and the epitaxial GaN material, at the opening
  • the epitaxially grown GaN film has many defects. With the progress of lateral epitaxial growth, the defects of GaN epitaxial film are gradually reduced, and the crystal quality of laterally grown GaN is gradually improved. Therefore, during lateral growth, the lattice structure of GaN gradually tends to Complete, the farther away from the opening 21, the less the defect, the higher the crystal quality, but at the intermediate position of the two openings 21, the epitaxial layer lattice structure of the land 202 may be poor due to the influence of the material system and growth conditions.
  • the seed layer in the bonding region 202 is etched away, and only the lateral epitaxial film other than the bonding region 202, that is, the portion having a higher crystal quality, is used as the seed layer for secondary epitaxy, thereby being able to be isolated in an amorphous state.
  • a GaN semiconductor layer 301 having a higher crystal quality is formed on the layer. Therefore, in the composite substrate having the isolation layer prepared by the method provided by the embodiment, the semiconductor layer has high crystal quality and few defects, so that the performance of the semiconductor device fabricated in the semiconductor layer can be improved.
  • the composite substrate with the isolation layer prepared by the method provided by the embodiment can be used for preparing an optoelectronic device such as an LED, wherein the molybdenum layer can be used as a reflective layer to prevent light emitted from the LED in the semiconductor layer from being emitted from the substrate, thereby Improve the external quantum efficiency of the LED.
  • the spacer layer may be used as the spacer layer.
  • the embodiment provides a method for manufacturing a composite substrate having an isolation layer.
  • the process flow is as shown in FIG. 1-8, and includes:
  • a 200 nm thick SiO 2 film is formed on the surface of the silicon substrate 1 as the first sub-isolation layer 2 by PECVD or thermal oxidation, and then the first sub-isolation layer is formed by photolithography and etching processes.
  • a plurality of openings 21 are formed in the second surface to expose the surface of the silicon substrate 1, and the plurality of openings 21 form a grating-like pattern having a period of 2 micrometers and an opening 21 having a width of 0.5 micrometers;
  • a GaAs thin film is prepared as a seed layer 3 by using the MOCVD lateral epitaxial growth technique with the substrate 1 at the opening 21 as a seed, and the seed layer 3 is epitaxially grown from the substrate 1 at the plurality of openings 21 and Lateral extension, and joined at a position intermediate the two openings 21, forming a land 202, and finally completely covering the first sub-isolation layer 2;
  • a patterned mask 4 (formed by a photoresist, a process such as exposure, development, etc.) is formed on the surface of the seed layer 3 composed of a laterally grown GaAs film, and the mask 4 is in the form of a grating.
  • the grating-like pattern has a period of 2 micrometers
  • the grating-like stripe has a width of 0.5 micrometers.
  • the grating-like mask 4 covers only a portion of the seed layer 3 between the openings 21 and does not cover the joint region 202 of the seed layer 3;
  • a 200 nm thick SiO 2 film is deposited by PECVD as the second sub-isolation layer 201;
  • an opening is formed in the second sub-isolation layer 201 to expose the seed region 31;
  • the GaAs material of the seed region 31 is used as a seed, and the secondary lateral epitaxial growth of GaAs is performed until the GaAs film on the second sub-isolation layer 201 is integrated, thereby having the structure shown in FIG. A composite substrate of an isolation layer comprising a substrate 1, an isolation layer composed of the first sub-isolation layer 2 and the second sub-isolation layer 201, and a semiconductor layer 301 on the isolation layer.
  • the GaAs film is initially formed in the opening 21 in the first sub-isolation layer 2, and the GaAs film defect which is epitaxially grown at the opening due to the lattice mismatch of the bulk substrate 1 and the epitaxial GaAs material More, with the progress of lateral epitaxial growth, the defects of GaAs epitaxial film are gradually reduced, and the crystal quality of laterally grown GaAs is gradually improved.
  • the lattice structure of GaAs gradually becomes complete, and the more away from opening 21 The less the far defects, the higher the crystal quality, but at the intermediate position of the two openings 21, the epitaxial layer lattice structure of the land 202 may be poor due to the influence of the material system and growth conditions. Therefore, the seed layer in the bonding region 202 is etched away, and only the lateral epitaxial film other than the bonding region 202, that is, the portion having a higher crystal quality, is used as the seed layer for secondary epitaxy, thereby being able to be isolated in the amorphous state. A GaAs semiconductor layer 301 having a higher crystal quality is formed on the layer. Therefore, in the composite substrate having the isolation layer prepared by the method of the present embodiment, the semiconductor layer has high crystal quality and few defects, so that the performance of the semiconductor device fabricated in the semiconductor layer can be improved.
  • the embodiment provides a method for manufacturing a composite substrate having an isolation layer.
  • the process flow is as shown in FIG. 1-8, and includes:
  • a 100 nm thick SiO 2 film is formed as a first sub-isolation layer 2 on the surface of the silicon substrate 1 by thermal oxidation, and then formed in the first sub-isolation layer 2 by photolithography and etching processes.
  • a plurality of openings 21 exposing the surface of the silicon substrate 1, and the plurality of openings 21 forming a raster pattern The period is 2 microns, and the opening 21 is 0.5 microns wide;
  • a Si thin film is prepared as a seed layer 3 by using a CVD lateral epitaxial growth technique with the substrate 1 at the opening 21 as a seed, and the seed layer 3 is epitaxially grown from the substrate 1 at the plurality of openings 21 and Lateral extension, and joined at a position intermediate the two openings 21, forming a land 202, and finally covering the first sub-isolation layer 2;
  • a patterned mask 4 (formed by a process of exposure, development, etc.) is formed on the surface of the seed layer 3 composed of a laterally grown Si film, and the mask 4 has a raster pattern.
  • the grating-like pattern has a period of 2 micrometers, and the grating-like stripe has a width of 0.5 micrometers.
  • the grating-like mask 4 covers only a portion of the seed layer 3 between the openings 21 and does not cover the joint region 202 of the seed layer 3;
  • the seed layer 3 is etched by using the mask 4 as an etch barrier, leaving a seed layer blocked by the mask 4 as a seed region 31, wherein the first sub-isolation layer 2 is not
  • the Si film blocked by the mask 4 is etched clean, and some of the seed layer 3 may remain in the opening 21 (as shown in FIG. 4), or there may be no residue of the seed layer 3, which does not affect the subsequent process and the resulting product. Final performance, so the process margin is large;
  • a 200 nm thick SiO 2 film is deposited by PECVD as the second sub-isolation layer 201;
  • an opening is formed in the second sub-isolation layer 201 to expose the seed region 31;
  • FIG. 8 As shown in FIG. 8, using the Si material of the seed region 31 as a seed, secondary lateral epitaxial growth of Si is performed until the Si thin film on the second sub-isolation layer 201 is integrated, thereby having the structure shown in FIG. A composite substrate of an isolation layer comprising a substrate 1, an isolation layer composed of the first sub-isolation layer 2 and the second sub-isolation layer 201, and a semiconductor layer 301 on the isolation layer.
  • the Si film is initially formed in the opening 21 in the first sub-spacer layer 2, and the Si film defect which is epitaxially grown at the opening due to the lattice mismatch of the bulk substrate 1 and the epitaxial Si material More, with the progress of lateral epitaxial growth, the defects of the Si epitaxial film are gradually reduced, and the crystal quality of the laterally grown Si is gradually increased. Therefore, in the lateral growth process, the lattice structure of Si gradually becomes complete, and the more away from the opening 21 The less the far defects, the higher the crystal quality, but at the intermediate position of the two openings 21, the epitaxial layer lattice structure of the land 202 may be poor due to the influence of the material system and growth conditions.
  • the seed layer in the bonding region 202 is etched away, and only the lateral epitaxial film other than the bonding region 202, that is, the portion having a higher crystal quality, is used as the seed layer for secondary epitaxy, thereby enabling isolation in an amorphous state.
  • the substrate materials used in the present invention include, but are not limited to, sapphire, Si, SiC, GaAs, InP, Ge, etc., and those skilled in the art can flexibly select the desired lining according to actual needs.
  • the type of material at the bottom includes sapphire, Si, SiC, GaAs, InP, Ge, etc.
  • the spacer material used in the present invention may include an insulating dielectric material (ie, an electrical isolation layer material), a highly reflective material such as a metal (ie, an optical isolation layer material such as an opaque material).
  • the spacer material includes, but is not limited to, SiO 2 , Ti 0 2 , A 1 2 0 3 , Ti 3 0 5 , Zr0 2 , Ta 2 0 5 , SiN, A1N, molybdenum, nickel, ruthenium, platinum, titanium, tungsten, chromium, and A combination of the above materials.
  • the spacer layer referred to in the present invention is not limited to electrical and optical isolation, and may be isolated from the semiconductor layer and the substrate layer on both sides in other physical or chemical parameters, such as isolation with wet chemical etching selectivity. More generally, the spacer layer referred to in the present invention means that the semiconductor layer is separated from the substrate, and those skilled in the art can flexibly combine the respective materials of the substrate, the spacer layer, and the semiconductor layer according to actual needs.
  • the method for preparing the sub-isolation layer is not limited to the method described in the above embodiments, and may be other film preparation methods known in the art, such as chemical vapor deposition, electron beam evaporation, sputtering. , atomic layer deposition, thermal oxidation, wet oxidation, etc.
  • the plurality of openings 21 formed in the first sub-spacer layer 2 may also be other patterns, such as a matrix.
  • semiconductor materials suitable for lateral growth formed over the isolation layer include, but are not limited to, GaN, AlGaN, InGaN, GaAs, InGaAs, InGaAlP, Si, Ge, GeSi materials, and the like.

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  • Crystals, And After-Treatments Of Crystals (AREA)

Abstract

La présente invention concerne un procédé de fabrication d'un substrat composite comportant une couche d'isolation, le procédé consistant à : former, sur un substrat (1), une première sous-couche d'isolation (2) comportant une ouverture (21) exposant le substrat (1); utiliser un procédé de croissance latérale pour former une couche d'ensemencement (3) constituée d'un film mince de matériau semi-conducteur sur la première sous-couche d'isolation (2) et sur le substrat (1); attaquer chimiquement la couche d'ensemencement (3) de manière sélective, en laissant une partie de la couche d'ensemencement (3) en tant que région d'ensemencement (31) sur la première sous-couche d'isolation (2); former une seconde sous-couche d'isolation (201) recouvrant le substrat (1), la première sous-couche d'isolation (2) et la région d'ensemencement (31); former une ouverture dans la seconde sous-couche d'isolation (201), l'ouverture exposant au moins une partie de la région d'ensemencement (31); et utiliser au moins une partie de la région d'ensemencement (31) en tant que partie d'ensemencement pour la croissance d'une couche semi-conductrice (301) sur la seconde sous-couche d'isolation (201) par l'emploi du procédé de croissance latérale.
PCT/CN2014/078482 2013-05-27 2014-05-27 Substrat composite comportant une couche d'isolation et son procédé de fabrication WO2014190890A1 (fr)

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CN103280425B (zh) * 2013-05-27 2016-03-30 中国科学院物理研究所 一种具有隔离层的复合衬底及其制造方法
CN108346718A (zh) * 2017-01-25 2018-07-31 合肥彩虹蓝光科技有限公司 利用低折射率材料为介质的复合图形衬底及其制作方法
CN108807279B (zh) * 2018-06-25 2021-01-22 中国科学院微电子研究所 半导体结构与其制作方法

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