WO2014187055A1 - 波导滤波器、其制备方法及通信设备 - Google Patents

波导滤波器、其制备方法及通信设备 Download PDF

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Publication number
WO2014187055A1
WO2014187055A1 PCT/CN2013/084266 CN2013084266W WO2014187055A1 WO 2014187055 A1 WO2014187055 A1 WO 2014187055A1 CN 2013084266 W CN2013084266 W CN 2013084266W WO 2014187055 A1 WO2014187055 A1 WO 2014187055A1
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WIPO (PCT)
Prior art keywords
substrate
waveguide
etching
waveguide filter
cover plate
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PCT/CN2013/084266
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English (en)
French (fr)
Inventor
周彦昭
代郁峰
蔚翔
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华为技术有限公司
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Application filed by 华为技术有限公司 filed Critical 华为技术有限公司
Priority to EP13873134.4A priority Critical patent/EP2830148A4/en
Priority to US14/451,661 priority patent/US20140368300A1/en
Publication of WO2014187055A1 publication Critical patent/WO2014187055A1/zh

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01PWAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
    • H01P11/00Apparatus or processes specially adapted for manufacturing waveguides or resonators, lines, or other devices of the waveguide type
    • H01P11/007Manufacturing frequency-selective devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01PWAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
    • H01P1/00Auxiliary devices
    • H01P1/20Frequency-selective devices, e.g. filters
    • H01P1/207Hollow waveguide filters
    • H01P1/208Cascaded cavities; Cascaded resonators inside a hollow waveguide structure
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/49016Antenna or wave energy "plumbing" making

Definitions

  • Waveguide filter, preparation method thereof and communication device The present application claims to be submitted to the Chinese Patent Office on May 24, 2013, and the application number is 201310198393. 7.
  • TECHNICAL FIELD The present invention relates to communication device components, and more particularly to a waveguide filter, a method of fabricating the same, and a communication device.
  • BACKGROUND OF THE INVENTION Waveguide filters have the characteristics of low insertion loss, large power capacity, and easy mass production, and the operating frequency can reach the millimeter wave band, and thus are widely used in microwave communication equipment.
  • the waveguide filter is mainly composed of a metal cavity and a tuning screw.
  • the metal cavity is composed of at least three resonant cavities
  • the tuning screw is disposed on the wall of the metal cavity, and the resonant frequency of the waveguide filter can be adjusted by adjusting the depth of the tuning screw into the metal cavity.
  • a rectangular waveguide port is also formed in the wall of the metal cavity, and the waveguide port communicates with the resonance cavity as an input or output port of the signal.
  • Embodiments of the present invention provide a waveguide filter, a method for fabricating the same, and a communication device, which solves the problem that the waveguide filter with high resonant frequency can not meet the application requirements due to the low precision of the existing machining process.
  • an embodiment of the present invention provides a waveguide filter, including: a substrate made of a silicon material; an etched cavity having a flat sidewall formed in the substrate, the depth of the etched cavity is not More than 0.7 mm, and the angle between the side wall of the etching cavity and the vertical direction is not less than 1 degree; the substrate is provided with a waveguide opening, and the waveguide port is connected to the etching cavity and Electrical connection.
  • an embodiment of the present invention provides a method for fabricating a waveguide filter, including: providing a substrate made of a silicon material; forming an etching cavity in the substrate by using a MEMS processing process of a microelectromechanical system, and A waveguide opening that is in communication with and electrically connected to the etching cavity is formed on the substrate.
  • an embodiment of the present invention provides a communication device, including a circuit board, where the waveguide filter is mounted on the circuit board.
  • the depth of the etched cavity may be no more than 0. 7 mm, the etched cavity may be formed by a etched cavity having a flat sidewall. And the sidewall of the cavity formed by etching has an inclination angle of not less than 1 degree. Since etching is one of the core technologies in the processing technology of Micro-Electro-Mechanical Systems (MEMS), it has a processing of 1 micrometer.
  • MEMS Micro-Electro-Mechanical Systems
  • FIG. 1 is a cross-sectional view of a waveguide filter according to an embodiment of the present invention.
  • Figure 2 is a bottom plan view of the upper half of the waveguide filter shown in Figure 1 taken along A-A;
  • Figure 3 is a plan view of the lower half of the waveguide filter shown in Figure 1 taken along A-A;
  • FIG. 4 is an exploded cross-sectional view of another waveguide filter according to an embodiment of the present invention.
  • FIG. 5 is an exploded cross-sectional view showing still another waveguide filter according to an embodiment of the present invention.
  • FIG. 6 is a flowchart of a method for preparing a waveguide filter according to an embodiment of the present invention.
  • FIG. 7 is a flowchart of a method for fabricating another waveguide filter according to an embodiment of the present invention.
  • FIG. 8 is a flowchart of still another method for preparing a waveguide filter according to an embodiment of the present invention.
  • FIG. 9 is a cross-sectional view of a communication device according to an embodiment of the present invention.
  • DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The technical solutions in the embodiments of the present invention will be clearly and completely described in the following with reference to the accompanying drawings.
  • the embodiment of the present invention provides a waveguide filter, as shown in FIG. 1 to FIG.
  • a substrate 21 made of a silicon material comprising a substrate 21 made of a silicon material; an etching cavity 22 having a flat sidewall formed in the substrate 21, etching the cavity
  • the depth h of 22 is not more than 0.7 mm, and the angle between the side wall of the etching cavity 22 and the vertical direction is not less than 1 degree;
  • the substrate 21 is provided with a waveguide opening 23, a waveguide opening 23 and an etching cavity. 22 connected and electrically connected.
  • the etched cavity having a flat sidewall is formed in the substrate made of a silicon material, and the etched cavity may have a depth of not more than 0.7 mm, and the cavity formed by etching
  • the sidewall has an inclination of not less than 1 degree. Since etching is one of the core technologies in the processing technology of Micro-Electro-Mechanical Systems (MEMS), it has a processing precision of 1 micron, so the cavity is etched. As a resonant cavity of the waveguide filter, it has a small size and high precision. Compared with the existing machining process, the waveguide filter is reduced in size by 50 times and the precision is improved by 20 times. It can meet the application requirements and can be debug-free, which can significantly reduce the manufacturing cost of the waveguide filter with high resonance frequency.
  • MEMS Micro-Electro-Mechanical Systems
  • MEMS refers to micro-devices or systems that can be mass-produced, integrating micro-mechanisms, micro-sensors, micro-actuators, and signal processing and control circuits, up to the interface, communication, and power supply, while MEMS processing is integrated in semiconductors. Based on the micro-machining technology and ultra-precision machining technology, the machining accuracy can reach 1 micron.
  • the waveguide filter shown in FIG. 3 is a specific embodiment of the present invention, in which three waveguide ports 23 are provided, and among the two adjacent waveguide ports 23 on the left side, the waveguide port 23 labeled as TX serves as a signal receiving end.
  • the waveguide port 23 identified as RX serves as a signal transmitting end, and the waveguide port 23 labeled ANT on the right side serves as an antenna end.
  • This waveguide filter is used as a duplexer in a communication circuit.
  • the direction indicated by the dashed arrow in Figure 3 is the direction of signal transmission.
  • the present invention is not limited thereto, and there may be two waveguide ports, so that the waveguide filter only has a unidirectional filtering function, and there may be multiple waveguide ports, so that the waveguide filter can be used as a multiplexer or a combination. Road device.
  • the waveguide filter shown in FIG. 3 is provided with three waveguide ports 23, and in order to ensure that the input impedance of the waveguide filter matches the output impedance, the high-frequency signal is prevented from being reflected in the substrate 21, and in FIG. 2, at the antenna end
  • a matching segment 25 is disposed in the adjacent substrate 21, and the matching segment 25 is a protrusion located in the substrate 21, which may be a rectangle, a triangle or other irregular shape, and the size is not limited to that shown in FIG. 2, as long as it can perform impedance matching. The effect is fine.
  • the cross-sectional shape of the etching cavity 22 in FIG. 1 is trapezoidal and horizontally arranged on a horizontal surface.
  • the present invention is not limited thereto, and the cross-sectional shape of the resonant cavity may also be A shape obtained by a triangle or other etching, and the cavity can be stereoscopically arranged in the horizontal plane and in a direction perpendicular to the horizontal plane.
  • the substrate 21 may include a bottom plate 211, a first substrate 212, and a first cover 213 as shown in FIG.
  • the first substrate 212 is provided with an etched through hole 41, the waveguide port 23 is disposed in the first cover 213, and the surface of the bottom plate 211, the first substrate 212 and the first cover 213 is plated with a conductive layer 42;
  • an etched cavity is formed which is in communication with and electrically connected to the waveguide port 23.
  • the substrate 21 of the three-layer structure is used. Since the etched via 41 formed in the first substrate 212 eventually serves as an etched cavity, it is only necessary to select the first substrate 212 of a suitable thickness to determine the engraving. The depth of the etched cavity makes the depth of the formed etched cavity easier to control.
  • the first substrate may be a single-layer silicon wafer or a stack of a plurality of silicon wafers, and adjacent silicon wafers of the plurality of silicon wafers are bonded together to ensure uniform electrical conductivity of the respective silicon wafers.
  • Silicon wafers are available in low-resistance silicon, high-resistance silicon, or low-purity silicon wafers with a diameter range of 2 inches or more and a thickness ranging from 100 micrometers to 2 millimeters. Because the lower purity silicon wafers are less expensive, the use of lower purity silicon wafers can reduce the cost of waveguide filter fabrication.
  • the substrate 21 may further include a second substrate 214 and a second cover 215 as shown in FIG. 5; the second substrate 214 is provided with an etched recess 51, and the waveguide 23 is disposed at The second cover 215 is plated with a conductive layer 52 on the surface of the second substrate 214 and the second cover 215; when the second cover 215 covers the open side of the etched groove 51 and is bonded to the second substrate At the same time, an etched cavity is formed which is in communication with the waveguide port 23 and is electrically connected.
  • This embodiment employs a substrate 21 of a two-layer structure, which can reduce the manufacturing steps of the waveguide filter, thereby reducing the cost.
  • the second substrate 214 is a single-layer silicon wafer or a stack of a plurality of silicon wafers, and adjacent silicon wafers of the plurality of silicon wafers are bonded together to ensure uniform electrical conductivity of the respective silicon wafers.
  • Silicon wafers are available in low-resistance silicon, high-resistance silicon, or low-purity silicon wafers with a diameter range of 2 inches or more and a thickness ranging from 100 micrometers to 2 millimeters. Because the lower purity silicon wafers are less expensive, the use of lower purity silicon wafers can reduce the cost of waveguide filter fabrication.
  • the waveguide ports of the waveguide filter shown in FIG. 1, FIG. 4 and FIG. 5 are all disposed on the cover plate, but the invention is not limited thereto, and the position of the waveguide port can be designed in other positions according to actual needs. , such as on the side wall of the substrate.
  • the material of the conductive layer may be any one or a combination of gold, silver, copper, aluminum, palladium, nickel, titanium, and chromium.
  • the conductive layer may also be a stack of multiple metal layers, for example, the conductive layer is a stack of two metal layers, the first layer is an aluminum layer, and the second layer is a silver layer.
  • the stacking of the multilayer metal layers can improve the electrical conductivity of the waveguide filter surface.
  • an insulating layer may be disposed between adjacent metal layers in the multilayer metal layer, for example, an insulating layer is disposed between the stacked aluminum layer and the silver layer, so that the skin effect of the waveguide filter can be reduced.
  • the embodiment of the invention further provides a method for preparing a waveguide filter. As shown in FIG. 6 and FIG. 1 to FIG. 3, the method includes the following steps.
  • MEMS Micro-Electro-Mechanical Systems
  • MEMS refers to micro-devices or systems that can be mass-produced, integrating micro-mechanisms, micro-sensors, micro-actuators, and signal processing and control circuits, up to the interface, communication, and power supply, while MEMS processing is integrated in semiconductors. Based on the micro-machining technology and ultra-precision machining technology, the machining accuracy can reach 1 micron.
  • the precision is improved by 20 times compared with the existing machining process, and thus the waveguide filter with high resonance frequency is prepared.
  • the device can meet the application requirements, and since the preparation precision of the waveguide filter is high, the debugging can be realized, thereby significantly reducing the manufacturing cost of the waveguide filter with high resonance frequency.
  • the cross-sectional shape of the etching cavity 22 in FIG. 1 to FIG. 3 is trapezoidal and horizontally arranged on a horizontal surface.
  • the present invention is not limited thereto, and the cavity is etched.
  • the cross-sectional shape may also be a triangular shape or other irregular shape, and the etching cavity may be stereoscopically arranged in the horizontal plane and the direction perpendicular to the horizontal plane, as long as the MEMS processing technology can be manufactured and the waveguide filter performance index can be achieved.
  • the desired etched cavity shape and arrangement can be used in the present invention.
  • the present invention further provides a method of fabricating two kinds of waveguide filters, and the two preparation methods are described below with reference to the accompanying drawings.
  • the method of preparing the waveguide filter includes the following steps.
  • a substrate 21 is provided.
  • the substrate 21 includes a bottom plate 211, a first substrate 212, and a first cover 213.
  • the conductive layer 42 is plated on the surface of the bottom plate 211, the first substrate 212, and the first cover 213. 705. Covering the bottom plate 211 and the first cover plate 213 at two ends of the first through hole and bonding with the first substrate 212 to form an etching cavity formed by the first through hole 41 in the substrate 21, The two through holes are in communication with the etching cavity and are electrically connected to serve as the waveguide port 23.
  • the waveguide port 23 on the right side in FIG. 4 is to be used as the antenna end, and when the waveguide filter having three waveguide ports is manufactured by the method shown in FIG. 7, the first A matching portion indicated by the mark 25 may be formed in the first substrate 212 while the first through hole is etched on the substrate 212, thereby ensuring the waveguide after bonding the bottom plate 211, the first substrate 212 and the first cover 213 Matching of filter input impedance and output impedance.
  • the first substrate 212 may be a single layer of silicon wafer or a stack of multiple layers of silicon wafers, and adjacent silicon wafers of the plurality of silicon wafers are bonded together to ensure uniform electrical conductivity of the respective silicon wafers.
  • Silicon wafers can be selected from low-resistance silicon wafers with a diameter range of 2 inches or more and thicknesses ranging from 100 micrometers to 2 millimeters, high resistance silicon wafers or low purity silicon wafers. Because the lower purity silicon wafers are less expensive, the use of lower purity silicon wafers can reduce the cost of waveguide filter fabrication.
  • FIG. 8 is a flowchart of a method for fabricating another waveguide filter according to an embodiment of the present invention. Referring to FIG. 5 and FIG. 8, the method includes the following steps.
  • the substrate 21 includes a second substrate 214 and a second cover 215.
  • the conductive layer 52 is plated on the surfaces of the second substrate 214 and the second cover 215.
  • the waveguide port 23 on the right side in FIG. 5 is to be used as the antenna end, and when the waveguide filter having three waveguide ports is manufactured by the method shown in FIG. 8, in the second While the recess 51 is etched on the substrate 214, the matching portion indicated by the mark 25 may be formed in the second substrate 214, thereby ensuring the input impedance of the waveguide filter after the second substrate 214 and the second cover 215 are bonded. Matches the output impedance.
  • the second substrate 214 may be a single-layer silicon wafer or a stack of a plurality of silicon wafers, and adjacent silicon wafers of the plurality of silicon wafers are bonded together to ensure uniform electrical conductivity of the silicon wafers.
  • Silicon wafers can be selected from low-resistance silicon wafers with a diameter range of 2 inches or more and thicknesses ranging from 100 micrometers to 2 millimeters, high resistance silicon wafers or low purity silicon wafers. Because the lower purity silicon wafers are less expensive, the use of lower purity silicon wafers can reduce the cost of waveguide filter fabrication.
  • the waveguide ports of the waveguide filter shown in FIG. 4 and FIG. 5 are all disposed on the cover plate, but the present invention is not limited thereto, and the position of the waveguide port can be designed at other positions according to actual needs, such as a substrate.
  • the structure of the waveguide filter is different, and the corresponding preparation method also undergoes some changes, and is not limited to the above two, as long as the MEMS processing process can be used to prepare the desired structure, the method steps can be used to implement the present invention.
  • the step of plating the conductive layer may be a magnetron sputtering process or an electroplating process.
  • the purpose of plating the conductive layer is to make the inner and outer surfaces of the prepared waveguide filter conductive, so that high frequency signals can propagate between the resonant cavities and can be transmitted to other elements electrically connected thereto through the conductive outer surface of the waveguide filter. Device.
  • the preparation method of the waveguide filter provided by the above embodiments is based on pre-designed dimensions (including cavity length, height, coupling window thickness, coupling window opening width, waveguide length, width, length of matching section,
  • the waveguide filter prepared by the width and height has an insertion loss of less than 2. 5 dB and a transmission and reception suppression of more than 55 dB at a frequency greater than 70 GHz, which satisfies the RF index of the waveguide filter.
  • the embodiment of the present invention further provides a communication device.
  • the communication device includes a circuit board 91.
  • the circuit board 91 is mounted with the waveguide filter 92 described in the above embodiment. Because the waveguide filter 92 is reduced in size by 50 times and the precision is improved by 20 times compared with the existing machining process, it can not only meet the application requirements, but also can realize debugging-free, thereby significantly reducing manufacturing. cost.
  • the waveguide filter 92 and the circuit board 91 shown in Fig. 9 can be mounted by soldering or crimping. In order to ensure accurate positioning of the waveguide port 93 of the waveguide filter 92 and the corresponding port on the circuit board 91, it is possible to use a groove on the circuit board 91 and set three or more limit points on the circuit board 91 (Fig. Not shown).
  • a communication chip 94 is further mounted on the circuit board 91, electrically connected to the waveguide port 93 of the waveguide filter 92 to process the high frequency signal obtained from the waveguide port 93, or to transmit the processed high frequency signal through the waveguide port 93. To the waveguide filter 92.
  • the waveguide port 93 below the hollow arrow is the antenna end of the waveguide filter 92, and the hollow arrow indicates that the waveguide port 93 is used to connect the antenna 95.
  • the corresponding cavity below the antenna end of the waveguide filter 92 is provided with a matching section 96. To ensure that the input impedance of the waveguide filter 92 matches the output impedance.

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Abstract

本发明实施例提供了一种波导滤波器、其制备方法及通信设备,涉及通信设备零部件技术领域,解决了由于现有的机加工工艺精度低,导致制备出的高谐振频率的波导滤波器无法满足应用要求的问题。该波导滤波器包括:硅材料制成的基底;基底中形成有具有平坦侧壁的刻蚀空腔,刻蚀空腔的深度不大于0.7毫米,且刻蚀空腔的侧壁与竖直方向的夹角不小于1度;基底上开设有波导口,波导口与刻蚀空腔连通并电连接。

Description

波导滤波器、 其制备方法及通信设备 本申请要求于 2013年 5月 24日提交中国专利局、 申请号为 201310198393. 7、 发明名 称为 "波导滤波器、 其制备方法及通信设备"的中国专利申请的优先权, 其全部内容通 过引用结合在本申请中。 技术领域 本发明涉及通信设备零部件, 尤其涉及波导滤波器、 其制备方法及通信设备。 背景技术 波导滤波器具有插入损耗低、 功率容量大和容易批量生产的特点, 工作频率可以达 到毫米波波段, 因此广泛应用在微波通信设备中。
波导滤波器主要由金属腔体和调谐螺钉构成。 其中, 金属腔体由至少三个谐振腔组 成, 调谐螺钉设置在金属腔体的壁上, 通过调整调谐螺钉进入金属腔体内的深度可以对 波导滤波器的谐振频率进行调整。 金属腔体的壁上还开设有矩形的波导口, 波导口与谐 振腔连通, 作为信号的输入或输出端口。
现有的制备波导滤波器的工艺主要为切削加工工艺,这种机加工工艺的精度通常为 0. 02〜0. 05mm。 随着微波频率的提升, 在电磁波的波长线性下降, 因此微小的物理尺寸 误差会造成电磁谐振频率较大的偏移,使得 70〜80G滤波器可批量的尺寸精度要求达到 10〜20 μ ιη以下; 显然采用现有的机加工工艺制备出的高谐振频率的波导滤波器是无法 满足应用要求的。 发明内容
本发明的实施例提供一种波导滤波器、 其制备方法及通信设备, 解决了由于现有的 机加工工艺精度低, 导致制备出的高谐振频率的波导滤波器无法满足应用要求的问题。
为达到上述目的, 本发明的实施例采用如下技术方案:
第一方面, 本发明实施例提供了一种波导滤波器, 包括: 硅材料制成的基底; 所述 基底中形成有具有平坦侧壁的刻蚀空腔, 所述刻蚀空腔的深度不大于 0. 7毫米, 且刻蚀 空腔的所述侧壁与竖直方向的夹角不小于 1度; 所述基底上开设有波导口, 所述波导口 与所述刻蚀空腔连通并电连接。 第二方面, 本发明实施例提供了一种波导滤波器的制备方法, 包括: 提供硅材料制 成的基底; 采用微机电系统 MEMS加工工艺在所述基底内形成刻蚀空腔, 且在所述基底上 形成与所述刻蚀空腔连通并电连接的波导口。
第三方面, 本发明实施例提供了一种通信设备, 包括电路板, 所述电路板上安装有 上述波导滤波器。
本发明实施例提供的波导滤波器、 其制备方法及通信设备中, 通过在硅材料制成的 基底中形成具有平坦侧壁的刻蚀空腔, 刻蚀空腔深度可不大于 0. 7毫米, 且刻蚀形成的 空腔侧壁具有不小于 1度的倾角, 由于刻蚀是微机电系统 (Micro-Electro-Mechanical Systems , 简称为: MEMS )加工工艺中核心技术之一, 具有 1微米的加工精度, 因此刻蚀 空腔作为波导滤波器的谐振腔, 具有较小的尺寸和较高的精度, 相对于现有的机加工工 艺形成的波导滤波器, 尺寸缩小了 50倍, 精度提高了 20倍, 不仅获得的性能参数能满足 应用要求, 且可以实现免调试, 从而能显著降低高谐振频率的波导滤波器的制造成本。 附图说明 为了更清楚地说明本发明实施例中的技术方案, 下面将对实施例描述中所需要使用 的附图作简单地介绍。
图 1为本发明实施例提供的一种波导滤波器的剖视图;
图 2为图 1所示的波导滤波器沿 A-A剖切后上半部分的仰视图;
图 3为图 1所示的波导滤波器沿 A-A剖切后下半部分的俯视图;
图 4为本发明实施例提供的另一种波导滤波器的分解剖视图;
图 5为本发明实施例提供的又一种波导滤波器的分解剖视图;
图 6为本发明实施例提供的一种波导滤波器的制备方法的流程图;
图 7为本发明实施例提供的另一种波导滤波器的制备方法的流程图;
图 8为本发明实施例提供的又一种波导滤波器的制备方法的流程图;
图 9为本发明实施例提供的通信设备的剖视图。 具体实施方式 下面将结合本发明实施例中的附图, 对本发明实施例中的技术方案进行清楚、 完整 地描述。 本发明实施例提供了一种波导滤波器, 如图 1至图 3所示, 包括硅材料制成的基底 21; 基底 21中形成有具有平坦侧壁的刻蚀空腔 22, 刻蚀空腔 22的深度 h不大于 0. 7毫米, 且刻蚀空腔 22的侧壁与竖直方向的夹角 Θ不小于 1度; 基底 21上开设有波导口 23, 波导 口 23与刻蚀空腔 22连通并电连接。
本发明实施例提供的波导滤波器中,通过在硅材料制成的基底中形成具有平坦侧壁 的刻蚀空腔, 刻蚀空腔深度可不大于 0. 7毫米, 且刻蚀形成的空腔侧壁具有不小于 1度的 倾角, 由于刻蚀是微机电系统 (Micro-Electro-Mechanical Systems , 简称为: MEMS ) 加工工艺中核心技术之一, 具有 1微米的加工精度, 因此刻蚀空腔作为波导滤波器的谐 振腔, 具有较小的尺寸和较高的精度, 相对于现有的机加工工艺形成的波导滤波器, 尺 寸缩小了 50倍, 精度提高了 20倍, 不仅获得的性能参数能满足应用要求, 且可以实现免 调试, 从而能显著降低高谐振频率的波导滤波器的制造成本。
具体地, MEMS是指可批量制作的, 集微型机构、 微型传感器、 微型执行器以及信号 处理和控制电路、 直至接口、 通信和电源等于一体的微型器件或系统, 而 MEMS加工工艺 是在半导体集成电路微细加工技术和超精密机械加工技术的基础上衍生出来的,其加工 精度可以达到 1微米。
图 3所示的波导滤波器是本发明的一个具体的实施方式, 其中设置了 3个波导口 23, 左侧两个相邻的波导口 23中, 标识为 TX的波导口 23作为信号接收端, 标识为 RX的波导口 23作为信号发送端, 右侧标识为 ANT的波导口 23作为天线端。 该波导滤波器在通信电路 中用作双工器。 图 3中虚线箭头所指的方向是信号传输的方向。
当然, 本发明并不限于此, 波导口可以有两个, 使得该波导滤波器只具有单向滤波 的功能, 波导口也可以有多个, 使得该波导滤波器能用作多工器或合路器。
图 3所示的波导滤波器设置了 3个波导口 23, 为了保证该波导滤波器的输入阻抗与输 出阻抗匹配, 防止高频信号在基底 21内被反射, 图 2中, 在与天线端相邻的基底 21内会 设置匹配节 25, 该匹配节 25是位于基底 21内的突起, 可以是矩形、 三角形或其它不规则 形状, 尺寸也不限于图 2所示, 只要能起到阻抗匹配的作用即可。
需要说明的是: 图 1中刻蚀空腔 22的截面形状为梯形, 且在水平面上水平排布, 如 本领域技术人员所知, 本发明并不限于此, 谐振腔的截面形状也可以是三角形或其它刻 蚀获得的形状, 且谐振腔可以同时在水平面和与水平面垂直的方向上立体排布。
相邻的谐振腔之间通过耦合窗 24耦合,耦合窗的大小也是决定波导滤波器性能的一 个重要参数, 可以根据需要进行设计。 图 1所示的波导滤波器中, 基底 21可以如图 4所示, 包括底板 211、 第一基板 212和第 一盖板 213。 第一基板 212中设有刻蚀通孔 41, 波导口 23设置在第一盖板 213中, 且在底 板 211、 第一基板 212和第一盖板 213的表面镀覆有导电层 42; 当底板 211和第一盖板 213 分别覆盖在刻蚀通孔 41的两端并与第一基板 212键合时, 形成与波导口 23连通并电连接 的刻蚀空腔。
该实施方式采用三层结构的基底 21, 由于其中的第一基板 212中形成的刻蚀通孔 41 最终会作为刻蚀空腔, 因此只需要选择合适厚度的第一基板 212, 就可以确定刻蚀空腔 的深度, 使所形成的刻蚀空腔的深度较易控制。
其中, 第一基板可以为单层硅片或多层硅片的堆叠, 多层硅片中相邻的硅片键合在 一起, 以保证各硅片的导电性能一致。 硅片可以选用直径范围 2寸以上, 厚度范围在 100 微米至 2毫米之间的低阻硅片、 高阻硅片或纯度较低的硅片。 因为纯度较低的硅片价格 较低, 所以选用纯度较低的硅片可以降低波导滤波器的制备成本。
图 1所示的波导滤波器中, 基底 21还可以如图 5所示, 包括第二基板 214和第二盖板 215; 第二基板 214中设有刻蚀凹槽 51, 波导口 23设置在第二盖板 215中, 且在第二基板 214和第二盖板 215的表面镀覆有导电层 52; 当第二盖板 215覆盖在刻蚀凹槽 51的开口侧 并与第二基板键合时, 形成与波导口 23连通并电连接的刻蚀空腔。
该实施方式采用两层结构的基底 21, 可以减少波导滤波器的制造步骤, 从而降低成 本。
其中, 第二基板 214为单层硅片或多层硅片的堆叠, 多层硅片中相邻的硅片键合在 一起, 以保证各硅片的导电性能一致。 硅片可以选用直径范围 2寸以上, 厚度范围在 100 微米至 2毫米之间的低阻硅片、 高阻硅片或纯度较低的硅片。 因为纯度较低的硅片价格 较低, 所以选用纯度较低的硅片可以降低波导滤波器的制备成本。
需要说明的是: 图 1、 图 4和图 5所示的波导滤波器的波导口均设置在盖板上, 但本 发明不限于此, 波导口的位置可以根据实际使用的需要设计在其它位置, 如基板的侧壁 上。
上述实施例提供的波导滤波器中, 导电层的材料可以为金、 银、 铜、 铝、 钯、 镍、 钛、 铬中任意一种或多种的组合。 导电层也可以为多层金属层的堆叠, 例如导电层为两 层金属层的堆叠, 第一层为铝层, 第二层为银层。 多层金属层的堆叠可以提高波导滤波 器表面的导电性能。 而且, 多层金属层中的相邻金属层间可以设置有绝缘层, 例如在堆叠的铝层和银层 之间设置绝缘层, 这样设置可以减小波导滤波器的趋肤效应。 本发明实施例还提供了一种波导滤波器的制备方法, 如图 6及图 1至图 3所示, 该方 法包括如下步骤。
601、 提供硅材料制成的基底 21。
602、 采用微机电系统 (Micro-Electro-Mechanical Systems , 简称为: MEMS ) 加 工工艺在基底 21内形成刻蚀空腔 22, 且在基底 21上形成与刻蚀空腔 22连通并电连接的波 导口 23。
具体地, MEMS是指可批量制作的, 集微型机构、 微型传感器、 微型执行器以及信号 处理和控制电路、 直至接口、 通信和电源等于一体的微型器件或系统, 而 MEMS加工工艺 是在半导体集成电路微细加工技术和超精密机械加工技术的基础上衍生出来的,其加工 精度可以达到 1微米。
本发明实施例提供的波导滤波器的制备方法中, 由于采用了高加工精度的 MEMS加工 工艺, 相对于现有的机加工工艺, 精度提高了 20倍, 因此制备出的高谐振频率的波导滤 波器能满足应用要求, 且由于该波导滤波器的制备精度较高, 可以实现免调试, 从而能 显著降低高谐振频率的波导滤波器的制造成本。
需要说明的是:图 1至图 3中刻蚀空腔 22的截面形状为梯形,且在水平面上水平排布, 如本领域技术人员所知, 本发明并不限于此, 刻蚀空腔的截面形状也可以是三角形或其 它不规则的形状, 且刻蚀空腔可以同时在水平面和与水平面垂直的方向上立体排布, 只 要采用 MEMS加工工艺能够制造获得, 且能达到波导滤波器性能指标要求的刻蚀空腔形状 和排布均能用于本发明。
作为上述波导滤波器的制备方法的进一步细化,本发明实施例还提供了两种波导滤 波器的制备方法, 下面分别参照附图对两种制备方法进行描述。
如图 4和图 7所示, 波导滤波器的制备方法包括如下步骤。
701、 提供基底 21, 该基底 21包括底板 211、 第一基板 212和第一盖板 213。
702、 借助第一光刻掩膜在第一基板 212上刻蚀第一通孔 41。
703、 借助第二光刻掩膜在第一盖板 213上刻蚀第二通孔。
704、 在底板 211、 第一基板 212和第一盖板 213的表面镀覆导电层 42。 705、 将底板 211和第一盖板 213分别覆盖在第一通孔的两端并与第一基板 212键合, 以在基底 21内形成由第一通孔 41构成的刻蚀空腔, 第二通孔与刻蚀空腔连通并电连接, 以作为波导口 23。
通过将表面镀覆导电层 42的底板 211、 第一基板 212和第一盖板 213键合, 可以实现 基底 21的内外表面金属化, 从而实现基底 21表面的电连通, 使得电磁波在基底 21内沿指 定的线路传播。
当波导口的个数为 3个时, 假设图 4中右侧的波导口 23需作为天线端使用, 使用图 7 所示的方法制造该具有 3个波导口的波导滤波器时,在第一基板 212上刻蚀第一通孔的同 时, 可以在第一基板 212内形成标记 25所指的匹配节, 从而在将底板 211、 第一基板 212 和第一盖板 213键合后, 保证波导滤波器输入阻抗和输出阻抗的匹配。
其中, 第一基板 212可以为单层硅片或多层硅片的堆叠, 多层硅片中相邻的硅片键 合在一起, 以保证各硅片的导电性能一致。 硅片可以选用直径范围 2寸以上, 厚度范围 在 100微米至 2毫米之间的低阻硅片、 高阻硅片或纯度较低的硅片。 因为纯度较低的硅片 价格较低, 所以选用纯度较低的硅片可以降低波导滤波器的制备成本。
图 8为本发明实施例提供的另一种波导滤波器的制备方法的流程图,参见图 5和图 8, 该方法包括如下步骤。
801、 提供基底 21, 基底 21包括第二基板 214和第二盖板 215。
802、 借助第三光刻掩膜在第二基板 214上刻蚀凹槽 51。
803、 借助第四光刻掩膜在第二盖板 215上刻蚀第三通孔。
804、 在第二基板 214和第二盖板 215的表面镀覆导电层 52。
805、 将第二盖板 215覆盖在刻蚀凹槽 51的开口侧并与第二基板 214键合, 以在基底 21内形成由刻蚀凹槽 51构成的刻蚀空腔, 第三通孔与刻蚀空腔连通并电连接, 以作为波 导口 23。
通过将表面镀覆导电层 52的第二基板 214和第二盖板 215键合,可以实现基底 21的内 外表面金属化, 从而实现基底 21表面的电连通, 使得电磁波在基底 21内沿指定的线路传 播。
当波导口的个数为 3个时, 假设图 5中右侧的波导口 23需作为天线端使用, 使用图 8 所示的方法制造该具有 3个波导口的波导滤波器时, 在第二基板 214上刻蚀凹槽 51的同 时, 可以在第二基板 214内形成标记 25所指的匹配节, 从而在将第二基板 214和第二盖板 215键合后, 保证波导滤波器输入阻抗和输出阻抗的匹配。 其中, 第二基板 214可以为单层硅片或多层硅片的堆叠, 多层硅片中相邻的硅片键 合在一起, 以保证各硅片的导电性能一致。 硅片可以选用直径范围 2寸以上, 厚度范围 在 100微米至 2毫米之间的低阻硅片、 高阻硅片或纯度较低的硅片。 因为纯度较低的硅片 价格较低, 所以选用纯度较低的硅片可以降低波导滤波器的制备成本。
需要说明的是: 图 4和图 5所示的波导滤波器的波导口均设置在盖板上, 但本发明不 限于此, 波导口的位置可以根据实际使用的需要设计在其它位置, 如基板的侧壁上。 波 导滤波器结构不同, 相应的制备方法也会发生一些变化, 不限于上述两种, 只要是能使 用 MEMS加工工艺制备出所需结构方法步骤均能用于实现本发明。
上述实施例提供的波导滤波器的制备方法中,镀覆导电层的步骤可以采用磁控溅射 工艺或电镀工艺。 镀覆导电层的目的是让制备的波导滤波器的内外表面都导电, 从而使 高频信号能够在谐振腔之间传播, 并能通过波导滤波器导电的外表面传输给与其电连接 的其它元器件。
试验证明,用上述实施例提供的波导滤波器的制备方法,根据预先设计好的尺寸(包 括谐振腔长度、 高度、 耦合窗厚度、 耦合窗开口宽度、 波导口长度、 宽度、 匹配节的长 度、 宽度、 高度)制备的波导滤波器, 在大于 70GHz的频率时, 插入损耗小于 2. 5dB, 收 发抑制度大于 55dB, 满足了波导滤波器的射频指标。
本发明实施例还提供了一种通信设备, 如图 9所示, 该通信设备包括电路板 91, 电 路板 91上安装有上述实施例描述的波导滤波器 92。 由于该波导滤波器 92相对于现有的机 加工工艺形成的波导滤波器,尺寸减小了 50倍,精度提高了 20倍,不仅能满足应用要求, 且可以实现免调试, 从而能显著降低制造成本。
图 9所示的波导滤波器 92与电路板 91的安装方式可以为焊接或压接。 为了保证波导 滤波器 92的波导口 93与电路板 91上对应的端口准确定位, 可以采用在电路板 91上挖槽, 并在电路板 91上设置 3个或 3个以上的限位点 (图中未示出) 。 电路板 91上还安装有通信 芯片 94,与波导滤波器 92的波导口 93电连接,以对从波导口 93获得的高频信号进行处理, 或者将处理过的高频信号通过波导口 93传输至波导滤波器 92。
图 9中, 空心箭头下方的波导口 93为波导滤波器 92的天线端, 空心箭头表示该波导 口 93用于连接天线 95, 波导滤波器 92的天线端下方对应的腔体内设置有匹配节 96, 以保 证该波导滤波器 92的输入阻抗与输出阻抗匹配。
以上所述, 仅为本发明的具体实施方式, 但本发明的保护范围并不局限于此, 任何 熟悉本技术领域的技术人员在本发明揭露的技术范围内, 可轻易想到的变化或替换, 都 应涵盖在本发明的保护范围之内。 因此, 本发明的保护范围应以所述权利要求的保护范 围为准。

Claims

权利要求
1、 一种波导滤波器, 其特征在于, 包括: 硅材料制成的基底;
所述基底中形成有具有平坦侧壁的刻蚀空腔,所述刻蚀空腔的深度不大于 0. 7毫米, 且刻蚀空腔的所述侧壁与竖直方向的夹角不小于 1度;
所述基底上开设有波导口, 所述波导口与所述刻蚀空腔连通并电连接。
2、 根据权利要求 1所述的波导滤波器, 其特征在于, 所述基底包括底板、 第一基板 和第一盖板;
所述第一基板中设有刻蚀通孔,所述波导口设置在所述第一盖板中,且在所述底板、 所述第一基板和所述第一盖板的表面镀覆有导电层; 当所述底板和所述第一盖板分别覆 盖在所述刻蚀通孔的两端并与所述第一基板键合时, 形成与所述波导口连通并电连接的 所述刻蚀空腔。
3、 根据权利要求 2所述的波导滤波器, 其特征在于, 所述第一基板为单层硅片或多 层硅片的堆叠, 所述多层硅片中相邻的硅片键合在一起。
4、 根据权利要求 1所述的波导滤波器, 其特征在于, 所述基底包括第二基板和第二 盖板;
所述第二基板中设有刻蚀凹槽, 所述波导口设置在所述第二盖板中, 且在所述第二 基板和所述第二盖板的表面镀覆有导电层; 当所述第二盖板覆盖在所述刻蚀凹槽的开口 侧并与所述第二基板键合时, 形成与所述波导口连通并电连接的所述刻蚀空腔。
5、 根据权利要求 4所述的波导滤波器, 其特征在于, 所述第二基板为单层硅片或多 层硅片的堆叠, 所述多层硅片中相邻的硅片键合在一起。
6、 根据权利要求 2或 4所述的波导滤波器, 其特征在于, 所述导电层的材料为金、 银、 铜、 铝、 钯、 镍、 钛、 铬中任意一种或多种的组合。
7、 根据权利要求 2或 4所述的波导滤波器, 其特征在于, 所述导电层为多层金属层 的堆叠。
8、 根据权利要求 7所述的波导滤波器, 其特征在于, 所述多层金属层中的相邻金属 层间设置有绝缘层。
9、 一种波导滤波器的制备方法, 其特征在于, 包括:
提供硅材料制成的基底;
采用微机电系统 MEMS加工工艺在所述基底内形成刻蚀空腔, 且在所述基底上形成与 所述刻蚀空腔连通并电连接的波导口。
10、 根据权利要求 9所述的波导滤波器的制备方法, 其特征在于, 所述基底包括底 板、 第一基板和第一盖板;
所述采用 MEMS加工工艺在所述基底内形成刻蚀空腔, 且在所述基底上形成与所述刻 蚀空腔连通并电连接的波导口具体包括:
借助第一光刻掩膜在所述第一基板上刻蚀第一通孔;
借助第二光刻掩膜在所述第一盖板上刻蚀第二通孔;
在所述底板、 所述第一基板和所述第一盖板的表面镀覆导电层;
将所述底板和所述第一盖板分别覆盖在所述第一通孔的两端并与所述第一基板键 合, 以在所述基底内形成由所述第一通孔构成的所述刻蚀空腔, 所述第二通孔与所述刻 蚀空腔连通并电连接, 以作为所述波导口。
11、 根据权利要求 9所述的波导滤波器的制备方法, 其特征在于, 所述基底包括第 二基板和第二盖板;
所述采用 MEMS加工工艺在所述基底内形成刻蚀空腔, 且在所述基底上形成与所述刻 蚀空腔连通并电连接的波导口具体包括:
借助第三光刻掩膜在所述第二基板上刻蚀凹槽;
借助第四光刻掩膜在所述第二盖板上刻蚀第三通孔;
在所述第二基板和所述第二盖板的表面镀覆导电层;
将所述第二盖板覆盖在所述刻蚀凹槽的开口侧并与所述第二基板键合, 以在所述基 底内形成由所述刻蚀凹槽构成的所述刻蚀空腔,所述第三通孔与所述刻蚀空腔连通并电 连接, 以作为所述波导口。
12、 根据权利要求 10或 11所述的波导滤波器的制备方法, 其特征在于, 所述镀覆导 电层采用磁控溅射工艺或电镀工艺。
13、 一种通信设备, 包括电路板, 其特征在于, 所述电路板上安装有权利要求 1-8 任一项所述的波导滤波器。
14、 根据权利要求 13所述的通信设备, 其特征在于, 所述波导滤波器与所述电路板 的安装方式为焊接或压接。
PCT/CN2013/084266 2013-05-24 2013-09-26 波导滤波器、其制备方法及通信设备 WO2014187055A1 (zh)

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